Symmetry adjustment module and method for adjusting symmetry

Abstract

The present invention relates to a symmetry adjustment module for adjusting the symmetry of a first output driver stage and a second output driver stage, comprising: a sampling circuit, the sampling circuit is coupled to the first output driver stage and the second output driver stage, and is configured to output a sampling voltage related to a first equivalent impedance of the first output driver stage and a second equivalent impedance of the second output driver stage; a reference voltage generating circuit, the reference voltage generating circuit is configured to generate a reference voltage; a comparison circuit, the comparison circuit is coupled to the sampling circuit and the reference voltage generating circuit and is configured to compare the sampling voltage with the reference voltage to output a control signal; the symmetry adjustment module generates an adjustment signal based on the control signal, the adjustment signal is used to adjust the first equivalent impedance and / or the second equivalent impedance until symmetry between the first output driver stage and the second output driver stage is achieved.

Description

Technical Field

[0001] The present invention relates to a symmetry adjustment module and a method for adjusting symmetry. More specifically, the present invention relates to a symmetry adjustment module for a transmitter of a bus system for transmitting signals in a differential manner, and a method for adjusting the symmetry of a first output driver stage and a second output driver stage of the transmitter. Background Art

[0002] The bus system is a communication system used to transmit data and control signals in various electronic devices. It usually includes a set of parallel or serial lines for connecting various devices to achieve communication and coordination between various devices. The bus typically adopts differential transmission signal transmission technology because it has the advantages of strong anti-interference ability, long transmission distance, and fast transmission speed. Differential transmission refers to the transmission of signals on both signal lines, and the two signals have the same amplitude and opposite phase. The signal transmitted on these two signal lines is usually called a differential signal. In a differential signal, one signal line carries a positive signal and the other signal line carries a reverse signal. Their difference constitutes the effective signal transmitted, that is, the differential mode voltage. The average value of the voltage on the two signal lines is the common mode voltage. The common mode voltage is usually caused by interference or signal line imbalance, which may interfere with or damage the signal transmission. Therefore, in differential signal transmission, the common mode voltage is usually suppressed or shielded to ensure the reliability and stability of signal transmission.

[0003] The bus system can usually use various communication protocols to transmit signals between nodes. For example, in various industries today, especially in the automotive industry, various electronic control systems have been developed due to the requirements of safety, comfort, convenience, low pollution and low cost. Since the data types used for communication between these systems and the requirements for reliability are different, and they often include multiple buses, the number of wiring harnesses also increases. In order to reduce the number of wiring harnesses and the need for high-speed communication of large amounts of data through multiple LANs (Local Area Networks), in 1986, the German electrical company Bosch developed the CAN communication protocol for automotive communication. CAN is the abbreviation of Controller Area Network (hereinafter referred to as CAN), which is an ISO internationally standardized serial communication protocol. Since then, CAN has been standardized through standards such as ISO 11898 and ISO 11519. So far, CAN has become a widely used standard protocol for automotive networks. On the basis of CAN, CAN FD (abbreviation for CAN with Flexible Data rate) has also been proposed. In the following, they are collectively referred to as CAN without distinction.

[0004] For such bus systems that transmit signals in a differential manner, the symmetry of the transmitter needs to meet certain requirements to achieve the desired signal transmission level. For example, the CAN bus system is a bus interface with differential input and output. The standard ISO11898-2 has clear requirements for the symmetry of the CAN transmitter. For example, the standard ISO 11898-2 points out that in order to achieve an acceptable transmission level, the transmitter must meet the clear standards for signal symmetry, namely: V sym =(V CAN_H +V CAN_L ) / VCC must be in the range of 0.9 to 1.1, where VCC is the supply voltage of the transmitter.

[0005] However, during the signal transmission process of such bus systems, the common-mode voltage of the bus output signal may be offset. For example, in the case of the CAN bus, during the switching process of the two driver tubes P0 and N0, due to non-ideal factors such as asymmetric on-resistance between the two bus terminals CANH and CANL, unequal parasitic capacitance of the driver tube, or asymmetric switch signal transmission, asymmetric switch control caused by the current limiting circuit, etc., the two bus terminals CANH and CANL may not respond synchronously, and the common-mode voltage of the bus output signal may be offset, which may exceed the range required for symmetry in the standard ISO 11898-2, and even affect the application of the CAN bus in high-speed scenarios and electromagnetic compatibility (EMC). Moreover, the standard ISO11898-2 allows a 4.7nF common-mode capacitor under symmetry testing, and the symmetry of the output with a common-mode capacitor is usually better. However, in actual applications, there is an increasing tendency not to use common-mode capacitors to save costs. When the output stage circuit of the traditional transmitter does not have the filtering effect of the common-mode capacitor, the symmetry of the bus output is poor, resulting in failure to meet the requirements specified in the standard, affecting the communication quality.

[0006] Therefore, it is necessary to be able to adjust and improve the symmetry of the output of the bus system. Some solutions in the prior art are costly or have problems in long-term use. Another solution is to adjust the symmetry after detecting asymmetry on the bus CANH and CANL, which makes the adjustment speed slow and difficult to obtain satisfactory results. Summary of the invention

[0007] In view of the above, one of the purposes of the present disclosure is to solve or at least alleviate the problems described above. To this end, the present invention proposes a symmetry adjustment module for adjusting the signal symmetry of a bus system and a method for adjusting the symmetry to ensure that good symmetry can be obtained, thereby meeting the requirements of the communication protocol and ensuring the communication quality. With the help of the present invention, it is also possible to quickly adjust the symmetry in a cost-effective manner. Compared with the adjustment in the prior art, the present invention allows the symmetry to be dynamically adjusted more quickly, thereby ensuring the symmetry of the differential output stage.

[0008] According to a first aspect of the present invention, a symmetry adjustment module is proposed for adjusting the symmetry of a first output driver stage and a second output driver stage, the symmetry adjustment module comprising: a sampling circuit, the sampling circuit is coupled to the first output driver stage and the second output driver stage, and is configured to output a sampling voltage related to a first equivalent impedance of the first output driver stage and a second equivalent impedance of the second output driver stage; a reference voltage generating circuit, the reference voltage generating circuit is configured to generate a reference voltage; a comparison circuit, the comparison circuit is coupled to the sampling circuit and the reference voltage generating circuit and is configured to compare the sampling voltage with the reference voltage to output a control signal. The symmetry adjustment module generates an adjustment signal based on the control signal, and the adjustment signal is used to adjust the first equivalent impedance and / or the second equivalent impedance until symmetry between the first output driver stage and the second output driver stage is achieved.

[0009] According to an exemplary aspect of the present disclosure, a symmetry adjustment module is used for a CAN transmitter, which includes a first bus terminal and a second bus terminal. A first end of a first output driver stage is coupled to a power supply voltage VCC, and a second end of the first output driver stage is coupled to the first bus terminal and the second bus terminal. A first end of a second output driver stage is coupled to a reference potential, and a second end of the second output driver stage is coupled to the first bus terminal and the second bus terminal. With the aid of the symmetry adjustment module, the symmetry of a differential output stage can be ensured.

[0010] According to an exemplary aspect of the present disclosure, the first output driver stage includes a first driver tube, and the sampling circuit includes a first sampling transistor coupled to the gate of the first driver tube. The size of the first sampling transistor is reduced by a first ratio based on the size of the first driver tube. According to an exemplary aspect of the present disclosure, the second output driver stage includes a second driver tube, and the sampling circuit includes a second sampling transistor coupled to the gate of the second driver tube, wherein the size of the second sampling transistor is reduced by a second ratio based on the size of the second driver tube. According to an example of the present disclosure, the first ratio is equal to the second ratio.

[0011] According to an exemplary aspect of the present disclosure, the second end of the first sampling transistor and the second end of the second sampling transistor are coupled to a sampling node, and the sampling node is used to output a sampling voltage.

[0012] According to an exemplary aspect of the present disclosure, the first terminal of the first sampling transistor is coupled to the power supply voltage VCC, the control terminal is coupled to the control terminal of the first driving tube and receives the adjustment signal. According to an exemplary aspect of the present disclosure, the first terminal of the second sampling transistor is coupled to the reference potential, the control terminal is coupled to the control terminal of the second driving tube and receives the adjustment signal.

[0013] According to an exemplary aspect of the present disclosure, the reference voltage includes a first reference voltage VREF1 and a second reference voltage VREF2. The reference voltage generating circuit includes a first reference voltage generating circuit for generating the first reference voltage VREF1 and a second reference voltage generating circuit for generating the second reference voltage VREF2. The symmetry adjustment module has a power supply voltage VCC coupled to the sampling circuit and the first output driver stage. According to an exemplary aspect of the present invention, the first reference voltage VREF1, the second reference voltage VREF2 and the power supply voltage VCC satisfy: VREF1>VCC / 2>VREF2.

[0014] According to an exemplary aspect of the present disclosure, the comparison circuit includes a first operational amplifier and a second operational amplifier. The input end of the first operational amplifier is coupled to a first reference voltage generating circuit and a sampling circuit to compare the sampled voltage with the first reference voltage to output a first control signal. The input end of the second operational amplifier is coupled to a second reference voltage generating circuit to compare the sampled voltage with a second reference voltage VREF2 to output a second control signal. The symmetry adjustment module generates an adjustment signal based on the first control signal and / or the second control signal.

[0015] According to an exemplary aspect of the present disclosure, the symmetry adjustment module further includes a switch configured to switch the symmetry adjustment module on or off.

[0016] According to an exemplary aspect of the present disclosure, the symmetry adjustment module is used for a CAN transmitter, and controls the switch to be turned on or off based on a switch control signal. The switch control signal is generated based on a pulse signal received by the CAN transmitter: when the rising edge of the pulse signal arrives, the switch control signal jumps from a first state to a second state, and after a delay time, the switch control signal is flipped.

[0017] With the aid of the symmetry adjustment module according to the present invention, even when there are large differences in the control signals and device characteristics on both sides of the transmitter output stage circuit bus, the common mode voltage of the bus output can still be well controlled within a small range of variation. In the case of application to CAN transmitters, when considering more extreme cases, assuming that there is a 30% mismatch between the current limiting circuit and the gate voltage control signal of the switch driver tube, when there is no symmetry adjustment module proposed by the present invention, the output of the bus shows obvious asymmetry, and the output common mode voltage will obviously deviate from VCC / 2. However, when the symmetry adjustment module according to the present invention is applied, even in the case of a larger mismatch, the output of the bus can still show the desired symmetry.

[0018] Furthermore, the optimization of symmetry greatly improves the electromagnetic compatibility (EMC) of the transceiver used in the bus system, ensures the symmetry of the impedance at both ends of the bus system, and ensures that the receiving end of the bus will not output glitches even if it is disturbed.

[0019] Meanwhile, CAN is developing towards high-speed applications, and the higher the speed of communication, the higher the requirement for symmetry. The optimization of symmetry by the present invention greatly improves the application rate of CAN.

[0020] Moreover, by means of the symmetry adjustment module according to the present invention, the bus symmetry is optimized, and the bus output symmetry can be well performed even in the application scenario without common mode capacitors. Therefore, the present invention allows to improve the symmetry at a very low cost while reducing the cost of system application.

[0021] According to another aspect of the present disclosure, a method for adjusting symmetry is provided, the method comprising: collecting a sampled voltage related to a first equivalent impedance of a first output driver stage and a second equivalent impedance of a second output driver stage. The method further comprises comparing the sampled voltage with a reference voltage to generate a control signal. The method further comprises: generating an adjustment signal based on the control signal to adjust the first equivalent impedance and / or the second equivalent impedance until symmetry between the first output driver stage and the second output driver stage is achieved.

[0022] According to an exemplary aspect of the present disclosure, a method for adjusting symmetry is used to adjust the symmetry of a first output driver stage and a second output driver stage of a CAN transmitter.

[0023] The methods according to the present disclosure achieve the same advantages as set forth above with reference to the symmetry adjustment module.

[0024] The invention summary is provided to introduce the principles of the present invention in a simplified form, which will be further described in the following detailed description. The invention summary is not intended to define the key features or main features of the present disclosure, nor is it intended to limit the scope of the present disclosure. BRIEF DESCRIPTION OF THE DRAWINGS

[0025] Now, the specific embodiments according to the principles of the present invention will be described as examples with reference to the accompanying drawings, and the above and other purposes, features and advantages of the embodiments of the present disclosure will become easy to understand. In the accompanying drawings, several embodiments of the present disclosure are shown in an exemplary and non-limiting manner, wherein:

[0026] Figure 1 A simplified block diagram of a transmitter including a symmetry adjustment module according to an embodiment of the present invention is exemplarily illustrated.

[0027] Figure 2 A transmitter including a symmetry adjustment module according to a further embodiment of the present invention is exemplarily illustrated.

[0028] Figure 3 A transmitter including a symmetry adjustment module according to yet another embodiment of the present invention is exemplarily illustrated.

[0029] Figure 4 The method of adjusting the symmetry according to the invention is schematically illustrated.

[0030] Figure 5 The various signals in a transmitter including a symmetry adjustment module according to the present invention are schematically illustrated.

[0031] Figure 6 Various signals in the transmitter are schematically illustrated, wherein the upper diagram shows the signal response obtained without the symmetry adjustment module, and the lower diagram shows the signal response obtained with the symmetry adjustment module. DETAILED DESCRIPTION

[0032] The inventive concept will now be described more fully below with reference to the accompanying drawings, in which exemplary embodiments are shown. However, the concepts of the present invention may be embodied in many different forms and should not be construed as being limited to the embodiments set forth herein; on the contrary, these embodiments are provided as examples, so that this disclosure will be thorough and complete and will fully convey the scope of the inventive concept to those skilled in the art. Throughout the specification, the same reference numerals refer to the same parts. Moreover, in describing the preferred embodiments illustrated in the figures, specific terms are employed for clarity. However, the disclosure of this patent application is not intended to be limited to the specific terms mentioned, and it should be understood that each specific element includes all technical equivalents that work in a similar manner.

[0033] The term "including" and its variations used in this document represent open inclusion, that is, "including but not limited to". Unless otherwise stated, the term "or" means "and / or". The term "based on" means "based at least in part on". The terms "an example embodiment" and "an embodiment" mean "at least one example embodiment". The term "another embodiment" means "at least one other embodiment". The terms "first", "second", etc. may refer to different or the same objects. The term "module" may refer to a unit including one or a combination of hardware, software, and firmware. For example, the term "module" may be used interchangeably with the terms "unit", "logic", "logic block", "component" or "circuit".

[0034] "Coupling" or "connection" in the specification includes both direct connection and indirect connection. Indirect connection is a connection through an intermediate medium, such as a connection through an electrical conductive medium such as a conductor, wherein the electrical conductive medium may contain parasitic inductance or parasitic capacitance, or a connection through an intermediate circuit or component described in the embodiments of the specification; indirect connection may also include a connection through other active or passive devices on the basis of achieving the same or similar functions. The term "and / or" or "and / or" includes any one of the associated listed items and all combinations of one or more thereof.

[0035] Embodiments of the present disclosure relate to bus systems that transmit signals in a differential transmission mode, including but not limited to bus systems such as CAN and FlexRay. In the following, for the purpose of simplicity, the description is made by way of example with the aid of the CAN bus. However, as those skilled in the art will readily appreciate, the scope of the present application is not intended to be limited to the CAN bus, but may be applicable to any suitable bus system that transmits signals in a differential transmission mode.

[0036] Figure 1 A transmitter 10 of a bus system (not shown) is schematically shown. The following will describe an embodiment by way of example of a CAN bus, but other bus systems are also possible. The transmitter 10 receives a TXD signal from a microcontroller unit (MCU, not shown in the figure) and then drives two signal lines of the CAN bus. The transmitter 10 generally includes a common mode voltage (VCM) generating circuit 11, a transmit data logic circuit 12, a first output driver stage 13 and a second output driver stage 14. A first terminal of the first output driver stage 13 is coupled to a power supply voltage VCC, and a first terminal of the second output driver stage 14 is coupled to a reference potential. In some embodiments, as Figure 1 As shown, the first output driver stage 13 includes a first driver transistor P0, and the second output driver stage 14 includes a second driver transistor N0.

[0037] The transmitter 10 also includes positive and negative voltage protection diodes D1 and D2. Figure 1 Examples of the positive and negative voltage prevention diodes D1 and D2 are only schematically shown. In some embodiments, the positive and negative voltage prevention diodes D1 and D2 can be implemented by a single device, such as a LDMOS (lateral double diffused metal oxide semiconductor) tube, a diode, a parasitic diode, etc. In other embodiments, the positive and negative voltage prevention diodes D1 and D2 can be implemented by a combination of multiple devices, including LDMOS tubes, diodes, parasitic diodes, etc. In other embodiments, the positive and negative voltage prevention diodes D1 and D2 can be MOS (metal oxide semiconductor) diodes formed by parasitic diodes or body diodes. In a preferred embodiment, for example, D1 may include an NLDMOS (N-channel lateral double diffused metal oxide semiconductor) tube and a PLDMOS (P-channel lateral double diffused metal oxide semiconductor) tube.

[0038] In addition, the transmitter 10 also includes a bus differential input resistor Rin. The transmitter 10 includes a first bus terminal CANH and a second bus terminal CANL to be coupled to two signal lines of the CAN bus respectively. The second end of the first output driver stage 13 is coupled to the first bus terminal CANH and the second bus terminal CANL. The second end of the second output driver stage 14 is coupled to the first bus terminal CANH and the second bus terminal CANL. In some embodiments, the transmitter 10 may further include a drive circuit 15 for controlling the output driver stage.

[0039] Figure 1 The dotted box in FIG. 1 shows a simplified block diagram of the symmetry adjustment module 100 according to the present invention. Due to process deviation, asynchronism of control signals or other non-ideal factors, the first output driver stage 13 and the second output driver stage 14 may have a certain degree of asymmetry, resulting in the two bus terminals CANH and CANL being unable to respond synchronously, and the common mode voltage of the bus output signal being offset, thereby adversely affecting the communication quality. Therefore, the symmetry adjustment module 100 is provided to adjust the symmetry of the first output driver stage 13 and the second output driver stage 14 so that the symmetry can meet the requirements of the communication standard.

[0040] like Figure 1As shown, the symmetry adjustment module 100 includes a power supply voltage VCC, a sampling circuit 101, a reference voltage generation circuit 102, and a comparison circuit 103. The sampling circuit 101 is coupled to the first output driving stage 13 and the second output driving stage 14. In some embodiments, the sampling circuit 101 may also be coupled to the driving circuit 15. In other embodiments, the sampling circuit may be directly coupled to the transmit data logic circuit 12. The sampling circuit 101 is configured to sample the voltages of the first and second output driving stages and output a sampled voltage VOC_SENSE, which is related to the first equivalent impedance of the first output driving stage and the second equivalent impedance of the second output driving stage. The first equivalent impedance of the first output driving stage includes the equivalent impedances of the first driving transistor P0 and the diode D1. In some embodiments, the first equivalent impedance is mainly determined by the equivalent impedance of the first driving transistor P0. The second equivalent impedance of the second output driving stage includes the equivalent impedances of the second driving transistor N0 and the diode D2. In some embodiments, the second equivalent impedance is mainly determined by the equivalent impedance of the second driving transistor N0. The sampled voltage VOC_SENSE collected by the sampling circuit can quickly reflect the asymmetry that occurs between the first output driving stage and the second output driving stage, even before the asymmetry occurs between the first bus terminal CANH and the second bus terminal CANL.

[0041] The reference voltage generation circuit 102 is configured to generate a reference voltage. In a preferred embodiment, the reference voltage includes a first reference voltage VREF1 and a second reference voltage VREF2. As Figure 1 shown, the reference voltage generation circuit 102 may include a first reference voltage generation circuit for generating the first reference voltage VREF1 and a second reference voltage generation circuit for generating the second reference voltage VREF2. The settings of the first and second reference voltages VREF1, VREF2 may refer to the power supply voltage VCC. The settings of the first and second reference voltages VREF1, VREF2 affect the sensitivity of the symmetry adjustment module 100. The first and second reference voltages VREF1, VREF2 can be set according to the desired sensitivity and stability. In some embodiments, the first reference voltage VREF1 is set to satisfy: VREF1 > VCC / 2. In a preferred embodiment, the first reference voltage VREF1 is set to be slightly greater than VCC / 2. In some embodiments, the second reference voltage VREF2 is set to satisfy: VREF2 < VCC / 2. In a preferred embodiment, the second reference voltage VREF2 is set to be slightly less than VCC / 2. In some examples, when VCC is 5V, VREF1 can be 2.6V and VREF2 can be 2.4V. In other examples, when VCC is 5V, VREF1 can be 3V and VREF2 can be 2V.

[0042] The comparison circuit 103 is coupled to the sampling circuit 101 and the reference voltage generating circuit 102. The sampling voltage VOC_SENSE and the reference voltage collected by the sampling circuit are input into the comparison circuit 103 for comparison. The comparison circuit 103 outputs control signals C1 and C2 based on the comparison result between the sampling voltage VOC_SENSE and the reference voltage. In some embodiments, the control signals C1 and C2 may be input into the driving circuit 15. In other embodiments, the control signals C1 and C2 may be input into the sending data logic circuit 12. The symmetry adjustment module 100 generates an adjustment signal based on the control signals C1 and C2. The adjustment signal is used to adjust the first equivalent impedance and / or the second equivalent impedance until symmetry between the first output driver stage and the second output driver stage is achieved. In this way, the symmetry of the differential output stage is achieved. The adjustment signal acts on the first output driver stage 13 and / or the second output driver stage 14 so that the equivalent impedances on both sides of VOC_SENSE are equal.

[0043] The adjustment process of the symmetry adjustment module 100 is described by way of example. When it is detected that the sampling voltage VOC_SENSE is greater than the first reference voltage VREF1, the equivalent impedance of the first output drive side is greater than the equivalent impedance of the second output drive side. The symmetry adjustment module 100 outputs an adjustment signal to pull up the gate voltages of the first drive tube P0 and the second drive tube N0, reduce the equivalent impedance of the first drive tube P0 through negative feedback, and increase the equivalent impedance of the second drive tube N0 until the equivalent impedances on both sides of VOC_SENSE are equal, and the equivalent impedances of the first and second drive tubes P0 and N0 are also equal. At this time, the common mode voltages of the two bus terminals CANH and CANL are near VCM. Thus, good symmetry of the bus output is obtained. The adjustment process when the sampling voltage VOC_SENSE is less than the second reference voltage VREF2 is also similar, and will not be repeated here.

[0044] Figure 2 A transmitter 10 including a symmetry adjustment module 100 is schematically shown, wherein an exemplary embodiment of a sampling circuit is shown. Figure 1 Similar parts can refer to the above description and will not be repeated here. The sampling circuit includes a first sampling transistor P1 and a second sampling transistor N1. The first sampling transistor P1 is coupled to the first output driver stage 13. In some embodiments, the first sampling transistor P1 can be coupled to the gate of the first driver tube. In some more specific embodiments, the first end of the first sampling transistor P1 is coupled to the power supply voltage VCC, the second end is coupled to the sampling node SN, and the control end is coupled to the control end of the first driver tube P0 and receives the adjustment signal. The size of the first sampling transistor P1 is reduced by a first ratio based on the size of the first driver tube P0.

[0045] The second sampling transistor N1 is coupled to the second output driver stage 14. In some embodiments, the second sampling transistor N1 is coupled to the gate of the second driver tube N0. In some embodiments, the first terminal of the second sampling transistor N1 is coupled to the reference potential, the second terminal is coupled to the sampling node SN, and the control terminal is coupled to the control terminal of the second driver tube and receives the adjustment signal. The size of the second sampling transistor N1 is reduced by a second ratio based on the size of the second driver tube N0, wherein the first ratio is equal to the second ratio.

[0046] The first output driver stage 13 and the second output driver stage 14 are replicated by the first sampling transistor P1 and the second sampling transistor N1. Moreover, since the sizes of the first and second sampling transistors P1 and N1 are reduced by a first ratio based on the sizes of the first and second driver tubes P0 and N0, when asymmetry occurs, the responses of the first and second sampling transistors P1 and N1 are even faster than the outputs of the first and second driver tubes P0 and N0. Once asymmetry occurs at the first and second output driver stages, the sampled voltage VOC_SENSE collected at the sampling node SN can immediately reflect the occurrence of asymmetry, earlier than the asymmetry that will appear at the bus terminals CANH and CANL.

[0047] exist Figure 2 In the illustrated embodiment, the comparison circuit compares the sampled voltage VOC_SENSE with the first reference voltage VREF1 and the second reference voltage VREF2. When the sampled voltage VOC_SENSE is between the first reference voltage VREF1 and the second reference voltage VREF2, it indicates that the symmetry can meet expectations. At this time, the value of the sampled voltage VOC_SENSE is close to VCC / 2. If VOC_SENSE is greater than VREF1, it is determined that asymmetry has occurred. If VOC_SENSE is less than VREF2, it is also determined that asymmetry has occurred. Once it is determined that asymmetry has occurred, the symmetry needs to be adjusted. At this time, the comparison circuit outputs a control signal. The symmetry adjustment module 100 generates an adjustment signal based on the control signal.

[0048] In some embodiments, taking the asynchronous opening time of the driver tube as an example, when VOC_SENSE is greater than VREF1, it means that the first driver tube P0 may be opened too early compared to the second driver tube N0. At this time, the adjustment signal pulls up the voltage at the gate of the first driver tube P0 and the gate of the second driver tube N0, reduces the equivalent impedance of the first output driver stage through negative feedback, and increases the equivalent impedance of the second output driver stage until the equivalent impedances on both sides of VOC_SENSE are equal. In some embodiments, when VOC_SENSE is less than VREF2, it means that the first driver tube P0 may be opened too late compared to the second driver tube N0. At this time, the adjustment signal pulls down the voltage at the gate of the first driver tube P0 and the gate of the second driver tube N0, increases the equivalent impedance of the first output driver stage through negative feedback, and reduces the equivalent impedance of the second output driver stage until the equivalent impedances on both sides of VOC_SENSE are equal.

[0049] Figure 3 An implementation of a reference voltage generating circuit is exemplarily shown in FIG. A first reference voltage generating circuit for generating a first reference voltage VREF1 includes a current source I1 and a first resistor R1 coupled to a power supply voltage VCC. A comparison circuit 103 is coupled between the current source I1 and the first resistor R1 to input the first reference voltage VREF1 into the comparison circuit. A second reference voltage generating circuit for generating a second reference voltage VREF2 includes a current source I2 and a second resistor R2 coupled to a power supply voltage VCC. A comparison circuit 103 is coupled between the second current source I2 and the second resistor R2 to input the second reference voltage VREF2 into the comparison circuit. A common mode voltage generating circuit 11 and a bus differential input resistor Rin may be coupled between the first resistor R1 and the second resistor R2. Other implementations of the reference voltage generating circuit are also feasible, as long as a suitable reference voltage can be generated.

[0050] In some embodiments, the comparison circuit 103 includes an operational amplifier configured to compare the sampled voltage VOC_SENSE with a reference voltage to detect the asymmetry between the first output driver circuit and the second output driver circuit. Figure 3As shown, the operational amplifier is a three-input operational amplifier, and the two negative input terminals of the three-input operational amplifier are respectively coupled to the first reference voltage generating circuit and the second reference voltage generating circuit. The positive input terminal of the three-input operational amplifier is coupled to the sampling circuit. Specifically, the positive input terminal of the three-input operational amplifier can be coupled to the sampling node SN. The output terminal of the three-input operational amplifier is coupled to the sending data logic circuit 12. In another embodiment, the output terminal of the three-input operational amplifier can be coupled to the driving circuit 15. The three-input operational amplifier can compare the sampling voltage VOC_SENSE with the first reference voltage VREF1 to output the first control signal C1. The three-input operational amplifier can compare the sampling voltage VOC_SENSE with the second reference voltage VREF2 to output the second control signal C2. The symmetry adjustment module generates an adjustment signal based on the first control signal C1 and / or the second control signal C2.

[0051] In some embodiments, the comparison circuit includes a first operational amplifier and a second operational amplifier (not shown). The input terminal of the first operational amplifier is coupled to the first reference voltage generating circuit and the sampling circuit to compare the sampling voltage VOC_SENSE with the first reference voltage VREF1 to output the first control signal C1. The input terminal of the second operational amplifier is coupled to the second reference voltage generating circuit to compare the sampling voltage VOC_SENSE with the second reference voltage VREF2 to output the second control signal C2. The symmetry adjustment module generates an adjustment signal based on the first control signal C1 and / or the second control signal C2.

[0052] In some embodiments, the symmetry adjustment module 100 may further include switches S1 and S2. Switches S1 and S2 are configured to turn on or off the symmetry adjustment module. When the symmetry adjustment module is used for a CAN transmitter, switches S1 and S2 are controlled to turn on or off based on a switch control signal. In some embodiments, a switch control signal may be generated based on a pulse signal received by the CAN transmitter, and when the rising edge of the pulse signal arrives, the switch control signal jumps from a first state to a second state. The switch control signal may be flipped after a delay time. The time for the symmetry adjustment circuit to act may be controlled by switches S1 and S2. For example, in some embodiments, switches S1 and S2 are turned on only during the process of switching states of the transmitter. Switches S1 and S2 are turned off when the transmitter is in a dominant state or a recessive state, thereby disabling the symmetry adjustment module. This can avoid interference to VOC_SENSE during the level stabilization stage, causing the symmetry adjustment module to respond all the time. In this way, turning on the switch only when the symmetry needs to be adjusted can also save power consumption.

[0053] Figure 4A method 400 for adjusting symmetry according to an embodiment of the present invention is schematically shown. The method 400 includes step S401, where a sampled voltage VOC_SENSE related to a first equivalent impedance of a first output driver stage and a second equivalent impedance of a second output driver stage is collected. The method 400 may continue to step S402, where the sampled voltage VOC_SENSE is compared with a reference voltage to generate a control signal. Then, the method 400 may continue to step S403, where an adjustment signal is generated based on the control signal in step S402 to adjust the first equivalent impedance and the second equivalent impedance until symmetry between the first output driver stage and the second output driver stage is achieved. Thus, the symmetry of the differential output stage can be quickly achieved. The method 400 may be used to adjust the symmetry between the first driver stage and the second driver stage of a CAN transmitter. The method 400 may also be used to adjust other bus systems that transmit signals in a differential manner. The method 400 may also include any other suitable steps, not limited to the steps shown in the figure.

[0054] Figure 5 Schematically illustrates the Figure 3 The symmetry regulation module regulates the various signals in the transmitter. The schematic diagram at the top includes a curve 501 of the sampling voltage VOC_SENSE at the sampling node SN, a curve 502 of the first reference voltage VREF1, and a curve 503 of the second reference voltage. The schematic diagram in the middle shows curves 511 and 512 of the gate voltages VPB and VNB of the driving tube P0 and the second driving tube N0. VPB and VNB can also represent the voltages at the gates of the first sampling transistor P1 and the second sampling transistor N1, respectively. The schematic diagram at the bottom shows curves 521 and 522 of the voltages CAN_H and CAN_L at the two bus terminals CANH and CANL. From Figure 5 As can be seen from the figure, when VOC_SENSE is detected to exceed the reference voltages VREF1 and VREF2, Figure 5 As shown in the schematic diagram at the top, in the case of a large mismatch (as shown by the obvious peaks and valleys of curve 501), the gate voltages VPB and VNB can respond immediately to adjust the voltages at the gates of the first sampling transistor P1 and the second sampling transistor N1, so that the equivalent impedances of the first driving transistor P0 and the second driving transistor N0, which are amplified in equal proportion, are equal. As a result, curves 521 and 522 are in a relatively symmetrical state, and the desired symmetry is obtained. Figure 5 As shown in , there is almost no delay or only a very short delay.

[0055] Combine the following Figure 6To compare the voltage responses obtained when the transmitter has and does not have a symmetry adjustment module. The figure at the upper left shows curves 601 and 602 of the gate voltages VPB and VNB obtained when there is no symmetry adjustment module. The figure at the upper right shows curves 603 and 604 of the voltages CAN_H and CAN_L at the two bus terminals CANH and CANL obtained when there is no symmetry adjustment module. As indicated by the dotted parts 605 and 606 in the figure, there is a significant depression in the output at the two bus terminals CANH and CANL, and the common mode voltage deviates significantly from VCC / 2, showing obvious asymmetry. The figure at the bottom shows the voltage response in the transmitter with the same conditions as the figure at the top, except that it has a symmetry adjustment module. The figure at the lower left shows curves 611 and 612 of the gate voltages VPB and VNB obtained. The figure at the lower right shows curves 613 and 614 of the voltages CAN_H and CAN_L at the two bus terminals CANH and CANL obtained. Compared with the upper right figure, it can be clearly seen that in the case of a symmetric adjustment module, even in the presence of a large mismatch, the curves 613 and 614 of the voltages CAN_H and CAN_L at the two bus terminals still achieve good symmetry without any depression.

[0056] It is clear that when the symmetry adjustment module according to the present invention is applied, the output of the bus can still show good symmetry even in the presence of a larger mismatch. The optimization of symmetry can also improve the electromagnetic compatibility (EMC) of the transceiver used for the bus system, ensure the symmetry of the impedance at both ends of the bus system, and ensure that no burrs are output even if interfered. At the same time, various bus systems are developing towards high-speed applications, and the higher the speed of communication, the higher the requirement for symmetry. The optimization of symmetry of the present invention greatly improves the application rate of the bus system, for example, the application rate of CAN. Moreover, by means of the symmetry adjustment module according to the present invention, the bus symmetry is optimized, and the bus output has good symmetry even in the application scenario without common-mode capacitors. Therefore, the present invention allows the improvement of symmetry at a very low cost.

[0057] The above description of the exemplary embodiments of the disclosed subject matter, including the contents described in the abstract, is not intended to be exhaustive or to limit the disclosed embodiments to the precise forms disclosed. Although specific embodiments and examples are described herein for illustrative purposes, various modifications can be considered within the scope of such embodiments and examples as can be appreciated by those skilled in the relevant art.

[0058] In this regard, although the subject matter disclosed in the present invention has been described in conjunction with various embodiments and corresponding drawings, it should be understood that other similar embodiments may be used or modifications and additions may be made to the described embodiments to perform the same, similar, alternative or alternative functions of the disclosed subject matter without departing from the described embodiments. Therefore, the disclosed subject matter should not be limited to any single embodiment described herein, but should be interpreted according to the breadth and scope of the following claims.

[0059] In particular, with respect to the various functions performed by the above-mentioned components (assemblies, devices, circuits, systems, etc.), unless otherwise specified, the terms used to describe such components (including references to "modules" or "devices") are intended to correspond to any components or structures that perform the specified functions of the components (e.g., functionally equivalent), even if they are not structurally equivalent to the disclosed structures that perform the functions in the exemplary implementations of the present disclosure shown herein. In addition, although specific features have been disclosed with respect to only one of several implementations, for any given or specific application, such features may be combined with one or more other features of other implementations, which may be desirable and advantageous.

Claims

1. A symmetry adjustment module, for adjusting the symmetry of a first output driver stage and a second output driver stage, the symmetry adjustment module comprising: a sampling circuit coupled to the first output driver stage and the second output driver stage and configured to output a sampling voltage (VOC_SENSE) related to a first equivalent impedance of the first output driver stage and a second equivalent impedance of the second output driver stage; a reference voltage generating circuit configured to generate a reference voltage; a comparison circuit, the comparison circuit being coupled to the sampling circuit and the reference voltage generating circuit and being configured to compare the sampling voltage (VOC_SENSE) with the reference voltage to output a control signal; The symmetry adjustment module generates an adjustment signal based on a control signal, where the adjustment signal is used to adjust the first equivalent impedance and / or the second equivalent impedance until symmetry is achieved between the first output driver stage and the second output driver stage.

2. The symmetry adjustment module according to claim 1, characterized in that: The symmetry adjustment module is used for a CAN transmitter, and the CAN transmitter includes a first bus terminal (CANH) and a second bus terminal (CANL), a first end of the first output driver stage is coupled to a power supply voltage VCC, a second end of the first output driver stage is coupled to the first bus terminal (CANH) and the second bus terminal (CANL), a first end of the second output driver stage is coupled to a reference potential, and a second end of the second output driver stage is coupled to the first bus terminal and the second bus terminal.

3. The symmetry adjustment module according to claim 1 or 2, wherein: The first output driver stage includes a first driver tube (P0), the sampling circuit includes a first sampling transistor (P1) coupled to a gate of the first driver tube, and the size of the first sampling transistor (P1) is reduced according to a first ratio based on the size of the first driver tube (P0); as well as The second output driver stage includes a second driver tube (N0), and the sampling circuit includes a second sampling transistor (N1) coupled to a gate of the second driver tube, wherein the size of the second sampling transistor (N1) is reduced according to a second ratio based on the size of the second driver tube (N0), and the first ratio is equal to the second ratio.

4. The symmetry adjustment module according to claim 3, wherein: The second end of the first sampling transistor (P1) and the second end of the second sampling transistor (N1) are coupled to a sampling node, and the sampling node is used to output the sampling voltage (VOC_SENSE).

5. The symmetry adjustment module according to claim 4, wherein: The first end of the first sampling transistor (P1) is coupled to the power supply voltage VCC, and the control end of the first sampling transistor (P1) is coupled to the control end of the first driving transistor (P0) and receives the adjustment signal; The first end of the second sampling transistor (N1) is coupled to a reference potential, and the control end of the second sampling transistor (N1) is coupled to the control end of the second driving transistor and receives the adjustment signal.

6. The symmetry adjustment module according to claim 1 or 2, wherein: The reference voltage includes a first reference voltage VREF1 and a second reference voltage VREF2, and the reference voltage generating circuit includes a first reference voltage generating circuit for generating the first reference voltage VREF1 and a second reference voltage generating circuit for generating the second reference voltage VREF2; The symmetry adjustment module has a power supply voltage VCC coupled to the sampling circuit and the first output driver stage; The first reference voltage VREF1, the second reference voltage VREF2 and the power supply voltage VCC satisfy: VREF1>VCC / 2>VREF2.

7. The symmetry adjustment module according to claim 6, wherein: The comparison circuit includes a first operational amplifier and a second operational amplifier, an input terminal of the first operational amplifier is coupled to the first reference voltage generating circuit and the sampling circuit to compare the sampling voltage (VOC_SENSE) with the first reference voltage VREF1 to output a first control signal, and an input terminal of the second operational amplifier is coupled to the second reference voltage generating circuit to compare the sampling voltage (VOC_SENSE) with the second reference voltage VREF2 to output a second control signal, and the symmetry adjustment module generates an adjustment signal based on the first control signal and / or the second control signal.

8. The symmetry adjustment module according to claim 1, wherein: The symmetry adjustment module further includes a switch configured to switch on or off the symmetry adjustment module.

9. The symmetry adjustment module according to claim 8, wherein: The symmetry adjustment module is used for the CAN transmitter, and controls the switch to be turned on or off based on the switch control signal; The switch control signal is generated based on the pulse signal received by the CAN transmitter: when the rising edge of the pulse signal arrives, the switch control signal jumps from the first state to the second state, and after a delay time, the switch control signal is flipped.

10. A method for adjusting symmetry, the method comprising: Collecting a sampled voltage (VOC_SENSE) associated with a first equivalent impedance of the first output driver stage and a second equivalent impedance of the second output driver stage; Comparing the sampled voltage (VOC_SENSE) with a reference voltage to generate a control signal; An adjustment signal is generated based on a control signal to adjust the first equivalent impedance and / or the second equivalent impedance until symmetry is achieved between the first output driver stage and the second output driver stage.

11. The method for adjusting symmetry according to claim 10, characterized in that: The method for adjusting symmetry is used to adjust the symmetry of a first output driver stage and a second output driver stage of a CAN transmitter.

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