Temperature coefficient adjustable current generating circuit, circuit board and current generating chip

Abstract

The application relates to the technical field of current generation, and discloses a temperature coefficient adjustable current generation circuit, a circuit board and a current generation chip. The current generation circuit comprises a bias voltage generation unit, a first load unit, a first current mirror unit, a second load unit, a third load unit, an operational amplifier unit and a second current mirror unit. In use, the first bias current is generated on the first load unit, the first bias current is transferred to the second load unit through the first current mirror unit, the voltage is formed on the second load unit, the operational amplifier unit forms the second bias current on the third load unit, the current flowing through the output tube can be obtained by subtracting the current of the third branch from the current of the second branch, and then the temperature coefficient of the current flowing through the output tube can be adjusted by adjusting the temperature coefficient of the first load unit-third load unit.

Description

Technical Field

[0001] This invention relates to the field of current generation technology, and more specifically to a current generation circuit, circuit board, and current generation chip with adjustable temperature coefficient. Background Technology

[0002] In the field of integrated circuits, it is often necessary to generate reference currents with different temperature coefficients for circuit use. Specifically, this involves generating at least one of the following: a reference current with zero temperature drift, a reference current with a positive temperature coefficient, and a reference current with a negative temperature coefficient. However, existing reference current sources mostly produce currents with relatively fixed temperature coefficients, limiting their application range and usability. They cannot simultaneously adjust the temperature coefficient according to different operating environments. Summary of the Invention

[0003] In view of the shortcomings of the prior art, the present invention provides a current generating circuit with adjustable temperature coefficient. The technical problem to be solved is that the temperature coefficient of the current generated by the existing reference current source is fixed and its applicability is poor.

[0004] To solve the above technical problems, in a first aspect, the present invention provides the following technical solution: a current generating circuit with adjustable temperature coefficient, comprising a bias voltage generating unit, a first load unit, a first current mirror unit, a second load unit, a third load unit, an operational amplifier unit, and a second current mirror unit;

[0005] The first current mirror unit includes a first main branch, a first slave branch, and a second slave branch. The first slave branch and the second slave branch are used to replicate the current flowing through the first main branch in proportion. The second current mirror unit includes a second main branch and a third slave branch. The third slave branch is used to replicate the current flowing through the second main branch in proportion.

[0006] The deviation voltage generating unit is electrically connected to the first load unit and is used to generate a first bias current on the first load unit.

[0007] The first main branch is electrically connected to the first load unit, and the first slave branch is electrically connected to the second load unit. The operational amplifier unit is used to amplify the voltage on the second load unit, thereby applying a second bias voltage to the third load unit and forming a second bias current on the third load unit.

[0008] The second main branch is electrically connected to the third load unit, the input terminal of the third slave branch is electrically connected to the output terminal of the second slave branch, the output terminal of the second slave branch is electrically connected to the input terminal of the output transistor, the control terminal of the output transistor is used to input the drive voltage, and the output terminal of the output transistor is used to output the drive current.

[0009] In one embodiment of the first aspect, the bias voltage generating unit includes an operational amplifier and a MOS transistor M1. The positive input terminal of the operational amplifier is used to input an external voltage. The output terminal of the operational amplifier is electrically connected to the gate of the MOS transistor M1. The source of the MOS transistor M1 is electrically connected to the negative input terminal of the operational amplifier and the first load unit, respectively. The drain of the MOS transistor M1 is electrically connected to the first main branch.

[0010] In one embodiment of the first aspect, the first load unit includes a resistor R1, and the source of the MOS transistor M1 is grounded through the resistor R1.

[0011] In one embodiment of the first aspect, the first main branch includes MOSFET MP1, the first slave branch includes MOSFET MP2, and the second slave branch includes MOSFET MP3.

[0012] The source of MOSFET MP1 is electrically connected to the source of MOSFET MP2 and the source of MOSFET MP3, respectively. The gate of MOSFET MP1 is electrically connected to the drain of MOSFET MP1, the first load unit, the gate of MOSFET MP2, and the gate of MOSFET MP3, respectively. The drain of MOSFET MP2 is electrically connected to the second load unit, and the drain of MOSFET MP3 is electrically connected to the input terminal of the third slave branch.

[0013] In one embodiment of the first aspect, the second load unit includes a resistor R2, the source of the MOS transistor MP2 is grounded through the resistor R2, and the ungrounded end of the resistor R2 is electrically connected to the operational amplifier unit.

[0014] In one embodiment of the first aspect, the third load unit includes a resistor R3, and the output terminal of the operational amplifier unit is electrically connected to the second main branch through the resistor R3.

[0015] In one embodiment of the first aspect, the second main branch includes a MOS transistor MN1, the third slave branch includes a MOS transistor MN2, the drain of the MOS transistor MN1 is electrically connected to a resistor R3, the gate of the MOS transistor MN1 and the gate of the MOS transistor MN2, respectively, the source of the MOS transistor MN1 and the source of the MOS transistor MN2 are electrically connected and grounded, and the drain of the MOS transistor MN2 is electrically connected to the second slave branch.

[0016] In one embodiment of the first aspect, the output transistor is an NMOS transistor, the drain of the NMOS transistor is the input terminal of the output transistor, the gate of the NMOS transistor is the control terminal of the output transistor, and the source of the NMOS transistor is the output terminal of the output transistor.

[0017] Secondly, the present invention provides a circuit board having the aforementioned temperature coefficient adjustable current generating circuit.

[0018] Thirdly, the present invention provides a current generating chip, wherein the current generating chip is provided with the aforementioned temperature coefficient adjustable current generating circuit.

[0019] The beneficial effects of this invention compared with the prior art are as follows: This invention generates a first bias current on the first load unit and transfers the first bias current to the second load unit through the first current mirror unit, forming a voltage on the second load unit. The operational amplifier unit then uses this voltage to form a second bias current on the third load unit. Since the second bias current is transferred to the third slave branch through the second current mirror unit, the current flowing through the output transistor can be obtained by subtracting the current of the third slave branch from the current of the second slave branch. Furthermore, the temperature coefficient of the current flowing through the output transistor can be adjusted by adjusting the temperature coefficient between the first load unit and the third load unit, as well as by using the first and second current mirror units. Attached Figure Description

[0020] Figure 1 This is a schematic diagram of the structure of the present invention in the embodiments;

[0021] Figure 2 This is a circuit diagram of the present invention as shown in the embodiments. Detailed Implementation

[0022] The present invention will now be described in further detail with reference to the accompanying drawings. These drawings are simplified schematic diagrams, illustrating only the basic structure of the invention, and therefore only show the components relevant to the invention.

[0023] like Figure 1 As shown, a current generating circuit with adjustable temperature coefficient includes a bias voltage generating unit 1, a first load unit 2, a first current mirror unit 3, a second load unit 4, a third load unit 5, an operational amplifier unit 6, and a second current mirror unit 7.

[0024] The first current mirror unit 3 includes a first main branch 30, a first slave branch 31, and a second slave branch 32. The first slave branch 31 and the second slave branch 32 are used to replicate the current flowing through the first main branch 30 in proportion. The second current mirror unit 7 includes a second main branch 70 and a third slave branch 71. The third slave branch 71 is used to replicate the current flowing through the second main branch 70 in proportion.

[0025] The bias voltage generating unit 1 is electrically connected to the first load unit 2 and is used to generate a first bias current on the first load unit 2.

[0026] The first main branch 30 is electrically connected to the first load unit 2, and the first slave branch 31 is electrically connected to the second load unit 4. The operational amplifier unit 5 is used to amplify the voltage on the second load unit 4, thereby applying a second bias voltage to the third load unit 6 and forming a second bias current on the third load unit 6.

[0027] The second main branch 70 is electrically connected to the third load unit 6. The input terminal of the third slave branch 71 is electrically connected to the output terminal of the second slave branch 32. The output terminal of the second slave branch 32 is electrically connected to the input terminal of the output tube 8. The control terminal of the output tube 8 is used to input the drive voltage, and the output terminal of the output tube 8 is used to output the drive current.

[0028] In practical use, a first bias current is generated on the first load unit 2, and the first bias current is transferred to the second load unit 4 through the first current mirror unit 3, forming a voltage on the second load unit 4. The operational amplifier unit 5 uses this voltage to form a second bias current on the third load unit 6. Since the second bias current is transferred to the third slave branch through the second current mirror unit 7, the current flowing through the output tube 8 can be obtained by subtracting the current of the third slave branch 71 from the current of the second slave branch 32. Therefore, the temperature coefficient of the current flowing through the output tube 8 can be adjusted by adjusting the temperature coefficient of the first load unit 2-third load unit 6 and by using the first current mirror unit 3 and the second current mirror unit 7.

[0029] like Figure 2 As shown, in this embodiment, the bias voltage generating unit 1 includes an operational amplifier OPA and a MOS transistor M1. The positive input terminal of the operational amplifier OPA is used to input the external voltage VBG. The output terminal of the operational amplifier OPA is electrically connected to the gate of the MOS transistor M1. The source of the MOS transistor M1 is electrically connected to the negative input terminal of the operational amplifier OPA and the first load unit 2, respectively. The drain of the MOS transistor M1 is electrically connected to the first main branch 30.

[0030] The operational amplifier OPA and MOSFET M1 form a voltage follower circuit to apply the external voltage VBG to the first load unit 2, thereby ensuring the stability of the first bias current.

[0031] exist Figure 2 In the first load unit 2, a resistor R1 is included, and the source of the MOSFET M1 is grounded through the resistor R1. In actual use, the external voltage VBG forms a first bias current across the resistor R1. Let the first bias current be denoted as I, then I = VBG / R1.

[0032] exist Figure 2 In the first main branch 30, a MOSFET MP1 is included; the first slave branch 31, a MOSFET MP2 is included; and the second slave branch 32, a MOSFET MP3 is included.

[0033] The source of MOSFET MP1 is electrically connected to the source of MOSFET MP2 and the source of MOSFET MP3, respectively, for connecting to power supply VCC. The gate of MOSFET MP1 is electrically connected to the drain of MOSFET MP1, resistor R1, the gate of MOSFET MP2, and the gate of MOSFET MP3, respectively. The drain of MOSFET MP2 is electrically connected to the second load unit 4, and the drain of MOSFET MP3 is electrically connected to the input terminal of the third slave branch 71.

[0034] In practical use, the current replication ratios of MOSFETs MP2 and MP3 can be adjusted by adjusting the width-to-length ratio of MP2 and the ratio of the width-to-length ratio of MP2 to MP1. In this embodiment, the current replication ratio of MP2 is denoted as K1 and the current replication ratio of MP3 is denoted as K2. The current flowing through the second load unit 4 is I*K1, and the current output by MP3 is I*K2.

[0035] exist Figure 2 In the diagram, the second load unit 4 includes a resistor R2. The source of the MOSFET MP2 is grounded through resistor R2, and the ungrounded end of resistor R2 is electrically connected to the operational amplifier unit 5. The voltage across resistor R2 is I*K1*R2. Assuming the amplification ratio of operational amplifier unit 5 is K3, the output voltage of operational amplifier unit 5 is I*K1*R2*K3.

[0036] exist Figure 2 In the circuit, the third load unit 6 includes a resistor R3, and the output terminal of the operational amplifier unit 5 is electrically connected to the second main branch 70 through the resistor R3. The current flowing through the resistor R3 is I*K1*R2*K3 / R3.

[0037] exist Figure 2 In the middle, the second main branch 70 includes MOS transistor MN1, and the third slave branch 71 includes MOS transistor MN2. The drain of MOS transistor MN1 is electrically connected to resistor R3, the gate of MOS transistor MN1 and the gate of MOS transistor MN2 respectively. The source of MOS transistor MN1 and the source of MOS transistor MN2 are electrically connected and grounded. The drain of MOS transistor MN2 is electrically connected to the second slave branch 32.

[0038] In practical use, the current replication ratio of MOSFET MN2 can be adjusted by adjusting the ratio of the width-to-length ratio of MOSFET MN1 to that of MOSFET MN2. Let the current replication ratio of MOSFET MN2 be denoted as K4, then the current flowing through MOSFET MN2 is I*K1*R2*K3*K4 / R3.

[0039] In this embodiment, output transistor 8 is an NMOS transistor. The drain of the NMOS transistor is the input terminal of the output transistor, the gate of the NMOS transistor is the control terminal of the output transistor, and the source of the NMOS transistor is the output terminal of the output transistor. In actual use, when the driving voltage is high, output transistor 8 is turned on, and when the driving voltage is low, output transistor 8 is turned off.

[0040] Since the current flowing through output transistor 8 and the current flowing through MOSFET MN2 are both provided by MOSFET MP3, the current flowing through output transistor 8 can be obtained by subtracting the current flowing through MOSFET MN2 from the current flowing through MOSFET MP3 as I*K2-I*K1*R2*K3*K4 / R3. From this formula, it can be seen that the temperature coefficient of the current flowing through output transistor 8 can be adjusted by adjusting the temperature coefficients of resistors R1, R2, R3, the first current mirror unit 3, and the second current mirror unit 7.

[0041] In this embodiment, the present invention provides a circuit board on which the above-mentioned temperature coefficient adjustable current generating circuit is provided.

[0042] In this embodiment, the present invention provides a current generating chip, which is equipped with the aforementioned temperature coefficient adjustable current generating circuit.

[0043] Based on the above description, those skilled in the art can make various changes and modifications without departing from the technical concept of this invention. The technical scope of this invention is not limited to the contents of the specification, but must be determined according to the scope of the claims.

Claims

1. A current generating circuit with an adjustable temperature coefficient, characterized in that, It includes a bias voltage generation unit, a first load unit, a first current mirror unit, a second load unit, a third load unit, an operational amplifier unit, and a second current mirror unit; The first current mirror unit includes a first main branch, a first slave branch, and a second slave branch. The first slave branch and the second slave branch are used to replicate the current flowing through the first main branch in proportion. The second current mirror unit includes a second main branch and a third slave branch. The third slave branch is used to replicate the current flowing through the second main branch in proportion. The bias voltage generating unit is electrically connected to the first load unit and is used to generate a first bias current on the first load unit. The first main branch is electrically connected to the first load unit, and the first slave branch is electrically connected to the second load unit. The operational amplifier unit is used to amplify the voltage on the second load unit, thereby applying a second bias voltage to the third load unit and forming a second bias current on the third load unit. The second main branch is electrically connected to the third load unit, the input terminal of the third slave branch is electrically connected to the output terminal of the second slave branch, the output terminal of the second slave branch is electrically connected to the input terminal of the output transistor, the control terminal of the output transistor is used to input the drive voltage, and the output terminal of the output transistor is used to output the drive current.

2. The temperature-coefficient adjustable current generating circuit according to claim 1, characterized in that, The bias voltage generating unit includes an operational amplifier and a MOS transistor M1. The positive input terminal of the operational amplifier is used to input an external voltage. The output terminal of the operational amplifier is electrically connected to the gate of the MOS transistor M1. The source of the MOS transistor M1 is electrically connected to the negative input terminal of the operational amplifier and the first load unit, respectively. The drain of the MOS transistor M1 is electrically connected to the first main branch.

3. The temperature-coefficient adjustable current generating circuit according to claim 2, characterized in that, The first load unit includes a resistor R1, and the source of the MOS transistor M1 is grounded through the resistor R1.

4. The temperature-coefficient adjustable current generating circuit according to claim 1, characterized in that, The first main branch includes MOSFET MP1, the first slave branch includes MOSFET MP2, and the second slave branch includes MOSFET MP3; The source of MOSFET MP1 is electrically connected to the source of MOSFET MP2 and the source of MOSFET MP3, respectively. The gate of MOSFET MP1 is electrically connected to the drain of MOSFET MP1, the first load unit, the gate of MOSFET MP2, and the gate of MOSFET MP3, respectively. The drain of MOSFET MP2 is electrically connected to the second load unit, and the drain of MOSFET MP3 is electrically connected to the input terminal of the third slave branch.

5. The temperature-coefficient adjustable current generating circuit according to claim 4, characterized in that, The second load unit includes a resistor R2. The source of the MOS transistor MP2 is grounded through the resistor R2, and the ungrounded end of the resistor R2 is electrically connected to the operational amplifier unit.

6. The temperature-coefficient adjustable current generating circuit according to claim 1, characterized in that, The third load unit includes a resistor R3, and the output terminal of the operational amplifier unit is electrically connected to the second main branch through the resistor R3.

7. The temperature coefficient adjustable current generating circuit according to claim 6, characterized in that, The second main branch includes MOS transistor MN1, and the third slave branch includes MOS transistor MN2. The drain of MOS transistor MN1 is electrically connected to resistor R3, the gate of MOS transistor MN1, and the gate of MOS transistor MN2, respectively. The source of MOS transistor MN1 and the source of MOS transistor MN2 are electrically connected and grounded. The drain of MOS transistor MN2 is electrically connected to the second slave branch.

8. The temperature-coefficient adjustable current generating circuit according to claim 7, characterized in that, The output transistor is an NMOS transistor, with the drain of the NMOS transistor being the input terminal, the gate of the NMOS transistor being the control terminal, and the source of the NMOS transistor being the output terminal.

9. A circuit board, characterized in that, The circuit board is provided with a current generating circuit with an adjustable temperature coefficient as described in any one of claims 1-8.

10. A current generating chip, characterized in that, The current generating chip is provided with a temperature coefficient adjustable current generating circuit as described in any one of claims 1-8.

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