Iii-v semiconductor epitaxial structure, method of making and use thereof

Abstract

This invention discloses a III-V semiconductor epitaxial structure, its fabrication method, and its applications. The epitaxial structure includes a first buffer layer and a first interconnecting layer stacked together. The first interconnecting layer has a first protrusion structure with intermittent structures between it. It also includes a second buffer layer and a second interconnecting layer within the intermittent structures, the second interconnecting layer being composed of at least multiple independent second protrusion structures. The first and second protrusion structures can serve as the basis for epitaxial growth. The III-V semiconductor light-emitting layer grown based on the III-V semiconductor epitaxial structure provided by this invention forms light-emitting surfaces of various sizes and curvatures, greatly increasing the light-emitting area. It also enables the light-emitting layer to form quantum dot luminescence, and utilizes the quantum dot confinement effect to reduce the quantum Stark effect, improving the incorporation of light-emitting layer components. These combined effects significantly improve radiative recombination efficiency, ultimately enhancing the overall luminous intensity and efficiency of the device.

Description

Technical Field

[0001] This invention relates to the field of semiconductor device technology, and in particular to a III-V group semiconductor epitaxial structure, its preparation method and application. Background Technology

[0002] III-V group semiconductor materials are novel third-generation semiconductor materials with broad application prospects. For example, GaN-based light-emitting diodes (LEDs) are semiconductor light-emitting devices with advantages such as long lifespan, low energy consumption, small size, and high reliability, making them the most promising lighting source and an important trend in pioneering lighting technology. However, the GaN-based LEDs currently being manufactured still suffer from low luminous intensity and efficiency. Further improving the luminous intensity and luminous efficacy of LEDs is the goal of LED lighting technology development and is of great significance for its industrial application and promotion. Summary of the Invention

[0003] To address the shortcomings of existing technologies, the present invention aims to provide a III-V group semiconductor epitaxial structure, its preparation method, and its application.

[0004] To achieve the aforementioned objectives, the technical solution adopted by this invention includes:

[0005] In a first aspect, the present invention provides a III-V group semiconductor epitaxial structure, which includes a first buffer layer and a first interconnect layer stacked together;

[0006] The first buffer layer is a continuous film layer, the first connecting layer has a first protrusion structure, and a discontinuous structure is formed between multiple first protrusion structures or between different parts of the first protrusion structure. The discontinuous structure penetrates the first connecting layer along the thickness direction.

[0007] It also includes a second buffer layer and a second connecting layer disposed in the discontinuous structure, wherein the second connecting layer is composed of at least a plurality of independent second protrusion structures;

[0008] The second buffer layer has a first side and a second side facing away from each other, the first side facing the first buffer layer, and the second protrusion structure is formed on the second side;

[0009] Furthermore, the first and second protrusion structures can serve as the basis for the epitaxial growth of III-V group semiconductor materials.

[0010] Secondly, the present invention also provides a method for preparing the above-mentioned III-V group semiconductor epitaxial structure, comprising:

[0011] A first buffer layer is formed by growth, and the first buffer layer is a continuous film layer;

[0012] A first protrusion structure is epitaxially grown on the surface of the first buffer layer to form a first connecting layer. Discontinuity structures are formed between multiple first protrusion structures or between different parts of the first protrusion structures. The discontinuity structures penetrate the first connecting layer along the thickness direction.

[0013] In the discontinuous structure, the exposed portion of the first buffer layer surface continues to grow epitaxially to form a second buffer layer;

[0014] A second protrusion structure is epitaxially grown on the surface of the second buffer layer to form a second connecting layer.

[0015] Thirdly, the present invention also provides the application of the above-described III-V semiconductor epitaxial structure in the fabrication of III-V semiconductor devices.

[0016] Fourthly, the present invention also provides a III-V group semiconductor device, wherein the III-V group semiconductor light-emitting layer comprises alternatingly stacked quantum well layers and quantum barrier layers;

[0017] The quantum well layer and the quantum barrier layer are grown using the exposed area between the first protrusion structure and the exposed area between the second protrusion structure as templates to form the first arc-shaped protrusion and the second arc-shaped protrusion, respectively.

[0018] The width of the first arc-shaped protrusion is less than the width of the second arc-shaped protrusion, and the height of the first arc-shaped protrusion is less than the height of the second arc-shaped protrusion.

[0019] Based on the above technical solution, compared with the prior art, the beneficial effects of the present invention include at least the following:

[0020] The III-V semiconductor epitaxial structure provided by this invention can serve as the basis for the growth of III-V semiconductor material layers, acting as a nanoscale template. The III-V semiconductor light-emitting layer grown on this basis will form light-emitting surfaces of various sizes and curvatures, greatly increasing the light-emitting area of ​​the light-emitting layer. Furthermore, the nanoscale template enables the III-V semiconductor light-emitting layer to form quantum dot light emission, and the quantum dot confinement effect reduces the quantum Stark effect. The combination of these effects significantly improves the radiative recombination efficiency, ultimately enhancing the overall luminous intensity and efficiency of the device and reducing the efficiency droop effect under high current.

[0021] The above description is merely an overview of the technical solution of the present invention. In order to enable those skilled in the art to better understand the technical means of this application and to implement it in accordance with the contents of the specification, the preferred embodiments of the present invention are described below in conjunction with detailed drawings. Attached Figure Description

[0022] Figure 1This is a schematic diagram of a III-V group semiconductor epitaxial structure provided in a typical embodiment of the present invention;

[0023] Figure 2 This is a schematic diagram of the surface protrusion structure distribution of a III-V group semiconductor epitaxial structure provided in a typical embodiment of the present invention;

[0024] Figure 3 This is a partial structural schematic diagram of a III-V group semiconductor device provided in a typical embodiment of the present invention;

[0025] Figure 4 This is an electron microscope image of the surface morphology of a III-V group semiconductor epitaxial structure provided in a typical embodiment of the present invention;

[0026] Figure 5a This is a schematic diagram of the hole transport state of a III-V group semiconductor device provided in a typical embodiment of the present invention;

[0027] Figure 5b This is a schematic diagram of the hole transport state of a III-V group semiconductor device provided in a typical comparative example of the present invention.

[0028] Explanation of reference numerals in the attached figures:

[0029] 11. First buffer layer; 12. Second buffer layer; 21. First protrusion structure; 22. Second protrusion structure; 31. Quantum well layer; 32. Quantum barrier layer. Detailed Implementation

[0030] In view of the shortcomings of the prior art, the inventors of this invention, through long-term research and extensive practice, have proposed the technical solution of this invention. The following will further explain and illustrate this technical solution, its implementation process, and its principles.

[0031] Many specific details are set forth in the following description in order to provide a full understanding of the invention. However, the invention may also be practiced in other ways different from those described herein, and therefore the scope of protection of the invention is not limited to the specific embodiments disclosed below.

[0032] Moreover, relational terms such as “first” and “second” are used merely to distinguish one component or method step from another that has the same name, and do not necessarily require or imply any such actual relationship or order between these components or method steps.

[0033] See Figures 1-3This invention provides a III-V group semiconductor epitaxial structure, comprising a first buffer layer 11 and a first interconnect layer stacked thereon; the first buffer layer 11 is a continuous film layer, the first interconnect layer has a first protrusion structure 21, and discontinuous structures are formed between multiple first protrusion structures 21 or between different portions of the first protrusion structures 21, the discontinuous structures penetrating the first interconnect layer along the thickness direction; it also includes a second buffer layer 12 and a second interconnect layer disposed in the discontinuous structures, the second interconnect layer being composed of at least multiple independent second protrusion structures 22; the second buffer layer 12 has a first surface and a second surface facing away from each other, the first surface facing the first buffer layer 11, and the second protrusion structures 22 formed on the second surface; and the first protrusion structure 21 and the second protrusion structure 22 can serve as the basis for the epitaxial growth of III-V group semiconductor materials.

[0034] The first protruding structure 21 forms the first connecting layer. In the first connecting layer, the first protruding structure 21 can be, for example, a plurality of dispersed independent lattice protrusions or a plurality of islands, with the space between the protrusions or islands forming the discontinuous structure. This is more common when the thickness of the first connecting layer is relatively thin. Alternatively, it can be a relatively continuous porous membrane structure, in which the solid part of the porous membrane is the first protruding structure 21, and the pores between them constitute the discontinuous structure. This is more common when the thickness of the first connecting layer is relatively thick. In many embodiments, the first connecting layer may also be a combination of the above two situations, such as a part of the first connecting layer being a dispersed lattice and another part being a porous membrane, etc.

[0035] In summary, regardless of the scenario described above, the primary function of the first interconnecting layer is to provide the first protrusion structure 21 as the site basis for the epitaxial growth of the III-V group semiconductor material, and to provide the discontinuity structure between the first protrusion structures 21, which is the site where the second buffer layer 12 and the second protrusion structure 22 are grown.

[0036] Based on the above structural features, the second buffer layer 12 and the second protrusion structure 22 selectively grow into the discontinuous structure, thus forming a spatial structure. Figure 2 The structural feature shown is that the first protrusion structure 21 and the second protrusion structure 22 of different sizes are distributed alternately. This special structure with multiple sizes is crucial for improving the radiative recombination efficiency of the III-V group semiconductor light-emitting layer grown on this basis.

[0037] The specific principle behind the formation of the above structure is as follows: When the second buffer layer 12 grows in the limited space of the discontinuous structure, multiple crystals will have the densest distribution of grain boundaries in the central region due to space crowding. The sufficient initial dislocations provided by the first buffer layer 11 tend to extend along the grain boundary concentration region to the second buffer layer 12. This makes the central region of the second buffer layer 12 have a very significant dense dislocation concentration trend compared to the surrounding regions. The second protrusion structure 22 preferentially grows in the dislocation concentration region, which forms the structural feature of the first protrusion structure 21 and the second protrusion structure 22 being distributed alternately.

[0038] Therefore, the first buffer layer 11 plays a very important role in forming the above-mentioned interlaced structure. It is not just a simple growth substrate. If the first buffer layer is removed, the central island-shaped growth mode of the second protrusion structure cannot be formed. Instead, a planar film layer covering the structure is grown, which makes it impossible to achieve the technical effect of the present invention.

[0039] In some embodiments, the bottom width of the discontinuous structure is 5-80 nm; wherein the bottom width refers to the lateral width of the portion of the discontinuous structure that is in contact with the first buffer layer 11.

[0040] In some implementations, the first protrusion structure 21 occupies 60%-80% of the area of ​​the first buffer layer 11.

[0041] In some implementations, the dislocation density of the first buffer layer 11 is less than the dislocation density of the second buffer layer 12.

[0042] In some implementations, the dislocation density of the first buffer layer 11 is 1 × 10⁻⁶. 8 -8×10 10 / cm 2 The dislocation density of the second buffer layer 12 is 1×10⁻⁶. 8 -8×10 8 / cm 2 .

[0043] In some embodiments, the average bottom width of the first protrusion structure 21 is greater than the average bottom width of the second protrusion structure 22.

[0044] In some implementations, the bottom width of the first protrusion structure 21 is 10-500 nm and the height is 1-30 nm.

[0045] The bottom width of the second protrusion structure 22 is 10-500nm, and the height is 1-30nm.

[0046] In some implementations, the thickness of the first buffer layer 11 is 2-100 nm.

[0047] In some implementations, the thickness of the second buffer layer 12 is 2-100 nm.

[0048] In some implementations, the first buffer layer 11 and / or the second buffer layer 12 are made of group III-V materials, specifically, for example, GaN.

[0049] The material of the first connecting layer and / or the second connecting layer includes group I-V materials, specifically, for example, SiN.

[0050] A second aspect of this invention also provides a method for preparing the above-described III-V group semiconductor epitaxial structure, comprising the following steps:

[0051] A first buffer layer 11 is formed by growth, and the first buffer layer 11 is a continuous film layer.

[0052] A first protrusion structure 21 is epitaxially grown on the surface of the first buffer layer 11 to form a first connecting layer. Discontinuous structures are formed between multiple first protrusion structures 21 or between different parts of the first protrusion structure 21, and the discontinuous structures penetrate the first connecting layer along the thickness direction.

[0053] A second buffer layer 12 is formed by epitaxial growth on the surface of the portion of the first buffer layer 11 exposed in the discontinuous structure.

[0054] A second protrusion structure 22 is epitaxially grown on the surface of the second buffer layer 12 to form a second connecting layer.

[0055] In some embodiments, the first buffer layer 11 is grown at a first temperature, a first pressure, and a first doping concentration, and the second buffer layer 12 is grown at a second temperature, a second pressure, and a second doping concentration.

[0056] The growth conditions of the first buffer layer 11 and the second buffer layer 12 satisfy any one of the following conditions: the first temperature is higher than the second temperature, the first pressure is higher than the second pressure, and the first doping concentration is lower than the second doping concentration, or a combination of two or more conditions.

[0057] In some implementations, the specific range of the above growth conditions includes a first temperature of 800-1200°C, a first pressure of 50-650 torr, and a first doping concentration of 1×10⁻⁶. 17 cm -3 ~1×10 18 cm -3 .

[0058] In some embodiments, the second temperature is 800~1200°C, the first pressure is 50~650 torr, and the first doping concentration is 1×10⁻⁶.17 cm -3 ~1×10 18 cm -3 .

[0059] Based on the above-described epitaxial structure and its preparation method, this invention also provides the application of the above-described III-V semiconductor epitaxial structure in the fabrication of III-V semiconductor devices.

[0060] As a specific example of the above application, a fourth aspect of the present invention provides a III-V semiconductor device, which includes a III-V semiconductor epitaxial structure and a III-V semiconductor light-emitting layer provided in any of the above embodiments; the III-V semiconductor light-emitting layer is formed by epitaxial growth based on a buffer layer, especially a second buffer layer 12, exposed between a first protrusion structure 21 and a second protrusion structure 22 of different sizes in the III-V semiconductor epitaxial structure.

[0061] In some specific embodiments, the III-V group semiconductor light-emitting layer includes alternatingly stacked quantum well layers 31 and quantum barrier layers 32; the quantum well layers 31 and quantum barrier layers 32 are grown using the first protrusion structure 21 and the second protrusion structure 22 as templates to form a first arc-shaped bump and a second arc-shaped bump, respectively; the width of the first arc-shaped bump is greater than the width of the second arc-shaped bump, and the height of the first arc-shaped bump is greater than the height of the second arc-shaped bump. It can be understood that the first arc-shaped bump at least covers the second buffer layer 12 between the larger first protrusion structures 21, and the second arc-shaped bump at least covers the second buffer layer 12 between the smaller second protrusion structures 22, and the first arc-shaped bump and the second arc-shaped bump can be laterally grown and merged to form a continuous uneven film layer.

[0062] As a typical application example of the above technical solution, an LED epitaxial wafer includes an n-type nitride layer, a light-emitting layer, and a p-type nitride layer. The quantum well light-emitting layer structure includes a first nitride buffer layer 11, a nitride quantum well layer 31, and a nitride quantum barrier layer 32. A first SiN interconnect layer and a second SiN interconnect layer are included between the first nitride buffer layer 11 and the quantum barrier layer 32. The second SiN interconnect layer is disposed on the second nitride buffer layer grown between the first SiN interconnect layers. The quantum barrier layer 32 and the quantum well layer 31 are periodically and alternately disposed on the first SiN interconnect layer and the second SiN interconnect layer.

[0063] In combination with the above preparation method, the overall fabrication method of the above device may include, for example, the following process:

[0064] 1) Growth of the first nitride buffer layer 11:

[0065] A first nitride buffer layer 11 with a thickness of 2-100 nm and an n-type doping concentration of 1×10⁻⁶ was grown under conditions of temperature 800-1200℃ and pressure 50-650 torr. 17 cm -3 ~1×10 18 cm -3 .

[0066] 2) Growth of the first SiN bonding layer:

[0067] The first SiN discontinuity layer with a thickness of 1-10 nm is grown under the conditions of temperature 900~1200℃ and pressure 50~650 torr.

[0068] 3) Growth of the second nitride buffer layer 12:

[0069] A first nitride buffer layer 11 with a thickness of 2-100 nm and an n-type doping concentration of 1×10⁻⁶ was grown under conditions of temperature 800-1200℃ and pressure 50-650 torr. 17 cm -3 ~1×10 18 cm -3 .

[0070] The growth conditions of the second nitride buffer layer 12 must meet at least one of the following: the temperature is lower than that of the first nitride buffer layer, the pressure is lower than that of the first nitride buffer layer, or the doping concentration is higher than that of the first nitride buffer layer. The relatively low temperature, relatively low pressure, or high doping process forms a more densely distributed dislocation center on the surface of the first nitride buffer layer 11 between adjacent SiN first interconnect layers, providing nucleation centers for the second SiN interconnect layer, thereby enabling the formation of second protrusion structures 22 between the first protrusion structures 21, forming a structural distribution of first protrusion structures 21 and second protrusion structures 22 of different sizes that are interspersed.

[0071] During the growth process described above, since the Si-N bond energy of group I-V materials such as SiN is much greater than the bond energy of Ga-N (or other group III-V materials) in the first buffer layer 11 or the second buffer layer 12, the large bond energy difference and / or the difference in adhesion coefficient cause the second nitride buffer layer to tend to form in the discontinuous structure region between the first protrusions 21 in the first SiN connecting layer, thereby providing growth sites for the selective growth of the second protrusions 22.

[0072] 4) Growth of the second SiN bonding layer:

[0073] A second SiN bonding layer with a thickness of 1-10 nm is grown under conditions of 900-1200℃ and 50-650 torr. The growth process of this bonding layer is similar to that of the first bonding layer. A second buffer layer 12, grown from the discontinuous structural region between the first protrusions 21, serves as the growth template. Since the dislocation density on the second buffer layer 12 is an order of magnitude higher than that on the first buffer layer 11, a denser concentration of SiN nucleation sites is formed on the second nitride nucleation layer. This results in a significantly smaller size for the second protrusion 22 compared to the first protrusion 21. For details, please refer to [link to relevant documentation]. Figure 4 The surface morphology shown is characterized by alternating and staggered distribution of different sizes.

[0074] 5) Growth of III-V group semiconductor light-emitting layer:

[0075] S51: Nitride quantum barrier layer 32 with a thickness of 6-18 nm is grown under the conditions of temperature 750~1200℃ and pressure 100~500 torr.

[0076] S52: Nitride quantum well layers 31 with a thickness of 1-6 nm are grown under conditions of temperature 700~1150℃ and pressure 100~500 torr.

[0077] The III-V group semiconductor light-emitting layer is formed by alternating S51 and S52 cycles for a total of 1 to 20 cycles.

[0078] The specific growth process of the III-V semiconductor light-emitting layer can refer to the existing growth process of related multilayer quantum well barrier stacked structures. The III-V semiconductor light-emitting layer formed by the present invention has a special multi-size and multi-curvature arc-shaped bump structure. The main reason for the above-mentioned special structure is that it is epitaxially grown using the staggered growth base (nitride nucleation layers of different sizes and shapes exposed by the first bump structure 21 and the second bump structure 22 of different sizes) provided by the present invention as a template. It is less affected by its specific growth process conditions. Therefore, those skilled in the art can also grow a stacked light-emitting layer structure with the same function using different growth conditions than those in the above example.

[0079] Forming a III-V group semiconductor light-emitting layer composed of arc-shaped bumps of different sizes and curvatures can also significantly improve hole transport efficiency and hole distribution uniformity: see details. Figure 5aAs shown, for example, in some specific implementation cases, the thickness of the multi-curved nitride emitting layer varies across the entire curved surface due to crystal phase differences at point a on the (0001) surface at the top of the curved surface and at points b and c outside the central tangent direction. The thickness of the nitride emitting layer is thinner closer to the n-type nitride layer outside the top central tangent direction (from point a to point b and then to point c). This thickness variation precisely matches the distance variation between different positions on the curved surface of the emitting layer and other semiconductor layers (i.e., the emitting layer is farther from the underlying semiconductor layer from point a to point b and then to point c), thereby improving the longitudinal transport capability of holes in the nitride emitting layer, especially improving the uniformity of hole distribution in the nitride emitting layer compared to... Figure 5b The conventional nitride luminescent layer shown has superior carrier injection capability and uniformity.

[0080] The result is as follows Figure 5a As shown, the hole injection capability is greatly improved in the direction close to the substrate, thereby increasing the longitudinal transmission depth of holes in the nitride light-emitting layer. Holes can not only be distributed in the quantum well layer 31 closest to the p-type nitride layer, but also form a uniform hole distribution throughout the entire light-emitting layer.

[0081] Conventional light-emitting layers in existing technologies, such as Figure 5b As shown, due to the low mobility and concentration of holes, while the mobility and concentration of electrons are higher than those of holes, the distribution of electrons and holes in the light-emitting layer is uneven, with holes concentrated in one or two quantum well layers 31 closer to the p-type layer. On the other hand, in the unevenly distributed hole structure, electrons are prone to overflow into the p-type layer and recombine with ionized holes in the p-type layer, reducing the ionization efficiency of holes and generating non-radiative recombination, which reduces the hole injection efficiency and causes an efficiency doop effect.

[0082] The technical solution of the present invention will be further described in detail below through several embodiments and in conjunction with the accompanying drawings. However, the selected embodiments are only for illustrating the present invention and do not limit the scope of the present invention.

[0083] Example 1

[0084] This embodiment illustrates the fabrication process of a gallium nitride (GaN) light-emitting diode (LED) device. The specific steps are as follows:

[0085] S1: A commercially available template with an n-type GaN layer, 2-5 μm thick, is provided. Using sapphire as a substrate, an n-type GaN layer with a thickness of 2.5 μm is grown at a temperature of 1075 °C and a pressure of 150 torr. The n-type doping concentration is 5 × 10⁻⁶. 18 cm -3

[0086] S2: Growth of GaN first buffer layer 11 on n-type GaN layer: Under conditions of 1000℃ and 350 torr, GaN first buffer layer 11 with a thickness of 50nm and n-type doping concentration of 5×10⁻⁶ is grown. 17 cm -3 .

[0087] S3: A first protrusion structure 21 is grown on the GaN first buffer layer 11 to form a first connecting layer: SiN is grown at a temperature of 1000℃ and a pressure of 350 torr, with a thickness of about 5nm, thereby forming a surface morphology of multiple islands distributed in a dispersed manner. The multiple islands form trenches as discontinuous structures, and the bottom width of the trenches is about 15nm.

[0088] S4: Growth of GaN second buffer layer 12 in discontinuous structure: Under conditions of 800℃ and 350 torr, GaN second buffer layer 12 with a thickness of 2nm and an n-type doping concentration of 5×10⁻⁶ was grown. 17 cm -3 .

[0089] S5: A second protrusion structure 22 is grown on the surface of the GaN second buffer layer 12 to form a second interconnecting layer: The SiN second interconnecting layer is grown at a temperature of 1100℃ and a pressure of 350 torr, with a thickness of approximately 3 nm. After the above steps, a structure as shown is formed. Figure 4 The surface morphology shown is characterized by alternating distribution of large and small protrusions.

[0090] S6: Growth of stacked light-emitting layers: Under the conditions of temperature 1000℃ and pressure 300 torr, grow a Gan quantum barrier layer 32 with a thickness of about 12nm; under the conditions of temperature 950℃ and pressure 300 torr, grow an InGaN quantum well layer 31 with a thickness of about 3nm; cycle for a total of 10 cycles to form a III-V group semiconductor light-emitting layer.

[0091] S7: A p-type nitride layer is grown on the surface of the light-emitting layer. A 120 nm thick p-type GaN layer is grown under conditions of 985 °C and 400 torr, with a doping concentration of 5 × 10⁻⁶. 19 cm -3 .

[0092] S8: By using relevant processes to construct electrodes that connect the n-type nitride layer and the p-type nitride layer respectively, the corresponding gallium nitride light-emitting diode device can be formed.

[0093] Comparative Example 1

[0094] The fabrication process of this comparative example, which is also the same as that of Example 1 (gallium nitride light-emitting diode device), is largely the same, with the main difference being:

[0095] Steps S3-S5 are omitted. Instead, after the GaN first buffer layer 11 is formed in step S2, the growth of the light-emitting layer in step S6 is performed directly on the GaN first buffer layer 11.

[0096] Apart from the differences mentioned above, all other growth steps and growth process conditions remain unchanged.

[0097] The obtained device structure has a very flat light-emitting layer structure.

[0098] Comparative Example 2

[0099] The fabrication process of this comparative example, which is also the same as that of Example 1 (gallium nitride light-emitting diode device), is largely the same, with the main difference being:

[0100] Steps S4-S5 are omitted. Instead, after the first connecting layer composed of multiple island-shaped first protrusion structures 21 is formed in step S3, the growth of the light-emitting layer in step S6 is performed directly on the first connecting layer.

[0101] Apart from the differences mentioned above, all other growth steps and growth process conditions remain unchanged.

[0102] In the obtained device structure, although the light-emitting layer structure has certain arc-shaped bumps, it is only formed by epitaxial growth based on the first bump structure 21 with a relatively simple size distribution. The bump size distribution of the light-emitting layer is also relatively simple, and a complex structure with a wide range of size and curvature distribution is not formed.

[0103] Comparative Example 3

[0104] The fabrication process of this comparative example, which is also the same as that of Example 1 (gallium nitride light-emitting diode device), is largely the same, with the main difference being:

[0105] Instead of step S3, after forming the first GaN buffer layer 11 in step S2, step S4 is performed directly on the first GaN buffer layer 11 to grow a continuous second buffer layer 12 while controlling the same dislocation density, and then step S5 is performed to grow the second protrusion structure 22.

[0106] Apart from the differences mentioned above, all other growth steps and growth process conditions remain unchanged.

[0107] The obtained device structure lacks the large-sized first protrusion structure 21, and is instead replaced by numerous dispersed second protrusion structures 22. Consequently, the structural size of the protrusions in the light-emitting layer is also concentrated towards smaller sizes, rather than having a wide size distribution.

[0108] Test case

[0109] The luminous efficiency of the gallium nitride light-emitting diode devices obtained in Example 1 and Comparative Examples 1-3 was tested:

[0110] LED chip size 1mm 2 The wavelength and brightness of the LEDs provided in the examples and comparative examples were tested at 20mA, and the luminous efficiency droop performance was tested at 1000mA. The results are shown below:

[0111] Example 1 450.1 245 30.9 Example 2 450.5 248 31.1 Example 3 450.2 247 30.7 Comparative Example 1 454.2 228 45.5 Comparative Example 2 453.2 235 41.4 Comparative Example 3 453.5 231 42.1

[0112] Where WLD is the emission wavelength.

[0113] Example 2

[0114] This embodiment also illustrates the fabrication process of a gallium nitride light-emitting diode device, which is largely the same as in Embodiment 1, with the main difference being:

[0115] When the second buffer layer 12 is grown in step S4, the conditions are controlled as follows: the temperature is the same as in step S2, and the pressure is adjusted to 50 torr.

[0116] In this embodiment, instead of using low-temperature measures, the second buffer layer 12 is grown under low pressure. As a result, the grown second buffer layer 12 has the same higher dislocation density as the first buffer layer 11 in Embodiment 1. The second protrusion structure 22 grown under this condition is also similar in size to that in Embodiment 1.

[0117] The resulting devices have very similar structural dimensions and other properties, and their luminous efficiency is also at almost the same level.

[0118] Example 3

[0119] This embodiment also illustrates the fabrication process of a gallium nitride light-emitting diode device, which is largely the same as in Embodiment 1, with the main difference being:

[0120] In step S4, when growing the second buffer layer 12, the conditions are controlled as follows: temperature and pressure are the same as in step S2, and the doping concentration is adjusted to 1×10⁻⁶. 18 cm -3 .

[0121] Example 4

[0122] This embodiment is largely the same as Embodiment 1, with the main difference being:

[0123] In step S2, the GaN first buffer layer 11 is grown at a temperature of 1200℃ and a pressure of 650 torr; its thickness is 100 nm, and its n-type doping concentration is 1×10⁻⁶. 17 cm -3 .

[0124] In step S4, the GaN second buffer layer 12 is grown at a temperature of 1100℃ and a pressure of 550 torr; its thickness is 20 nm, and its n-type doping concentration is 2 × 10⁻⁶. 17 cm -3 .

[0125] The resulting light-emitting device also achieved a significantly higher luminous efficiency than ordinary flat light-emitting devices.

[0126] Example 5

[0127] This embodiment is largely the same as Embodiment 1, with the main difference being:

[0128] In step S2, the GaN first buffer layer 11 is grown at a temperature of 900℃ and a pressure of 100 torr; its thickness is 10 nm, and its n-type doping concentration is 8 × 10⁻⁶. 17 cm -3 .

[0129] In step S4, the GaN second buffer layer 12 is grown at a temperature of 800℃ and a pressure of 50 torr; its thickness is 5 nm, and the n-type doping concentration is 1×10⁻⁶. 18 cm -3 .

[0130] The resulting light-emitting device also achieved a significantly higher luminous efficiency than ordinary flat light-emitting devices.

[0131] In this embodiment, instead of using low temperature or low pressure measures, the second buffer layer 12 is grown under high doping concentration. As a result, the grown second buffer layer 12 has the same higher dislocation density as the first buffer layer 11 in Example 1. The second protrusion structure 22 grown under this condition is also similar in size to that in Example 1.

[0132] The resulting devices have very similar structural dimensions and other properties, and their luminous efficiency is also at almost the same level.

[0133] Based on the above embodiments and comparative examples, it is clear that the III-V semiconductor epitaxial structure provided in the embodiments of the present invention can serve as the growth basis for III-V semiconductor material layers, acting as a nanoscale template. The III-V semiconductor light-emitting layer grown on this basis will form light-emitting surfaces of various sizes and curvatures, greatly increasing the light-emitting area of ​​the light-emitting layer. Furthermore, the nanoscale template enables the III-V semiconductor light-emitting layer to form quantum dot light emission, and utilizes the quantum dot confinement effect to reduce the quantum Stark effect, improving the incorporation of light-emitting layer components. The combined effects of these factors significantly improve the radiative recombination efficiency, ultimately enhancing the overall luminous intensity and efficiency of the device.

[0134] It should be understood that the above embodiments are merely illustrative of the technical concept and features of the present invention, and are intended to enable those skilled in the art to understand the content of the present invention and implement it accordingly. They should not be construed as limiting the scope of protection of the present invention. All equivalent changes or modifications made in accordance with the spirit and essence of the present invention should be covered within the scope of protection of the present invention.

Claims

1. A III-V group semiconductor epitaxial structure, characterized in that, Includes a first buffer layer and a first link layer that are stacked together; The first buffer layer is a continuous film layer, the first connecting layer has a first protrusion structure, and a discontinuous structure is formed between multiple first protrusion structures or between different parts of the first protrusion structure. The discontinuous structure penetrates the first connecting layer along the thickness direction. It also includes a second buffer layer and a second connecting layer disposed in the discontinuous structure, wherein the second connecting layer is composed of at least a plurality of independent second protrusion structures; The second buffer layer has a first side and a second side facing away from each other. The first side faces the first buffer layer, and the second protrusion structure is formed on the second side. The dislocation density of the first buffer layer is less than the dislocation density of the second buffer layer. The average bottom width of the first protrusion structure is greater than the average bottom width of the second protrusion structure, forming a structural feature of first protrusion structures and second protrusion structures of different sizes being distributed alternately. Furthermore, the second buffer layer exposed between the first protrusion structure and the second protrusion structure serves as the basis for the epitaxial growth of III-V group semiconductor materials.

2. The III-V group semiconductor epitaxial structure according to claim 1, characterized in that, The bottom width of the discontinuous structure is 5-80 nm; And / or, the first protruding structure occupies 60%-80% of the area of ​​the first buffer layer.

3. The III-V group semiconductor epitaxial structure according to claim 1, characterized in that, The thickness of the first buffer layer is 2-100 nm; And / or, the thickness of the second buffer layer is 2-100 nm.

4. The III-V group semiconductor epitaxial structure according to any one of claims 1-3, characterized in that, The materials of the first buffer layer and / or the second buffer layer include group III-V materials; The materials of the first connecting layer and / or the second connecting layer include group I-V materials.

5. The method for preparing the III-V group semiconductor epitaxial structure according to any one of claims 1-4, characterized in that, include: A first buffer layer is formed by growth, and the first buffer layer is a continuous film layer; A first protrusion structure is epitaxially grown on the surface of the first buffer layer to form a first connecting layer. Discontinuity structures are formed between multiple first protrusion structures or between different parts of the first protrusion structures. The discontinuity structures penetrate the first connecting layer along the thickness direction. In the discontinuous structure, the exposed portion of the first buffer layer surface continues to grow epitaxially to form a second buffer layer; A second protrusion structure is epitaxially grown on the surface of the second buffer layer to form a second connecting layer.

6. The preparation method according to claim 5, characterized in that, The first buffer layer is grown at a first temperature, a first pressure, and a first doping concentration, and the second buffer layer is grown at a second temperature, a second pressure, and a second doping concentration. The growth conditions of the first buffer layer and the second buffer layer satisfy any one of the following conditions: the first temperature is higher than the second temperature, the first pressure is higher than the second pressure, and the first doping concentration is lower than the second doping concentration, or a combination of two or more conditions.

7. The application of the III-V semiconductor epitaxial structure according to any one of claims 1-4 in the fabrication of III-V semiconductor devices.

8. A group III-V semiconductor device, characterized in that, Includes the III-V semiconductor epitaxial structure and the III-V semiconductor light-emitting layer as described in any one of claims 1-4; The group III-V semiconductor light-emitting layer is formed by epitaxial growth using a second buffer layer exposed between the first and second protrusion structures of different sizes in the group III-V semiconductor epitaxial structure as the growth basis.

9. The III-V group semiconductor device according to claim 8, characterized in that, The group III-V semiconductor light-emitting layer includes alternating quantum well layers and quantum barrier layers; The quantum well layer and the quantum barrier layer are grown using the exposed area between the first protrusion structure and the exposed area between the second protrusion structure as templates to form the first arc-shaped protrusion and the second arc-shaped protrusion, respectively. The width of the first arc-shaped protrusion is greater than the width of the second arc-shaped protrusion, and the height of the first arc-shaped protrusion is greater than the height of the second arc-shaped protrusion.

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