A control circuit and control method for preventing reverse of inductive current

Abstract

The present application belongs to the field of integrated circuits, and particularly relates to a control circuit and a control method for preventing reverse of inductive current; the circuit is applied to a synchronous rectification PWM controller on-chip integrated chip, and comprises a comparator circuit, a charge-discharge circuit and a constant current source circuit; the circuits are all analog circuits, and the present application is realized in the mode of analog circuits, and has the characteristics of less components and easy integration; the control circuit of the present application has simple structure and low design complexity; the process compatibility is good, and the on-chip integration is facilitated; the light load comparison reference threshold can be arbitrarily adjusted outside the chip, and has a hysteresis function; the control method of the present application is simple, can avoid frequently enabling the synchronous rectification MOSFET in the process of switching between heavy load and light load, and simplifies the synchronous rectification control method of the PWM controller on-chip integration.

Description

Technical Field

[0001] This invention belongs to the field of integrated circuits, and specifically relates to a control circuit and control method for preventing reverse inductor current in a synchronous rectification PWM controller on-chip integrated chip. Background Technology

[0002] Switching power supplies dominate the power supply field due to their high efficiency and high power density. Early switching power supplies used diode rectification. However, due to the high forward voltage drop of diodes, conduction losses increased under high current applications, resulting in reduced power conversion efficiency. To reduce the conduction losses of rectifier devices, synchronous rectification technology was proposed and widely used in high-current output switching power supplies. This technology uses power MOSFETs with extremely low on-resistance to replace diode rectification.

[0003] Under heavy load conditions, synchronous rectification can improve the conversion efficiency of switching power supplies and effectively reduce power consumption. Under light load conditions, due to the bidirectional conduction characteristics of the freewheeling MOSFET, the inductor current gradually decreases during freewheeling and flows back into the freewheeling MOSFET, resulting in significant power loss and reduced light load conversion efficiency. Excessive reverse current can generate voltage spikes across the drain and source of the freewheeling MOSFET, potentially causing it to burn out. Therefore, synchronous rectification PWM controller chips need to integrate control circuitry to prevent reverse inductor current, monitor the output load current of the switching power supply in real time, and automatically shut down the freewheeling MOSFET when entering a light load state to prevent the formation of reverse inductor current.

[0004] Isolated switching power supplies generate an auxiliary voltage source to power the PWM controller chip through an auxiliary winding, eliminating the need for the chip to withstand high voltage and effectively reducing the selection cost and power consumption of the PWM controller chip. However, if the circuit design for preventing inductor current reversal is based on sampling the drain voltage of the freewheeling MOSFET, it is unsuitable for low-voltage chips. Similarly, if a small resistor is connected in series with the output load ground to sample the output current for preventing inductor current reversal, the sampling resistor consumes a large amount of power, affecting the switching power supply's conversion efficiency. Therefore, isolated switching power supplies typically use a current transformer connected in series with the primary-side main power transistor path to sample the current, simultaneously for peak current PWM control and light-load freewheeling MOSFET shutdown control. This improves the switching power supply's conversion efficiency and simplifies the power supply design. However, because the main power transistor is in an alternating on / off state, the sampled current is a square wave signal. Comparing it with the internal reference voltage of the PWM controller chip makes it inconvenient to determine heavy and light loads, thus requiring complex digital logic control circuitry. Summary of the Invention

[0005] To simplify the design of the anti-inductor current reverse control circuit integrated on-chip in the aforementioned isolated synchronous rectifier PWM controller, this invention proposes a simple anti-inductor current reverse control circuit and control method. The circuit structure is simple and has low design complexity; it has good process compatibility and is easy to integrate on-chip; the light load comparison reference threshold can be arbitrarily adjusted off-chip and has hysteresis function; the control method is simple and easy to implement.

[0006] To achieve the above objectives, the present invention provides the following technical solution:

[0007] In a first aspect, the present invention provides a control circuit for preventing reverse inductor current, applied in an on-chip integrated chip of a synchronous rectification PWM controller. The control circuit includes a comparator circuit, a charging / discharging circuit, and a constant current source circuit. The positive input terminal of the comparator circuit is connected to the CS terminal of the chip, and the negative input terminal of the comparator circuit is connected to the SR_Vth terminal of the chip and the output terminal of the constant current source circuit. The power supply terminal of the comparator circuit is connected to power supply VCC and ground GND. The output terminal of the comparator circuit is connected to the input terminal of the charging / discharging circuit. The power supply terminal of the charging / discharging circuit is connected to power supply VCC and ground GND, and the output terminal of the charging / discharging circuit is connected to... The chip has internal SR_Ctr and HYS_Ctr terminals; the input terminal of the constant current source circuit is connected to the input terminal of the switch, the control terminal of the switch is connected to the HYS_Ctr terminal, one end of the switch is connected to the power supply VCC, and the other end of the switch is connected to the constant current source circuit; wherein, the SR_Vth terminal serves as the hysteresis current input terminal and the reference threshold voltage, the SR_Vth terminal is connected to one end of external resistor R1 and one end of external resistor R2 respectively, the other end of external resistor R1 is connected to the chip's VREF terminal, and the other end of external resistor R2 is grounded to GND; the SR_Ctr terminal serves as the synchronous rectification control terminal, outputting a synchronous rectification control signal.

[0008] Furthermore, the positive input signal of the comparator circuit is CS, the negative input signal is SR_Vth, VB is the bias voltage, COMP_OUT is the comparator circuit output signal, VCC is the power supply, and GND is ground. PNP transistors P1, PNP transistors P2, PNP transistors P3, PNP transistors P4, resistors R2, R3, and R4 provide bias current for each branch. PNP transistors P5, PNP transistors P6, PNP transistors P7, PNP transistors P8, NPN transistors N1 and NPN transistors N2 form the first-stage differential amplifier, and NPN transistor N3 forms the second-stage amplifier.

[0009] Furthermore, one end of resistors R2, R3, and R4 is connected to the power supply VCC; the other end of resistor R2 is connected to the emitter of PNP transistors P1 and P3; the other end of resistor R3 is connected to the emitter of PNP transistor P2; and the other end of resistor R4 is connected to the emitter of PNP transistor P4. The bases of PNP transistors P1, P2, P3, and P4 are connected to the bias voltage VB. The collector of PNP transistor P1 is connected to the emitter of PNP transistor P5 and the base of PNP transistor P7; the collector of PNP transistor P2 is connected to the emitters of PNP transistors P7 and P8; and the collector of PNP transistor P3 is connected to the emitter of PNP transistor P6 and the base of PNP transistor P8. The collectors of NP transistor P4 and NPN transistor N3 serve as the output terminals of the comparator circuit and are connected to the input terminals of the charging and discharging circuit. The base of PNP transistor P5 serves as the negative input terminal of the comparator circuit and is connected to the SR_Vth terminal of the chip. The collector of PNP transistor P5 is grounded to GND. The collector of PNP transistor P7 is connected to the base and collector of NPN transistor N1 and the base of NPN transistor N2. The collector of PNP transistor P8 is connected to the collector of NPN transistor N2 and the base of NPN transistor N3. The emitters of NPN transistors N1, NPN transistor N2, and NPN transistor N3, as well as the collector of PNP transistor P6, are grounded to GND. The base of PNP transistor P6 serves as the positive input terminal of the comparator circuit and is connected to the CS terminal of the chip.

[0010] Furthermore, in the charging and discharging circuit, VCC is the power supply, GND is ground, VB is the bias voltage, COMP_OUT is the output signal of the comparator circuit, SR_Ctr is the synchronous rectification control signal, and HYS_Ctr is the hysteresis current control signal. PNP transistor P9 and resistor R5 are the constant current source for charging capacitor C1, and NPN transistor N4 is the discharge transistor for capacitor C1. Diodes D1 are n connected in series, determining the turn-on threshold of NPN transistor N5. Resistor R6 limits the current, PNP transistors P10 and P11 are current mirrors, and NPN transistor N6 and resistor R8 form an inverter.

[0011] Furthermore, one end of resistor R5, the emitter of PNP transistor P10, the emitter of PNP transistor P11, and one end of resistor R8 are connected to the power supply VCC; the other end of resistor R5 is connected to the emitter of PNP transistor P9; the base and collector of PNP transistor P10 are shorted and then connected to one end of resistor R6; the collector of PNP transistor P11 is connected to one end of resistor R7 and the base of NPN transistor N6, and serves as the output terminal of the charging / discharging circuit connected to the SR_Ctr terminal inside the chip; the other end of resistor R8 is connected to the collector of NPN transistor N6, and serves as the output terminal of the charging / discharging circuit connected to... The HYS_Ctr terminal inside the chip; the collector of PNP transistor P9 is connected to the collector of NPN transistor N4, one end of capacitor C1, and the base of NPN transistor N5. The base of NPN transistor N4 serves as the input terminal of the charging and discharging circuit and is connected to the output terminal of the comparator circuit; the other end of resistor R6 is connected to the collector of NPN transistor N5, and the emitter of NPN transistor N5 is connected to the positive terminal of n series-connected diodes D1; ​​the emitter of NPN transistor N4, the other end of capacitor C1, the negative terminal of n series-connected diodes D1, the other end of resistor R7, and the emitter of NPN transistor N6 are grounded to GND.

[0012] Furthermore, in the constant current source circuit, VCC is the power supply, GND is ground, VB is the bias voltage, HYS_Ctr is the constant current source control signal, and SR_Vth is the hysteresis current output terminal. VB determines the current source magnitude of PNP transistor P12 and resistor R9, and outputs current after being mirrored by NPN transistors N7, NPN transistor N8, PNP transistor P13, and PNP transistor P14. NPN transistor N9 is the control transistor of the constant current source circuit.

[0013] Furthermore, one end of resistor R9, the emitter of PNP transistor P13, and the emitter of PNP transistor P14 are connected to the power supply VCC. The other end of resistor R9 is connected to the emitter of PNP transistor P12. The base and collector of PNP transistor P13 are shorted and connected to the collector of NPN transistor N8 and the base of PNP transistor P14. The collector of PNP transistor P14 serves as the output terminal of the constant current source circuit and is connected to the SR_Vth terminal of the chip. The base of PNP transistor P12 is connected to the bias voltage VB. The collector of PNP transistor P12 is connected to the base and collector of NPN transistor N7, the base of NPN transistor N8, and the collector of NPN transistor N9. The emitters of NPN transistors N7, NPN transistor N8, and NPN transistor N9 are grounded to GND. The base of NPN transistor N9 serves as the HYS_Ctr terminal and is connected to the control terminal of the switch.

[0014] The beneficial effects of this invention are:

[0015] (1) The circuit structure of the present invention is simple and the design complexity is low;

[0016] (2) The present invention has good process compatibility and is easy to integrate on-chip;

[0017] (3) The comparator reference threshold of the present invention can be arbitrarily adjusted off-chip and has hysteresis function.

[0018] (4) The control method of the present invention is simple and can avoid frequent activation of the synchronous rectification MOSFET during the switching between heavy load and light load, thus simplifying the synchronous rectification control method integrated on the PWM controller. Attached Figure Description

[0019] To make the objectives, technical solutions, and beneficial effects of this invention clearer, the following figures are provided for illustration:

[0020] Figure 1 This is a structural diagram of the anti-inductor current reverse control circuit in an embodiment of the present invention;

[0021] Figure 2 This is a diagram of the comparator circuit structure in an embodiment of the present invention;

[0022] Figure 3 This is a structural diagram of the charging and discharging circuit in an embodiment of the present invention;

[0023] Figure 4 This is a schematic diagram of the constant current source circuit in an embodiment of the present invention;

[0024] Figure 5 This is a flowchart illustrating the anti-reverse inductor current control during heavy-load processes in an embodiment of the present invention.

[0025] Figure 6 This is a flowchart illustrating the anti-reverse inductor current control process under light load in an embodiment of the present invention.

[0026] Figure 7 This is a waveform diagram of the key control signals under heavy load in this invention;

[0027] Figure 8 This is a waveform diagram of the key control signals under light load conditions in this invention. Detailed Implementation

[0028] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0029] like Figure 1As shown, a control circuit for preventing reverse inductor current is applied to an integrated chip of a synchronous rectification PWM controller, including a comparator circuit, a charging and discharging circuit, and a constant current source circuit. The positive input terminal of the comparator circuit is connected to the CS terminal of the chip, and the negative input terminal is connected to the SR_Vth terminal of the chip and the output terminal of the constant current source circuit. The power supply terminal of the comparator circuit is connected to the power supply VCC and ground GND. The output terminal of the comparator circuit is connected to the input terminal of the charging and discharging circuit. The power supply terminal of the charging and discharging circuit is connected to the power supply VCC and ground GND, and the output terminal of the charging and discharging circuit is connected to the SR_Ctr and HYS_Ctr terminals inside the chip. The input terminal of the constant current source circuit is connected to the input terminal of the switch. The control terminal of the switch is connected to the HYS_Ctr terminal. One end of the switch is connected to the power supply VCC, and the other end of the switch is connected to the constant current source circuit. The SR_Vth terminal serves as the hysteresis current input terminal and the reference threshold voltage. The SR_Vth terminal is connected to one end of the external resistor R1 and one end of the external resistor R2. The other end of the external resistor R1 is connected to the VREF terminal of the chip, and the other end of the external resistor R2 is ground GND. The SR_Ctr terminal serves as the synchronous rectification control terminal and outputs the synchronous rectification control signal.

[0030] In this circuit, CS is the chip's current sampling terminal, which samples the main power transistor's current signal through a current transformer and is connected to the positive input terminal of the comparator circuit. VREF is the chip's reference voltage terminal, which is connected to the chip's SR_Vth terminal (i.e., the negative input terminal of the comparator circuit) after being divided by external resistors R1 and R2. COMP_OUT is the comparator circuit output signal, HYS_Ctr is the hysteresis current control signal, SR_Ctr is the synchronous rectification control signal, VCC is the power supply, and GND is ground.

[0031] like Figure 2 As shown, the positive input signal of the comparator circuit is CS, the negative input signal is SR_Vth, VB is the bias voltage, COMP_OUT is the comparator circuit output signal, VCC is the power supply, and GND is ground. PNP transistors P1, PNP transistors P2, PNP transistors P3, PNP transistors P4, resistors R2, R3, and R4 provide bias current for each branch. PNP transistors P5, PNP transistors P6, PNP transistors P7, PNP transistors P8, NPN transistors N1 and NPN transistors N2 form the first-stage differential amplifier, and NPN transistor N3 forms the second-stage amplifier.

[0032] In this configuration, one end of resistors R2, R3, and R4 is connected to the power supply VCC; the other end of resistor R2 is connected to the emitter of PNP transistors P1 and P3; the other end of resistor R3 is connected to the emitter of PNP transistor P2; and the other end of resistor R4 is connected to the emitter of PNP transistor P4. The bases of PNP transistors P1, P2, P3, and P4 are connected to the bias voltage VB. The collector of PNP transistor P1 is connected to the emitter of PNP transistor P5 and the base of PNP transistor P7. The collector of PNP transistor P2 is connected to the emitters of PNP transistors P7 and P8; and the collector of PNP transistor P3 is connected to the emitter of PNP transistor P6 and the base of PNP transistor P8. The collectors of P4 and N3 serve as the output of the comparator circuit and are connected to the input of the charging / discharging circuit. The base of P5 serves as the negative input of the comparator circuit and is connected to the SR_Vth terminal of the chip. The collector of P5 is grounded to GND. The collector of P7 is connected to the base and collector of N1 and the base of N2. The collector of P8 is connected to the collector of N2 and the base of N3. The emitters of N1, N2, and N3, as well as the collector of P6, are grounded to GND. The base of P6 serves as the positive input of the comparator circuit and is connected to the CS terminal of the chip.

[0033] like Figure 3 As shown, in the charging and discharging circuit, VCC is the power supply, GND is ground, VB is the bias voltage, COMP_OUT is the output signal of the comparator circuit, SR_Ctr is the synchronous rectification control signal, and HYS_Ctr is the hysteresis current control signal. PNP transistor P9 and resistor R5 are the constant current source for charging capacitor C1, and NPN transistor N4 is the discharge transistor for capacitor C1. Diodes D1 are n connected in series, determining the turn-on threshold of NPN transistor N5. Resistor R6 limits the current, PNP transistors P10 and P11 are current mirrors, and NPN transistor N6 and resistor R8 form an inverter.

[0034] In this circuit, one end of resistor R5, the emitter of PNP transistor P10, the emitter of PNP transistor P11, and one end of resistor R8 are connected to the power supply VCC. The other end of resistor R5 is connected to the emitter of PNP transistor P9. The base and collector of PNP transistor P10 are shorted and connected to one end of resistor R6. The collector of PNP transistor P11 is connected to one end of resistor R7 and the base of NPN transistor N6, serving as the output terminal of the charging / discharging circuit and connected to the SR_Ctr terminal inside the chip. The other end of resistor R8 is connected to the collector of NPN transistor N6 and serves as the output terminal of the charging / discharging circuit and connected to the chip. The HYS_Ctr terminal inside the chip; the collector of PNP transistor P9 is connected to the collector of NPN transistor N4, one end of capacitor C1, and the base of NPN transistor N5. The base of NPN transistor N4 serves as the input terminal of the charging and discharging circuit and is connected to the output terminal of the comparator circuit; the other end of resistor R6 is connected to the collector of NPN transistor N5, and the emitter of NPN transistor N5 is connected to the positive terminal of n series-connected diodes D1; ​​the emitter of NPN transistor N4, the other end of capacitor C1, the negative terminal of n series-connected diodes D1, the other end of resistor R7, and the emitter of NPN transistor N6 are grounded to GND.

[0035] like Figure 4 As shown, in the constant current source circuit, VCC is the power supply, GND is ground, VB is the bias voltage, HYS_Ctr is the constant current source control signal, and SR_Vth is the hysteresis current output terminal. VB determines the current source magnitude of PNP transistor P12 and resistor R9, and outputs current after being mirrored by NPN transistors N7, NPN transistor N8, PNP transistor P13, and PNP transistor P14. NPN transistor N9 is the control transistor of the constant current source circuit.

[0036] In this circuit, one end of resistor R9, the emitter of PNP transistor P13, and the emitter of PNP transistor P14 are connected to the power supply VCC. The other end of resistor R9 is connected to the emitter of PNP transistor P12. The base and collector of PNP transistor P13 are shorted and then connected to the collector of NPN transistor N8 and the base of PNP transistor P14. The collector of PNP transistor P14 serves as the output terminal of the constant current source circuit and is connected to the SR_Vth terminal of the chip. The base of PNP transistor P12 is connected to the bias voltage VB. The collector of PNP transistor P12 is connected to the base and collector of NPN transistor N7, the base of NPN transistor N8, and the collector of NPN transistor N9. The emitters of NPN transistors N7, NPN transistor N8, and NPN transistor N9 are grounded to GND. The base of NPN transistor N9 serves as the HYS_Ctr terminal and is connected to the control terminal of the switch.

[0037] Figure 5 This is a flowchart illustrating the anti-reverse inductor current control during heavy-load processes in an embodiment of the present invention, as shown below. Figure 5 As shown, when a switching power supply is operating under heavy load, the method includes:

[0038] The current signal sampled at the CS terminal of the chip is a periodic square wave signal;

[0039] The required reference threshold voltage SR_Vth is obtained by voltage division at the VREF terminal of the chip through external resistors R1 and R2;

[0040] The comparator circuit processes the sampled current signal and the reference threshold voltage signal and outputs a comparator circuit output signal to control the operation of the charging and discharging circuit.

[0041] The charging and discharging circuit controls the HYS_Ctr terminal to a constant high level, the constant current source circuit does not output current, the SR_Vth terminal does not generate hysteresis voltage, the SR_Ctr terminal is at a constant low level, the synchronous rectifier tube drive signal is enabled, and the synchronous rectifier MOSFET is turned on and working normally.

[0042] Figure 6 This is a flowchart illustrating the anti-reverse inductor current control during light-load processes in an embodiment of the present invention, as shown below. Figure 6 As shown, when the switching power supply is operating under light load, the method includes:

[0043] The current signal sampled at the CS terminal of the chip is a periodic square wave signal;

[0044] The required reference threshold voltage SR_Vth is obtained by voltage division at the VREF terminal of the chip through external resistors R1 and R2;

[0045] The comparator circuit processes the sampled current signal and the reference threshold voltage signal and outputs a comparator circuit output signal to control the operation of the charging and discharging circuit.

[0046] The charging and discharging circuit controls the HYS_Ctr terminal to a constant low level, the constant current source circuit outputs current, and generates a hysteresis voltage at the SR_Vth terminal. The SR_Ctr terminal is at a constant high level, the synchronous rectification drive signal is turned off, the synchronous rectification MOSFET is turned off, and at this time, the body diode is used for rectification to prevent the inductor current from reversing.

[0047] Figure 7 This is a waveform diagram of the key control signals under heavy load in this invention. The current signal sampled at the CS terminal of the chip is a periodic square wave signal. The required reference threshold voltage SR_Vth is obtained by voltage division at the VREF terminal of the chip through external resistors R1 and R2. The peak value of the current signal sampled at the CS terminal is greater than the reference threshold voltage SR_Vth. After processing by the comparator circuit, a COMP_OUT square wave signal is output to control the NPN transistor N4 to alternately turn on and off. The constant current generated by PNP transistor P9 and resistor R5 is relatively small, while the conduction current of NPN transistor N4 is much larger than the constant current generated by PNP transistor P9 and resistor R5. The Va junction voltage is always lower than the threshold voltage V at which NPN transistor N5 turns on. TH_N5NPN transistor N5 is always off, PNP transistors P10 and P11 are off, HYS_Ctr is constantly high, NPN transistor N9 is on, and no hysteresis voltage is generated at the SR_Vth terminal; when SR_Ctr is constantly low, the chip automatically recognizes that the switching power supply is operating in a heavy load state, enables the synchronous rectifier drive signal, and the synchronous rectifier MOSFET operates normally. The threshold voltage V for NPN transistor N5 to turn on is... TH_N5 for:

[0048] V TH_N5 =V BE_N5 +n×V D1

[0049] Figure 8 This is a waveform diagram of the key control signals under light load conditions in this invention. The current signal sampled at the CS terminal of the chip is a periodic square wave signal. The required reference threshold voltage SR_Vth is obtained by voltage division at the VREF terminal of the chip through external resistors R1 and R2. The peak value of the current signal sampled at the CS terminal is less than the reference threshold voltage SR_Vth. After processing by the comparator circuit, COMP_OUT outputs a constant low level, NPN transistor N4 is constantly turned off, and the Va node voltage is constantly greater than the threshold voltage V at which NPN transistor N5 is turned on. TH_N5 When NPN transistor N5 is on, PNP transistors P10 and P11 are on, and NPN transistor N6 is on, HYS_Ctr is constantly low, NPN transistor N9 is off, and the constant current source circuit outputs current, generating a hysteresis voltage at the SR_Vth terminal. When SR_Ctr is constantly high, the chip automatically recognizes that the switching power supply is operating in a light-load state, turns off the synchronous rectification drive signal, and the synchronous rectification MOSFET is turned off. At this time, rectification is carried out through the body diode to prevent the inductor current from reversing. The hysteresis voltage generated at the SR_Vth terminal avoids frequent activation of the synchronous rectification MOSFET during the switching between heavy and light loads.

[0050] Although embodiments of the invention have been shown and described, it will be understood by those skilled in the art that various changes, modifications, substitutions and alterations can be made to these embodiments without departing from the principles and spirit of the invention, the scope of which is defined by the appended claims and their equivalents.

Claims

1. A control circuit for preventing reverse inductor current, characterized in that, This system is used in an integrated chip for synchronous rectified PWM controllers. The control circuit includes a comparator circuit, a charging / discharging circuit, and a constant current source circuit. The positive input terminal of the comparator circuit is connected to the CS terminal of the chip, and the negative input terminal is connected to the SR_Vth terminal of the chip and the output terminal of the constant current source circuit. The power supply terminal of the comparator circuit is connected to the power supply VCC and ground GND. The output terminal of the comparator circuit is connected to the input terminal of the charging / discharging circuit. The power supply terminal of the charging / discharging circuit is connected to the power supply VCC and ground GND, and the output terminal of the charging / discharging circuit is connected to the SR_Ctr terminal and HY terminal inside the chip. The HYS_Ctr terminal is connected to the input terminal of the switch. The control terminal of the switch is connected to the HYS_Ctr terminal. One end of the switch is connected to the power supply VCC, and the other end of the switch is connected to the constant current source circuit. The SR_Vth terminal serves as the hysteresis current input terminal and the reference threshold voltage. The SR_Vth terminal is connected to one end of the first external resistor and one end of the second external resistor. The other end of the first external resistor is connected to the VREF terminal of the chip, and the other end of the second external resistor is grounded (GND). The SR_Ctr terminal serves as the synchronous rectification control terminal, outputting a synchronous rectification control signal.

2. The control circuit for preventing reverse inductor current according to claim 1, characterized in that, The comparator circuit includes: PNP transistors P1, PNP transistor P2, PNP transistor P3, PNP transistor P4, resistors R2, R3, and R4 are used to provide bias current for each branch. PNP transistors P5, PNP transistor P6, PNP transistor P7, PNP transistor P8, NPN transistor N1, and NPN transistor N2 are used as the first-stage differential amplifier. NPN transistor N3 is used as the second-stage amplifier; In the comparator circuit, one end of resistors R2, R3, and R4 is connected to the power supply VCC; the other end of resistor R2 is connected to the emitter of PNP transistors P1 and P3; the other end of resistor R3 is connected to the emitter of PNP transistor P2; and the other end of resistor R4 is connected to the emitter of PNP transistor P4. The bases of PNP transistors P1, P2, P3, and P4 are connected to the bias voltage VB. The collector of PNP transistor P1 is connected to the emitter of PNP transistor P5 and the base of PNP transistor P7; the collector of PNP transistor P2 is connected to the emitters of PNP transistors P7 and P8; and the collector of PNP transistor P3 is connected to the emitter of PNP transistor P6 and the base of PNP transistor P8. The collectors of PNP transistor P4 and NPN transistor N3 serve as the output terminals of the comparator circuit and are connected to the input terminals of the charging and discharging circuit. The base of PNP transistor P5 serves as the negative input terminal of the comparator circuit and is connected to the SR_Vth terminal of the chip. The collector of PNP transistor P5 is grounded to GND. The collector of PNP transistor P7 is connected to the base and collector of NPN transistor N1 and the base of NPN transistor N2. The collector of PNP transistor P8 is connected to the collector of NPN transistor N2 and the base of NPN transistor N3. The emitters of NPN transistors N1, NPN transistor N2, and NPN transistor N3, as well as the collector of PNP transistor P6, are grounded to GND. The base of PNP transistor P6 serves as the positive input terminal of the comparator circuit and is connected to the CS terminal of the chip.

3. The control circuit for preventing reverse inductor current according to claim 1, characterized in that, The charging and discharging circuit includes: PNP transistor P9 and resistor R5 serve as a constant current source for charging capacitor C1. NPN transistor N4 serves as the discharge transistor for capacitor C1; NPN transistor N5; Diode D1, consisting of n series-connected diodes, is used to determine the turn-on threshold of NPN transistor N5; Resistor R6 serves as a current limiter; PNP transistors P10 and PNP transistor P11 are used as current mirrors; NPN transistor N6 and resistor R8 form an inverter; In the charging and discharging circuit, one end of resistor R5, the emitter of PNP transistor P10, the emitter of PNP transistor P11, and one end of resistor R8 are connected to the power supply VCC; the other end of resistor R5 is connected to the emitter of PNP transistor P9; the base and collector of PNP transistor P10 are shorted and connected to one end of resistor R6; the collector of PNP transistor P11 is connected to one end of resistor R7 and the base of NPN transistor N6, and serves as the output terminal of the charging and discharging circuit, connected to the SR_Ctr terminal inside the chip; the other end of resistor R8 is connected to the collector of NPN transistor N6, and serves as the output terminal of the charging and discharging circuit, connected to... Connect the chip to the HYS_Ctr terminal inside; connect the collector of PNP transistor P9 to the collector of NPN transistor N4, one end of capacitor C1, and the base of NPN transistor N5. The base of NPN transistor N4 serves as the input terminal of the charging and discharging circuit and is connected to the output terminal of the comparator circuit; connect the other end of resistor R6 to the collector of NPN transistor N5, and connect the emitter of NPN transistor N5 to the positive terminal of n series-connected diodes D1; ​​connect the emitter of NPN transistor N4, the other end of capacitor C1, the negative terminal of n series-connected diodes D1, the other end of resistor R7, and the emitter of NPN transistor N6 to ground GND.

4. The control circuit for preventing reverse inductor current according to claim 1, characterized in that, The constant current source circuit includes: bias voltage VB, PNP transistors P12, P13, and P14, NPN transistors N7, N8, and N9, and resistor R9. The bias voltage VB is used to determine the output magnitude of the current source formed by PNP transistor P12 and resistor R9. The current is output after being mirrored by NPN transistor N7, NPN transistor N8, PNP transistor P13 and PNP transistor P14; NPN transistor N9 is used as the control transistor of the constant current source circuit. In the constant current source circuit, one end of resistor R9, the emitter of PNP transistor P13, and the emitter of PNP transistor P14 are connected to the power supply VCC. The other end of resistor R9 is connected to the emitter of PNP transistor P12. The base and collector of PNP transistor P13 are shorted and then connected to the collector of NPN transistor N8 and the base of PNP transistor P14. The collector of PNP transistor P14 serves as the output terminal of the constant current source circuit and is connected to the SR_Vth terminal of the chip. The base of PNP transistor P12 is connected to the bias voltage VB. The collector of PNP transistor P12 is connected to the base and collector of NPN transistor N7, the base of NPN transistor N8, and the collector of NPN transistor N9. The emitters of NPN transistors N7, NPN transistor N8, and NPN transistor N9 are grounded to GND. The base of NPN transistor N9 serves as the HYS_Ctr terminal and is connected to the control terminal of the switch.

5. A control method for preventing reverse inductor current, comprising employing a control circuit for preventing reverse inductor current as described in any one of claims 1 to 4, characterized in that, The method is applied when the switching power supply is operating under heavy load, and specifically includes: The current signal sampled at the CS terminal of the chip is a periodic square wave signal; The required reference threshold voltage SR_Vth is obtained by voltage division at the VREF terminal of the chip through the first external resistor and the second external resistor; The comparator circuit processes the sampled current signal and the reference threshold voltage signal and outputs a comparator circuit output signal to control the operation of the charging and discharging circuit. The charging and discharging circuit controls the HYS_Ctr terminal to a constant high level, the constant current source circuit does not output current, the SR_Vth terminal does not generate hysteresis voltage, the SR_Ctr terminal is at a constant low level, the synchronous rectifier tube drive signal is enabled, and the synchronous rectifier MOSFET is turned on and working normally.

6. A control method for preventing reverse inductor current, comprising employing a control circuit for preventing reverse inductor current as described in any one of claims 1 to 4, characterized in that, The method is applied when the switching power supply is operating under light load, and specifically includes: The current signal sampled at the CS terminal of the chip is a periodic square wave signal; The required reference threshold voltage SR_Vth is obtained by voltage division at the VREF terminal of the chip through the first external resistor and the second external resistor; The comparator circuit processes the sampled current signal and the reference threshold voltage signal and outputs a comparator circuit output signal to control the operation of the charging and discharging circuit. The charging and discharging circuit controls the HYS_Ctr terminal to a constant low level, the constant current source circuit outputs current, and generates a hysteresis voltage at the SR_Vth terminal. The SR_Ctr terminal is at a constant high level, the synchronous rectification drive signal is turned off, the synchronous rectification MOSFET is turned off, and at this time, the body diode is used for rectification to prevent the inductor current from reversing.

Images