Row drive circuit, drive method, and display device

Abstract

The application discloses a row driving circuit, a driving method and a display device. The row driving circuit comprises a first charging module, a second charging module, a pull-down maintaining module and an output module. When the first power supply module outputs a high-level signal, the second power supply module outputs a low-level signal, the first charging module is turned on by receiving a frame start signal or a superior scanning signal, the first power supply module charges a first node through the first charging module, an output module is controlled to output a current stage scanning signal, and forward scanning is realized. When the second power supply module outputs a high-level signal, the first power supply module outputs a low-level signal, the second charging module receives a frame start signal or a lower scanning signal, the second power supply module charges the first node through the second charging module, the output module is controlled to output the current stage scanning signal, and reverse scanning is realized. The application realizes forward and reverse scanning by setting two charging modules connected with different power supply modules and receiving different levels at the same time.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of display, in particular to a row driving circuit, a driving method and a display device. BACKGROUND

[0002] In the field of display, Gate Driven on Array (GOA) technology refers to a technology of realizing gate shift waveform output by using thin film transistor (TFT) integrated design on a display glass substrate, which can replace the function of a gate driver IC, thereby saving the use and manufacturing process of the gate driver IC and greatly saving the cost of the panel, so that the GOA technology becomes a core and widely used technology of the panel.

[0003] Generally, in the fields of vehicle-mounted, tablet and mobile phone applications, the GOA usually needs to have forward and reverse scanning functions, that is, the GOA can perform line-by-line scanning in different directions from top to bottom and from bottom to top to cope with the landscape and portrait or forward and reverse applications of the screen in different scenarios; oxide is known as a new generation technology that can be produced at a large generation line with low cost after A-si, so it is particularly important to develop an oxide forward and reverse scanning function GOA. Therefore, it is an urgent problem to provide a GOA circuit with forward and reverse scanning functions, which can effectively realize the forward and reverse scanning function display panel in different scenarios. SUMMARY

[0004] The purpose of the present application is to provide a row driving circuit, a driving method and a display device, which aims to provide a GOA circuit with forward and reverse scanning functions, which can effectively realize the display panel with forward and reverse scanning functions in different scenarios.

[0005] The present application discloses a row driving circuit, which comprises a plurality of cascaded row driving units, each of which comprises a first charging module, a second charging module, a pull-down maintaining module and an output module; the control end of the first charging module is connected with a gate start signal or a higher-level scanning signal, the input end is connected with a first power supply module, and the output end is connected with a first node and charges the first node; the control end of the second charging module is connected with a gate start signal or a lower-level scanning signal, the input end is connected with a second power supply module, and the output is connected with the first node and charges the first node; the control end of the pull-down maintaining module is connected with a third power supply module, the input end is connected with the first node, and the output end is connected with a low-level signal output end; the control end of the output module is connected with the first node, the input end is connected with a current-stage positive clock signal, and the output end outputs a current-stage scanning signal.

[0006] The first power supply module and the second power supply module output opposite level signals at the same time, the first power supply module outputs a high level signal when the second power supply module outputs a low level signal, the first charging module receives a frame start signal or an upper level scanning signal, the first power supply module charges the first node through the first charging module, the control output module outputs a current level scanning signal, and forward scanning is realized; the second power supply module outputs a high level signal, the first power supply module outputs a low level signal, the second charging module receives a frame start signal or a lower level scanning signal, the second power supply module charges the first node through the second charging module, the control output module outputs a current level scanning signal, and reverse scanning is realized.

[0007] Optionally, the row driving circuit comprises a forward and reverse scanning signal generation module and a forward and reverse scanning detection module, input ends of the forward and reverse scanning signal generation module are connected with a first row driving unit and a last row driving unit respectively, an output end of the forward and reverse scanning signal generation module is connected with an input end of the forward and reverse scanning detection module, and the forward and reverse scanning signal generation module outputs a forward scanning signal and a reverse scanning signal to the forward and reverse scanning detection module;

[0008] An output end of the forward and reverse scanning detection module is connected with the first power supply module and the second power supply module respectively; when the forward and reverse scanning detection module receives the forward scanning signal, the first power supply module is controlled to output a high level signal to the first charging module; when the forward and reverse scanning detection module receives the reverse scanning signal, the second power supply module is controlled to output a high level signal to the second charging module;

[0009] When a frame start signal is output to the first row driving unit, the forward and reverse scanning signal generation module generates the forward scanning signal; when the frame start signal is output to the last row driving unit, the forward and reverse scanning signal generation module generates the reverse scanning signal.

[0010] Optionally, the pull-down maintaining module comprises a first pull-down maintaining unit, the first charging module comprises a first transistor, the second charging module comprises a second transistor, the output module comprises a third transistor, and the first pull-down maintaining unit comprises a fourth transistor, a fifth transistor and a sixth transistor.

[0011] A control end of the first transistor is connected with a gate start signal or an upper level scanning signal, an input end of the first transistor is connected with the first power supply module, and an output end of the first transistor is connected with a control end of the third transistor through the first node; a control end of the second transistor is connected with a lower level scanning signal, an input end of the second transistor is connected with the second power supply module, and an output end of the second transistor is connected with the control end of the third transistor through the first node; an input end of the third transistor is connected with a current level clock signal, and an output end of the third transistor outputs a current level scanning signal.

[0012] The control end and the input end of the fourth transistor are connected with the output end of the third power supply module, and the output end is connected with the second node; the control end of the fifth transistor is connected with the first node or the control end of the first transistor, the input end is connected with the second node, and the output end is connected with the low-level signal output end; the control end of the sixth transistor is connected with the second node, the input end is connected with the first node, and the output end is connected with the low-level signal output end.

[0013] Optionally, the pull-down maintaining module further comprises a first protection circuit, and the first protection circuit comprises a seventh transistor, an eighth transistor and a ninth transistor.

[0014] The control end of the seventh transistor is connected with the output end of the fourth transistor, the input end is connected with the third power supply module, and the output end is connected with the second node; the control end of the eighth transistor is connected with the first node or the control end of the first transistor, the input end is connected with the output end of the fourth transistor, and the output end is connected with the low-level signal output end; the control end of the ninth transistor is connected with the second node, the input end is connected with the output end of the third transistor, and the output end is connected with the low-level signal output end.

[0015] The third power supply module outputs an inverted clock signal opposite to the potential of the current stage positive-phase clock signal to the fourth transistor and the seventh transistor.

[0016] Optionally, the pull-down maintaining module comprises a first pull-down maintaining module and a second pull-down maintaining module, the third power supply module comprises a first power supply unit and a second power supply unit, the output end of the first power supply unit is connected with the control end of the first pull-down maintaining module, the output end of the second power supply unit is connected with the control end of the second pull-down maintaining module, the input end of the first pull-down module and the input end of the second pull-down module are both connected with the first node, and the output end of the first pull-down module and the output end of the second pull-down module are both connected with the low-level signal output end.

[0017] At the same time, the level signal output by the first power supply unit is opposite to the level signal output by the second power supply unit.

[0018] The application further discloses a driving method applied to the row driving circuit.

[0019] The first charging module is turned on by receiving a frame start signal or a superior scanning signal, the first power supply module charges the first node through the first charging module, the control output module outputs a current stage scanning signal, and forward scanning is realized.

[0020] After the current frame scanning is completed, the second charging module receives a frame start signal or a lower-level scanning signal, the second power supply module charges the first node through the second charging module, and the control output module outputs a current-level scanning signal, thereby realizing reverse scanning.

[0021] After the current level scanning is completed, the third power supply module controls the pull-down maintaining module to pull down the potential of the first node to the potential of the low-level signal output terminal; at the same time, the level signal output by the first power supply module is opposite to the level signal output by the second power supply module.

[0022] Optionally, after the current frame scanning is completed, the second charging module receives a frame start signal or a lower-level scanning signal, the second power supply module charges the first node through the second charging module, and the control output module outputs a current-level scanning signal, thereby realizing reverse scanning.

[0023] During the current frame scanning, the gray scale value corresponding to the next frame picture is obtained; if the difference between the gray scale value corresponding to the next frame picture and the gray scale value of the current frame picture is greater than or equal to a first preset value, after the current frame scanning is completed, the first charging module is turned on by receiving a frame start signal or an upper-level scanning signal, the first power supply module charges the first node through the first charging module, and the control output module outputs a current-level scanning signal, thereby continuing forward scanning; if the difference between the gray scale value corresponding to the next frame picture and the gray scale value of the current frame picture is less than the first preset value, after the current frame scanning is completed, the second charging module receives a frame start signal or a lower-level scanning signal, the second power supply module charges the first node through the second charging module, and the control output module outputs a current-level scanning signal, thereby realizing reverse scanning.

[0024] The first preset value ranges from 30 gray scales to 60 gray scales.

[0025] Optionally, the row driving circuit comprises a forward-reverse scanning signal generation module and a forward-reverse scanning detection module; the step of realizing forward scanning by the first charging module receiving a frame start signal or an upper-level scanning signal, the first power supply module charging the first node through the first charging module, and the control output module outputting a current-level scanning signal comprises:

[0026] When a frame start signal is output to the first row driving unit, the forward-reverse scanning signal generation module generates a forward scanning signal, and the first power supply module outputs a high-level signal to the first charging module to charge the first node.

[0027] The step of realizing reverse scanning by the second charging module receiving a frame start signal or a lower-level scanning signal after the current frame scanning is completed, the second power supply module charging the first node through the second charging module, and the control output module outputting a current-level scanning signal comprises:

[0028] When the frame start signal is output to the last row driving unit, the forward and reverse scanning signal generation module generates a reverse scanning signal, and the second power supply module outputs a high level signal to the first charging module to charge the first node.

[0029] The application further discloses a display device, which comprises the row driving circuit and a display panel.

[0030] Optionally, the display device comprises a photoelectric sensor, which detects the intensity of external light, and outputs a corresponding control signal to the forward and reverse scanning signal generation module and the forward and reverse scanning detection module of the row driving circuit according to the change of the intensity of external light when the display panel rotates, the forward and reverse scanning detection module detects the scanning signal before the display panel rotates, and generates a corresponding opposite scanning signal to scan after the display panel rotates.

[0031] The application has the scanning function in the forward and reverse directions by arranging two charging modules and combining the voltage signals output by the two power supply modules, and the level signal output by the first power supply module is opposite to the level signal output by the second power supply module at the same time; when the first power supply module outputs a high level signal, the second power supply module outputs a low level signal, the first charging module is turned on by receiving a frame start signal or an upper scanning signal, the first node is charged by the first power supply module through the first charging module, the control output module outputs a current stage scanning signal, and forward scanning is realized; when the second power supply module outputs a high level signal, the first power supply module outputs a low level, the second charging module receives a frame start signal or a lower scanning signal, the first node is charged by the second power supply module through the second charging module, the control output module outputs a current stage scanning signal, and reverse scanning is realized. BRIEF DESCRIPTION OF DRAWINGS

[0032] The accompanying drawings, which are included to provide a further understanding of the embodiments of the application and constitute a part of the specification, illustrate the embodiments of the application and serve to explain the principles of the application. Obviously, the drawings in the following description only show some embodiments of the application, and other drawings can be obtained by those skilled in the art without any creative effort on the basis of these drawings. In the drawings:

[0033] Figure 1 is a structural schematic diagram of a row driving circuit of a first embodiment of the application;

[0034] Figure 2 is a structural schematic diagram of a row driving circuit of a second embodiment of the application;

[0035] Figure 3 is a frame start signal waveform diagram in forward and reverse scanning of the second embodiment of the present application;

[0036] Figure 4 is another frame start signal waveform diagram in forward and reverse scanning of the second embodiment of the present application;

[0037] Figure 5 is a circuit diagram of a row driving circuit of the third embodiment of the present application;

[0038] Figure 6 is another circuit diagram of a row driving circuit of the third embodiment of the present application;

[0039] Figure 7 is an input terminal waveform diagram of a row driving circuit of the third embodiment of the present application;

[0040] Figure 8 is a circuit diagram of a row driving circuit of the fourth embodiment of the present application;

[0041] Figure 9 is a circuit diagram of a row driving circuit of the fifth embodiment of the present application;

[0042] Figure 10 is a row driving unit cascade diagram of a row driving circuit of the fifth embodiment of the present application;

[0043] Figure 11 is a circuit diagram of a row driving circuit of the sixth embodiment of the present application;

[0044] Figure 12 is a driving method diagram of the seventh embodiment of the present application;

[0045] Figure 13 is a driving method diagram of the eighth embodiment of the present application;

[0046] Figure 14 is a display device diagram of the ninth embodiment of the present application;

[0047] Figure 15 is a display device diagram (before rotation) of the tenth embodiment of the present application;

[0048] Figure 16 is a display device diagram (after rotation) of the tenth embodiment of the present application.

[0049] 10, row driving circuit; 100, row driving unit; 101, low level signal output end; 110, first charging module; 120, second charging module; 130, pull-down maintaining module; 131, first pull-down maintaining unit; 132, second pull-down maintaining unit; 133, first protection circuit; 134, first pull-down maintaining module; 135, second pull-down maintaining module; 140, output module; 150, first power supply module; 160, second power supply module; 170, third power supply module; 171, first power supply unit; 172, second power supply unit; 180, anti-scanning signal generation module; 190, positive and negative scanning detection module; 200, display device; 300, display panel; 400, photoelectric sensor;

[0050] M1-first transistor; M2-second transistor; M3-third transistor; M4-fourth transistor; M5-fifth transistor; M6-sixth transistor; M7-seventh transistor; M8-eighth transistor; M9-ninth transistor; M10-tenth transistor; M11-eleventh transistor; M12-twelfth transistor; M13-thirteenth transistor; M14-fourteenth transistor; M15-fifteenth transistor; M16-sixteenth transistor;

[0051] C-capacitor; STV-frame start signal; VGL-low level signal; VGH-high level signal; Gn-gate scanning signal; CLR-reset signal; CLK, positive phase clock signal; CLKB, negative phase clock signal; VDS, first power supply voltage; VDS, second power supply voltage. DETAILED DESCRIPTION

[0052] The present application will be described in detail below with reference to the accompanying drawings and optional embodiments. It should be noted that the following described embodiments or technical features can be combined arbitrarily to form new embodiments without conflict.

[0053] As Figure 1As shown, as the first embodiment of the present application, a row driving circuit 10, i.e. a GOA circuit, with forward and reverse scanning functions is disclosed, which can effectively realize the forward and reverse scanning functions in different scenarios. Specifically, the row driving circuit 10 includes a plurality of cascaded row driving units 100, each of which includes a first charging module 110, a second charging module 120, a pull-down maintaining module 130, and an output module 140. The control end of the first charging module 110 is connected with a gate start signal or an upper-level scanning signal, the input end is connected with a first power supply module 150, the output end is connected with a first node, and the first node is charged. The control end of the second charging module 120 is connected with a gate start signal or a lower-level scanning signal, the input end is connected with a second power supply module 160, the output end is connected with the first node, and the first node is charged. The control end of the pull-down maintaining module 130 is connected with a third power supply module 170, the input end is connected with the first node, and the output end is connected with a low-level signal output end 101. The control end of the output module 140 is connected with the first node, the input end is connected with a current-stage positive clock signal, and the output end outputs a current-stage scanning signal.

[0054] Generally, at the same time, the level signal output by the first power supply module 150 is opposite to the level signal output by the second power supply module 160. For example, when the first power supply module 150 outputs a high-level signal, the second power supply module 160 outputs a low-level signal, the first charging module 110 receives a frame start signal or an upper-level scanning signal to turn on, the first power supply module 150 charges the first node through the first charging module 110, controls the output module 140 to output a current-stage scanning signal, and realizes forward scanning. When the second power supply module 160 outputs a high-level signal, the first power supply module 150 outputs a low-level signal, the second charging module 120 receives a frame start signal or a lower-level scanning signal, the second power supply module 160 charges the first node through the second charging module 120, controls the output module 140 to output a current-stage scanning signal, and realizes reverse scanning. When the first power supply module 150 outputs a high-level signal to charge the first node through the first charging module 110, the second power supply module 160 does not output any signal and remains in a non-working state. In addition, after the current row scanning is completed, in addition to the third power supply module 170 controlling the pull-down maintaining module 130 to pull down the voltage of the first node, the corresponding first power supply module 150 or second power supply module 160 of the next row scanning input low-level to pull down the first node of the previous row or the next row, thereby reducing the charge residue in the first node.

[0055] As Figures 2 to 4As shown, as the second embodiment of the present application, it is further refined and improved to the first embodiment, the row driving circuit 10 includes forward and reverse scanning signal generation module 180 and forward and reverse scanning detection module 190, the input end of the forward and reverse scanning signal generation module 180 is connected with the first row driving unit 100 and the last row driving unit 100 respectively, the output end is connected with the input end of the forward and reverse scanning detection module 190, and the forward and reverse scanning signal is output to the forward and reverse scanning detection module 190; the output end of the forward and reverse scanning detection module 190 is connected with the first power supply module 150 and the second power supply module 160 respectively; when the forward scanning signal is received by the forward and reverse scanning detection module 190, the first power supply module 150 outputs high level signal to the first charging module 110, and when the reverse scanning signal is received by the forward and reverse scanning detection module 190, the second power supply module 160 outputs high level signal to the second charging module 120.

[0056] Wherein, when the frame start signal is output to the first row driving unit 100, the forward and reverse scanning signal generation module 180 generates forward scanning signal, and when the frame start signal is output to the last row driving unit 100, the forward and reverse scanning signal generation module 180 generates reverse scanning signal; the first power supply module 150 and the second power supply module 160 will only output corresponding level signal after receiving corresponding scanning signal.

[0057] In this embodiment, the forward scanning signal and the reverse scanning signal are mainly generated according to the position of the first output frame start signal, and the first power supply module 150 and the second power supply module 160 output high voltage or low voltage through the forward scanning signal and the reverse scanning signal. It should be noted that the frame start signal is output by the timing control chip, and generally, the timing control chip has two output ends, which output two frame start signals with different waveforms to the input end of the first row driving unit 100 and the output end of the last row driving unit 100 respectively. Of course, the timing control chip can also have one output end, which outputs the frame start signal to the first row driving unit 100 and the last row driving unit 100 in time.

[0058] The frame start signal output to the first row driving unit 100 is the positive STV signal, and the frame start signal output to the last row driving unit 100 is the negative STV signal. Generally, in the positive scanning, the positive STV signal triggers the first row driving unit 100, and then realizes the line-by-line scanning. In the idle time of the adjacent two frames, the negative STV signal triggers the last row driving unit 100 to realize the reverse line-by-line scanning, and vice versa. In addition, the STV adopts multiple (n≥2) high square wave output form, which can effectively reduce the working pressure of the corresponding devices of the first charging module 110 and the second charging module 120, and improve the device life.

[0059] As shown in Figure 5 the third embodiment of the present application is a further refinement and improvement of any of the above embodiments, further, the pull-down maintenance module 130 includes a first pull-down maintenance unit 131, the first charging module 110 includes a first transistor M1; the second charging module 120 includes a second transistor M2; the output module 140 includes a third transistor M3; the first pull-down maintenance unit 131 includes a fourth transistor M4, a fifth transistor M5 and a sixth transistor M6, the channel width-length ratio of the fifth transistor M5 is greater than that of the fourth transistor M4; the control end of the first transistor M1 is connected with the gate start signal or the upper scan signal, the input end is connected with the first power supply module 150, and the output end is connected with the control end of the third transistor M3 through the first node; the control end of the second transistor M2 is connected with the lower scan signal, the input end is connected with the second power supply module 160, and the output end is connected with the control end of the third transistor M3 through the first node; the input end of the third transistor M3 is connected with the current stage clock signal, and the output end outputs the current stage scan signal; the control end and the input end of the fourth transistor M4 are connected with the output end of the third power supply module 170, and the output end is connected with the second node; the control end of the fifth transistor M5 is connected with the first node or the control end of the first transistor M1, the input end is connected with the second node, and the output end is connected with the low voltage signal output end 101; the control end of the sixth transistor M6 is connected with the second node, the input end is connected with the first node, and the output end is connected with the low voltage signal output end 101.

[0060] The sixth transistor M6 and the fifth transistor M5 effectively pull down the potential of the first node Q and the second node QB1, improve the charging ability of the first charging module 110 or the second charging module 120 to the first node Q, the Q point pre-charge voltage is raised to a higher voltage, the leakage current is reduced, the horizontal lines caused by the leakage current are avoided, and when the Nth stage gate scan signal outputs a high level, the Q point is coupled to a higher point due to the capacitive coupling effect of the parasitic capacitor, the output module 140 is more fully opened, the Nth stage gate scan signal is charged to a high level more quickly, and the driving ability is further improved, and the two groups of circuits are alternately used to improve the reliability of the transistors in the circuit.

[0061] Further, as shown in Figure 4As shown, in order to avoid the fourth transistor M4, the fifth transistor M5 and the sixth transistor M6 work time loss, causing the service life to be shortened, usually in the pull-down maintenance module 130 is also provided with a first protection circuit 133, the first protection circuit 133 includes the seventh transistor M7, the eighth transistor M8 and the ninth transistor M9;The control end of the seventh transistor M7 is connected to the output end of the fourth transistor M4, the input end is connected to the third power supply module 170, and the output end is connected to the second node;The control end of the eighth transistor M8 is connected to the first node or the control end of the first transistor M1, the input end is connected to the output end of the fourth transistor M4, and the output end is connected to the low level signal output end 101;The control end of the ninth transistor M9 is connected to the second node, the input end is connected to the output end of the third transistor M3, and the output end is connected to the low level signal output end 101;Wherein, the third power supply module 170 outputs the inverse clock signal opposite to the potential of the current stage positive clock signal to the fourth transistor M4 and the seventh transistor M7;The channel width-length ratio of the fifth transistor M5 and the eighth transistor M8 is greater than that of the fourth transistor M4 and the seventh transistor M7.

[0062] Specifically, referring to Figure 5 and 7 As shown, taking forward scanning as an example:

[0063] A stage: VGL is a direct current low level, the first power supply module 150 outputs the voltage signal VDS, CLK and CLKB are opposite clock signals. The previous row signal Gn-1(input) is in a high level state, the first transistor M1 is turned on, VDS is high level VGH, the capacitor C is charged through M1, the first node Q becomes high level, at this time the fifth transistor M5 and the eighth transistor M8 are turned on, the second node QB1 is pulled to low level by the low level signal output end 101.

[0064] B stage: VGL is a direct current low level, Gn-1 is low level, positive clock signal CLK is high level state, the first node Q keeps high level state, the third transistor M3 is turned on, the current row Gn outputs high level, the second node QB1 point keeps low level state.

[0065] Phase C: VGL is DC low level, Gn+1 is DC high level, the positive clock signal CLK becomes low level, and the inverted clock signal CLKB output by the third power supply module 170 becomes high level; the second transistor M2 turns on, the voltage VSD output by the second power supply module 160 is low level VGL, the first node Q is pulled low level, the fifth transistor M5 and the eighth transistor M8 are turned off, the fourth transistor M4 and the seventh transistor M7 are turned on, the second node QB1 becomes high level, the sixth transistor M6 and the ninth transistor M9 are turned on, and Q / QB1 is pulled low and maintained in a low level state.

[0066] In addition, during reverse scanning, the second power supply module 160 outputs an electrical signal VSD, which is a high-level signal. The next row signal Gn+1 is also high-level. The second power supply module 160 charges the first node Q to control the third transistor M3 to turn on. This, together with the turn-on of the transistor in the pull-down sustaining module 130 where the third power supply module 170 is located, enables the pull-down sustaining of the first and second nodes, thus completing the output of the scan signal. Therefore, it can be seen that for forward and reverse scanning, it is only necessary to change the high and low levels of the VDS / VSD DC signals to change the scanning direction of the circuit.

[0067] like Figure 8 As shown, the fourth embodiment of this application is a further improvement on the third embodiment described above. The pull-down sustaining module 130 further includes a second pull-down sustaining unit 132, which includes a tenth transistor M10, an eleventh transistor M11, a twelfth transistor M12, and a thirteenth transistor M13. The control terminal and input terminal of the tenth transistor M10 are connected to a high-level signal output terminal, and its output terminal is connected to a third node. The control terminal of the eleventh transistor M11 is connected to the first node, its input terminal is connected to the third node, and its output terminal is connected to the low-level signal output terminal 101. The control terminal of the twelfth transistor M12 is connected to the third node, its input terminal is connected to the output terminal of the third transistor M3, and its output terminal is connected to the low-level signal output terminal 101. The control terminal of the thirteenth transistor M13 is connected to the third node, its input terminal is connected to the first node, and its output terminal is connected to the low-level signal output terminal 101.

[0068] The channel width-to-length ratio of the eleventh transistor M11 is greater than that of the twelfth transistor M12 and the thirteenth transistor M13.

[0069] An additional four TFTs, namely the tenth transistor M10, the eleventh transistor M11, the twelfth transistor M12 and the thirteenth transistor M13, use VGH as a signal source to provide a holding voltage for M12 / M13, which, together with the first pull-down holding unit 131 of the first embodiment, holds the voltage at Gn and the first node Q, so that the circuit stability is improved and the service life is increased by 1.5-2 times.

[0070] As shown in Figure 9 and Figure 10 As a fifth embodiment of the present application, further refinement and improvement of any of the above embodiments, the row driving circuit 10 further comprises a reset module and a pull-down module, the reset module comprising a fourteenth transistor M14 and a fifteenth transistor M15, and the pull-down module comprising a sixteenth transistor M16; the control end of the fourteenth transistor M14 and the fifteenth transistor M15 is connected to the CLR signal, the input end of the fourteenth transistor M14 is connected to the first node Q, and the output end is connected to VGL, the input end of the fifteenth transistor M15 is connected to the output end of the third transistor M3, and the output end is connected to VGL; the control end of the sixteenth transistor M16 is connected to the CLKB signal, the input end is connected to the output end of the third transistor M3, and the output end is connected to VGL. Whether it is forward scanning or reverse scanning, the reset module and the pull-down module can realize the pull-down and reset of the corresponding row driving circuit 10.

[0071] Each row driving unit 100 is connected in a cascaded manner, and each row driving unit 100 includes a plurality of input ends and control ends, which receive corresponding clock signals CLK and CLKB, frame start signals STV, and power supply voltage signals VSD and VDS through corresponding input ends to generate scanning signals of the row driving unit 100.

[0072] As can be seen from Figure 9 and Figure 10 , in the working stage of the row driving unit 100, taking forward scanning as an example, VDS=high, VSD=VGL=low)

[0073] A stage: VGL is a direct current low level, VDS is a direct current high level, CLR is a low level, CLK and CLKB are opposite clock signals. The previous row signal Gn-1(input) or STV signal is in a high level state, the first transistor M1 is turned on, VDS=VGH charges the capacitor C through M1, and the first node Q becomes high. At this time, M5 and M8 are turned on, and the second node QB1 is pulled to low level by VGL.

[0074] Phase B: VGL is DC low, Gn-1 is low, CLR is low. CLK is high, the first node remains high, the third transistor M3 is on, the current row Gn outputs high, and the second node QB1 remains low.

[0075] Phase C: VGL is DC low, Gn+1 is DC high, CLR is low, CLK becomes low, and CLKB becomes high; M2 is on, VSD = VGL, the first node is pulled low, M5 & M8 are off, CLKB becomes high, M4 / M7 is on, the second node QB1 becomes high, M13 / M6 / M16 is on, and the first node / Gn is pulled low, maintaining a low level state. Simultaneously, CLKB continuously changes to a high level according to the clock signal, continuously enabling M16, ensuring the maintenance of the low level state of Gn until the next frame arrives, thus guaranteeing the stability of the Gn output waveform.

[0076] At the end of a frame scan, the CLR signal goes high, and M14 / M15 are turned on, resetting the first node and Gn at the end of the frame, respectively, to further ensure circuit stability and prepare for the start of the next frame.

[0077] like Figure 11 As shown, in the sixth embodiment of this application, unlike the embodiments described above, the pull-down sustaining module 130 includes a first pull-down sustaining module 134 and a second pull-down sustaining module 135, and the third power supply module 170 includes a first power supply unit 171 and a second power supply unit 172. The output terminal of the first power supply unit 171 is connected to the control terminal of the first pull-down sustaining module 134, and the output terminal of the second power supply unit 172 is connected to the control terminal of the second pull-down sustaining module 135. The input terminals of the first pull-down module and the second pull-down module are both connected to the first node, and the output terminals of the first pull-down module and the second pull-down module are both connected to the low-level signal output terminal 101. At the same time, the level signal output by the first power supply unit 171 is opposite to the level signal output by the second power supply unit 172.

[0078] In this embodiment, two groups of pull-down maintenance modules 130 are arranged to work alternately, the thin film transistors in the two groups of pull-down maintenance modules 130 correspond to each other, for example, M5 in the first pull-down maintenance module 134 corresponds to M5A in the second pull-down maintenance module 135, wherein the signals CLKB1 and CLKB2 provided by the first electron supply unit 171 and the second electron supply unit 172 are two groups of opposite timing signals, when CLKB1 is high, CLKB2 is low, so that the two groups of pull-down modules can work alternately, avoiding that long-term work of one pull-down module causes excessive wear of the corresponding thin film transistor, affecting the service life of the thin film transistor.

[0079] As shown in Figure 12 As a seventh embodiment of the present application, a driving method is disclosed, which is used to drive the row driving circuit in any of the above embodiments, the driving method comprises the steps of:

[0080] S1: the first charging module receives a frame start signal or an upper scan signal to turn on, the first power supply module charges the first node through the first charging module, the control output module outputs the current stage scan signal, and forward scanning is realized;

[0081] S2: after the current frame scanning is completed, the second charging module receives a frame start signal or a lower scan signal, the second power supply module charges the first node through the second charging module, the control output module outputs the current stage scan signal, and reverse scanning is realized;

[0082] Wherein, after the current stage scanning is completed, the third power supply module controls the pull-down maintenance module to pull down the potential of the first node to the potential of the low level signal output end; at the same time, the level signal output by the first power supply module is opposite to the level signal output by the second power supply module.

[0083] When forward scanning: VDS=high, VSD=VGL=low, that is, M1 is turned on and M2 is turned off, the first node is charged to high level by the capacitor C starting from the Gn-1 signal being high, and then Gn is output, the first node is discharged to low level starting from the Gn-1 signal being high, Gn is pulled down, and the GOA realizes forward scanning transmission.

[0084] When reverse scanning: VSD=high, VDS=VGL=low, that is, the M1 / M2 TFT opening mode is opposite, M2 is turned on and M1 is turned off, the first node is charged to high level by the capacitor C starting from the Gn+1 signal being high, and then Gn is output, the first node is discharged to low level starting from the Gn+1 signal being high, Gn is pulled down, and the working period of other TFTs is consistent with the above description of A / B / C three stages, and the GOA realizes reverse scanning transmission.

[0085] As shown in Figure 13As shown, as the eighth embodiment of the present application, the step S2 includes:

[0086] S21: when the current frame is scanned, the gray scale value corresponding to the next frame is obtained, if the difference between the gray scale value corresponding to the next frame and the gray scale value of the current frame is greater than or equal to the first preset value, after the current frame is scanned, the first charging module receives the frame start signal or the lower scan signal, the first power supply module charges the first node through the first charging module, the control output module outputs the current level scan signal, and the forward scanning is continued; if the difference between the gray scale value corresponding to the next frame and the gray scale value of the current frame is less than the first preset value, after the current frame is scanned, the second charging module receives the frame start signal or the lower scan signal, the second power supply module charges the first node through the second charging module, the control output module outputs the current level scan signal, and the reverse scanning is realized;

[0087] The first preset value is in the range of 30 gray scale to 60 gray scale.

[0088] In this embodiment, the difference between the gray scale values of the current frame and the next frame is used as the judgment condition for switching the forward and reverse scanning. If the difference between the gray scale values of the current frame and the next frame is too large and exceeds the first preset value, the scanning mode used for scanning can be selected to avoid changing the scanning mode, so that the last row of driving units is used as the driving row, the charging time is insufficient due to impedance problems, and thus the residual image appears when the frame picture is switched. Therefore, the original scanning mode can be selected for scanning, for example, the forward scanning is used for the first frame scanning, the gray scale value is 120, if the gray scale value corresponding to the second frame picture is 255 gray scale, the forward scanning is still used for the second frame scanning, and if the gray scale value corresponding to the second frame picture is 135 gray scale, the reverse scanning is used for the second frame scanning.

[0089] In addition, in addition to using the gray scale values of the previous and next frames as the judgment condition for switching the forward and reverse scanning, other switching modes can also be set, such as switching by setting the time, using the reverse scanning after the forward scanning reaches a certain time, and switching after the current frame scanning is completed, instead of switching when the preset time is reached regardless of whether the current frame is scanned or not. Of course, a preset number of frames can also be set for switching, such as starting the reverse scanning after 1 frame, 2 frames or 4 frames of forward scanning, and starting the forward scanning after the corresponding number of 1 frame, 2 frames or 4 frames of reverse scanning.

[0090] Further, the row driving circuit includes a forward and reverse scanning signal generation module and a forward and reverse scanning detection module, and the step S1 includes:

[0091] When the frame start signal is output to the first row driving unit, the forward and reverse scanning signal generation module generates a forward scanning signal, and the first power supply module outputs a high level signal to the first charging module to charge the first node;

[0092] Correspondingly, the step S2 comprises:

[0093] When the frame start signal is output to the last row driving unit, the forward and reverse scanning signal generation module generates a reverse scanning signal, and the second power supply module outputs a high level signal to the first charging module to charge the first node.

[0094] As shown in Figure 14 As a ninth embodiment of the present application, a display device 200 is disclosed, the display device 200 comprises the row driving circuit 10 and the display panel 300, the row driving circuit 10 is used for driving display of the display panel, the row driving circuit comprises a plurality of row driving units, each row driving unit can realize forward scanning and reverse scanning.

[0095] It should be noted that in the whole display panel, the row driving circuit 10 is provided with a plurality of scanning lines 210 corresponding to the display panel, each row driving circuit 10 opens the corresponding second transistor by controlling the clock signal of the clock signal module 220 to output the corresponding gate scanning signal to the scanning line, the above-mentioned row driving circuit 10 in any one of the embodiments is described, the row driving circuit (GDL) is provided with a plurality of GDL circuits, the plurality of GDL circuits are cascaded, the normal output of the GDL circuit is ensured, and under the premise of ensuring the performance and reliability of the GDL circuit, the number of TFTs is relatively small, the risk of short circuit failure can be reduced during process manufacturing, and a narrower frame can be achieved, which is suitable for narrow frame and high resolution design. The row driving circuits in the above-mentioned embodiments can be used in combination to complete the output of the gate scanning signal and the display of the display panel.

[0096] Further, as shown in Figure 15 and Figure 16As shown, as the tenth embodiment of the present application, the display device 200 includes a photoelectric sensor 400, which is arranged on the display panel 300 and connected with a driving chip or a processor unit in the display panel 300. The photoelectric sensor 400 detects the intensity of external light. When the display panel 300 rotates, the photoelectric sensor 400 outputs corresponding control signals to the positive and negative scanning signal generation module and the positive and negative scanning detection module of the row driving circuit 10 according to the change of the intensity of external light. The positive and negative scanning detection module detects the scanning signal before the display panel 300 rotates and generates corresponding opposite scanning signal to scan after the display panel 300 finishes rotating. When the screen rotates 360°, the scanning direction of the display panel 300 needs to be adjusted correspondingly to facilitate signal transmission. At this time, the GOA in the display panel needs to have the reverse scanning function, which can directly start the reverse scanning mode and directly use the scanning signal during the previous positive scanning, so that the scanning signal can be input into the panel more quickly, avoiding signal delay and affecting user experience.

[0097] Generally, when the display panel 300 is used as a vehicle-mounted display screen or an outdoor screen, a rotatable display support (not shown in the figure) is arranged below the display panel. When the photoelectric sensor 400 detects that the light becomes weak, the signal is transmitted to the IC or the display processor unit, and at the same time, the display support motor is driven to rotate to find the light. When the current generated by the photoelectric sensor reaches the maximum value, the rotation is stopped, and an adjustment is made once when the light decays by 10%. In this way, a solar energy storage module can be integrated in the display to save outdoor display light. At the same time, the application can be applied to display devices that rely on ambient light reflection display, such as electronic paper and reflective display LCD. Of course, the application can be applied in reverse to avoid strong ambient light and facilitate the human eye to watch, such as vehicle-mounted and outdoor displays.

[0098] It should be noted that the limitations of the steps involved in the present scheme do not affect the implementation of the specific scheme, and are not considered to limit the order of the steps. The steps written in the front can be executed first, or can be executed later, or even can be executed simultaneously, as long as the present scheme can be implemented, it should be considered to belong to the protection scope of the present application.

[0099] The inventive concept of the present application can form a very large number of embodiments, but the length of the application file is limited and cannot be listed one by one. Therefore, on the premise of not conflicting, the above-described embodiments or technical features can be combined to form new embodiments. After the combination of each embodiment or technical feature, the original technical effect will be enhanced.

[0100] The technical solution of the present application can be widely used in various display panels, such as MN (Mwis Med NemaMic, twisted nematic) display panel, IPS (In-Plane SwiMching, in-plane switching) display panel, VA (VerMical AlignmenM, vertical alignment) display panel, MVA (MulMi-Domain VerMical AlignmenM, multi-domain vertical alignment) display panel, and of course, other types of display panels, such as OLED (Organic LighM-EmiMMing Diode, organic light-emitting diode) display panel, can all be applicable to the above-mentioned solution.

[0101] The above is a further detailed description of the present application in combination with specific optional embodiments, and cannot be considered as limiting the specific implementation of the present application to these descriptions. For ordinary skilled persons in the technical field to which the present application belongs, some simple deductions or replacements can be made without departing from the concept of the present application, and all of them shall be considered as falling within the protection scope of the present application.

Claims

1. A row driving circuit, comprising a plurality of cascaded row driving units, characterized in that, Each of the row driving units includes: The first charging module has a control terminal connected to a gate start signal or an upper-level scan signal, an input terminal connected to the first power supply module, and an output terminal connected to the first node, and charges the first node. The second charging module has a control terminal connected to the gate start signal or the lower-level scan signal, an input terminal connected to the second power supply module, and an output terminal connected to the first node to charge the first node. The pull-down sustaining module has its control terminal connected to the third power supply module, its input terminal connected to the first node, and its output terminal connected to a low-level signal output terminal; and The output module has a control terminal connected to the first node, an input terminal connected to the current stage positive phase clock signal, and an output terminal outputting the current stage scan signal. Simultaneously, the level signal output by the first power supply module is opposite to the level signal output by the second power supply module. When the first power supply module outputs a high-level signal, the second power supply module outputs a low-level signal. The first charging module receives a frame start signal or an upper-level scan signal and is turned on. The first power supply module charges the first node through the first charging module and controls the output module to output the current-level scan signal, thus achieving forward scanning. When the second power supply module outputs a high-level signal, the first power supply module outputs a low-level signal. The second charging module receives a frame start signal or a lower-level scan signal. The second power supply module charges the first node through the second charging module and controls the output module to output the current-level scan signal, thus achieving reverse scanning. The row driving circuit includes a forward and reverse scanning signal generation module and a forward and reverse scanning detection module. The input terminal of the forward and reverse scanning signal generation module is connected to the first row driving unit and the last row driving unit, respectively, and the output terminal is connected to the input terminal of the forward and reverse scanning detection module, outputting forward scanning signal and reverse scanning signal to the forward and reverse scanning detection module. The output terminals of the forward and reverse scanning detection modules are respectively connected to the first power supply module and the second power supply module; when the forward and reverse scanning detection module receives a forward scanning signal, it controls the first power supply module to output a high-level signal to the first charging module; when the forward and reverse scanning detection module receives a reverse scanning signal, it controls the second power supply module to output a high-level signal to the second charging module. Specifically, when the frame start signal is output to the first row driving unit, the forward and reverse scan signal generation module generates a forward scan signal; when the frame start signal is output to the last row driving unit, the forward and reverse scan signal generation module generates a reverse scan signal. The pull-down sustaining module includes a first pull-down sustaining module and a second pull-down sustaining module. The third power supply module includes a first power supply unit and a second power supply unit. The output terminal of the first power supply unit is connected to the control terminal of the first pull-down sustaining module, and the output terminal of the second power supply unit is connected to the control terminal of the second pull-down sustaining module. The input terminals of the first pull-down sustaining module and the second pull-down sustaining module are both connected to the first node. The output terminals of the first pull-down sustaining module and the second pull-down sustaining module are both connected to the low-level signal output terminal. At the same time, the level signal output by the first power supply unit is opposite to the level signal output by the second power supply unit.

2. A row driving circuit, comprising multiple cascaded row driving units, characterized in that, Each of the row driving units includes: The first charging module has a control terminal connected to a gate start signal or an upper-level scan signal, an input terminal connected to the first power supply module, and an output terminal connected to the first node, and charges the first node. The second charging module has a control terminal connected to the gate start signal or the lower-level scan signal, an input terminal connected to the second power supply module, and an output terminal connected to the first node to charge the first node. The pull-down sustaining module has its control terminal connected to the third power supply module, its input terminal connected to the first node, and its output terminal connected to a low-level signal output terminal; and The output module has a control terminal connected to the first node, an input terminal connected to the current stage positive phase clock signal, and an output terminal outputting the current stage scan signal. Simultaneously, the level signal output by the first power supply module is opposite to the level signal output by the second power supply module. When the first power supply module outputs a high-level signal, the second power supply module outputs a low-level signal. The first charging module receives a frame start signal or an upper-level scan signal and is turned on. The first power supply module charges the first node through the first charging module and controls the output module to output the current-level scan signal, thus achieving forward scanning. When the second power supply module outputs a high-level signal, the first power supply module outputs a low-level signal. The second charging module receives a frame start signal or a lower-level scan signal. The second power supply module charges the first node through the second charging module and controls the output module to output the current-level scan signal, thus achieving reverse scanning. The row driving circuit includes a forward and reverse scanning signal generation module and a forward and reverse scanning detection module. The input terminal of the forward and reverse scanning signal generation module is connected to the first row driving unit and the last row driving unit, respectively, and the output terminal is connected to the input terminal of the forward and reverse scanning detection module, outputting forward scanning signal and reverse scanning signal to the forward and reverse scanning detection module. The output terminals of the forward and reverse scanning detection modules are respectively connected to the first power supply module and the second power supply module; when the forward and reverse scanning detection module receives a forward scanning signal, it controls the first power supply module to output a high-level signal to the first charging module; when the forward and reverse scanning detection module receives a reverse scanning signal, it controls the second power supply module to output a high-level signal to the second charging module. Specifically, when the frame start signal is output to the first row driving unit, the forward and reverse scan signal generation module generates a forward scan signal; when the frame start signal is output to the last row driving unit, the forward and reverse scan signal generation module generates a reverse scan signal. The pull-down sustaining module includes a first pull-down sustaining unit; the first charging module includes a first transistor; the second charging module includes a second transistor; the output module includes a third transistor; the first pull-down sustaining unit includes a fourth transistor, a fifth transistor, and a sixth transistor. The control terminal of the first transistor is connected to the gate start signal or the upper-level scan signal, the input terminal is connected to the first power supply module, and the output terminal is connected to the control terminal of the third transistor through the first node; the control terminal of the second transistor is connected to the lower-level scan signal, the input terminal is connected to the second power supply module, and the output terminal is connected to the control terminal of the third transistor through the first node; the input terminal of the third transistor is connected to the current-level clock signal, and the output terminal outputs the current-level scan signal. The control terminal and input terminal of the fourth transistor are connected to the output terminal of the third power supply module, and the output terminal is connected to the second node; the control terminal of the fifth transistor is connected to the first node or the control terminal of the first transistor, the input terminal is connected to the second node, and the output terminal is connected to the low-level signal output terminal; the control terminal of the sixth transistor is connected to the second node, the input terminal is connected to the first node, and the output terminal is connected to the low-level signal output terminal.

3. The row driving circuit as described in claim 2, characterized in that, The pull-down sustaining module also includes a first protection circuit, which includes a seventh transistor, an eighth transistor, and a ninth transistor. The control terminal of the seventh transistor is connected to the output terminal of the fourth transistor, its input terminal is connected to the third power supply module, and its output terminal is connected to the second node; the control terminal of the eighth transistor is connected to the first node or the control terminal of the first transistor, its input terminal is connected to the output terminal of the fourth transistor, and its output terminal is connected to the low-level signal output terminal; the control terminal of the ninth transistor is connected to the second node, its input terminals are all connected to the output terminal of the third transistor, and its output terminal is connected to the low-level signal output terminal. The third power supply module outputs an inverted clock signal with the opposite potential to the current positive clock signal to the fourth and seventh transistors.

4. A driving method applied to the row driving circuit according to any one of claims 1-3, characterized in that, The driving method includes the following steps: The first charging module receives a frame start signal or an upper-level scan signal and is turned on. The first power supply module charges the first node through the first charging module and controls the output module to output the current-level scan signal to achieve forward scanning. After the current frame scan ends, the second charging module receives the frame start signal or the next level scan signal, the second power supply module charges the first node through the second charging module, and controls the output module to output the current level scan signal to realize reverse scanning; After the current level scan is completed, the third power supply module controls the pull-down maintenance module to pull the potential of the first node down to the potential of the low-level signal output terminal; at the same time, the level signal output by the first power supply module is opposite to the level signal output by the second power supply module.

5. The driving method as described in claim 4, characterized in that, After the current frame scan is completed, the second charging module receives a frame start signal or a next-level scan signal, the second power supply module charges the first node through the second charging module, and controls the output module to output the current-level scan signal. The steps to achieve reverse scanning include: During the current frame scan, the grayscale value corresponding to the next frame is obtained. If the difference between the grayscale value of the next frame and the grayscale value of the current frame is greater than or equal to a first preset value, after the current frame scan ends, the first charging module receives a frame start signal or the upper-level scan signal is turned on, the first power supply module charges the first node through the first charging module, and controls the output module to output the current-level scan signal to continue forward scanning. If the difference between the grayscale value of the next frame and the grayscale value of the current frame is less than the first preset value, after the current frame scan ends, the second charging module receives a frame start signal or the lower-level scan signal, the second power supply module charges the first node through the second charging module, and controls the output module to output the current-level scan signal to achieve reverse scanning. The first preset value ranges from 30 gray levels to 60 gray levels.

6. The driving method as described in claim 5, characterized in that, The row driving circuit includes a forward and reverse scan signal generation module and a forward and reverse scan detection module. The first charging module receives a frame start signal or an upper-level scan signal to turn on. The first power supply module charges the first node through the first charging module. The control output module outputs the current-level scan signal. The steps to achieve forward scanning include: When the frame start signal is output to the first row driving unit, the forward and reverse scan signal generation module generates a forward scan signal, and the first power supply module outputs a high-level signal to the first charging module to charge the first node; After the current frame scan is completed, the second charging module receives a frame start signal or a next-level scan signal, the second power supply module charges the first node through the second charging module, and controls the output module to output the current-level scan signal. The steps to achieve reverse scanning include: When the frame start signal is output to the last row driving unit, the forward and reverse scan signal generation module generates a reverse scan signal, and the second power supply module outputs a high-level signal to the first charging module to charge the first node.

7. A display device, characterized in that, It includes a row driving circuit and a display panel as described in any one of claims 1-3, wherein the row driving circuit is used to drive the display panel.

8. The display device as claimed in claim 7, characterized in that, The display device includes a photoelectric sensor that detects the intensity of ambient light. When the display panel rotates, the photoelectric sensor outputs a corresponding control signal to the forward and reverse scanning signal generation module and the forward and reverse scanning detection module of the row drive circuit according to the change in ambient light intensity. The forward and reverse scanning detection module detects the scanning signal before the display panel rotates and generates a corresponding reverse scanning signal to perform scanning after the display panel has finished rotating.

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