Breakpoint detection method for single-line series circuit, single-line series circuit, driving architecture

Abstract

The application provides a breakpoint detection method of a single-wire series circuit, a single-wire series circuit and a driving architecture. The method uses an existing parallel bus structure in the single-wire series circuit to realize the breakpoint detection of the single-wire series circuit. The position of a short-circuit breakpoint at the end is determined by a first correction command and second addressing information. The position of an open-circuit breakpoint at the end is determined by a second correction command, a third correction command and third addressing information. Compared with the existing scheme for the breakpoint detection of the single-wire series circuit, the application does not need to additionally increase a spare pin on each driving unit, reduces the packaging cost of the single-wire series circuit, and further greatly reduces the packaging cost of the driving architecture. Meanwhile, the single-wire series circuit does not need to wire the additional spare pin, greatly simplifies the wiring of the driving architecture and reduces the PCB cost.

Description

TECHNICAL FIELD

[0001] The present application relates to the field of display, in particular to a breakpoint detection method of single-line series circuit, a single-line series circuit and a driving architecture. BACKGROUND

[0002] With the development of display technology, Mini led backlight technology has been more and more applied in liquid crystal display system. Among them, the typical driving architecture is as shown in Figure 1 , wherein the total control module in the figure controls a plurality of sub-control modules; each sub-control module controls a plurality of row driving links; wherein each row driving link is composed of a plurality of driving chips connected in series, and each driving chip drives a corresponding LED chip.

[0003] Under the same conditions, the more driving chips of the driving architecture, the better the display effect of the display system. In the current existing liquid crystal display screen, the driving chips in the driving architecture have been increased from several hundred to several thousand, or even tens of thousands. With the increasing number of driving chips in the driving architecture, the probability of breakpoint in the driving link also increases. Since the communication mode of the driving link is serial communication, once a breakpoint occurs on the link, the link will not work normally, which seriously affects the user's experience and leads to product repair. Therefore, it is crucial to solve the problem of breakpoint in the driving link.

[0004] Manufacturers will diagnose whether there is a breakpoint in each driving link before the display screen is shipped, to ensure the correctness of the serial communication of the driving architecture. However, with the long-term use of the display screen, the internal driving link may have the possibility of a breakpoint due to aging and other reasons.

[0005] The prior art usually adopts a bridging scheme to solve this problem, and the specific circuit structure is shown in Figure 2 . This scheme adds an extra backup pin to each driving chip, and then connects the backup pin on the driving chip to the input end of the previous driving chip. When a breakpoint occurs at the output end of a driving chip, the subsequent adjacent driving chips are connected to the input end of the driving chip through the backup pin to obtain the addressing command, so that the subsequent driving chips can communicate normally. The bridging scheme has the following problems:

[0006] 1. Each driving chip has an extra backup pin, which increases the packaging cost of each driving chip, and thus greatly increases the packaging cost of the entire driving architecture.

[0007] 2. Additional line costs are added to the PCB, and cross-wiring is prone to occur.

[0008] Therefore, providing a low-cost breakpoint detection method has become a technical problem that the industry urgently needs to solve. Summary of the Invention

[0009] In order to solve the above technical problems, the present invention provides a breakpoint detection method for a single-line series circuit, a single-line series circuit, and a driving architecture.

[0010] According to a first aspect of the present invention, a method for detecting a breakpoint in a single-wire series circuit is provided, for detecting a breakpoint in the single-wire series circuit. The single-wire series circuit includes a main control unit and N drive units connected in series. The output of the main control unit is connected to the input of a first drive unit, the output of the Nth drive unit is connected to the input of the main control unit, and a data communication parallel signal terminal of the main control unit is further connected to each drive unit. N is a positive integer, and N ≥ 1. The method includes:

[0011] Addressing N drive units connected in series;

[0012] Determining whether the main control unit receives the expected addressing information within the first time; if so, determining that there is no breakpoint fault in the single-line series circuit; if not, determining that there is a breakpoint fault in the single-line series circuit, and outputting a first correction command to the N drive units to determine the first drive unit at each short-circuit breakpoint; setting the first drive unit at each short-circuit breakpoint to a first state and setting the address to the address of the first drive unit through the first correction command, and controlling the drive units in the first state to output addressing commands; wherein the expected addressing information is used to represent the addressing information from the first drive unit to the Nth drive unit;

[0013] determining whether the main control unit receives the second addressing information within the second time; if the second addressing information is received, determining the position of the last short-circuit breakpoint according to the second addressing information; wherein the second addressing information is used to represent the addressing information of the first drive unit to the Nth drive unit at the last short-circuit breakpoint;

[0014] If the second addressing information is not received, the second correction command and the third correction command are sequentially output to the N drive units to jointly determine the first drive unit after each circuit breaker breakpoint; the first drive unit at each circuit breaker breakpoint is set to the second state and the address is set to the address of the first drive unit by the third correction command, and the drive units in the second state are controlled to output the addressing command;

[0015] Determining whether the main control unit receives third addressing information within a third time; if the third addressing information is received, determining the position of the last disconnection breakpoint according to the third addressing information; wherein the third addressing information is used to represent the addressing information of the first drive unit to the Nth drive unit at the last disconnection breakpoint;

[0016] If the third addressing information is not received, a warning signal is outputted externally.

[0017] Optionally, before addressing the N driving units, the method further includes: powering on the single-line series circuit.

[0018] Optionally, determining the position of the tail short-circuit breakpoint according to the second addressing information specifically includes:

[0019] subtracting the addressing information in the second addressing information from the addressing information in the expected addressing information to obtain a first position;

[0020] According to the first position, the specific position of the tail short-circuit breakpoint is obtained.

[0021] Optionally, after determining the position of the last short-circuit breakpoint according to the second addressing information, the method further includes:

[0022] According to the position of the last short-circuit breakpoint and the addressing information difference between adjacent drive units, and in accordance with the expected addressing information, the subsequent drive units at the last short-circuit breakpoint are addressed in sequence.

[0023] Optionally, according to the position of the last short-circuit breakpoint and the addressing information difference between adjacent drive units, and in accordance with the expected addressing information, the subsequent drive units at the last short-circuit breakpoint are sequentially addressed, specifically including:

[0024] A fourth correction command is obtained based on the position of the final short-circuit breakpoint and the difference in addressing information between adjacent drive units, and is output to the N drive units; wherein the fourth correction command is used to address the drive unit in the first state according to the expected addressing information of the first drive unit at the final short-circuit breakpoint; and to control the drive unit in the first state to output the addressing command to sequentially address subsequent drive units.

[0025] Optionally, determining the position of the end disconnection breakpoint according to the third addressing information specifically includes:

[0026] subtracting the addressing information in the third addressing information from the addressing information in the expected addressing information to obtain a second position;

[0027] According to the second position, the specific position of the end circuit breaker breakpoint is obtained.

[0028] Optionally, after determining the position of the last disconnection breakpoint according to the third addressing information, the method further includes:

[0029] According to the position of the last disconnection breakpoint and the addressing information difference between adjacent drive units, and in accordance with the expected addressing information, the subsequent drive units at the last disconnection breakpoint are addressed in sequence.

[0030] Optionally, according to the position of the last disconnection breakpoint and the addressing information difference between adjacent drive units, and in accordance with the expected addressing information, the subsequent drive units at the last disconnection breakpoint are sequentially addressed, specifically including:

[0031] A fifth correction command is obtained based on the position of the final disconnection breakpoint and the difference in addressing information between adjacent drive units, and is output to the N drive units; wherein the fifth correction command is used to address the drive unit in the second state according to the expected addressing information of the first drive unit at the final disconnection breakpoint; and to control the drive unit in the second state to output the addressing command to address subsequent drive units in sequence.

[0032] Optionally, if the expected addressing information is received, a status clearing command is sent to N drive units to clear the first status of the drive units and the second status of the drive units; if the expected addressing information is not received, a warning signal is output externally.

[0033] According to a second aspect of the present invention, there is provided a single-wire series circuit, comprising:

[0034] A main control unit and N drive units connected in series; the output end of the main control unit is connected to the input end of the first drive unit, the output end of the Nth drive unit is connected to the input end of the main control unit, and the parallel signal end of the main control unit is also connected to each drive unit respectively; wherein N is a positive integer and N ≥ 1; wherein

[0035] The main control unit is used to:

[0036] Addressing N drive units connected in series;

[0037] Determining whether the main control unit receives the expected addressing information within the first time; if so, determining that there is no breakpoint fault in the single-line series circuit; if not, determining that there is a breakpoint fault in the single-line series circuit, and outputting a first correction command to the N drive units to determine the first drive unit at each short-circuit breakpoint; setting the first drive unit at each short-circuit breakpoint to a first state and setting the address to the address of the first drive unit through the first correction command, and controlling the drive units in the first state to output addressing commands; wherein the expected addressing information is used to represent the addressing information from the first drive unit to the Nth drive unit;

[0038] determining whether the master control unit receives second addressing information within a second time; if the second addressing information is received, determining the position of the end short-circuit breakpoint according to the second addressing information; wherein the second addressing information is used to represent the addressing information of the first driving unit to the Nth driving unit at the end short-circuit breakpoint;

[0039] if the second addressing information is not received, sequentially outputting a second correction command and a third correction command to the N driving units to jointly determine the first driving unit at each open-circuit breakpoint; and setting the first driving unit at each open-circuit breakpoint to the second state and setting the address to the address of the first driving unit through the third correction command, and controlling the driving unit in the second state to output the addressing command;

[0040] determining whether the master control unit receives third addressing information within a third time; if the third addressing information is received, determining the position of the end open-circuit breakpoint according to the third addressing information; wherein the third addressing information is used to represent the addressing information of the first driving unit to the Nth driving unit at the end open-circuit breakpoint;

[0041] if the third addressing information is not received, outputting an alarm signal to the outside.

[0042] According to a third aspect of the present application, a driving architecture is provided, comprising M single-line series circuits according to the second aspect of the present application; wherein M is a positive integer and M≥1.

[0043] The breakpoint detection method of the single-line series circuit, the single-line series circuit and the driving architecture provided by the present application utilize the parallel bus structure of the (SPB protocol) in the serial and parallel broadcast communication protocol to realize the breakpoint detection of the serial circuit. Compared with the existing scheme of the breakpoint detection of the single-line series circuit, the present application does not need to additionally increase a spare pin on each driving unit, thereby reducing the packaging cost of the single-line series circuit and further greatly reducing the packaging cost of the driving architecture. Meanwhile, the present application does not need to wire the additional spare pin, thereby greatly simplifying the wiring of the driving architecture and reducing the PCB cost. BRIEF DESCRIPTION OF DRAWINGS

[0044] The present application will be further described in detail below with reference to the accompanying drawings and specific embodiments.

[0045] Figure 1 a circuit architecture diagram of a typical driving architecture in the prior art;

[0046] Figure 2 a circuit structure diagram of a cross-border scheme of a driving link in the prior art;

[0047] Figure 3The process of the breakpoint detection method of the single-line series circuit provided by the first embodiment of the present invention is as follows: Figure 1 ;

[0048] Figure 4 The process of the breakpoint detection method of the single-line series circuit provided by the first embodiment of the present invention is as follows: Figure 2 ;

[0049] Figure 5 The process of the breakpoint detection method of the single-line series circuit provided by the first embodiment of the present invention is as follows: Figure 3 ;

[0050] Figure 6 The process of the breakpoint detection method of the single-line series circuit provided by the first embodiment of the present invention is as follows: Figure 4 ;

[0051] Figure 7 The process of the breakpoint detection method of the single-line series circuit provided by the first embodiment of the present invention is as follows: Figure 5 ;

[0052] Figure 8 This is a circuit structure diagram of a single-wire series circuit provided by the second embodiment of the present invention.

[0053] Reference numerals:

[0054] 10- Main control unit;

[0055] 20-Drive unit. DETAILED DESCRIPTION

[0056] The following will be combined with the accompanying drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the embodiments described are only some embodiments of the present invention, not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making creative work are within the scope of protection of the present invention. The terms "first", "second", "third", "fourth", etc. (if any) in the description and claims of the present invention and the above-mentioned drawings are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that the numbers used in this way are interchangeable where appropriate, so that the embodiments of the present invention described here can be implemented in an order other than those illustrated or described here. In addition, the terms "including" and "having" and any variations thereof are intended to cover non-exclusive inclusions. For example, a process, method, system, product or device that includes a series of steps or units is not necessarily limited to those steps or units clearly listed, but may include other steps or units that are not clearly listed or inherent to these processes, methods, products or devices.

[0057] Before the embodiments of the present application are introduced, the design idea of the present application is briefly described:

[0058] In the single-wire series circuit, the main control unit outputs the address allocation command to the first driving unit. Since the driving units are connected in series, each driving unit receives the address allocation command from the previous adjacent driving unit, completes the address allocation and outputs to the next adjacent driving unit. In the process of the address allocation command being transmitted from the first driving unit to the Nth driving unit, the address allocation of all driving units is completed. (Detailed working background is introduced) If there is a breakpoint in the series circuit, it will cause the driving chip after the breakpoint to be unable to perform address allocation and communication. The reasons for causing the breakpoint include at least chip damage, line aging, etc. The key to restoring the driving chip after the breakpoint to normal address allocation and communication is to determine the position of the breakpoint.

[0059] Please refer to Figure 3 On this basis, the first embodiment of the present application proposes a breakpoint detection method of a single-wire series circuit, which is used to detect the breakpoint existing in the single-wire series circuit; wherein the single-wire series circuit comprises a main control unit and N driving units connected in series; the output end of the main control unit is connected to the input end of the first driving unit, the output end of the Nth driving unit is connected to the input end of the main control unit, and the parallel signal end of the main control unit is also connected to each driving unit; wherein N is a positive integer, and N≥1, and the method comprises the following specific steps:

[0060] S1: Addressing the N driving units connected in series.

[0061] S2: Determine whether the main control unit receives the expected address allocation information within a first time; if yes, jump to S3; if no, jump to S4.

[0062] The expected address allocation information is used to represent the address allocation information from the first driving unit to the Nth driving unit.

[0063] S3: Determine that the single-wire series circuit does not have a breakpoint fault.

[0064] S4: Determine that the single-wire series circuit has a breakpoint fault, and output a first correction command to the N driving units to determine the first driving unit at each short-circuit breakpoint; and set the first driving unit at each short-circuit breakpoint to a first state and set the address to the address of the first driving unit through the first correction command, and control the driving unit in the first state to output the address allocation command.

[0065] S5: Determine whether the main control unit receives the second address allocation information within a second time; if yes, jump to S6; if no, jump to S7.

[0066] S6: Determine the position of the tail short-circuit breakpoint according to the second addressing information.

[0067] The second addressing information is used to represent the addressing information of the first drive unit to the Nth drive unit at the end short-circuit breakpoint.

[0068] S7: Output the second correction command and the third correction command to N drive units in sequence to jointly determine the first drive unit at each circuit breaker breakpoint; and set the first drive unit at each circuit breaker breakpoint to the second state and the address to the address of the first drive unit through the third correction command, and control the drive units in the second state to output the addressing command.

[0069] S8: Determine whether the main control unit receives the third addressing information within the third time; if so, jump to S9; if not, jump to S10.

[0070] S9: Determine the end disconnection breakpoint position according to the third addressing information.

[0071] The third addressing information is used to represent the sequential addressing information of the first drive unit to the Nth drive unit at the end breaking point.

[0072] S10: Output a warning signal to the outside.

[0073] The embodiment of the present invention uses the above technical solution to realize breakpoint detection of a single-line series circuit at low cost. The specific principle is:

[0074] Before explaining the breakpoint detection principle, let’s first briefly explain the types of breakpoints: In a single-line series circuit, the types of breakpoints mainly include open circuit breakpoints and short circuit breakpoints. The difference between the two is that the potential at the open circuit breakpoint is not pulled low or high, so the open circuit breakpoint is still at the default level; while the potential at the short circuit breakpoint is pulled low or high due to a short circuit to the ground or power supply. Therefore, the input and output terminals of the subsequent drive units of the open circuit breakpoint are all at the default level, and the address information is all zero; and the input and output terminals of the drive units after the first drive unit at the short circuit breakpoint are also at the default level, and the address information is zero. Only the input terminal of the first drive unit at the short circuit breakpoint is at a low level or a high level, and the address information is zero.

[0075] As can be seen from the above description, the first drive unit after the short-circuit breakpoint can be determined by the input terminal level and address information of the drive unit. Therefore, after determining that a breakpoint fault exists in the single-line series circuit, the main control unit broadcasts the first correction command to all drive units via the existing parallel bus. If the input terminal of the drive unit that receives the first correction command is at a low level and the address information is zero, then this drive unit is determined to be the first drive unit at the short-circuit breakpoint, is set to the first state, and its address information is set to the same as the address information of the first drive unit. For example, if the address information of the first drive unit is set to 2, the address information of this drive unit is also set to 2. In addition, this drive unit is also controlled to output configuration commands to subsequent drive units to properly address the subsequent drive units.

[0076] If the main control unit receives the second addressing information within the second time, it means that the last breakpoint fault is a short-circuit breakpoint, and the second addressing information is used to characterize the position of the last short-circuit breakpoint; the principle is: before the last breakpoint, if there are other breakpoint faults, then neither a short-circuit breakpoint nor an open-circuit breakpoint can make the addressing command be transmitted in sequence; for example: if there is a short-circuit breakpoint before the last breakpoint, the addressing command output by the first drive unit corresponding to the breakpoint will be interrupted at the last breakpoint; if there is an open-circuit breakpoint before the last breakpoint, the first drive unit corresponding to the open-circuit breakpoint will not respond to the first correction command. Therefore, only when the last breakpoint is a short-circuit breakpoint will the first drive unit at the corresponding breakpoint respond to the first correction command and output the addressing command, and enable the main control unit to receive the second addressing information; wherein, the main control unit subtracts the second addressing information from the expected addressing information to obtain the position of the last short-circuit breakpoint.

[0077] If the main control unit does not receive the second addressing information within the second time, indicating that the last breakpoint fault was not a short-circuit breakpoint, the last breakpoint fault may be a circuit-breaking breakpoint. Therefore, the main control unit first broadcasts the second correction command to all drive units via the existing parallel bus. If the address information of the drive unit that receives the second correction command is zero, the drive unit is set to the third state, and the level of the serial output terminal is set to a low level. As can be seen from the above, the input and output terminals of the drive units following the circuit-breaking breakpoint are both high. Therefore, after the serial output terminals of the drive units following the circuit-breaking breakpoint are all set to a low level, only the input terminal of the first drive unit at the circuit-breaking breakpoint is high. Therefore, the master control unit broadcasts the third correction command to all drive units via the existing parallel bus. If the input terminal of a drive unit receiving the third correction command is high, the address information is zero, and the drive unit is in the third state, then the drive unit is determined to be the first drive unit at the circuit breaker point, is set to the second state, and the address information is set to the same as the address information of the first drive unit. For example, if the address information of the first drive unit is set to 3, the address information of the drive unit is also set to 3. In addition, the drive unit is controlled to output configuration commands to subsequent drive units to properly address the subsequent drive units.

[0078] If the main control unit receives the third addressing information within the third time, it indicates that the last breakpoint fault is a short-circuit breakpoint, and the third addressing information is used to identify the location of the final short-circuit breakpoint. The principle is similar to that of the final short-circuit breakpoint described above and will not be further described here. The main control unit subtracts the third addressing information from the expected addressing information to obtain the location of the final short-circuit breakpoint.

[0079] If the main control unit does not receive the third addressing information within the third time, it means that other faults except the breakpoint fault exist in the single-line series circuit and cannot be detected, and a warning signal needs to be output externally.

[0080] Compared to existing solutions for detecting breakpoints in single-line series circuits, the embodiments of the present invention do not require additional spare pins on each driver unit. Instead, they utilize existing parallel buses and serial structures to achieve the aforementioned breakpoint fault detection, reducing the packaging cost of the single-line series circuit and, in turn, significantly reducing the packaging cost of the driver architecture. Furthermore, the embodiments of the present invention do not require routing of additional spare pins, thereby simplifying the routing of the driver architecture and reducing PCB costs. In addition to detecting the location of external breakpoints, the embodiments of the present invention also control the output of an addressing command by the first driver unit at each short-circuit breakpoint through the first correction command, thereby restoring normal addressing of subsequent driver units.

[0081] Based on the principle of the final short-circuit breakpoint described above, the breakpoint detection method for a single-line series circuit is only applicable to detecting the location of the last breakpoint and cannot detect breakpoints before the last breakpoint. Furthermore, normal addressing can be achieved for chips before the first breakpoint and chips after the last breakpoint, but correct addressing cannot be achieved for chips between the first and last breakpoints or for damaged chips.

[0082] The following is an explanation of the specific steps of the single-wire series circuit breakpoint detection method:

[0083] In one specific embodiment, determining in S2 whether the main control unit receives the expected addressing information within the first time period specifically includes: if the main control unit receives the expected addressing information within the first time period after outputting the addressing command, it indicates that the single-line series circuit has no breakpoint faults or other faults that affect communication and can operate normally. If the main control unit does not receive the expected addressing information within the first time period, it indicates that a breakpoint fault or other fault that affects communication exists in the single-line series circuit.

[0084] The expected address information is used to represent the address information from the first drive unit to the Nth drive unit. For example, if a single-line cascade circuit includes six drive units connected in series, the address information of the first drive unit is set to 1, and the address information of subsequent drive units is incremented by one. Then, the expected address information is equal to the address information of the sixth drive unit, that is, 6.

[0085] The first time can be set to 100 μS-200 μS to prevent the main control unit from misjudging the fault due to signal transmission delay. Of course, in addition to the above range, the first time can also be set to a wider range. The specific time can be selected according to needs and is not limited here.

[0086] Please refer to Figure 4 As a specific implementation, the content in S4 specifically includes the following steps:

[0087] S41: The main control unit enters a breakpoint fault detection mode and broadcasts a breakpoint fault detection enable signal to the N drive units to enable the N drive units.

[0088] S42: The main control unit broadcasts a breakpoint fault detection start signal to the N drive units to start entering a breakpoint fault detection mode.

[0089] S43: The main control unit broadcasts the first correction command to the N driving units, and determines whether the address information of each driving unit is zero; if not, jump to S44; if yes, jump to S45.

[0090] S44: No operation is performed on the drive units whose address information is not zero.

[0091] S45: For each driving unit whose address information is zero, determine whether its input terminal is at a low level; if not, jump to S46; if so, jump to S47.

[0092] S46: No operation is performed on the driving units whose address information is zero but whose input terminals are at a high level.

[0093] The address information of the driving unit is zero but the input terminal is at a high level, which means that the driving unit is not the first driving unit at the short-circuit power-off location, and therefore, there is no need to operate on it.

[0094] S46: setting all driving units whose address information is zero and whose input terminals are at low level to the first state and setting their addresses to the address of the first driving unit, and controlling all driving units in the first state to output addressing commands.

[0095] The address information of the driver unit is zero and the input terminal is low, which means that the driver unit is the first driver unit after the short circuit breakpoint. At the same time, there may be more than one short circuit breakpoint, and it is impossible to distinguish the last short circuit breakpoint. Therefore, the first driver unit at each short circuit breakpoint needs to be set the same.

[0096] In a specific embodiment, determining whether the main control unit has received the second addressing information within the second time in S5 specifically includes: after the main control unit outputs the first correction command; if the main control unit receives the second addressing information within the second time, it indicates that the last breakpoint fault in the single-line series circuit is a short-circuit breakpoint fault. If the main control unit does not receive the second addressing information within the second time, it indicates that the single-line series circuit does not have a short-circuit breakpoint fault, or that the last breakpoint fault in the single-line series circuit is not a short-circuit breakpoint fault, but an open-circuit breakpoint fault. The specific principles have been explained above and will not be repeated here.

[0097] The second time can be set between 100 μS and 200 μS to prevent the main control unit from misjudging a fault due to signal transmission delay. Of course, in addition to the above range, the second time can also be set within a wider range. The specific time can be selected based on needs and is not limited here.

[0098] The second addressing information is used to represent the addressing information of the first to Nth drive units at the final short-circuit breakpoint. For example, if a single-line cascade circuit includes six drive units connected in series, and the first drive unit at the final short-circuit breakpoint is the fourth drive unit, and the address information of this drive unit is set to 1, then the second addressing information is equal to the address information of the sixth drive unit, that is, 3.

[0099] On this basis, the position of the end short-circuit breakpoint is determined according to the second address information in S6, and specifically, the difference between the expected address information and the second address information is calculated, and the position of the end short-circuit breakpoint is determined according to the difference. Still taking the previous example for illustration, since the second address information is 3, and the expected address information known by the master control unit is 6, the expected address information is subtracted by the second address information, so that it is known that the end short-circuit breakpoint is specifically located between the third driving unit and the fourth driving unit. As for the reason for the end short-circuit breakpoint, it can be that the third driving unit is damaged and the output end of the third driving unit is short-circuited; or it can be that the output end of the third driving unit is short-circuited due to line aging, but the third driving unit is not damaged. The specific reason is determined according to the actual situation, and is not described here.

[0100] Please refer to Figure 5 , as a specific embodiment, S6 further includes the following steps:

[0101] S61: obtaining a fourth correction command according to the position of the end short-circuit breakpoint and the address information difference between adjacent driving units.

[0102] For example, a single-wire cascade single-path includes six driving units connected in series, the position of the end short-circuit breakpoint is the output end of the third driving unit, the address information of the first adjacent driving unit is 1, and the address information difference between adjacent driving units is 2, then the expected address information of the first driving unit of the end short-circuit breakpoint, i.e. the fourth driving unit, is 7. Then, the address information of the fourth driving unit is set in the fourth correction command.

[0103] S62: the master control unit broadcasts the fourth correction command to the N driving units, and judges whether each driving unit is in the first state; if not, jump to S63; if yes, jump to S64.

[0104] S63: no operation is performed on the driving unit not in the first state.

[0105] S64: setting the address information of the driving unit in the first state to the expected address information of the first driving unit of the end short-circuit breakpoint, and controlling the driving unit in the first state to output the address command to sequentially address the subsequent driving units.

[0106] If the main control unit has not received the expected addressing information of the Nth drive unit, indicating that there is another communication fault in the single-line series circuit, then a warning signal is output. If the main control unit receives the expected addressing information of the Nth drive unit, indicating that the subsequent drive unit at the last short-circuit breakpoint has completed normal addressing, then the main control unit broadcasts a status clearing command to the N drive units to clear the first status of all drive units.

[0107] Please refer to Figure 6 As a specific implementation, the content in S7 specifically includes the following steps:

[0108] S71: The main control unit broadcasts the second correction command to N drive units, and determines whether the address information of each drive unit is zero; if not, jump to S72; if so, jump to S73.

[0109] S72: No operation is performed on the drive units whose address information is not zero.

[0110] S73: setting all driving units whose address information is zero to the third state, and setting all output terminals to a low level.

[0111] S74: The main control unit broadcasts the third correction command to the N drive units, and determines whether the input terminal of each drive unit in the third state is at a high level; if not, jump to S75; if yes, jump to S76

[0112] S75: No operation is performed on the driving units that are in the third state but whose input terminals are at a low level.

[0113] The driving unit is in the third state but the input terminal is at a low level, which means that the driving unit is not the first driving unit at the disconnection and power-off position, and therefore, there is no need to operate it.

[0114] S76: setting the drive units in the third state and with high input terminals to the second state and setting their addresses to the address of the first drive unit, and controlling the drive units in the second state to output addressing commands.

[0115] Because the serial output terminals of the drive units in the third state are all set to a low level, the drive unit in the third state with a high input level is the first drive unit at the circuit breaker point. Furthermore, there may be more than one circuit breaker point, and it is impossible to distinguish the last circuit breaker point. Therefore, the same setting needs to be applied to the first drive unit at each circuit breaker point.

[0116] As a specific embodiment, the judging whether the master control unit receives the third addressing information within the third time in S8 specifically includes: after the master control unit outputs the third correction command; if the master control unit receives the third addressing information within the third time, it indicates that the last breakpoint fault in the single-wire series circuit is the open-circuit breakpoint fault. If the master control unit does not receive the third addressing information within the third time, it indicates that there is neither a short-circuit breakpoint fault nor an open-circuit breakpoint fault in the single-wire series circuit. Instead, there is a fault other than a breakpoint fault, so an alarm signal needs to be output to the outside to remind.

[0117] The third time can be set to 100 μS-200 μS to avoid misjudgment of the master control unit due to signal transmission delay. Of course, the third time can also be set to a wider range in addition to the above range. The specific time can be selected according to the needs, which is not limited here.

[0118] The third addressing information is used to represent the addressing information of the first driving unit to the Nth driving unit at the end open-circuit breakpoint.

[0119] On this basis, the specific content of determining the position of the end open-circuit breakpoint according to the third addressing information in S9 is similar to that in S6, which is not repeated here.

[0120] Please refer to Figure 7 As a specific embodiment, S9 further includes the following steps:

[0121] S91: obtaining a fifth correction command according to the position of the end open-circuit breakpoint and the addressing information difference between adjacent driving units.

[0122] For example, the single-wire cascade single-path includes six driving units connected in series, the position of the end open-circuit breakpoint is the output end of the third driving unit, the address information of the first adjacent driving unit is 1, and the addressing information difference between adjacent driving units is 2. Therefore, the expected address information of the first driving unit at the end open-circuit breakpoint, i.e., the fourth driving unit, is 7. Then, the address information of the fourth driving unit is set in the fifth correction command.

[0123] S92: the master control unit broadcasts the fifth correction command to the N driving units and judges whether each driving unit is in the second state; if not, jump to S93; if yes, jump to S94.

[0124] S93: no operation is performed on the driving unit not in the second state.

[0125] S94: setting the address information of the drive units in the second state to the expected address information of the first drive unit at the end breakpoint, and controlling the drive units in the second state to output addressing commands to address subsequent drive units in sequence.

[0126] If the main control unit has not received the expected addressing information of the Nth drive unit, indicating that there are other communication faults in the single-line series circuit, then a warning signal is output. If the main control unit receives the expected addressing information of the Nth drive unit, indicating that the subsequent drive units at the last disconnection point have completed normal addressing, then the main control unit broadcasts a status clearing command to the N drive units to clear the second status of all drive units.

[0127] Please refer to Figure 8 A second embodiment of the present invention provides a single-wire series circuit, comprising:

[0128] A main control unit 10 and N drive units 20 connected in series; the output end of the main control unit 10 is connected to the input end of the first drive unit 20, the output end of the Nth drive unit 20 is connected to the input end of the main control unit 10, and the parallel signal end of the main control unit 10 is also connected to each drive unit 20 respectively; wherein N is a positive integer and N ≥ 1; wherein

[0129] The main control unit 10 is used for:

[0130] Addressing N driving units 20 connected in series;

[0131] Determine whether the main control unit 10 receives the expected addressing information within the first time; if so, determine that there is no breakpoint fault in the single-line series circuit; if not, determine that there is a breakpoint fault in the single-line series circuit, and output a first correction command to the N drive units 20 to determine the first drive unit 20 at each short-circuit breakpoint; set the first drive unit 20 at each short-circuit breakpoint to the first state and set the address to the address of the first drive unit 20 through the first correction command, and control the drive units 20 in the first state to output the addressing command; wherein the expected addressing information is used to represent the addressing information from the first drive unit 20 to the Nth drive unit 20 in sequence;

[0132] Determine whether the main control unit 10 receives the second addressing information within the second time; if the second addressing information is received, determine the location of the last short-circuit breakpoint according to the second addressing information; wherein the second addressing information is used to represent the addressing information of the first drive unit 20 to the Nth drive unit 20 at the last short-circuit breakpoint;

[0133] If the second addressing information is not received, the second correction command and the third correction command are sequentially output to the N drive units 20 to jointly determine the first drive unit 20 at each circuit breaker point; the first drive unit 20 at each circuit breaker point is also set to the second state and the address is set to the address of the first drive unit 20 by the third correction command, and the drive units 20 in the second state are controlled to output the addressing command;

[0134] Determine whether the main control unit 10 receives third addressing information within a third time; if the third addressing information is received, determine the position of the last disconnection breakpoint according to the third addressing information; wherein the third addressing information is used to represent the addressing information of the first drive unit 20 to the Nth drive unit 20 at the last disconnection breakpoint;

[0135] If the third addressing information is not received, a warning signal is outputted externally.

[0136] A third embodiment of the present invention provides a driving architecture comprising M single-wire series circuits as described above; wherein M is a positive integer, and M≥1.

[0137] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit it. Although the present invention has been described in detail with reference to the above embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the above embodiments, or replace some or all of the technical features therein with equivalents. However, these modifications or replacements do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of the present invention.

Claims

1. A method for detecting a breakpoint in a single-wire series circuit, for detecting a breakpoint in the single-wire series circuit; wherein: A single-line series circuit includes a main control unit and N drive units connected in series in sequence; the output end of the main control unit is connected to the input end of the first drive unit, the output end of the Nth drive unit is connected to the input end of the main control unit, and the signal end of the main control unit is also connected to each drive unit respectively; wherein N is a positive integer and N ≥ 1, and the method includes: Addressing N drive units connected in series; Determining whether the main control unit receives the expected addressing information within the first time; if so, determining that there is no breakpoint fault in the single-line series circuit; if not, determining that there is a breakpoint fault in the single-line series circuit, and outputting a first correction command to the N drive units to determine the first drive unit after each short-circuit breakpoint; setting the first drive unit at each short-circuit breakpoint to the first state and setting the address to the address of the first drive unit through the first correction command, and controlling the drive units in the first state to output the addressing command; wherein the expected addressing information is used to represent the addressing information from the first drive unit to the Nth drive unit in sequence; determining whether the main control unit receives the second addressing information within the second time; if the second addressing information is received, determining the position of the last short-circuit breakpoint according to the second addressing information; wherein the second addressing information is used to represent the sequential addressing information of the first drive unit to the Nth drive unit at the last short-circuit breakpoint; If the second addressing information is not received, then there is no short-circuit breakpoint fault in the series circuit, and the second correction command and the third correction command are sequentially output to the N drive units to jointly determine the first drive unit after each open-circuit breakpoint; the first drive unit after each open-circuit breakpoint is set to the second state and the address is set to the address of the first drive unit by the third correction command, and the drive units in the second state are controlled to output the addressing command; Determining whether the main control unit receives third addressing information within a third time; if the third addressing information is received, determining the position of the last disconnection breakpoint according to the third addressing information; wherein the third addressing information is used to represent the sequential addressing information of the first drive unit to the Nth drive unit at the last disconnection breakpoint; If the third addressing information is not received, the system outputs a warning signal to indicate that there are multiple faults in the system.

2. The single-wire series circuit breakpoint detection method according to claim 1, characterized in that: Before the main control unit allocates addresses to the N drive units, the main control unit further includes: powering on the single-line series circuit and sending a correction command via the parallel bus to achieve breakpoint repair.

3. The single-line series circuit breakpoint detection method according to claim 1, wherein: Determining the position of the tail short-circuit breakpoint according to the second addressing information specifically includes: subtracting the addressing information in the second addressing information from the addressing information in the expected addressing information to obtain a first position; According to the first position, the specific position of the tail short-circuit breakpoint is obtained.

4. The method for detecting a breakpoint in a single-wire series circuit according to claim 3, wherein: After determining the position of the tail short-circuit breakpoint according to the second addressing information, the method further includes: According to the position of the last short-circuit breakpoint and the addressing information difference between adjacent drive units, and in accordance with the expected addressing information, the subsequent drive units at the last short-circuit breakpoint are addressed in sequence.

5. The single-line series circuit breakpoint detection method according to claim 4, characterized in that: According to the position of the last short-circuit breakpoint and the addressing information difference between adjacent drive units, and in accordance with the expected addressing information, the subsequent drive units at the last short-circuit breakpoint are sequentially addressed, specifically including: A fourth correction command is obtained based on the position of the final short-circuit breakpoint and the difference in addressing information between adjacent drive units, and is output to the N drive units; wherein the fourth correction command is used to address the drive unit in the first state according to the expected addressing information of the first drive unit at the final short-circuit breakpoint; and to control the drive unit in the first state to output the addressing command to sequentially address subsequent drive units.

6. The single-line series circuit breakpoint detection method according to claim 1, characterized in that: Determining the position of the end disconnection breakpoint according to the third addressing information specifically includes: subtracting the addressing information in the third addressing information from the addressing information in the expected addressing information to obtain a second position; According to the second position, the specific position of the end circuit breaker breakpoint is obtained.

7. The single-line series circuit breakpoint detection method according to claim 6, characterized in that: After determining the position of the last disconnection breakpoint according to the third addressing information, the method further includes: According to the position of the last disconnection breakpoint and the addressing information difference between adjacent drive units, and in accordance with the expected addressing information, the subsequent drive units at the last disconnection breakpoint are addressed in sequence.

8. The single-line series circuit breakpoint detection method according to claim 7, characterized in that: According to the position of the last disconnection breakpoint and the addressing information difference between adjacent drive units, and in accordance with the expected addressing information, the subsequent drive units at the last disconnection breakpoint are sequentially addressed, specifically including: A fifth correction command is obtained based on the position of the final disconnection breakpoint and the difference in addressing information between adjacent drive units, and is output to the N drive units; wherein the fifth correction command is used to address the drive unit in the second state according to the expected addressing information of the first drive unit at the final disconnection breakpoint; and to control the drive unit in the second state to output the addressing command to address subsequent drive units in sequence.

9. The method for detecting a breakpoint in a single-wire series circuit according to claim 5 or 8, wherein: If the expected addressing information is received, a state clearing command is sent to the N drive units to clear the first state of the drive units and the second state of the drive units; if the expected addressing information is not received, a warning signal is output externally.

10. A single-wire series circuit, characterized in that: include: A main control unit and N driving units connected in series; the output end of the main control unit is connected to the input end of the first driving unit, the output end of the Nth driving unit is connected to the input end of the main control unit, and the parallel signal end of the main control unit is also connected to each driving unit respectively; wherein N is a positive integer and N ≥ 1; wherein The main control unit is used to: Addressing N drive units connected in series; Determining whether the main control unit receives the expected addressing information within the first time; if so, determining that there is no breakpoint fault in the single-line series circuit; if not, determining that there is a breakpoint fault in the single-line series circuit, and outputting a first correction command to the N drive units to determine the first drive unit at each short-circuit breakpoint; setting the first drive unit at each short-circuit breakpoint to a first state and setting the address to the address of the first drive unit through the first correction command, and controlling the drive units in the first state to output addressing commands; wherein the expected addressing information is used to represent the addressing information from the first drive unit to the Nth drive unit; determining whether the main control unit receives the second addressing information within the second time; if the second addressing information is received, determining the position of the last short-circuit breakpoint according to the second addressing information; wherein the second addressing information is used to represent the addressing information of the first drive unit to the Nth drive unit at the last short-circuit breakpoint; If the second addressing information is not received, the second correction command and the third correction command are sequentially output to the N drive units to jointly determine the first drive unit at each circuit breaker point; the first drive unit at each circuit breaker point is also set to the second state and the address is set to the address of the first drive unit by the third correction command, and the drive units in the second state are controlled to output the addressing command; Determining whether the main control unit receives third addressing information within a third time; if the third addressing information is received, determining the position of the last disconnection breakpoint according to the third addressing information; wherein the third addressing information is used to represent the addressing information of the first drive unit to the Nth drive unit at the last disconnection breakpoint; If the third addressing information is not received, a warning signal is outputted externally.

11. A driver architecture, characterized in that: The method comprises M single-wire series circuits according to claim 10, wherein M is a positive integer and M≥1.

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