High voltage interlock detection device and high voltage interlock detection system

Abstract

The present application provides a high-voltage interlock detection device and a high-voltage interlock detection system. The high-voltage interlock detection device includes a control module and a detection module that are interconnected, and the detection module is connected to the high-voltage interlock circuit. The control module first sends a first pulse width modulation signal with a first duty cycle to the high-voltage interlock circuit through the detection module, then receives a second pulse width modulation signal fed back by the high-voltage interlock circuit detected by the detection module, and finally determines the fault information of the high-voltage interlock circuit based on the first duty cycle of the first pulse width modulation signal and the second duty cycle of the second pulse width modulation signal. In this way, the present application only needs to set the first duty cycle, and the control module automatically performs fault judgment based on the fed-back second duty cycle to determine the specific fault information of the high-voltage interlock circuit. The detection method is simpler and more accurate, thereby improving the efficiency of fault analysis of the high-voltage interlock circuit.

Description

Technical Field

[0001] The present application relates to the technical field of high-voltage interlock detection, and in particular to a high-voltage interlock detection device and a high-voltage interlock detection system. Background Art

[0002] In order to ensure the safe operation of the high-voltage system of electric vehicles, a high-voltage interlock (HVIL) is usually set in the high-voltage system. High-voltage interlock is a safety protection device used to prevent high-voltage equipment from being misoperated or illegally operated when unattended, thereby causing personal injury or property loss. The implementation of high-voltage interlock relies on the structure of the high-voltage connector itself. In addition to its own high-voltage and high-current interface, the high-voltage connector also integrates an HVIL interface. The HVIL interface has two pins. When the high-voltage connector is plugged in, the two pins are short-circuited, and when the high-voltage connector is disconnected, the two pins are open-circuited. The high-voltage interlock function is achieved by detecting the on-off state of the two pins. When the controller (such as a single-chip microcomputer) receives an abnormal signal, it can judge the risk level of the entire vehicle by judging the signal type and the abnormal problem.

[0003] One of the risks of an electric vehicle's high-voltage system is a sudden power outage, causing the vehicle to lose power. One possible cause of a sudden power outage is the automatic loosening of the high-voltage interlock circuit. Fault types can include an open circuit, a short circuit to the power ground, or a short circuit to the positive power supply. A short circuit to the power ground or the positive power supply does not materially impact the high-voltage system and represents the lowest level of fault. However, an open circuit represents a risk of poor contact across the entire high-voltage plug-in, representing the highest level of fault. In some existing electric vehicle products, loose connectors on the high-voltage interlock circuit, such as the high-voltage terminal, typically generate an error message, resulting in slow fault detection. Therefore, it's impossible to efficiently and accurately determine the fault type of the high-voltage interlock circuit. Summary of the Invention

[0004] The purpose of the embodiments of the present application is to provide a high-voltage interlock detection device and a high-voltage interlock detection system, which are used to solve the problem of low efficiency in detecting fault types of high-voltage interlock circuits in the prior art.

[0005] In order to achieve the above-mentioned object, the present application provides a first aspect of a high-voltage interlock detection device, comprising a control module and a detection module connected to each other, wherein the detection module is connected to a high-voltage interlock circuit;

[0006] The control module sends a first pulse width modulation signal with a first duty cycle to the high-voltage interlocking circuit through the detection module, receives a second pulse width modulation signal detected by the detection module and fed back by the high-voltage interlocking circuit, and determines fault information of the high-voltage interlocking circuit according to the first duty cycle of the first pulse width modulation signal and the second duty cycle of the second pulse width modulation signal.

[0007] In the embodiment of the present application, the detection module includes a signal output submodule and a signal acquisition submodule, and the signal output submodule and the signal acquisition submodule are respectively connected between the control module and the high-voltage interlock circuit;

[0008] The signal output submodule transmits the first pulse width modulation signal to the high voltage interlock circuit according to the first duty cycle sent by the control module;

[0009] The signal acquisition submodule acquires the second pulse width modulation signal fed back by the high voltage interlocking loop and feeds it back to the control module.

[0010] In an embodiment of the present application, the signal output submodule includes a main detection unit and an auxiliary detection unit, the control module includes a main signal output pin and an auxiliary signal output pin, the main detection unit is connected between the main signal output pin of the control module and the input end of the power supply and the high-voltage interlock circuit, and the auxiliary detection unit is connected between the auxiliary signal output pin of the control module and the output end of the power supply and the high-voltage interlock circuit;

[0011] The main detection unit controls the first power signal of the power supply to be sent to the high-voltage interlock circuit according to the first pulse width modulation signal of the control module to determine whether the high-voltage interlock circuit is faulty;

[0012] The auxiliary detection unit controls the second power supply signal of the power supply to be sent to the high-voltage interlock circuit according to the auxiliary level signal of the control module to determine the fault type of the high-voltage interlock circuit;

[0013] The value of the first power signal is greater than the value of the second power signal.

[0014] In the embodiment of the present application, the control module is further configured to:

[0015] sending a first pulse width modulation signal of a first duty cycle to a main detection unit to obtain a second duty cycle;

[0016] When the first duty cycle and the second duty cycle are the same, determining that the high-voltage interlock circuit has no fault;

[0017] When the second duty cycle is 100%, it is determined that the fault of the high-voltage interlock circuit is a short circuit to the positive pole of the power supply;

[0018] When the second duty cycle is 0%, an auxiliary level signal is sent to the auxiliary detection unit to obtain the second duty cycle;

[0019] When the second duty cycle is 100%, it is determined that the fault of the high-voltage interlock circuit is an open circuit;

[0020] When the second duty cycle is 0%, it is determined that the fault of the high-voltage interlocking circuit is a short circuit to the power ground.

[0021] In an embodiment of the present application, the main detection unit includes a first transistor and a second transistor, the first transistor is connected between the positive electrode of the power supply and the input end of the high-voltage interlock circuit, and the second transistor is connected between the main signal output pin of the control module and the first transistor;

[0022] When the main signal output pin of the control module outputs a high-level signal, the first transistor and the second transistor are turned on, so that the first power supply signal is transmitted to the high-voltage interlocking loop.

[0023] In the embodiment of the present application, the first transistor is a PNP transistor, and the second transistor is an NPN transistor;

[0024] The first base of the first transistor is connected to the second collector of the second transistor, the first emitter of the first transistor is connected to the positive pole of the power supply, and the first collector of the first transistor is connected to the input end of the high-voltage interlocking loop; the second base of the second transistor is connected to the main signal output pin of the control module, and the second emitter of the second transistor is connected to the power ground.

[0025] In the embodiment of the present application, the main detection unit further includes a first resistor, a second resistor, a third resistor, a fourth resistor, a fifth resistor, a sixth resistor, a first diode, a second diode, a first capacitor, and a second capacitor;

[0026] A first diode is connected between the first transistor and the input end of the high-voltage interlocking loop, and is used to protect the first transistor;

[0027] A first resistor and a second resistor are connected in parallel between the first transistor and the first diode, and are used to protect the first diode;

[0028] The third resistor is connected between the first emitter and the first base of the first transistor, and the fourth resistor is connected between the first base of the first transistor and the second collector of the second transistor. The third resistor and the fourth resistor are used to divide the voltage of the first power supply signal;

[0029] A fifth resistor is connected between the main signal output pin of the control module and the second base of the second transistor, and is used to divide the voltage of the first pulse width modulation signal;

[0030] The sixth resistor is connected between the second base and the second emitter of the second transistor, and is used to divide the first pulse width modulation signal, stabilize the off state of the second transistor, and release the parasitic capacitance of the second transistor;

[0031] The second diode is an electrostatic discharge diode, which is respectively connected between the input end of the high-voltage interlock circuit and the power ground and the output end of the high-voltage interlock circuit and the power ground, and is used to absorb surge interference of the high-voltage interlock circuit;

[0032] A first capacitor is connected between the first diode and the power supply ground, and is used to filter the first power supply signal;

[0033] The second capacitor is connected between the second base and the second emitter of the second transistor and is used for filtering the first pulse width modulation signal.

[0034] In an embodiment of the present application, the auxiliary detection unit includes a third transistor, which is connected between the positive electrode of the power supply and the output end of the high-voltage interlocking circuit;

[0035] When the auxiliary signal output pin of the control module outputs a low-level signal, the third transistor is turned on, so that the second power supply signal is sent to the high-voltage interlocking loop.

[0036] In an embodiment of the present application, the third transistor is a PNP transistor; the third base of the third transistor is connected to the auxiliary signal output pin of the control module, the third emitter of the third transistor is connected to the positive pole of the power supply, and the third collector of the third transistor is connected to the output end of the high-voltage interlocking loop.

[0037] In the embodiment of the present application, the auxiliary detection unit further includes a seventh resistor, an eighth resistor, a ninth resistor, a third diode and a third capacitor;

[0038] a seventh resistor, connected between the auxiliary signal output pin of the control module and the third base of the third transistor, for dividing the auxiliary level signal;

[0039] an eighth resistor connected between the third base and the third emitter of the third triode, for dividing the auxiliary level signal, stabilizing the off state of the third triode, and releasing the parasitic capacitance of the third triode;

[0040] a third diode connected between the third collector of the third triode and the power ground, for protecting the third triode;

[0041] a ninth resistor connected between the third collector of the third transistor and the third diode, and configured to protect the third diode;

[0042] The third capacitor is connected between the third diode and the power ground, and is used for filtering the second power signal.

[0043] In the embodiment of the present application, the control module includes a signal input pin and a signal detection pin, and the signal acquisition submodule includes a tenth resistor, an eleventh resistor, a twelfth resistor, a fourth diode, a fifth diode and a fourth capacitor;

[0044] The tenth resistor and the eleventh resistor are connected in parallel between the output end of the high-voltage interlock loop and the signal input pin of the control module and between the output end of the high-voltage interlock loop and the signal detection pin of the control module, and are used to divide the second pulse width modulation signal fed back by the high-voltage interlock loop and protect the signal input pin and the signal detection pin of the control module;

[0045] The twelfth resistor is connected between the output end of the high-voltage interlocking loop and the power ground, and is used for dividing the voltage of the second pulse width modulation signal fed back by the high-voltage interlocking loop;

[0046] The fourth diode is a clamping diode, connected between the output end of the high-voltage interlock circuit and the power ground and between the output end of the high-voltage interlock circuit and the positive electrode of the power supply, and is used to protect the signal input pin and signal detection pin of the control module;

[0047] A fifth diode is connected between the output end of the high-voltage interlocking loop and the signal detection pin of the control module, and is used to separate the second pulse width modulation signal fed back by the high-voltage interlocking loop;

[0048] The fourth capacitor is connected between the output end of the high-voltage interlocking loop and the power ground, and is used for filtering the second pulse width modulation signal fed back by the high-voltage interlocking loop.

[0049] A second aspect of the present application provides a high-voltage interlock detection system, comprising:

[0050] The above-mentioned high-voltage interlock detection device;

[0051] The high-voltage interlock circuit is connected to the high-voltage interlock detection device.

[0052] In summary, the present application forms a high-voltage interlock detection device through an interconnected control module and a detection module, connects the detection module to the high-voltage interlock circuit, and the control module first sends a first pulse width modulation signal with a first duty cycle to the high-voltage interlock circuit through the detection module, and then receives a second pulse width modulation signal fed back by the high-voltage interlock circuit detected by the detection module, and finally determines the fault information of the high-voltage interlock circuit according to the first duty cycle of the first pulse width modulation signal and the second duty cycle of the second pulse width modulation signal. In this way, the specific fault information of the high-voltage interlock circuit can be determined by only setting the first duty cycle and automatically performing fault judgment according to the second duty cycle fed back by the control module. The detection method is simpler and more accurate, thereby improving the efficiency of fault analysis of the high-voltage interlock circuit.

[0053] Other features and advantages of the embodiments of the present application will be described in detail in the subsequent detailed description. BRIEF DESCRIPTION OF THE DRAWINGS

[0054] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the following briefly introduces the drawings required for use in the description of the embodiments. Obviously, the drawings described below are only some embodiments of the present application. For those skilled in the art, other drawings can be obtained based on these drawings without creative work.

[0055] Figure 1 This is a structural diagram of a high-voltage interlock detection system according to an embodiment of the present application;

[0056] Figure 2 This is a structural diagram of a high-voltage interlock detection system according to another embodiment of the present application;

[0057] Figure 3 A schematic flow chart of a high-voltage interlock detection method according to an embodiment of the present application;

[0058] Figure 4 This is a schematic diagram of the circuit principle of a detection module according to an embodiment of the present application.

[0059] Description of Reference Numerals

[0060] 100. High-voltage interlock detection device; 200. High-voltage interlock circuit; 110. Control module; 120. Detection module; 121. Signal output submodule; 122. Signal acquisition submodule; 1211. Main detection unit; 1212. Auxiliary detection unit. DETAILED DESCRIPTION

[0061] The following will be combined with the drawings in the embodiments of this application to clearly and completely describe the technical solutions in the embodiments of this application. Obviously, the embodiments described are only part of the embodiments of this application, not all of the embodiments. Based on the embodiments in this application, all other embodiments obtained by those skilled in the art without making creative efforts are within the scope of protection of this application.

[0062] In the description of this application, it should be understood that the terms "first" and "second" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicitly specifying the number of the technical features indicated. Therefore, features specified as "first" or "second" may explicitly or implicitly include one or more of the described features. In the description of this application, "plurality" means two or more, unless otherwise specifically qualified. In this application, the word "exemplary" is used to mean "serving as an example, illustration, or illustration." Any embodiment described in this application as "exemplary" is not necessarily to be construed as preferred or advantageous over other embodiments. The following description is provided to enable anyone skilled in the art to implement and use the present application. In the following description, details are listed for illustrative purposes. It should be understood that one of ordinary skill in the art will recognize that the present application can be implemented without these specific details. In other instances, well-known structures and processes are not described in detail to avoid obscuring the description of this application with unnecessary detail. Therefore, this application is not intended to be limited to the embodiments shown, but is to be accorded the widest scope consistent with the principles and features disclosed herein.

[0063] Figure 1 FIG. 1 is a structural diagram of a high voltage interlock detection system according to an embodiment of the present application. Figure 1 As shown, an embodiment of the present application provides a high-voltage interlock detection system, which can be applied to equipment such as electric vehicles that include a high-voltage interlock circuit. The high-voltage interlock detection system may include a high-voltage interlock detection device 100 and a high-voltage interlock circuit 200. The high-voltage interlock circuit 200 may include a plurality of high-voltage connectors, and the high-voltage interlock function may be achieved by plugging and disconnecting the high-voltage connectors. However, if the high-voltage connector becomes loose, it will cause the high-voltage interlock circuit to malfunction. The high-voltage interlock detection device 100 of the embodiment of the present application can be used to detect the operating status of the high-voltage interlock circuit 200, for example, to determine whether the high-voltage interlock circuit 200 has a fault.

[0064] Based on the problems mentioned in the aforementioned background technology, in some existing products that use high-voltage interlocking, when detecting faults in the high-voltage interlocking circuit, loose connectors on the high-voltage interlocking circuit, such as high-voltage terminals, will generally cause an error. Once an error signal appears, it is necessary to test different connectors one by one to locate the location of the fault, resulting in a slow fault detection speed. Therefore, it is impossible to efficiently and accurately determine the fault type of the high-voltage interlocking circuit. Therefore, the embodiment of the present application provides a high-voltage interlocking detection device 100 that is simple, efficient, and can accurately determine the fault type.

[0065] In the embodiment of the present application, the high-voltage interlock detection device 100 may include a control module 110 and a detection module 120 that are connected to each other, and the detection module 120 is connected to the high-voltage interlock circuit 200 .

[0066] The control module 110 sends a first pulse width modulation signal with a first duty cycle to the high-voltage interlocking circuit through the detection module 120, receives a second pulse width modulation signal detected by the detection module 120 and fed back by the high-voltage interlocking circuit 200, and determines fault information of the high-voltage interlocking circuit 200 based on the first duty cycle of the first pulse width modulation signal and the second duty cycle of the second pulse width modulation signal.

[0067] In an embodiment of the present application, the control module 110 may include a component or device capable of sending a pulse width modulation (PWM) signal, which may include but is not limited to a microcontroller, a single-chip microcomputer, a PWM generator, a motor driver, etc. The control module 110 can pre-set the duty cycle of the pulse width modulation signal and send it to the high-voltage interlocking circuit 200 through the detection module 120. The high-voltage interlocking circuit 200 will then feedback a pulse width modulation signal to the control module 110 through the detection module 120. If the pulse width modulation signal sent and the pulse width modulation signal fed back match, it can be determined that the current high-voltage interlocking circuit 200 has no fault. If the pulse width modulation signal sent and the pulse width modulation signal fed back do not match, it indicates that the current high-voltage interlocking circuit 200 has a fault. The control module 110 can then judge the specific fault information based on the pulse width modulation signal fed back, thereby clarifying the fault information of the current high-voltage interlocking circuit 200.

[0068] In the embodiment of the present application, the first pulse width modulated signal refers to the pulse width modulated signal sent by the control module 110 to the high-voltage interlock circuit 200, and the first duty cycle is the duty cycle of the first pulse width modulated signal, which can be set by the control module 110. The second pulse width modulated signal refers to the pulse width modulated signal fed back to the control module 110 by the high-voltage interlock circuit 200, and the second duty cycle is the duty cycle of the second pulse width modulated signal. The control module 110 first sends the first pulse width modulated signal to the high-voltage interlock circuit 200 through the detection module 120, and the duty cycle of the first pulse width modulated signal is the first duty cycle. After the control module 110 receives the second pulse width modulated signal fed back by the high-voltage interlock circuit 200 and detected by the detection module 120, it obtains the second duty cycle of the second pulse width modulated signal. If the first duty cycle and the second duty cycle are the same, it can be determined that the high-voltage interlock circuit 200 is not faulty. When the first duty cycle and the second duty cycle are different, it can be determined that a fault occurs in the current high-voltage interlock circuit 200 . In this case, the control module 110 can determine specific fault information based on the second duty cycle.

[0069] The embodiment of the present application only needs to set the first duty cycle, and the control module 110 automatically performs fault judgment based on the feedback second duty cycle to determine the specific fault information of the high-voltage interlocking circuit 200. The detection method is simpler and more accurate, thereby improving the efficiency of fault analysis of the high-voltage interlocking circuit.

[0070] Figure 2 FIG. 1 is a structural diagram of a high voltage interlock detection system according to another embodiment of the present application. Figure 2 As shown, in the embodiment of the present application, the detection module 120 may specifically include a signal output submodule 121 and a signal acquisition submodule 122, and the signal output submodule 121 and the signal acquisition submodule 122 are respectively connected between the control module 110 and the high-voltage interlock circuit 200. Among them, the signal output submodule 121 can transmit the first pulse width modulation signal to the high-voltage interlock circuit 200 according to the first duty cycle sent by the control module 110, and the signal acquisition submodule 122 can collect the second pulse width modulation signal fed back by the high-voltage interlock circuit 200 and feed it back to the control module 110. In this way, through the signal output submodule 121 and the signal acquisition submodule 122, the control module 110 can realize the transmission of the first pulse width modulation signal and the collection of the second pulse width modulation signal, so as to further compare the first duty cycle and the second duty cycle, thereby obtaining fault information of the high-voltage interlock circuit 200.

[0071] Furthermore, in the embodiment of the present application, the signal output submodule 121 may include a main detection unit and an auxiliary detection unit, and the control module 110 may include a main signal output pin and an auxiliary signal output pin. The main detection unit is connected between the main signal output pin of the control module 110 and the input end of the power supply and the high-voltage interlock circuit 200, and the auxiliary detection unit is connected between the auxiliary signal output pin of the control module and the output end of the power supply and the high-voltage interlock circuit 200.

[0072] The main detection unit controls the first power signal of the power supply to be sent to the high-voltage interlock circuit 200 according to the first pulse width modulation signal of the control module 110 to determine whether the high-voltage interlock circuit 200 is faulty; the auxiliary detection unit controls the second power signal of the power supply to be sent to the high-voltage interlock circuit 200 according to the auxiliary level signal of the control module 110 to determine the fault type of the high-voltage interlock circuit 200; wherein the value of the first power signal is greater than the value of the second power signal.

[0073] In the embodiment of the present application, the control module 110 includes two parts in its high-voltage interlock detection method. The first part is implemented by a main detection unit, which obtains a first pulse-width modulation signal with a first duty cycle set by the control module 110 and controls the transmission of a first power signal to the high-voltage interlock circuit 200 based on the first duty cycle. The first duty cycle is a predetermined duty cycle greater than 0% and less than 100%, and the first power signal is a predetermined power supply voltage, which is used to make a preliminary judgment on a fault in the high-voltage interlock circuit 200. Specifically, when the first pulse-width modulation signal is at a high level, the main detection unit can control the output of the first power signal to the high-voltage interlock circuit 200. When the first pulse-width modulation signal is at a low level, the main detection unit can control the transmission of the first power signal to the high-voltage interlock circuit 200. At this point, the second duty cycle of the second pulse-width modulation signal fed back by the high-voltage interlock circuit 200 may be in one of three situations: the second duty cycle is the same as the first duty cycle, the second duty cycle is 100%, or the second duty cycle is 0%. These situations correspond to the three operating states of the high-voltage interlock circuit 200: no fault, a short circuit to the positive pole of the power supply, a short circuit to the negative pole of the power supply, or an open circuit. When the second duty cycle is 0%, it may be a short circuit to the negative pole of the power supply or an open circuit, so further judgment is required, that is, entering the second part.

[0074] The second part is implemented by an auxiliary detection unit, which controls the transmission of a second power supply signal to the high-voltage interlock circuit 200 based on an auxiliary level signal from the control module 110. The auxiliary level signal refers to a level signal that can further detect whether the fault type is an open circuit or a short circuit to the power ground, and the second power supply signal refers to a power supply signal that can further detect whether the fault type is an open circuit or a short circuit to the power ground. The second power supply signal is smaller than the first power supply signal, and by pulling the power supply signal low, open circuit and short circuit to the power ground faults can be further detected. Specifically, when the auxiliary level signal is low, the auxiliary detection unit can transmit the second power supply signal to the high-voltage interlock circuit 200. At this time, the second duty cycle of the second pulse width modulation signal fed back by the high-voltage interlock circuit 200 may have two conditions: a second duty cycle of 100% or a second duty cycle of 0%, corresponding to an open circuit and a short circuit to the power ground of the high-voltage interlock circuit 200, respectively.

[0075] In this way, the signal transmission through the main detection unit can enable the control module 110 to judge whether a fault occurs in the high-voltage interlock circuit 200, and the signal transmission through the auxiliary detection unit can enable the control module 110 to judge the specific fault type of the high-voltage interlock circuit 200, making the fault judgment of the high-voltage interlock more accurate.

[0076] Figure 3 FIG. 1 is a flow chart of a high voltage interlock detection method according to an embodiment of the present application. Figure 3 As shown, in an embodiment of the present application, a high-voltage interlock detection method is provided. The high-voltage interlock detection method is applied to the control module 110 of the above-mentioned high-voltage interlock detection device 100. The method may include steps 301-305, which are described in detail below.

[0077] Step 301: Send a first pulse width modulation signal of a first duty cycle to a main detection unit to obtain a second duty cycle;

[0078] Step 302: Determine whether the first duty cycle and the second duty cycle are the same; if the first duty cycle and the second duty cycle are the same, determine that the high-voltage interlock circuit 200 has no fault; if the first duty cycle and the second duty cycle are not the same, proceed to step 303;

[0079] Step 303: Determine whether the second duty cycle is 100% or 0%; if the second duty cycle is 100%, determine that the fault of the high-voltage interlock circuit 200 is a short circuit to the positive pole of the power supply; if the second duty cycle is 0%, proceed to step 304;

[0080] Step 304: Send the auxiliary level signal to the auxiliary detection unit to detect again the second duty cycle of the second pulse width modulation signal fed back by the high voltage interlock circuit 200;

[0081] Step 305, determine whether the second duty cycle is 100% or 0%; if the second duty cycle is 100%, determine that the fault of the high-voltage interlock circuit 200 is an open circuit; if the second duty cycle is 0%, determine that the fault of the high-voltage interlock circuit 200 is a short circuit to the power ground.

[0082] The control module 110 may execute steps 301 to 305 multiple times in a loop. After the control module 110 completes the determination of the high voltage interlock circuit 200 in the current cycle, it proceeds to the next cycle for fault detection.

[0083] In an embodiment of the present application, the control module 110 can first determine whether the high-voltage interlock circuit 200 has a fault. The control module 110 first transmits a first pulse-width modulated signal with a first duty cycle to the main detection unit. The main detection unit transmits the first power signal of the power supply to the high-voltage interlock circuit 200 based on the first pulse-width modulated signal. The high-voltage interlock circuit 200 then feeds back a second pulse-width modulated signal to the control module 110, which can then obtain a second duty cycle from the second pulse-width modulated signal. At this point, the second duty cycle can have three possible values: the same as the first duty cycle, 100%, and 0%. If the second duty cycle is the same as the first duty cycle, it can be determined that the high-voltage interlock circuit 200 has no fault. If the second duty cycle is 100%, it indicates that the high-voltage interlock circuit 200 has been at a high level, and the fault in the high-voltage interlock circuit 200 can be determined to be a short circuit to the positive terminal of the power supply. When the second duty cycle is 0%, it indicates that the high-voltage interlock circuit 200 is always at a low level. In this case, the high-voltage interlock circuit 200 fault can be determined to be an open circuit or a short circuit to the power supply ground. The main detection unit alone cannot distinguish between open circuit and short circuit to the power supply ground faults. Therefore, the auxiliary detection unit is required to further determine the fault type.

[0084] When the second duty cycle is 0%, the control module 110 can send an auxiliary level signal to the auxiliary detection unit. The auxiliary detection unit transmits the second power supply signal of the power supply to the high-voltage interlock circuit 200 based on the auxiliary level signal. The auxiliary level signal can be a low-level signal. Since the high-voltage interlock circuit 200 has been determined to have a fault, the second duty cycle of the second pulse-width modulation signal fed back to the control module 110 by the high-voltage interlock circuit 200 can only have two possible values: 100% and 0%. When the second duty cycle is 100%, it indicates that the high-voltage interlock circuit 200 is always at a high level, and the fault of the high-voltage interlock circuit 200 can be determined to be an open circuit. When the second duty cycle is 0%, it indicates that the high-voltage interlock circuit 100 is always at a low level, and the fault of the high-voltage interlock circuit 200 can be determined to be a short circuit to the power ground.

[0085] The control module 110 of the embodiment of the present application first determines whether a fault occurs in the high-voltage interlocking circuit 200 through the signal transmission of the main detection unit, and then further determines the specific fault type of the high-voltage interlocking circuit 200 through the signal transmission of the auxiliary detection unit. The fault type can be accurately determined only by comparing the duty cycle. The detection method is simpler and more accurate, which can make the fault detection of the high-voltage interlock more efficient.

[0086] In an embodiment of the present application, to determine whether the high-voltage interlock circuit 200 has a fault, the control module 110 can first send a first pulse-width modulation signal with a first duty cycle to the main detection unit 1211. The first duty cycle is between 0% and 100%. Therefore, the main detection unit can be configured to conduct when the signal is at a high level and to shut off when the signal is at a low level. If the second duty cycle received by the control module 110 is 0%, the high-voltage interlock circuit 200 fault may be an open circuit or a short circuit to the negative terminal of the power supply, requiring further determination. In this case, the control module 110 can send an auxiliary level signal to the auxiliary detection unit, for example, a low-level signal, to determine whether the high-voltage interlock circuit 200 is open or shorted to the negative terminal of the power supply based on the received second duty cycle. Therefore, the auxiliary detection unit can be configured to conduct when the signal is at a low level and to shut off when the signal is at a high level. The main detection unit and the auxiliary detection unit can realize the conduction and shutdown of the circuit through transistors. For example, transistors such as triodes or MOS tubes can be set in the main detection unit and the auxiliary detection unit.

[0087] The following description will be made by taking an example in which the main detection unit includes the first transistor Q1 and the second transistor Q2 and the auxiliary detection unit includes the third transistor Q3.

[0088] Figure 4 FIG. 1 is a schematic diagram of the circuit principle of a detection module according to an embodiment of the present application. Figure 4 As shown, in an embodiment of the present application, the control module 110 may include a main signal output pin HVIL_OUT_MCU and an auxiliary signal output pin HVIL_CTRL_MCU. The main signal output pin HVIL_OUT_MCU is used to output a first pulse width modulation signal with a first duty cycle of the control module 110, and the auxiliary signal output pin HVIL_CTRL_MCU is used to output an auxiliary level signal of the control module, such as a low-level signal. In this way, the control module 110 can send different level signals to the corresponding detection module through the two output pins.

[0089] In an embodiment of the present application, the main detection unit 1211 may include a first transistor Q1 and a second transistor Q2, the first transistor Q1 is connected between the positive pole of the power supply and the input end HVIL_OUT_Conn of the high-voltage interlocking loop 200 (HVIL_OUT_Conn can also be understood as the output end of the first pulse width modulation signal of the main detection unit 1211), and the second transistor Q2 is connected between the main signal output pin HVIL_OUT_MCU of the control module 110 and the first transistor Q1; wherein, when the main signal output pin HVIL_OUT_MCU of the control module 110 outputs a high-level signal, the first transistor Q1 and the second transistor Q2 are turned on to transmit the first power supply signal to the high-voltage interlocking loop 200.

[0090] Specifically, the duty cycle represents the ratio of the duration of the high-level signal to the entire cycle. When the first pulse width modulation signal is in a high-level state, the first transistor Q1 and the second transistor Q2 are turned on, and the first power supply signal UB of the positive electrode of the power supply can be transmitted to the high-voltage interlocking circuit 200. In this way, the high-voltage interlocking circuit 200 is turned on when the high-level is high and is not turned on when the low-level is low. Therefore, when there is no fault in the high-voltage interlocking circuit 200, the second duty cycle of the second pulse width modulation signal fed back should be the same as the first duty cycle. Therefore, by turning on the first transistor Q1 and the second transistor Q2 when the high-level is high, and then obtaining the first duty cycle of the first pulse width modulation signal and the second duty cycle of the second pulse width modulation signal, it is made simpler and more efficient to judge whether the high-voltage interlocking circuit 200 has a fault.

[0091] In the embodiment of the present application, the first transistor Q1 is a PNP transistor, and the second transistor Q2 is an NPN transistor. The first base b1 of the first transistor Q1 is connected to the second collector c2 of the second transistor Q2, and the first emitter e1 of the first transistor Q1 is connected to the positive electrode of the power supply. The control module 110 controls the positive electrode of the power supply to emit a first power signal UB. The first collector c1 of the first transistor Q1 is connected to the input terminal HVIL_OUT_Conn of the high-voltage interlock circuit 200, the second base b2 of the second transistor Q2 is connected to the main signal output pin HVIL_OUT_MCU of the control module 110, and the second emitter e2 of the second transistor Q2 is connected to the power ground GND.

[0092] When the first pulse-width modulation signal is at a high level, a forward bias voltage is applied between the second base b2 and the second emitter e2 of the second transistor Q2. The voltage at the second base b2 is higher than the voltage at the second emitter e2, causing the emitter junction to be forward biased. Current flows from the collector c2 to the second emitter e2, turning on the second transistor Q2. The voltage at the first emitter e1 is higher than the voltage at the first base b1, causing current to flow from the first emitter e1 to the first collector c1, turning on the first transistor Q1.

[0093] It should be noted that the structure and connection relationship of the first transistor Q1 and the second transistor Q2 described above are only an example of the embodiment of the present application, and can also be set to other transistors that can be turned on when the first pulse width modulation signal is at a high level.

[0094] In the embodiment of the present application, the main detection unit 1211 may further include a first resistor R1, a second resistor R2, a third resistor R3, a fourth resistor R4, a fifth resistor R5, a sixth resistor R6, a first diode D1, a second diode D2, a first capacitor C1 and a second capacitor C2.

[0095] A first diode D1 is connected between the first transistor Q1 and the input terminal HVIL_OUT_Conn of the high-voltage interlock circuit 200 to protect the first transistor Q1. When the high-voltage interlock circuit 200 is short-circuited to the positive terminal of the power supply, voltage may flow back, causing the first transistor Q1 to burn out. Therefore, the provision of the first diode D1 can prevent voltage backflow from burning out the first transistor Q1.

[0096] First resistor R1 and second resistor R2 are connected in parallel between first transistor Q1 and first diode D1 to act as voltage dividers and protect first diode D1. If high-voltage interlock circuit 200 is short-circuited to power ground, the first pulse-width modulation signal is at a high level. Directly applying first power signal UB to first diode D1 could damage it. Therefore, providing first resistor R1 and second resistor R2 protects first diode D1.

[0097] The third resistor R3 is connected between the first emitter e1 and the first base b1 of the first transistor Q1. The fourth resistor R4 is connected between the first base b1 of the first transistor Q1 and the second collector c2 of the second transistor Q2. The third resistor R3 and the fourth resistor R4 are used to divide the first power signal UB.

[0098] A fifth resistor R5 is connected between the main signal output pin HVIL_OUT_MCU of the control module 110 and the second base electrode b2 of the second transistor Q2. A sixth resistor R6 is connected between the second base electrode b2 and the second emitter electrode e2 of the second transistor Q2. The fifth resistor R5 and the sixth resistor R6 together form a voltage divider network for dividing the first pulse-width modulated signal. The sixth resistor R6 also stabilizes the second transistor Q2 in the off state and discharges the Cbe parasitic capacitance of the second transistor Q2.

[0099] The second diode D2 is an electrostatic discharge diode, which is respectively connected between the input end HVIL_OUT_Conn of the high-voltage interlock loop 200 and the power ground GND, and the output end HVIL_IN_Conn of the high-voltage interlock loop 200 (HVIL_IN_Conn can also be understood as the input end of the second pulse width modulation signal received by the signal acquisition submodule 122) and the power ground GND, and is used to absorb surge interference of the high-voltage interlock loop 200.

[0100] The first capacitor C1 is connected between the first diode D1 and the power ground GND for filtering the first power signal. The second capacitor C2 is connected between the second base b2 and the second emitter e2 of the second transistor Q2 for filtering the first pulse width modulation signal.

[0101] In this embodiment of the present application, the auxiliary detection unit 1212 may include a third transistor Q3, which is connected between the positive electrode of the power supply and the output terminal HVIL_IN_Conn of the high-voltage interlock circuit 200. The control module 110 controls the positive electrode of the power supply to transmit the second power signal P5V. When the auxiliary signal output pin HVIL_CTRL_MCU of the control module 110 outputs a low-level signal, the third transistor Q3 is turned on, thereby transmitting the second power signal P5V to the high-voltage interlock circuit 200.

[0102] Specifically, if a fault is determined to have occurred in the high-voltage interlock circuit 200, and the fault is a short circuit to power ground or an open circuit, the auxiliary signal output pin HVIL_CTRL_MCU of the control module 110 outputs an auxiliary level signal to the auxiliary detection unit 1212. The auxiliary detection unit 1212 transmits the second power supply signal P5V to the high-voltage interlock circuit 200 based on the auxiliary level signal to determine the specific fault. The third transistor Q3 is connected between the positive electrode of the power supply and the output terminal HVIL_IN_Conn of the high-voltage interlock circuit 200. The third transistor Q3 is conductive when the voltage is low and non-conductive when the voltage is high. Therefore, the auxiliary level signal can be a low-level signal. If the fault is an open circuit, the high-voltage interlock circuit 200 will remain in a high-level state, and therefore the second duty cycle will be 100%. If the fault is a short circuit to power ground, the high-voltage interlock circuit 200 will remain in a low-level state, and the second duty cycle will be 0%. Therefore, the specific fault of the high-voltage interlocking circuit 200 can be further determined by the second duty cycle under the auxiliary level signal. In this way, not only can the specific fault of the high-voltage interlocking circuit be determined simply and efficiently, but the fault detection of the high-voltage interlocking circuit 200 can also be made more accurate.

[0103] In the present embodiment, the third transistor Q3 is a PNP transistor. The third base b3 of the third transistor Q3 is connected to the auxiliary signal output pin HVIL_CTRL_MCU of the control module 110. The third emitter e3 of the third transistor Q3 is connected to the positive electrode of the power supply. The third collector c3 of the third transistor Q3 is connected to the output terminal HVIL_IN_Conn of the high-voltage interlock circuit 200. When the auxiliary level signal is low, the voltage at the third emitter e3 of the third transistor Q3 is higher than the voltage at the third base b3. Current flows from the third emitter e3 to the third collector c3, and the third transistor Q3 is turned on.

[0104] It should be noted that the structure and connection relationship of the third transistor Q3 described above is only an example of the embodiment of the present application, and can also be set to other transistors that can be turned on at a low level.

[0105] In the embodiment of the present application, the auxiliary detection unit 1212 may further include a seventh resistor R7, an eighth resistor R8, a ninth resistor R9, a third diode D3 and a third capacitor C3.

[0106] The seventh resistor R7 is connected between the auxiliary signal output pin HVIL_CTRL_MCU of the control module 110 and the third base electrode b3 of the third transistor Q3. The eighth resistor R8 is connected between the third base electrode b3 and the third emitter electrode e3 of the third transistor Q3. The seventh resistor R7 and the eighth resistor R8 together form a voltage divider network for dividing the auxiliary level signal. The eighth resistor R8 also stabilizes the third transistor Q3 in the off state and discharges the Cbe parasitic capacitance of the third transistor Q3.

[0107] A third diode D3 is connected between the third collector C3 of the third transistor Q3 and the power ground GND to protect the third transistor Q3. When the high-voltage interlock circuit 200 is short-circuited to the positive terminal of the power supply, voltage may flow back to the positive terminal of the power supply, causing the third transistor Q3 to burn out. Therefore, the third diode D3 is provided to prevent voltage backflow and damage to the third transistor Q3.

[0108] The ninth resistor R9 is connected between the third collector c3 of the third transistor Q3 and the third diode D3, and is used to protect the third diode D3 from being burned out and to perform voltage division when the third transistor Q3 is turned on.

[0109] The third capacitor C3 is connected between the third diode D3 and the power ground GND, and is used for filtering the second power signal.

[0110] In an embodiment of the present application, the control module 110 may further include a signal input pin HVIL_IN_MCU and a signal detection pin HVIL_IN_IO_MCU (HVIL_IN_MCU and HVIL_IN_IO_MCU can also be understood as input ports of the signal acquisition submodule 122, which are ports for the high-voltage interlocking circuit 200 to feedback the second pulse width modulation signal). The signal input pin HVIL_IN_MCU is used to receive the second pulse width modulation signal fed back by the signal acquisition submodule 122, and the signal detection pin HVIL_IN_IO_MCU is used to receive the IO signal fed back by the signal acquisition submodule 122, thereby assisting the control module 110 in identifying the second duty cycle of the second pulse width modulation signal.

[0111] The signal acquisition submodule 122 may include a tenth resistor R10 , an eleventh resistor R11 , a twelfth resistor R12 , a fourth diode D4 , a fifth diode D5 , and a fourth capacitor C4 .

[0112] The tenth resistor R10 and the eleventh resistor R11 are connected in parallel between the output terminal HVIL_IN_Conn of the high-voltage interlock circuit 200 and the signal input pin HVIL_IN_MCU of the control module 110, and between the output terminal HVIL_IN_Conn of the high-voltage interlock circuit 200 and the signal detection pin HVIL_IN_IO_MCU of the control module 110, respectively, to divide the voltage of the second pulse width modulation signal fed back by the high-voltage interlock circuit 200 and to protect the signal input pin HVIL_IN_MCU and the signal detection pin HVIL_IN_IO_MCU of the control module 110. The twelfth resistor R12 is connected between the output terminal HVIL_IN_Conn of the high-voltage interlock circuit 200 and the power ground GND to divide the voltage of the second pulse width modulation signal fed back by the high-voltage interlock circuit 200.

[0113] The fourth diode D4 is a clamping diode, which is connected between the output end HVIL_IN_Conn of the high-voltage interlock loop 200 and the power ground GND, and between the output end HVIL_IN_Conn of the high-voltage interlock loop 200 and the positive pole of the power supply, and is used to clamp the signal of the signal input pin HVIL_IN_MCU between -0.5V and 5.5V, and is used to protect the signal input pin HVIL_IN_MCU and the signal detection pin HVIL_IN_IO_MCU of the control module 110.

[0114] The fifth diode D5 is connected between the output end HVIL_IN_Conn of the high-voltage interlock circuit 200 and the signal detection pin HVIL_IN_IO_MCU of the control module 110, and is used to separate the second pulse width modulation signal fed back by the high-voltage interlock circuit 200 to prevent the signal detection pin HVIL_IN_IO_MCU from affecting the signal of the signal input pin HVIL_IN_MCU.

[0115] The fourth capacitor C4 is connected between the output terminal HVIL_IN_Conn of the high voltage interlock loop 200 and the power ground GND, and is used for filtering the second pulse width modulation signal fed back by the high voltage interlock loop 200 .

[0116] It should be noted that the structure and connection relationship of the signal acquisition submodule 122 described above is only an example of the embodiment of the present application, and may also be set to other structures for feeding back the second pulse width modulation signal to the control module 110 .

[0117] It should also be noted that the terms "comprises," "includes," or any other variations thereof are intended to encompass non-exclusive inclusion, such that a process, method, commodity, or apparatus that includes a series of elements includes not only those elements but also other elements not explicitly listed, or includes elements inherent to such process, method, commodity, or apparatus. In the absence of further limitations, an element defined by the phrase "comprises a ..." does not exclude the presence of other identical elements in the process, method, commodity, or apparatus that includes the element.

[0118] The above are merely embodiments of the present application and are not intended to limit the present application. For those skilled in the art, the present application may have various changes and variations. Any modifications, equivalent replacements, improvements, etc. made within the spirit and principles of the present application should all be included within the scope of the claims of the present application.

Claims

1. A high voltage interlock detection device, characterized in that: It includes a control module and a detection module connected to each other, wherein the detection module is connected to a high-voltage interlocking circuit; The control module sends a first pulse width modulation signal with a first duty cycle to the high-voltage interlock circuit through the detection module, receives a second pulse width modulation signal detected by the detection module and fed back by the high-voltage interlock circuit, and determines fault information of the high-voltage interlock circuit according to a first duty cycle of the first pulse width modulation signal and a second duty cycle of the second pulse width modulation signal; The detection module includes a signal output submodule and a signal acquisition submodule, and the signal output submodule and the signal acquisition submodule are respectively connected between the control module and the high-voltage interlock circuit; The signal output submodule transmits the first pulse width modulation signal to the high voltage interlock circuit according to the first duty cycle sent by the control module; The signal acquisition submodule acquires the second pulse width modulation signal fed back by the high voltage interlocking loop and feeds it back to the control module; The signal output submodule includes a main detection unit and an auxiliary detection unit, the control module includes a main signal output pin and an auxiliary signal output pin, the main detection unit is connected between the main signal output pin of the control module and the power supply and the input end of the high-voltage interlock circuit, and the auxiliary detection unit is connected between the auxiliary signal output pin of the control module and the power supply and the output end of the high-voltage interlock circuit; The main detection unit controls the first power signal of the power supply to be sent to the high-voltage interlock circuit according to the first pulse width modulation signal of the control module to determine whether the high-voltage interlock circuit is faulty; The auxiliary detection unit controls the second power signal of the power supply to be sent to the high-voltage interlock circuit according to the auxiliary level signal of the control module to determine the fault type of the high-voltage interlock circuit; Wherein, the value of the first power signal is greater than the value of the second power signal.

2. The high-voltage interlock detection device according to claim 1, characterized in that: The control module is further configured to: sending a first pulse width modulation signal of the first duty cycle to the main detection unit to obtain a second duty cycle; When the first duty cycle is the same as the second duty cycle, determining that the high-voltage interlock circuit has no fault; When the second duty cycle is 100%, determining that the fault of the high-voltage interlock circuit is a short circuit to the positive pole of the power supply; When the second duty cycle is 0%, sending the auxiliary level signal to the auxiliary detection unit to obtain the second duty cycle; When the second duty cycle is 100%, determining that the fault of the high-voltage interlock circuit is an open circuit; When the second duty cycle is 0%, it is determined that the fault of the high-voltage interlocking circuit is a short circuit to the power ground.

3. The high-voltage interlock detection device according to claim 1, characterized in that: The main detection unit includes a first transistor and a second transistor, the first transistor is connected between the positive electrode of the power supply and the input end of the high-voltage interlock circuit, and the second transistor is connected between the main signal output pin of the control module and the first transistor; When the main signal output pin of the control module outputs a high-level signal, the first transistor and the second transistor are turned on, so that the first power supply signal is transmitted to the high-voltage interlocking circuit.

4. The high-voltage interlock detection device according to claim 3, characterized in that: The first transistor is a PNP transistor, and the second transistor is an NPN transistor; The first base of the first transistor is connected to the second collector of the second transistor, the first emitter of the first transistor is connected to the positive electrode of the power supply, and the first collector of the first transistor is connected to the input end of the high-voltage interlocking loop; the second base of the second transistor is connected to the main signal output pin of the control module, and the second emitter of the second transistor is connected to the power ground.

5. The high-voltage interlock detection device according to claim 4, characterized in that: The main detection unit further includes a first resistor, a second resistor, a third resistor, a fourth resistor, a fifth resistor, a sixth resistor, a first diode, a second diode, a first capacitor and a second capacitor; The first diode is connected between the first transistor and the input end of the high-voltage interlocking loop, and is used to protect the first transistor; The first resistor and the second resistor are connected in parallel between the first transistor and the first diode, and are used to protect the first diode; The third resistor is connected between the first emitter and the first base of the first transistor, and the fourth resistor is connected between the first base of the first transistor and the second collector of the second transistor. The third resistor and the fourth resistor are used to divide the first power signal; The fifth resistor is connected between the main signal output pin of the control module and the second base of the second transistor, and is used to divide the voltage of the first pulse width modulation signal; The sixth resistor is connected between the second base and the second emitter of the second transistor, and is used to divide the first pulse width modulation signal, stabilize the off state of the second transistor, and release the parasitic capacitance of the second transistor; The second diode is an electrostatic discharge diode, which is respectively connected between the input end of the high-voltage interlocking circuit and the power ground and the output end of the high-voltage interlocking circuit and the power ground, and is used to absorb surge interference of the high-voltage interlocking circuit; The first capacitor is connected between the first diode and the power ground, and is used to filter the first power signal; The second capacitor is connected between the second base and the second emitter of the second transistor, and is used to filter the first pulse width modulation signal.

6. The high-voltage interlock detection device according to claim 1, characterized in that: The auxiliary detection unit includes a third transistor, and the third transistor is connected between the positive electrode of the power supply and the output end of the high-voltage interlocking circuit; When the auxiliary signal output pin of the control module outputs a low-level signal, the third transistor is turned on, so that the second power supply signal is sent to the high-voltage interlocking loop.

7. The high-voltage interlock detection device according to claim 6, characterized in that: The third transistor is a PNP type transistor; the third base of the third transistor is connected to the auxiliary signal output pin of the control module, the third emitter of the third transistor is connected to the positive electrode of the power supply, and the third collector of the third transistor is connected to the output end of the high-voltage interlocking loop.

8. The high-voltage interlock detection device according to claim 7, characterized in that: The auxiliary detection unit further includes a seventh resistor, an eighth resistor, a ninth resistor, a third diode and a third capacitor; The seventh resistor is connected between the auxiliary signal output pin of the control module and the third base of the third transistor, and is used to divide the auxiliary level signal; The eighth resistor is connected between the third base and the third emitter of the third transistor, and is used to divide the auxiliary level signal, stabilize the off state of the third transistor, and release the parasitic capacitance of the third transistor; The third diode is connected between the third collector of the third transistor and the power ground, and is used to protect the third transistor; The ninth resistor is connected between the third collector of the third transistor and the third diode, and is used to protect the third diode; The third capacitor is connected between the third diode and the power ground, and is used to filter the second power signal.

9. The high-voltage interlock detection device according to claim 1, characterized in that: The control module includes a signal input pin and a signal detection pin, and the signal acquisition submodule includes a tenth resistor, an eleventh resistor, a twelfth resistor, a fourth diode, a fifth diode and a fourth capacitor; The tenth resistor and the eleventh resistor are connected in parallel between the output end of the high-voltage interlock loop and the signal input pin of the control module, and between the output end of the high-voltage interlock loop and the signal detection pin of the control module, for dividing the second pulse width modulation signal fed back by the high-voltage interlock loop and protecting the signal input pin and the signal detection pin of the control module; The twelfth resistor is connected between the output end of the high-voltage interlocking loop and the power ground, and is used for dividing the voltage of the second pulse width modulation signal fed back by the high-voltage interlocking loop; The fourth diode is a clamping diode, connected between the output end of the high-voltage interlock circuit and the power ground and between the output end of the high-voltage interlock circuit and the positive electrode of the power supply, and is used to protect the signal input pin and the signal detection pin of the control module; The fifth diode is connected between the output end of the high-voltage interlocking loop and the signal detection pin of the control module, and is used to separate the second pulse width modulation signal fed back by the high-voltage interlocking loop; The fourth capacitor is connected between the output end of the high-voltage interlocking loop and the power ground, and is used to filter the second pulse width modulation signal fed back by the high-voltage interlocking loop.

10. A high voltage interlock detection system, characterized in that: include: The high voltage interlock detection device according to any one of claims 1 to 9; The high-voltage interlock circuit is connected to the high-voltage interlock detection device.

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