Method for forming a semiconductor structure
By forming an initial stress layer on the non-functional surface of the wafer and performing enhanced stress treatment, the warping problem caused by mismatch in the thermal expansion coefficient of the material is solved, and the improvement of the warpage degree and the feasibility of processing are achieved.
Patent Information
- Application Number
- CN202410683379.4
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2024-05-29
- Publication Date
- 2025-07-25
- Estimated Expiration
- 2044-05-29
AI Technical Summary
The wafer is warped due to the mismatch of thermal expansion coefficients of different stacking materials, which affects processing and increases manufacturing costs.
The initial stress layer is formed on the non-functional surface surface of the wafer, and the stress layer is enhanced by ultraviolet-assisted heat treatment or high-temperature annealing process to neutralize its stress with the stress caused by wafer warping.
Effectively improve the warpage of wafers, so that their warpage meets the preset range, ensure smooth processing and reduce costs.
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Figure CN118263137B_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the field of semiconductor technology, and in particular, to a method for forming a semiconductor structure. Background Art
[0002] As technology development follows Moore's Law, three-dimensional integrated circuits (3D ICs) have attracted increasing attention from researchers. The development direction of existing 3D ICs has shifted from the horizontal plane to the vertical plane, such as 3D memories, 3D through-silicon vias, and monolithic 3D.
[0003] Due to the mismatch of the coefficient of thermal expansion (CTE) between different stacked materials deposited on the wafer, as the temperature decreases, the thin film and the wafer contract at different rates, generating residual stress within the wafer that causes the wafer to bend upward or downward, resulting in wafer warping.
[0004] Excessive bending or warping of the wafer, or differences in warping in different directions, will limit wafer processing and even make it impossible to process the wafer on the same machine tool, increasing the device manufacturing cost.
[0005] Therefore, improving wafer warping is an issue that continuously needs to be addressed. Summary of the Invention
[0006] The technical problem solved by the present invention is to provide a method for forming a semiconductor structure to improve wafer warping.
[0007] To solve the above technical problem, the technical solution of the present invention provides a method for forming a semiconductor structure, including: providing a wafer, the wafer including a functional surface and a non-functional surface; forming a functional layer structure on the surface of the functional surface; obtaining the warping condition of the wafer; according to the warping condition, forming an initial stress layer on the surface of the non-functional surface, the initial stress layer having an initial stress, the direction of the initial stress being opposite to the stress direction generated by the wafer warping; performing enhanced stress treatment on the initial stress layer to form a stress layer, the stress of the stress layer being greater than the initial stress of the initial stress layer, and the stress of the stress layer neutralizing the stress generated by the wafer warping.
[0008] Optionally, the warping condition of the wafer includes: the wafer bends towards the non-functional surface, or the wafer bends towards the functional surface.
[0009] Optionally, when the wafer bends towards the functional surface, the initial stress layer has an initial compressive stress; the compressive stress of the stress layer is greater than the initial compressive stress of the initial stress layer.
[0010] Optionally, when the wafer bends towards the non-functional surface, the initial stress layer has an initial tensile stress; the tensile stress of the stress layer is greater than the initial tensile stress of the initial stress layer.
[0011] Optionally, the material of the initial stress layer includes silicon nitride.
[0012] Optionally, the process for enhancing the stress of the initial stress layer includes: an ultraviolet light-assisted heat treatment process.
[0013] Optionally, the ultraviolet light-assisted heat treatment process includes: a first step: irradiating the initial stress layer with ultraviolet light of a first wavelength for a first duration; a second step: irradiating the initial stress layer with ultraviolet light of a second wavelength for a second duration, where the second wavelength is greater than the first wavelength.
[0014] Optionally, the first wavelength is 172 nanometers; the second wavelength is 222 nanometers.
[0015] Optionally, the first duration is greater than the second duration.
[0016] Optionally, the duration range of the first duration is 10 to 15 minutes; the duration range of the second duration is 5 to 10 minutes.
[0017] Optionally, the temperature ranges of the first step and the second step are the same; the temperature range of the ultraviolet light-assisted heat treatment process in the first step is 350 degrees Celsius to 450 degrees Celsius; the temperature range of the ultraviolet light-assisted heat treatment process in the second step is 350 degrees Celsius to 450 degrees Celsius.
[0018] Optionally, the process for enhancing the stress of the initial stress layer includes: a high-temperature annealing process, and the parameters of the high-temperature annealing process include: the temperature range is: 900 degrees Celsius to 1100 degrees Celsius; the duration range is 30 minutes to 60 minutes; the gas atmosphere is a vacuum environment.
[0019] Optionally, the process for forming the initial stress layer includes a chemical vapor deposition process, and the process parameters of the chemical vapor deposition process include: the reaction gases include ammonia and silane; the power range is 200 watts to 300 watts; the pressure range is 1350 millitorr to 1450 millitorr; the temperature range is 375 degrees Celsius to 425 degrees Celsius.
[0020] Optionally, the content of nitrogen element in the silicon nitride material is greater than that of silicon element.
[0021] Optionally, before forming the initial stress layer on the non-functional surface, it further includes: forming a protective layer on the surface of the functional layer structure.
[0022] Optionally, it further includes: obtaining the warpage condition of the wafer, and the warpage degree of the wafer is within a preset range.
[0023] Compared with the prior art, the technical solution of the present invention has the following beneficial effects:
[0024] The forming method of the present invention forms a stress layer by performing enhanced stress treatment on an initial stress layer. The stress of the stress layer is greater than the initial stress of the initial stress layer, and the stress of the stress layer neutralizes the stress generated by the wafer warping, so that the warping condition of the wafer is improved and the warping degree of the wafer meets a preset range.
[0025] Furthermore, the process of performing enhanced stress treatment on the initial stress layer includes: an ultraviolet light-assisted heat treatment process. The ultraviolet light-assisted heat treatment process utilizes the photon energy of ultraviolet light to help break the nitrogen-hydrogen bonds (N-H) and silicon-hydrogen bonds (Si-H) in the silicon nitride film. The hydrogen atoms in adjacent broken bonds combine with each other to form hydrogen gas in molecular form and diffuse out of the silicon nitride film, thereby forming dangling bonds and micropores in the silicon nitride film. The dangling bonds crosslink with each other to cause these micropores to shrink to obtain the minimum surface energy, thereby enhancing the tensile stress of the film.
[0026] Furthermore, the second wavelength of the ultraviolet light-assisted heat treatment process is greater than the first wavelength. The ultraviolet light with a shorter first wavelength has higher energy and stronger dehydrogenation ability for the silicon nitride film; the ultraviolet light with a longer second wavelength has strong crosslinking ability and can promote the bonding of silicon-nitrogen-silicon (Si-N-Si) to improve the tensile stress.
[0027] Furthermore, the process of performing enhanced stress treatment on the initial stress layer includes: a high-temperature annealing process. After the silicon nitride film undergoes high-temperature annealing in the high-temperature annealing process, some free hydrogen in the silicon nitride film layer will form a kind of dangling bonds and micropores and overflow, and these dangling bonds crosslink with each other, and the micropores will undergo a certain shrinkage. Eventually, the volume of the film will shrink and become smaller to form a kind of tensile stress structure, thereby enhancing the tensile stress of the silicon nitride film. Brief Description of the Drawings
[0028] Figure 1 is a schematic flow chart of the forming method of the semiconductor structure in an embodiment of the present invention;
[0029] Figures 2 to 5 is a schematic diagram of the result of the forming process of the semiconductor structure in an embodiment of the present invention. Detailed Description of the Embodiment
[0030] As described in the background art, improving the warping of the wafer is a problem that needs to be continuously solved.
[0031] Specifically, the methods for improving the wafer warpage problem generally include: (1) Thermal annealing: Usually used to solve isotropic wafer warpage, with the property of heating the whole wafer, the heating speed of each area of the wafer is inconsistent, resulting in uneven temperature field distribution, and thus uneven thermal deformation of the wafer; (2) Ion implantation: Generating stress opposite to the warpage by doping ions to reduce the warpage degree, but at the same time, it is necessary to add a back mask and an implantation process, and the process is complex; (3) Thin film deposition: Forming an auxiliary thin film with a stress type opposite to that of the wafer on the back to offset the stress of the wafer. Conventional PECVD can prepare thin films through a high-frequency power source, but the stress of the obtained thin films is low and cannot effectively improve the warpage of the wafer.
[0032] To solve the above problems, the technical solution of the present invention provides a method for forming a semiconductor structure. By performing enhanced stress treatment on the initial stress layer to form a stress layer, the stress of the stress layer is greater than the initial stress of the initial stress layer, and the stress of the stress layer neutralizes the stress generated by the wafer warpage, so that the warpage of the wafer is improved and the warpage degree of the wafer meets the preset range.
[0033] To make the above objects, features, and beneficial effects of the present invention more obvious and understandable, the following detailed description will be given to the specific embodiments of the present invention with reference to the accompanying drawings.
[0034] Figure 1 It is a schematic flowchart of the method for forming a semiconductor structure in an embodiment of the present invention.
[0035] Please refer to Figure 1 , the flowchart of the method for forming a semiconductor structure includes:
[0036] Step S10: Provide a wafer, the wafer includes a functional surface and a non-functional surface;
[0037] Step S20: Form a functional layer structure on the surface of the functional surface;
[0038] Step S30: Obtain the warpage of the wafer;
[0039] Step S40: Form an initial stress layer on the surface of the non-functional surface, the initial stress layer has an initial stress, and the direction of the initial stress is opposite to the direction of the stress generated by the wafer warpage;
[0040] Step S50: Perform enhanced stress treatment on the initial stress layer to form a stress layer, the stress of the stress layer is greater than the initial stress of the initial stress layer, and the stress of the stress layer neutralizes the stress generated by the wafer warpage.
[0041] The forming method forms a stress layer by performing enhanced stress treatment on an initial stress layer. The stress of the stress layer is greater than the initial stress of the initial stress layer. The stress of the stress layer neutralizes the stress generated by the wafer warping, so that the warping condition of the wafer is improved and the warping degree of the wafer meets a preset range.
[0042] The warping condition of the wafer includes: the wafer bends towards the non-functional surface, or the wafer bends towards the functional surface.
[0043] In an embodiment, when the wafer bends towards the functional surface, the initial stress layer has an initial compressive stress; the compressive stress of the stress layer is greater than the initial compressive stress of the initial stress layer.
[0044] In this embodiment, when the wafer bends towards the non-functional surface, the initial stress layer has an initial tensile stress; the tensile stress of the stress layer is greater than the initial tensile stress of the initial stress layer.
[0045] Next, Figures 2 to 5 each step will be analyzed and described. Figures 2 to 5 is a schematic diagram of the result of the forming process of the semiconductor structure in the embodiment of the present invention.
[0046] Please refer to Figure 2 Execute step S10: Provide a wafer 100, the wafer 100 includes a functional surface S1 and a non-functional surface S2; execute step S20: Form a functional layer structure on the surface of the functional surface S1.
[0047] The functional layer structure includes a stack of multiple thin films, and there is stress mismatch between the multiple thin films, and there is stress mismatch between the functional layer structure and the wafer 100.
[0048] Please continue to refer to Figure 2 , and further includes: forming a protective layer 101 on the surface of the functional layer structure.
[0049] The protective layer 101 is used to protect the surface of the functional layer structure.
[0050] In this embodiment, the material of the protective layer 101 includes silicon oxide.
[0051] Please continue to refer to Figure 2 Execute step S30: Obtain the warping condition of the wafer 100. The warping condition of the wafer 100 includes: the wafer 100 bends towards the non-functional surface S2.
[0052] In this embodiment, the warping condition of the wafer 100 further includes: the warping degree of the wafer 100 bending towards the non-functional surface S2 is greater than a preset value.
[0053] The preset value is a standard value for determining whether the warping of the wafer will affect production and yield. The wafer with a warping degree within the preset range meets the requirements of production and yield.
[0054] In this embodiment, the wafer 100 bends towards the non-functional surface S2, generating compressive stress on the surface of the non-functional surface S2 of the wafer 100.
[0055] Please combine Figure 3 Execute step S40: Form an initial stress layer 102 on the surface of the non-functional surface S2. The initial stress layer 102 has an initial tensile stress. The direction of the initial tensile stress is opposite to the direction of the compressive stress generated by the warping of the wafer 100.
[0056] In this embodiment, the material of the initial stress layer 102 includes silicon nitride. The silicon nitride material has an initial tensile stress and can neutralize the compressive stress on the surface of the non-functional surface S2, improving the warping condition of the wafer.
[0057] In this embodiment, the content of nitrogen element in the silicon nitride material is greater than that of silicon element. This is beneficial to reducing the density of the silicon nitride layer.
[0058] In other embodiments, the content of nitrogen element in the silicon nitride material can be not greater than that of silicon element.
[0059] In this embodiment, the process for forming the initial stress layer 102 includes a chemical vapor deposition process. The process parameters of the chemical vapor deposition process include: the reaction gases include ammonia and silane; the power range is from 200 watts to 300 watts; the pressure range is from 1350 mTorr to 1450 mTorr; the temperature range is from 375 degrees Celsius to 425 degrees Celsius.
[0060] The process gas for forming the initial stress layer 102 contains hydrogen element. There are a large number of free hydrogen in the silicon nitride material, and these free hydrogen mainly exist in the form of nitrogen-hydrogen bonds (N-H) and silicon-hydrogen bonds (Si-H).
[0061] Please combine Figure 4 and Figure 5 Execute step S50: Perform enhanced stress treatment on the initial stress layer 102 to form a stress layer 103. The tensile stress of the stress layer 103 is greater than the initial tensile stress of the initial stress layer 102.
[0062] In one embodiment, the process for performing enhanced stress treatment on the initial stress layer 102 includes: an ultraviolet light-assisted heat treatment process.
[0063] The ultraviolet light-assisted heat treatment process utilizes the photon energy of ultraviolet light to help break the nitrogen-hydrogen bonds (N-H) and silicon-hydrogen bonds (Si-H) in the silicon nitride film. The hydrogen atoms in adjacent broken bonds combine to form hydrogen gas in molecular form and diffuse out of the silicon nitride film, thereby forming dangling bonds and micropores in the silicon nitride film. The dangling bonds crosslink with each other, causing these micropores to shrink to obtain the minimum surface energy. As a result, the tensile stress of the film is enhanced, and the tensile stress of the stress layer 103 can exceed 1.6 GPa, with an enhancement amplitude of at least more than 50%.
[0064] The ultraviolet light-assisted heat treatment process includes: the first step: irradiating the initial stress layer 102 with ultraviolet light of a first wavelength for a first duration; the second step: irradiating the initial stress layer 102 with ultraviolet light of a second wavelength for a second duration, where the second wavelength is greater than the first wavelength.
[0065] In this embodiment, the first wavelength is 172 nm; the second wavelength is 222 nm. The ultraviolet light with a shorter wavelength of the first wavelength has higher energy and stronger dehydrogenation ability for the silicon nitride film; the ultraviolet light with a longer wavelength of the second wavelength has strong crosslinking ability and can promote the silicon-nitrogen-silicon (Si-N-Si) bonding to improve the tensile stress.
[0066] In this embodiment, a Xe2 excimer lamp is used to provide ultraviolet light of the first wavelength; a KrCl excimer lamp is used to provide ultraviolet light of the second wavelength.
[0067] In this embodiment, the first duration is greater than the second duration.
[0068] In this embodiment, the duration range of the first duration is 10 to 15 minutes; the duration range of the second duration is 5 to 10 minutes.
[0069] In this embodiment, the temperature range of the ultraviolet light-assisted heat treatment process in the first step is the same as that of the ultraviolet light-assisted heat treatment process in the second step.
[0070] In this embodiment, the temperature range of the ultraviolet light-assisted heat treatment process in the first step is 350 °C to 450 °C; the temperature range of the ultraviolet light-assisted heat treatment process in the second step is 350 °C to 450 °C.
[0071] In another embodiment, the process for enhancing the stress of the initial stress layer 102 includes: a high-temperature annealing process.
[0072] The high-temperature annealing process causes some free hydrogen in the silicon nitride film to form dangling bonds and micropores and overflow after high-temperature annealing. These dangling bonds crosslink with each other, and the micropores will undergo a certain contraction, eventually causing the volume of the film to shrink and form a tensile stress structure. This enhances the tensile stress of the silicon nitride film. The tensile stress of the stress layer 103 can reach 2.1 GPa, with an enhancement amplitude of approximately 100%.
[0073] In this embodiment, the parameters of the high-temperature annealing process include: the temperature range is from 900 degrees Celsius to 1100 degrees Celsius; the duration range is from 30 minutes to 60 minutes; the gas atmosphere is a vacuum environment.
[0074] In this embodiment, the content of nitrogen element in the silicon nitride material is greater than that of silicon element. The diffusion of hydrogen in the silicon nitride layer depends on the density of the film. The lower the density, the higher the diffusion coefficient. The low-density silicon nitride layer is conducive to hydrogen dissociation, thereby increasing the stress. Therefore, nitrogen-rich silicon nitride is beneficial to reducing the density of the silicon nitride layer. Strengthening the stress of the nitrogen-rich silicon nitride film layer can further increase the tensile stress.
[0075] Please continue to refer to Figure 5 , in this embodiment, it further includes: obtaining the warpage condition of the wafer 100, and the warpage degree of the wafer 100 is within a preset range.
[0076] The stress layer 103 formed after the stress strengthening treatment has a large stress. The direction of the stress is opposite to the stress direction generated by the warpage of the wafer 100, which can neutralize and offset the stress on the surface of the wafer 100, improve the warpage condition of the wafer 100, and make the warpage degree of the wafer 100 meet the preset range.
[0077] Although the present invention is disclosed as above, the present invention is not limited thereto. Any person skilled in the art can make various changes and modifications without departing from the spirit and scope of the present invention. Therefore, the protection scope of the present invention should be subject to the scope defined by the claims.
Claims
1. A method for forming a semiconductor structure, characterized in that, Comprising: Providing a wafer, the wafer including a functional surface and a non-functional surface; Forming a functional layer structure on the surface of the functional surface; Obtaining the warpage condition of the wafer; According to the warpage condition, forming an initial stress layer on the surface of the non-functional surface, the initial stress layer having an initial stress, and the direction of the initial stress being opposite to the stress direction generated by the warpage of the wafer; The warpage condition of the wafer includes the wafer bending towards the non-functional surface, the initial stress layer having an initial tensile stress, and the material of the initial stress layer being nitrogen-rich silicon nitride, and the content of nitrogen element in the nitrogen-rich silicon nitride is greater than the content of silicon element; Performing enhanced stress treatment on the initial stress layer to form a stress layer, the stress of the stress layer being greater than the initial stress of the initial stress layer, and the stress of the stress layer neutralizing the stress generated by the warpage of the wafer.
2. The method for forming a semiconductor structure according to claim 1, wherein The process of performing enhanced stress treatment on the initial stress layer includes: an ultraviolet light-assisted heat treatment process.
3. The method for forming a semiconductor structure according to claim 2, wherein The ultraviolet light-assisted heat treatment process includes: the first step: irradiating the initial stress layer with ultraviolet light of a first wavelength for a first duration; the second step: irradiating the initial stress layer with ultraviolet light of a second wavelength for a second duration, and the second wavelength is greater than the first wavelength.
4. The method for forming a semiconductor structure according to claim 3, wherein, The first wavelength is 172 nanometers; the second wavelength is 222 nanometers.
5. The method for forming a semiconductor structure according to claim 4, wherein, The first duration is greater than the second duration.
6. The method for forming a semiconductor structure according to claim 5, wherein, The duration range of the first duration is 10 to 15 minutes; the duration range of the second duration is 5 to 10 minutes.
7. The method for forming a semiconductor structure according to claim 4, wherein, The temperature ranges of the first step and the second step are the same; the temperature range of the ultraviolet light-assisted heat treatment process in the first step is 350 degrees Celsius to 450 degrees Celsius; the temperature range of the ultraviolet light-assisted heat treatment process in the second step is 350 degrees Celsius to 450 degrees Celsius.
8. The method for forming a semiconductor structure according to claim 1, wherein, The process of performing enhanced stress treatment on the initial stress layer includes: a high-temperature annealing process, and the parameters of the high-temperature annealing process include: the temperature range is: 900 degrees Celsius to 1100 degrees Celsius; the duration range is 30 minutes to 60 minutes; the gas atmosphere is a vacuum environment.
9. The method for forming a semiconductor structure according to claim 1, wherein The process of forming the initial stress layer includes a chemical vapor deposition process, and the process parameters of the chemical vapor deposition process include: the reaction gases include ammonia and silane; the power range is 200 watts to 300 watts; the pressure range is 1350 millitorr to 1450 millitorr; the temperature range is 375 degrees Celsius to 425 degrees Celsius.
10. The method for forming a semiconductor structure as described in claim 1, characterized in that, Before forming the initial stress layer on the surface of the non-functional surface, it further includes: forming a protective layer on the surface of the functional layer structure.
11. The method for forming a semiconductor structure according to claim 1, wherein, Also including: Obtaining the warpage condition of the wafer, and the warpage degree of the wafer is within a preset range.
Citation Information
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