A vertical cavity surface emitting laser for high-speed communication and its preparation method

Abstract

The present invention provides a vertical cavity surface emitting laser for high-speed communication and a preparation method thereof. The vertical cavity surface emitting laser includes an epitaxial wafer, an oxide layer, an electrical insulation region, a dielectric layer, and P and N metal layers. The structure of the vertical cavity surface emitting laser satisfies: 1. The epitaxial wafer includes an elongated resonant cavity with a total thickness greater than or equal to 2 microns. The oxide layer is formed above the active region in the elongated resonant cavity. 2. The electrical insulation region is formed by ion implantation, and the electrical insulation region is formed from top to bottom to below the active region in the elongated resonant cavity. 3. The P metal layer forms a metal ring in the light-emitting region of the vertical cavity surface emitting laser, and the inner diameter of the metal ring is D1; ​​the diameter of the oxidation hole in the oxide layer is D2, and D1 < D2. In this application, through the coordination of the above three structural designs, the vertical cavity surface emitting laser can achieve high-quality single-mode lasing and achieve the purpose of controllable optical power.

Description

Technical Field

[0001] The present invention relates to the technical field of semiconductor chips, and in particular to a vertical cavity surface emitting laser for high-speed communication and a preparation method thereof. Background Art

[0002] VCSEL (Vertical Cavity Surface Emitting Laser) is a semiconductor laser diode. Unlike traditional LEDs and edge-emitting lasers, which emit light from the top and sides, VCSELs emit a more efficient beam vertically from their surface. Since the concept was proposed by Kenichi Iga et al. at the Tokyo Institute of Technology in 1977, VCSELs have been developed for over 40 years. Due to their outstanding advantages, such as low threshold, small far-field divergence, high modulation rate, ease of single longitudinal mode operation, and ease of two-dimensional integration, they have found widespread application in broadband Ethernet, high-speed data communications, optical interconnects, three-dimensional sensing, and optical integrated devices. The basic structure of a VCSEL consists of a p-DBR (p-DBR), an n-DBR (n-DBR), and an active region. Current injection injects holes from the p-type semiconductor and electrons from the n-type semiconductor into the quantum wells of the active region, where photoelectric conversion occurs. The generated light is resonantly amplified within the laser cavity formed between the p-DBR and n-DBR, resulting in laser output. Compared to traditional edge-emitting semiconductor lasers, VCSELs require simultaneous spatial confinement of both the electric and optical fields to achieve optimal laser resonance conditions. Currently, the approach first published in a 1994 paper by Dr. Dennis Deppe involves wet oxidation to create an oxidized aperture in a layer of the DBR, effectively confining both the current and optical field. This approach is now the default for high-power VCSELs used in 3D sensing and LiDAR, as well as high-speed VCSELs for data center optical modules.

[0003] However, in practice, the approach of "forming an oxidized aperture in a specific layer of the DBR through wet oxidation" presents two inconveniences. First, since the oxidized aperture is formed once during the process, the process is irreversible. Once formed, its photoelectric properties are essentially fixed and cannot be adjusted according to normal processing, which can easily lead to power overflow. In the data communications field, in particular, communication protocols have clear upper limits on optical power, and receiving devices (detectors) are designed to have an optimal receiving optical power range. Using excessively high-power VCSELs (e.g., a device with a power greater than 4mW at 6mA per aperture) can cause detector oversaturation, increasing bit error rates and reducing sensitivity, thus impacting the stability of the communication system. Furthermore, reducing optical power simply by lowering the injection current significantly reduces the chip's modulation bandwidth. Second, the oxidized aperture in current VCSEL device processes is typically set between 5 and 10 microns. At this point, the VCSEL device operates in multimode mode, which limits its accuracy for long-distance transmission and sensing. Under the premise of "forming an oxidation aperture in a certain layer of the DBR through wet oxidation", the oxidation aperture needs to be reduced to below 3 microns to achieve single mode. However, if the oxidation aperture is reduced to below 3 microns, the overall resistance of the device will be too high (approximately 90-120 ohms), thereby affecting the high-frequency characteristics of the device. Summary of the Invention

[0004] The present invention aims to provide a vertical cavity surface emitting laser (VCSEL) for high-speed communication and a method for preparing the same. The VCSEL forms an oxidized aperture in an extended resonant cavity and limits the inner diameter of the metal electrode and the gold-plated layer to be smaller than the oxidized aperture. This allows the optical output power to be adjusted at the optimal modulation bandwidth current point of the high-power chip without changing the epitaxial design, thereby adapting to the requirements of the optical module for the chip.

[0005] In a first aspect, the present invention provides a vertical cavity surface emitting laser for high-speed communication. The vertical cavity surface emitting laser for high-speed communication comprises:

[0006] An epitaxial wafer, the epitaxial wafer comprising: a substrate, an N-type Bragg reflector, an elongated resonant cavity, an active region formed in the elongated resonant cavity, and a P-type Bragg reflector, arranged in order from bottom to top;

[0007] an oxide layer formed on the active region in the elongated resonant cavity;

[0008] an electrically insulating region formed after ion implantation, the electrically insulating region being formed from top to bottom to below the active region in the elongated resonant cavity;

[0009] a dielectric layer formed on the epitaxial wafer; and

[0010] a P metal layer formed on the epitaxial wafer;

[0011] Wherein, the total thickness of the elongated resonant cavity is greater than or equal to 2 microns;

[0012] The P metal layer forms a metal ring in the light emitting area of ​​the vertical cavity surface emitting laser, and the inner diameter of the metal ring is D1; ​​the oxide layer includes an oxide hole, and the diameter of the oxide hole is D2, and D1<D2.

[0013] In one embodiment, D2*10%≤D1≤D2*90%. Preferably, D2*40%≤D1≤D2*70%.

[0014] In one embodiment, D2 is 6-12 microns, and D1 is smaller than D2 by 1 micron to 5 microns.

[0015] In one embodiment, the outer diameter of the electrically insulating region formed after the ion implantation is D3, and D2<D3.

[0016] In one embodiment, the active region is located at a position above 1 / 2 of the elongated resonant cavity.

[0017] In a second aspect, the present invention provides a method for preparing a vertical cavity surface emitting laser for high-speed communication, wherein the vertical cavity surface emitting laser for high-speed communication is used for high-speed communication. The method for preparing a vertical cavity surface emitting laser for high-speed communication comprises:

[0018] S1, forming an epitaxial wafer on a wafer, the epitaxial wafer comprising: a substrate, an N-type Bragg reflector, an extended resonant cavity, an active region formed in the extended resonant cavity, and a P-type Bragg reflector, arranged in order from bottom to top; wherein the total thickness of the extended resonant cavity is greater than or equal to 2 microns;

[0019] S2, after the growth of the epitaxial wafer is completed, a P metal layer is deposited, wherein the P metal layer includes a metal ring formed in the light emitting region of the vertical cavity surface emitting laser, and the inner diameter of the metal ring is D1;

[0020] S3, depositing a dielectric layer using a plasma enhanced chemical vapor deposition method, wherein the dielectric layer is used to protect the P metal layer and the epitaxial wafer;

[0021] S4, forming a deep pit by using an inductively coupled plasma-reactive ion etching method, wherein the deep pit exposes the sidewalls that need to be wet oxidized;

[0022] S5, forming an oxide layer by wet oxidation above the active region, wherein the oxide layer includes an oxide hole, and the diameter of the oxide hole is D2; in the extended resonant cavity, the epitaxial material above the active region is Al x Ga 1-xAs material, where x = 0.98 - 0.99, 6 microns ≤ D2 ≤ 12 microns;

[0023] S6, after using photoresist to protect the light-emitting region and part of the metal contact region, ion implantation is performed to form an electrically insulating region, and the electrically insulating region is formed from top to bottom in the epitaxial wafer to below the active region in the extended resonant cavity;

[0024] S7, fabricate the N metal layer and cleave to form multiple vertical cavity surface emitting lasers;

[0025] Among them, in S2, when depositing the P metal layer on the wafer, set different sizes of D1;

[0026] In S5, when performing wet oxidation on the wafer to form an oxide layer, set different sizes of D2;

[0027] And in multiple vertical cavity surface emitting lasers formed on the wafer, D1 < D2 is satisfied, so as to obtain vertical cavity surface emitting lasers with different light output powers in one-time chip flow.

[0028] In one embodiment, D1 is 1 to 5 microns smaller than D2. [[ID=二十]]

[0029] In one embodiment, in S6, the types and doses of the ion implantation include:

[0030] H+ ions with an implantation energy of 410 keV and a dose of 5E+13, H+ ions with an implantation energy of 360 keV and a dose of 4E+13, H+ ions with an implantation energy of 300 keV and a dose of 3.5E+14, H+ ions with an implantation energy of 230 keV and a dose of 3.5E+14, H+ ions with an implantation energy of 100 keV and a dose of 4E+14, and H+ ions with an implantation energy of 20 keV and a dose of 4E+14;

[0031] The outer diameter of the electrically insulating region formed after the ion implantation is D3, and D2 < D3.

[0032] In one embodiment, in S1, the steps of forming the epitaxial wafer include:

[0033] S11, grow an N-type Bragg reflector on the N-type substrate, which includes Al x Ga (1-x) As material, where in the high refractive index material, x = x1, and 0.05 < x1 < 0.2 is satisfied, in the low refractive index material, x = x2, and 0.8 < x2 < 0.95 is satisfied, and the thickness of each layer of Al x Ga (1-x) As material is one-fourth of the optical thickness;

[0034] S12. Form the extended resonant cavity on the surface of the N-type Bragg reflector. The extended resonant cavity includes a bulk AlGaAs material with a thickness of more than 2 microns.

[0035] S13. After the extended resonant cavity is formed to a thickness greater than 1 micron, deposit the active region. The active region is composed of multiple groups of strained quantum wells containing InGaAs and is used to generate the gain required for laser. The active region is formed at a position above the midpoint of the extended resonant cavity. After the deposition of the active region is completed, further deposit the remaining thickness of the extended resonant cavity.

[0036] S14. Form a P-type Bragg reflector above the extended resonant cavity to complete the growth of the epitaxial wafer. The P-type Bragg reflector includes an AlGaAs material with alternating growth of high refractive index materials and low refractive index materials. Among them, in the high refractive index material, y = y1 and 0.05 < y1 < 0.2, and in the low refractive index material, y = y2 and 0.8 < y2 < 0.9. The thickness of each layer of AlGaAs material is one-quarter of the optical thickness. y Ga (1-y) As material, where, in the high refractive index material, y = y1, and 0.05 < y1 < 0.2, in the low refractive index material, y = y2, and 0.8 < y2 < 0.9, and the thickness of each layer of AlGa y Ga (1-y) As material is one-quarter of the optical thickness.

[0037] In one embodiment, after forming the electrically insulating region in S6, the steps of S7 include:

[0038] S71. Further deposit a dielectric layer for protecting the sidewalls by plasma-enhanced chemical vapor deposition.

[0039] S72. Fabricate a polymer material layer, and after the fabrication of the polymer material layer is completed, further deposit a dielectric layer for protecting the surface and sidewalls by plasma-enhanced chemical vapor deposition. The polymer material layer is located below the P-metal layer.

[0040] S73. Perform P-side opening and front-side gold plating to form a gold electrode on top of the P-metal layer.

[0041] S74. Etch the N-side step, evaporate an alloy material to form a front-side N-metal layer, and after the fabrication of the front-side N-metal layer is completed, further deposit a dielectric layer for protecting the surface and sidewalls by plasma-enhanced chemical vapor deposition.

[0042] S75. Thin the surface of the substrate away from the N-type Bragg reflector, and further perform back-side alloy evaporation to form a back-side N-metal layer.

[0043] S76. Dice the wafer to form multiple vertical cavity surface emitting lasers with different output optical powers.

[0044] The present invention has at least the following advantages or beneficial effects:

[0045] 1. Due to mode competition in the resonant cavity of vertical-cavity surface-emitting lasers used for high-speed communications, the mode with the lowest loss becomes the dominant mode. The technical solution of this application utilizes an extended resonant cavity with a total thickness greater than or equal to 2 microns to increase the loss of higher-order modes, thereby making the fundamental mode dominant and improving single-mode characteristics.

[0046] 2. In the technical solution of this application, the inner diameter of the metal ring D1 is set to be less than the oxidation aperture D2, which can control the optical power output. Especially in the research and development stage, on the same wafer, a photomask with a series of different apertures can be used to produce metal ring inner diameters D1 of different sizes, from which the vertical cavity surface emitting laser with the most suitable optical power can be selected and applied to the corresponding high-speed communication module. By using the vertical cavity surface emitting laser for high-speed communication and the preparation method thereof provided by this application, it is possible to obtain vertical cavity surface emitting lasers with different optical output powers in a single wafer flow, without having to modify the epitaxial wafer structure layer or re-grow the epitaxial wafer, to achieve the effect of adjusting the optical power.

[0047] 3. Since VCSELs are current-driven, the current path and cavity structure jointly determine the number of modes that can exist. Generally, a current with a larger injection diameter will drive higher-order modes with larger mode areas. However, by precisely implanting an electrically insulating region from top to bottom, extending it below the active region in the extended cavity, the current injection diameter can be effectively limited, thereby reducing the excitation of higher-order modes.

[0048] As described above, the vertical cavity surface emitting laser for high-speed communication formed in the present application forms an oxidized aperture in the extended resonant cavity, and limits the inner diameter of the metal electrode and the gold-plated layer to be smaller than the oxidized aperture, so that without changing the epitaxial design, the light output power can be adjusted at the optimal modulation bandwidth current point of the high-power vertical cavity surface emitting laser, thereby adapting to the requirements of the high-speed communication optical module for the vertical cavity surface emitting laser. BRIEF DESCRIPTION OF THE DRAWINGS

[0049] In order to more clearly illustrate the specific embodiments of the present invention or the technical solutions in the prior art, the following briefly introduces the drawings required for use in the specific embodiments or the description of the prior art. Obviously, the drawings described below are some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.

[0050] Figure 1 A schematic structural diagram of a vertical cavity surface emitting laser for high-speed communication provided by an embodiment of the present invention;

[0051] Figure 2 A schematic diagram of the structure of an epitaxial wafer during the preparation process of a vertical cavity surface emitting laser for high-speed communication provided by an embodiment of the present invention;

[0052] Figure 3 A performance test comparison chart of a vertical cavity surface emitting laser for high-speed communication provided by an embodiment of the present invention and a device in the prior art;

[0053] Figure 4 This is a spectrum test effect diagram of the vertical cavity surface emitting laser for high-speed communication provided by an embodiment of the present invention.

[0054] Icon Description

[0055] Vertical Cavity Surface Emitting Laser 100:

[0056] Epitaxial wafer 110: substrate 10, N-type Bragg reflector 20, extended resonant cavity 30, active region 31, P-type Bragg reflector 40;

[0057] Oxide layer 50, electrical insulation region 60, dielectric layer 70, polymer material layer 80;

[0058] P metal layer 120 ; front N metal layer 131 ; back N metal layer 132 . DETAILED DESCRIPTION

[0059] To make the objectives, technical solutions, and advantages of the embodiments of the present invention more clear, the technical solutions of the embodiments of the present invention will be clearly and completely described below in conjunction with the accompanying drawings of the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Generally, the components of the embodiments of the present invention described and shown in the drawings herein can be arranged and designed in various different configurations.

[0060] Therefore, the following detailed description of the embodiments of the present invention provided in the accompanying drawings is not intended to limit the scope of the invention as claimed, but rather merely represents selected embodiments of the present invention. All other embodiments derived by persons of ordinary skill in the art based on the embodiments of the present invention without creative effort shall fall within the scope of protection of the present invention.

[0061] It should be noted that similar reference numerals and letters denote similar items in the following drawings, and therefore, once an item is defined in one drawing, it does not need to be further defined or explained in subsequent drawings.

[0062] See also Figure 1The present application provides a vertical cavity surface emitting laser 100 that can be used in an optical module for high-speed communication. The vertical cavity surface emitting laser 100 includes: an epitaxial wafer 110, an oxide layer 50, an electrical insulation region 60, a dielectric layer 70, a polymer material layer 80, a P metal layer 120, a front N metal layer 131, and a back N metal layer 132. Figure 2 The epitaxial wafer 110 includes, arranged from bottom to top, a substrate 10, an N-type Bragg reflector 20 (N-DBR), an extended resonant cavity 30, an active region 31, and a P-type Bragg reflector 40 (P-DBR).

[0063] Among them, the oxide layer 50 is formed on the active area 31 in the extended resonant cavity 30. The electrical insulation region 60 is formed by ion implantation. The electrical insulation region 60 is formed from top to bottom to below the active area 31 in the extended resonant cavity 30, which can effectively limit the injection diameter of the current, thereby reducing the excitation of high-order modes. In addition, the size of the electrical insulation region 60 will also affect the current injection of the vertical cavity surface emitting laser to a certain extent. The dielectric layer 70 is formed on the epitaxial wafer 110, for example, on the top surface of the P-type Bragg reflector 40, the side of part of the structural layer of the epitaxial wafer 110, and part of the surface of the substrate 10. The P metal layer 120 is formed on the epitaxial wafer 110, and the P metal layer 120 can further include: a p-type contact metal and a gold plating layer. The P metal layer 120 serves as the P electrode of the vertical cavity surface emitting laser.

[0064] The total thickness of the extended resonant cavity 30 is greater than or equal to 2 microns. A typical VCSEL device includes a resonant cavity that is one optical wavelength thick. The present invention utilizes an extended resonant cavity with a total thickness greater than or equal to 2 microns to increase the loss of higher-order modes, thereby making the fundamental mode dominant and further improving single-mode characteristics.

[0065] The P metal layer 120 forms a metal ring in the light-emitting area of ​​the vertical cavity surface emitting laser 100, and the inner diameter of the metal ring is D1; ​​the oxide layer 50 includes an oxide hole, and the diameter of the oxide hole is D2, and D1 is less than D2. In the technical solution of the present application, setting the metal ring inner diameter D1 less than the oxide aperture D2 can control the light power output, especially reduce the power, so that the vertical cavity surface emitting laser 100 has a smaller light cone. Especially in the research and development stage, on the same wafer, a photomask with a series of different apertures can be used to produce metal ring inner diameters D1 of different sizes, and the vertical cavity surface emitting laser 100 with the most suitable light power can be selected and applied to the corresponding high-speed communication module. By using the vertical cavity surface emitting laser 100 and its preparation method provided by the present application, vertical cavity surface emitting lasers with different light output powers can be obtained in a single tape-out, and the effect of adjusting the light power can be achieved without modifying the epitaxial wafer structure layer or regrowing the epitaxial wafer.

[0066] In the embodiment of the present application, 1. an epitaxial wafer includes an elongated resonant cavity with a total thickness greater than or equal to 2 microns. An oxide layer is formed above the active region of the elongated resonant cavity; 2. an electrically insulating region is formed by ion implantation, and the electrically insulating region is formed from top to bottom below the active region of the elongated resonant cavity; 3. a P-metal layer forms a metal ring in the light-emitting region of the vertical cavity surface emitting laser, and the inner diameter of the metal ring is D1; ​​and the diameter of the oxide hole in the oxide layer is D2, where D1 is less than D2. The combination of the above three methods makes the optical power of the vertical cavity surface emitting laser 100 controllable.

[0067] In one embodiment, D2*10% ≤ D1 ≤ D2*90% can be set. In another embodiment, D2*40% ≤ D1 ≤ D2*70% can be set. For example, the inner diameter D1 of the metal ring is 4 microns, and the diameter D2 of the oxidation pore is 7 microns; the inner diameter D1 of the metal ring is 5 microns, and the diameter D2 of the oxidation pore is 9 microns; or the inner diameter D1 of the metal ring is 6 microns, and the diameter D2 of the oxidation pore is 11 microns.

[0068] In one embodiment, D2 is 6-12 microns, and D1 is smaller than D2 by 1 micron to 5 microns.

[0069] In one embodiment, the outer diameter of the electrically insulating region 60 formed after ion implantation is D3, where D2 is less than D3. In this embodiment, the electrically insulating region 60 is formed from top to bottom to below the active region 31 in the extended resonant cavity 30. Furthermore, the outer diameter D3 of the electrically insulating region 60 is greater than the diameter D2 of the oxide pores, further limiting the current injection path and thereby reducing the excitation of higher-order modes.

[0070] In one embodiment, the active region 31 is located at a position above 1 / 2 of the lengthened resonant cavity 30 , which facilitates optical lasing.

[0071] Another aspect of the present application is a method for preparing a vertical cavity surface emitting laser 100, comprising:

[0072] S1. Form an epitaxial wafer 110 on a wafer. The epitaxial wafer 110 includes: a substrate 10, an N-type Bragg reflector 20, an extended resonant cavity 30, an active region 31 formed in the extended resonant cavity 30, and a P-type Bragg reflector 40, arranged in order from bottom to top; wherein the total thickness of the extended resonant cavity 30 is greater than or equal to 2 microns.

[0073] In this step, providing an extended resonant cavity with a total thickness greater than or equal to 2 microns can increase the loss of high-order modes, so that the fundamental mode becomes dominant, further improving the single-mode characteristics.

[0074] S2. After the epitaxial wafer 110 is grown, a P-metal layer 120 is deposited. The materials of the P-metal layer 120 may be Ti / Pt / Au. The P-metal layer 120 may further include a p-type contact metal and a gold-plated layer. The P-metal layer 120 in this step is a p-type contact metal. The P-metal layer 120 includes a metal ring formed in the light-emitting region of the vertical-cavity surface-emitting laser 100. The inner diameter of the metal ring is D1.

[0075] S3, using plasma enhanced chemical vapor deposition (PECVD) to deposit a dielectric layer 70, the dielectric layer 70 can be made of silicon nitride. The dielectric layer 70 is used to protect the P metal layer 120 and the epitaxial wafer 110.

[0076] S4, inductively coupled plasma-reactive ion etching (ICP-RIE etching) is used to form deep pits, which expose the sidewalls that need to be wet oxidized. The deep pits are used for wet oxidation in subsequent steps.

[0077] S5, in the wet oxidation furnace, high temperature water vapor is passed through the sidewall of the deep pit to perform wet oxidation: the oxide layer 50 is formed by wet oxidation above the active area 31. The oxide layer 50 includes oxide holes with a diameter of D2. In the extended resonant cavity 30, the epitaxial material above the active area 31 is Al x Ga 1-x As material, wherein x=0.98-0.99, 6 microns ≤ D2 ≤ 12 microns.

[0078] S6: After protecting the light-emitting area and part of the metal contact area with photoresist, ion implantation is performed to form an electrically insulating region 60. Electrically insulating region 60 is formed from top to bottom in epitaxial wafer 110 to below active region 31 in extended resonant cavity 30. The ion implanted area serves as electrically insulating region 60, providing a better current confinement region and helping to suppress higher-order modes.

[0079] S7 , forming an N metal layer and splitting the layer to form a plurality of vertical cavity surface emitting lasers 100 .

[0080] Among them, in S2, when depositing the P metal layer 120 on the wafer, D1 of different sizes is set; in S5, when performing wet oxidation on the wafer to form the oxide layer 50, D2 of different sizes is set; and D1<D2 is satisfied in the multiple vertical cavity surface emitting lasers 100 formed on the wafer, so as to achieve vertical cavity surface emitting lasers 100 with different light output powers in one wafer production.

[0081] The fabrication method of the VCSEL 100 in this embodiment also includes the following: 1. The epitaxial wafer includes an elongated resonant cavity with a total thickness greater than or equal to 2 microns. An oxide layer is formed above the active region of the elongated resonant cavity; 2. The electrically insulating region is formed by ion implantation, extending downward from the top to below the active region of the elongated resonant cavity; and 3. D1 < D2. These three technical features have the same technical effects as those of the VCSEL 100, and reference can be made to the relevant descriptions above. Furthermore, the fabrication method of the VCSEL 100 has a further significant advantage: multiple VCSELs 100 formed on a wafer can all satisfy the condition D1 < D2, and the degree to which the metal ring inner diameter D1 is less than the oxide hole diameter D2 varies for different VCSELs 100, enabling VCSELs 100 with different optical output powers to be produced in a single wafer. VCSELs 100 with different optical output powers can ultimately be selected for use in different high-speed communication optical modules.

[0082] In one embodiment, D1 is smaller than D2 by 1 to 5 microns. Specifically, the inner diameter of the p-type contact metal ring is smaller than the diameter of the oxide hole in the oxide layer 50 by 1 to 5 microns. These different designs can be implemented on the same set of masks, thereby achieving the desired results in a single tape-out.

[0083] In one embodiment, in S6, the type and dose of ion implantation include:

[0084] H+ ions with an implantation energy of 410 keV and a dose of 5E+13, H+ ions with an implantation energy of 360 keV and a dose of 4E+13, H+ ions with an implantation energy of 300 keV and a dose of 3.5E+14, H+ ions with an implantation energy of 230 keV and a dose of 3.5E+14, H+ ions with an implantation energy of 100 keV and a dose of 4E+14, and H+ ions with an implantation energy of 20 keV and a dose of 4E+14 are implanted. The outer diameter of the electrically insulating region 60 formed after the ion implantation is D3, where D2<D3.

[0085] In this embodiment, the use of ion implantation of a special type and dosage helps to form an electrical insulation region 60 with a depth extending below the active region in the extended resonant cavity and an outer diameter satisfying D2 < D3.

[0086] In one embodiment, in S1, the step of forming the epitaxial wafer 110 includes:

[0087] S11, growing an N-type Bragg reflector 20 on an N-type substrate 10, which includes an Al2O3 layer of a high refractive index material and a low refractive index material alternately grown. x Ga (1-x)As material. Among them, in the high refractive index material, x = x1, and 0.05 < x1 < 0.2 is satisfied. In the low refractive index material, x = x2, and 0.8 < x2 < 0.95 is satisfied. Each layer of Al x Ga (1-x) The thickness of the As material is one-fourth of the optical thickness.

[0088] S12, an extended resonant cavity 30 is formed on the surface of the N-type Bragg reflector 20. The extended resonant cavity 30 includes an Al GaAs bulk material of more than 2 microns. Among them, the Al GaAs bulk material does not have an Al GaAs material with high and low refractive index changes. The extended resonant cavity 30 is used to filter light of high-order modes. The extended resonant cavity 30 is beneficial to the formation of a single-mode device. The active region 31 is located in the upper-middle position of the extended resonant cavity 30. The thickness of the extended resonant cavity 30 above the active region 31 is thinner, and the thickness of the extended resonant cavity 30 below the active region 31 is thicker.

[0089] S13, after the extended resonant cavity 30 is formed to a thickness greater than 1 micron, the active region 31 is deposited. The active region 31 is composed of multiple groups of strained quantum wells containing InGaAs and is used to generate the gain required for laser. The active region 31 is formed at a position above the 1 / 2 of the extended resonant cavity 30. After the deposition of the active region 31 is completed, the remaining thickness of the extended resonant cavity 30 is further deposited.

[0090] S14, a P-type Bragg reflector 40 (P-DBR) is formed above the extended resonant cavity 30 to complete the growth of the epitaxial wafer 110. Among them, the P-type Bragg reflector 40 includes Al y Ga (1-y) As material with alternating growth of high refractive index material and low refractive index material. Among them, in the high refractive index material, y = y1, and 0.05 < y1 < 0.2 is satisfied. In the low refractive index material, y = y2, and 0.8 < y2 < 0.9 is satisfied. Each layer of Al y Ga (1-y) The thickness of the As material is one-fourth of the optical thickness.

[0091] In this embodiment, a method for preparing the epitaxial wafer 110 is provided. The epitaxial wafer 110 with good properties is more helpful for the formation of the vertical cavity surface emitting laser 100.

[0092] [[ID=2,7]]In one embodiment, after the electrical insulation region 60 is formed in S6, the steps of S7 include:

[0093] S71, further deposit a dielectric layer 70 for protecting the sidewalls by plasma enhanced chemical vapor deposition.

[0094] S72: Form a polymer material layer 80. After the polymer material layer 80 is formed, a dielectric layer 70 is further deposited using plasma-enhanced chemical vapor deposition to protect the surface and sidewalls. Polymer material layer 80 is located below P metal layer 120. Polymer material layer 80 is made of benzocyclobutene (BCB), which has a molecular formula of C8H8 and is a new type of reactive resin that can form both thermoplastic and thermosetting polymers. Polymer material layer 80 has a low dielectric constant and dielectric loss, which helps reduce device capacitance.

[0095] S73 , performing P-side opening and performing gold plating on the front side to form a gold electrode on the P metal layer 120 .

[0096] S74, etching the N-side steps, evaporating Ge / Au alloy material to form a front N metal layer 131, and after the front N metal layer 131 is completed, further depositing a dielectric layer 70 for protecting the surface and sidewalls by plasma enhanced chemical vapor deposition.

[0097] S75 , thinning the surface of the substrate 10 away from the N-type Bragg reflector 20 , and further performing back alloy evaporation to form a back N metal layer 132 .

[0098] S76, split the wafer to form a plurality of vertical cavity surface emitting lasers 100 with different output optical powers. All processes are completed at this point, forming Figure 1 A vertical cavity surface emitting laser 100 is shown.

[0099] In a specific embodiment, the performance of the VCSEL device in the prior art and the VCSEL device prepared by the technical solution of this application are tested. The results of the device performance test are compared. Figure 3 shown. Figure 3 The middle dotted line represents the existing VCSEL device without improvement, which has too high a power to be used directly in optical modules. Figure 3 The solid line in the middle shows a VCSEL device prepared using the technical solution in this application. The oxidation aperture D2 of the VCSEL device is 8 microns, the inner diameter D1 of the metal ring of the light-emitting hole is 5 microns, and its optical power under 6mA current limiting is 2.03mW, which meets the requirements of the existing optical module solution in high-speed communication.

[0100] In addition, in another embodiment, the spectrum of the VCSEL device prepared by the technical solution of this application is tested, and the test results are as follows: Figure 4 As shown, it can be seen that the VCSEL device prepared by adopting the technical solution in this application works in a single-mode state, and its single-mode suppression ratio is 37dB.

[0101] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit it. Although the present invention has been described in detail with reference to the above embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the above embodiments, or replace some or all of the technical features therein with equivalents. However, these modifications or replacements do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of the present invention.

Claims

1. A vertical cavity surface emitting laser for use in a high-speed communication optical module, comprising: An epitaxial wafer, the epitaxial wafer comprising: a substrate, an N-type Bragg reflector, an elongated resonant cavity, an active region formed in the elongated resonant cavity, and a P-type Bragg reflector, arranged in order from bottom to top; an oxide layer formed on the active region in the elongated resonant cavity; an electrically insulating region formed after ion implantation, the electrically insulating region being formed from top to bottom to below the active region in the elongated resonant cavity; a dielectric layer formed on the epitaxial wafer; and a P metal layer formed on the epitaxial wafer; It is characterized in that, wherein the total thickness of the elongated resonant cavity is greater than or equal to 2 microns, and the active region is located at a position above 1 / 2 of the elongated resonant cavity; The P metal layer forms a metal ring in the light emitting region of the vertical cavity surface emitting laser, and the inner diameter of the metal ring is D1; ​​the oxide layer includes an oxide hole, and the diameter of the oxide hole is D2, where D1 is less than D2; The outer diameter of the electrical insulation region formed after the ion implantation is D3, and D2 is less than D3.

2. The vertical cavity surface emitting laser according to claim 1, wherein: D2*10%≤D1≤D2*90%.

3. The vertical cavity surface emitting laser according to claim 1, wherein: D2 is 6-12 microns, and D1 is 1 to 5 microns smaller than D2.

4. A method for preparing a vertical cavity surface emitting laser, characterized in that: include: S1, forming an epitaxial wafer on a wafer, the epitaxial wafer comprising: a substrate, an N-type Bragg reflector, an extended resonant cavity, an active region formed in the extended resonant cavity, and a P-type Bragg reflector, arranged in order from bottom to top; wherein the total thickness of the extended resonant cavity is greater than or equal to 2 microns; and the active region is formed at a position greater than 1 / 2 of the length of the extended resonant cavity; S2, after the growth of the epitaxial wafer is completed, a P metal layer is deposited, wherein the P metal layer includes a metal ring formed in the light emitting region of the vertical cavity surface emitting laser, and the inner diameter of the metal ring is D1; S3, depositing a dielectric layer using a plasma enhanced chemical vapor deposition method, wherein the dielectric layer is used to protect the P metal layer and the epitaxial wafer; S4, forming a deep pit by using an inductively coupled plasma-reactive ion etching method, wherein the deep pit exposes the sidewalls that need to be wet oxidized; S5, forming an oxide layer by wet oxidation above the active region, wherein the oxide layer includes an oxide hole, and the diameter of the oxide hole is D2; in the extended resonant cavity, the epitaxial material above the active region is AlxGa1-xAs material, where x = 0.98 to 0.99, and 6 microns ≤ D2 ≤ 12 microns; S6, after protecting the light-emitting area and part of the metal contact area with a photoresist, performing ion implantation to form an electrical insulation region, wherein the electrical insulation region is formed from top to bottom in the epitaxial wafer to below the active region in the extended resonant cavity; the outer diameter of the electrical insulation region formed after the ion implantation is D3, where D2 is less than D3; S7, forming an N metal layer and splitting the slices to form a plurality of vertical cavity surface emitting lasers; Wherein, in S2, when depositing the P metal layer on the wafer, setting D1 of different sizes; In S5, when performing wet oxidation on the wafer to form an oxide layer, setting D2 of different sizes; And D1 < D2 is satisfied for each of the multiple vertical cavity surface emitting lasers formed on the wafer, so as to obtain vertical cavity surface emitting lasers with different light output powers in one-time chip fabrication.

5. The method for preparing a vertical cavity surface emitting laser according to claim 4, wherein: D1 is smaller than D2 by 1 to 5 microns.

6. The method for preparing a vertical cavity surface emitting laser according to claim 4, wherein: In S6, the types and doses of the ion implantation include: H+ ions with an implantation energy of 410 keV and a dose of 5E+13, H+ ions with an implantation energy of 360 keV and a dose of 4E+13, H+ ions with an implantation energy of 300 keV and a dose of 3.5E+14, H+ ions with an implantation energy of 230 keV and a dose of 3.5E+14, H+ ions with an implantation energy of 100 keV and a dose of 4E+14, and H+ ions with an implantation energy of 20 keV and a dose of 4E+14.

7. The method for preparing a vertical cavity surface emitting laser according to claim 4, wherein: In S1, the steps of forming the epitaxial wafer include: S11, growing an N-type Bragg reflector on the N-type substrate, which includes AlxGa(1-x)As materials with alternating growth of high refractive index materials and low refractive index materials. Among them, in the high refractive index material, x = x1, and 0.05 < x1 < 0.2 is satisfied; in the low refractive index material, x = x2, and 0.8 < x2 < 0.95 is satisfied. The thickness of each layer of AlxGa(1-x)As material is one-fourth of the optical thickness; S12, forming the extended resonant cavity on the surface of the N-type Bragg reflector, and the extended resonant cavity includes an AlGaAs bulk material of more than 2 microns; S13, after the extended resonant cavity is formed to a thickness greater than 1 micron, depositing the active region, which is composed of multiple groups of strained quantum wells containing InGaAs and is used to generate the gain required for laser; after the deposition of the active region is completed, further depositing the remaining thickness of the extended resonant cavity; S14, forming a P-type Bragg reflector above the extended resonant cavity to complete the growth of the epitaxial wafer; wherein the P-type Bragg reflector includes AlyGa(1-y)As materials with alternating growth of high refractive index materials and low refractive index materials. Among them, in the high refractive index material, y = y1, and 0.05 < y1 < 0.2 is satisfied; in the low refractive index material, y = y2, and 0.8 < y2 < 0.9 is satisfied. The thickness of each layer of AlyGa(1-y)As material is one-fourth of the optical thickness.

8. The method for preparing a vertical cavity surface emitting laser according to claim 4, wherein: After forming the electrically insulating region in S6, the steps of S7 include: S71, further depositing a dielectric layer for protecting the sidewalls by plasma enhanced chemical vapor deposition; S72, fabricating a polymer material layer, and after the fabrication of the polymer material layer is completed, further depositing a dielectric layer for protecting the surface and sidewalls by plasma enhanced chemical vapor deposition; the polymer material layer is located below the P metal layer; S73, performing P-side opening and front-side gold plating to form a gold electrode above the P metal layer; S74, etching the N-side step, evaporating an alloy material to form a front-side N metal layer, and after the fabrication of the front-side N metal layer is completed, further depositing a dielectric layer for protecting the surface and sidewalls by plasma enhanced chemical vapor deposition; S75, thinning the surface of the substrate away from the N-type Bragg reflector, and further performing back alloy evaporation to form a back N metal layer; S76 , splitting the wafer to form a plurality of vertical cavity surface emitting lasers with different output optical powers.

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