A NOR flash-based memory management method and system
By determining read/write space and data out-of-bounds conditions after NOR Flash power failure, and employing a loopback read/write method, the problem of dynamic data writing and read/write after power failure in NOR Flash with limited address space is solved, thus achieving storage space optimization and infinite loop read/write.
Patent Information
- Application Number
- CN202410495730.7
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2024-04-24
- Publication Date
- 2025-12-05
- Estimated Expiration
- 2044-04-24
AI Technical Summary
In existing technologies, NOR Flash requires optimization of read and write methods when dynamically writing data in a limited address space. It cannot continue reading and writing after power failure, and the block lifespan leads to uneven use of storage space.
After the NOR Flash is powered off and reset, it is determined whether the preset read and write space meets the operation requirements. If there is an out-of-bounds error, a loop read and write method is adopted, in which the data without out-of-bounds errors is read and written from the original address, and the out-of-bounds errors are read and written from the beginning of the space.
It enables continued reading and writing after power failure, optimizes storage space utilization, achieves infinite loop reading and writing, and ensures seamless power outage response.
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Figure CN118295602B_ABST
Abstract
Description
TECHNICAL FIELD
[0001] The present application relates to the technical field of data processing, in particular to a NOR Flash-based storage management method and system. BACKGROUND
[0002] The basic operation of NOR Flash is reading and writing to NOR Flash, supporting reading and writing in byte units, and erasing before writing, which is performed in sector or block units. The following situations may occur during use:
[0003] 1) If the space address of reading and writing is performed using sequential addresses, since the address space is limited and the data to be written is dynamically increasing, reading and writing in a limited space requires optimization of the reading and writing method;
[0004] 2) If reading and writing needs to continue at the next address after power-off reset of NOR Flash, since the device has no power-off prediction function, reading and writing cannot continue after power-off;
[0005] 3) Each block of NOR Flash is of finite lifetime, so instead of using fixed NOR Flash space addresses for read / write, the average used block needs to be optimized. Reusing space that has already been read for writing, continuing from the previous address for reading / writing after power down, and optimizing the average used SUMMARY
[0006] The technical problem to be solved by the present application is to provide a NOR Flash-based storage management method and system that can memory space Figure 1 .
[0007] To solve the above technical problems, the technical solution adopted by the present application is:
[0008] A NOR Flash-based storage management method, comprising the following steps:
[0009] S1, when receiving a read-write instruction after power-off reset of NOR Flash, obtaining a read-write address;
[0010] S2, determining whether the preset read-write space satisfies the read-write operation, if yes, determining whether the data length of reading and writing exists an out-of-bound condition, if yes, proceeding to step S3, if no, proceeding to step S4;
[0011] S3, directly reading and writing the part of the data of reading and writing corresponding to no out-of-bound from the read-write address obtained in step S1, and reading and writing the part corresponding to out-of-bound from the start position of the preset read-write space;
[0012] S4, directly reading and writing the data of reading and writing from the read-write address obtained in step S1.
[0013] Another technical solution adopted by the present application is:
[0014] A NOR Flash-based storage management system comprises a memory, a processor and a computer program stored on the memory and executable on the processor, and the processor implements the following steps when executing the computer program:
[0015] S1, when receiving a read-write instruction after the NOR FLASH is powered off and reset, obtaining a read-write address;
[0016] S2, judging whether the preset read-write space meets the read-write operation, if yes, judging whether the data length of the read-write operation is out of bounds, if yes, entering step S3, if no, entering step S4;
[0017] S3, directly reading and writing the part of the read-write data corresponding to no out-of-bound from the read-write address obtained in step S1, and reading and writing the part corresponding to the out-of-bound from the start position of the preset read-write space;
[0018] S4, directly reading and writing the read-write data from the read-write address obtained in step S1.
[0019] The present application has the advantages that:
[0020] The NOR Flash-based storage management method and system provided by the present application, when receiving a read-write instruction after the NOR FLASH is powered off and reset, first judges whether the preset read-write space meets the read-write operation, and in the case of meeting, judges whether the data length of the read-write operation is out of bounds, if yes, adopts a loop read-write mode, specifically, directly reading and writing the part of the read-write data corresponding to no out-of-bound from the read-write address obtained in step S1, and reading and writing the part corresponding to the out-of-bound from the start position of the preset read-write space, so as to realize continuous writing after power-off, achieve no feeling of power-off, and realize infinite loop read-write in limited space. BRIEF DESCRIPTION OF DRAWINGS
[0021] Figure 2 The step flow chart of the NOR Flash-based storage management method of the present application;
[0022] Figure 3 The structural block diagram of the NOR Flash-based storage management system of the present application;
[0023] Figure 1 The schematic diagram of four styles of the first embodiment of the present application;
[0024] REFERENCE NUMERALS:
[0025] 1, processor; 2, memory. DETAILED DESCRIPTION
[0026] In order to explain the technical content of the present application, the purposes and effects achieved, the following will be described in conjunction with the embodiments and the accompanying drawings.
[0027] Please refer to Figure 2 The present application provides a NOR Flash-based storage management method, comprising the following steps:
[0028] S1, when receiving a read-write instruction after the NOR FLASH is powered off and reset, obtaining a read-write address;
[0029] S2, judging whether the preset read-write space meets the read-write operation, if yes, judging whether the data length of the read-write operation exists an out-of-bound situation, if yes, entering step S3;
[0030] S3, directly reading and writing the part of the read-write data corresponding to no out-of-bound from the read-write address obtained in step S1, and reading and writing the part corresponding to the out-of-bound from the start position of the preset read-write space.
[0031] From the above description, the present application has the following beneficial effects: the NOR Flash-based storage management method provided by the present application, when receiving a read-write instruction after the NOR FLASH is powered off and reset, first judges whether the preset read-write space meets the read-write operation, and in the case of meeting, judges whether the data length of the read-write operation exists an out-of-bound situation, if yes, adopts a loop read-write mode, specifically, directly reading and writing the part of the read-write data corresponding to no out-of-bound from the read-write address obtained in step S1, and reading and writing the part corresponding to the out-of-bound from the start position of the preset read-write space, so as to realize continuous writing after power-off, achieve no feeling of power-off, and realize infinite loop read-write in limited space.
[0032] Further, step S1 specifically comprises:
[0033] S11, judging whether it is the first time to read and write the NOR FLASH, if yes, obtaining the read-write address from the mapped actual physical address, if no, entering step S12;
[0034] S12, judging whether it is the first time to read and write after power-off and reset, if no, obtaining the read-write address from the global cache, if yes, entering step S13;
[0035] S13, traversing and reading the LOG data protocol from the NOR FLASH;
[0036] S14, judging whether it is the last time of the LOG data protocol, if yes, obtaining the read-write address from the LOG data protocol, if no, returning to step S13.
[0037] From the above description, the read-write address is obtained according to different application situations.
[0038] Further, step S2 further comprises:
[0039] If the preset read-write space does not meet the read-write operation, preset error information is returned.
[0040] As can be seen from the above description, the preset error information is returned, which plays a prompting role.
[0041] Further, the judgment method for judging whether the read-write data length is out of bounds in step S2 is:
[0042] The first byte length is obtained by calculating the byte length between the read-write address obtained in step S1 and the end position of the preset read-write space.
[0043] It is judged whether the first byte length is greater than the read-write data length, if not, it is determined that the read-write data length is out of bounds, if yes, it is determined that the read-write data length is not out of bounds.
[0044] As can be seen from the above description, according to the above specific method, the judgment of whether it is out of bounds is realized.
[0045] Further, it further comprises:
[0046] If the read-write data length is not out of bounds, the read-write data is directly read and written from the read-write address obtained in step S1.
[0047] Referring to Figure 1 The application provides a storage management system based on NOR Flash, which comprises a memory, a processor and a computer program stored in the memory and capable of running on the processor, and the processor realizes the following steps when executing the computer program:
[0048] S1, when receiving a read-write instruction after the NOR FLASH is powered off and reset, a read-write address is obtained.
[0049] S2, it is judged whether a preset read-write space meets a read-write operation, if yes, it is judged whether a read-write data length is out of bounds, if yes, step S3 is entered.
[0050] S3, the read-write data corresponding to the part without bounds is directly read and written from the read-write address obtained in step S1, and the part corresponding to the bounds is read and written from the start position of the preset read-write space.
[0051] From the above description, the beneficial effects of the present application are that the NOR Flash-based storage management system provided by the present application, when receiving a read-write instruction after the power-off reset of the NOR FLASH, first judges whether the preset read-write space meets the read-write operation, and in the case of meeting, judges whether the read-write data length exists an out-of-bound situation, if exists, adopts a loop read-write mode, specifically, the corresponding part without out-of-bound in the read-write data is directly read and written from the read-write address obtained in step S1, and the corresponding part with out-of-bound is read and written from the start position of the preset read-write space, so that the power-off afterwriting can be continued, the power-off no feeling is achieved, and the infinite loop read-write in the limited space is achieved.
[0052] Further, the processor implements the following steps when executing the computer program:
[0053] S11, judging whether it is the first time to read and write the NOR FLASH, if yes, obtaining the read-write address from the mapped actual physical address, if no, entering step S12;
[0054] S12, judging whether it is the first time to read and write after the power-off reset, if no, obtaining the read-write address from the global cache, if yes, entering step S13;
[0055] S13, traversing and reading the LOG data protocol from the NOR FLASH;
[0056] S14, judging whether it is the last time of the LOG data protocol, if yes, obtaining the read-write address from the LOG data protocol, if no, returning to step S13.
[0057] From the above description, the read-write address is obtained according to different application conditions.
[0058] Further, the processor implements the following steps when executing the computer program:
[0059] If the preset read-write space does not meet the read-write operation, a preset error information is returned.
[0060] From the above description, the preset error information is returned, which plays a prompting role.
[0061] Further, the processor implements the following steps when executing the computer program:
[0062] The byte length between the read-write address obtained in step S1 and the end position of the preset read-write space is calculated to obtain a first byte length;
[0063] Judging whether the first byte length is greater than the read-write data length, if no, determining that the read-write data length exists an out-of-bound situation, if yes, determining that the read-write data length does not exist an out-of-bound situation.
[0064] From the above description, according to the above specific manner, the judgment of whether to cross the border is realized.
[0065] Further, the processor executes the computer program and further realizes the following steps:
[0066] If the data length of reading and writing does not exist the cross-border situation, the data of reading and writing is directly read and written from the read-write address obtained in step S1.
[0067] Please refer to Figure 3 and Figure 3 Embodiment one of the present application is:
[0068] The present application provides a NOR Flash-based storage management method, comprising the following steps:
[0069] S1, when receiving the read-write instruction after the NOR FLASH power reset, the read-write address is obtained;
[0070] The above step S1 is specifically:
[0071] S11, judge whether it is the first time to read and write the NOR FLASH, if yes, the read-write address is obtained from the mapped actual physical address; if not, step S12 is entered;
[0072] S12, judge whether it is the first time to read and write after power reset, if not, the read-write address is obtained from the global cache; if yes, step S13 is entered;
[0073] S13, LOG data protocol is read from the NOR FLASH;
[0074] In this embodiment, the structure of the LOG data protocol is used to support the reading and writing process. The whole structure is composed of four domains, specifically composed of start domain, control domain, data domain and end domain;
[0075] In the start domain, the synchronization information and the start information are contained, wherein the synchronization information is used to buffer data or fill space; the start information represents the start of the LOG data;
[0076] In the control domain, the device address information, the storage address information, the type information and the ID information are contained, wherein the device address information: used for the source device and the destination device of the data, the temporary value is null; the storage address information: used for storing the address to be read and written next time; the type information: represents the type of the data content in the data domain, the type includes: control type, data type, response type, the current fixed value is data type; the ID information: represents the serial number of the data frame to be written this time;
[0077] In the data field, data length and data content are contained; wherein the data length represents the data length to be written this time, and the data content represents the data information to be written this time;
[0078] In the end field, check information and stop information are contained; wherein the check information represents the check on the data, and the stop information represents the end of the whole protocol frame.
[0079] S14, judging whether it is the last time of the LOG data protocol, if yes, obtaining the read-write address from the LOG data protocol, if no, returning to step S13.
[0080] S2, judging whether the preset read-write space satisfies the read-write operation;
[0081] If the preset read-write space satisfies the read-write operation, judging whether the data length of the read-write exists the out-of-bound condition; if yes, entering step S3; if no, entering step S4;
[0082] The judging method of whether the data length of the read-write exists the out-of-bound condition in step S2 is as follows:
[0083] Calculating the byte length between the read-write address obtained in step S1 and the end position of the preset read-write space to obtain the first byte length; judging whether the first byte length is greater than the data length of the read-write, if no, judging that the data length of the read-write exists the out-of-bound condition, if yes, judging that the data length of the read-write does not exist the out-of-bound condition.
[0084] If the preset read-write space does not satisfy the read-write operation, returning the preset error information.
[0085] S3, reading and writing the part corresponding to no out-of-bound in the read-write data from the read-write address obtained in step S1, and reading and writing the part corresponding to the out-of-bound from the start position of the preset read-write space.
[0086] S4, if the data length of the read-write does not exist the out-of-bound condition, reading and writing the data of the read-write directly from the read-write address obtained in step S1.
[0087] In the embodiment, in the case that the space is enough for the read-write, when reading and writing the data, it is checked whether the end position of the space is reached, if yes, the read-write is continued from the start position of the space, and four elements are needed in the process: 1) data content; 2) data length; 3) read-write address; and 4) space length: divided into the length of the space that can be read and written and the length of the read-write address to the end position of the space.
[0088] Since the read-write mode of the loop is used, there are four styles of the recording of the NOR Flash, which are as follows: Figure 2The different patterns need to be processed to obtain the last LOG data before power failure in the case of power failure. Four patterns are analyzed, which can be uniformly processed as follows: 1) traversing the LOG data in the space, and comparing whether the ID number in the LOG is progressive; 2) if the LOG is not complete, it is either data loop formed by the initial address or read and write after the data loop, thereby covering the useless LOG data formed; 3) if it is data loop, the LOG data at the start and end of the space address is taken; and 4) if it is covered, the previous LOG data is taken.
[0089] Please refer to Embodiment two of the present application is:
[0090] The present application provides a NOR Flash-based storage management system, comprising a memory 2, a processor 1 and a computer program stored on the memory 2 and executable on the processor 1, wherein the processor 1 implements the following steps when executing the computer program:
[0091] S1, when receiving a read-write instruction after NOR FLASH power failure and reset, obtaining the read-write address;
[0092] S2, judging whether the preset read-write space meets the read-write operation, if yes, judging whether the data length of the read-write operation is out of bounds, if yes, entering step S3;
[0093] S3, directly reading and writing the part of the read-write data corresponding to no out-of-bound from the read-write address obtained in step S1, and reading and writing the part corresponding to the out-of-bound from the start position of the preset read-write space.
[0094] Further, the processor executes the computer program to implement the following steps:
[0095] S11, judging whether it is the first time to read and write NOR FLASH, if yes, obtaining the read-write address from the mapped actual physical address; if no, entering step S12;
[0096] S12, judging whether it is the first time to read and write after power failure and reset, if no, obtaining the read-write address from the global cache; if yes, entering step S13;
[0097] S13, traversing and reading the LOG data protocol from NOR FLASH;
[0098] S14, judging whether it is the last LOG data protocol, if yes, obtaining the read-write address from the LOG data protocol, if no, returning to step S13.
[0099] Further, the processor executes the computer program to implement the following steps:
[0100] If the preset read-write space does not meet the read-write operation, preset error information is returned.
[0101] Further, the processor implements the following steps when executing the computer program:
[0102] The first byte length is obtained by calculating the byte length between the read-write address obtained in step S1 and the end position of the preset read-write space.
[0103] It is determined whether the first byte length is greater than the data length of the read-write operation, if not, it is determined that the data length of the read-write operation has an out-of-bound condition, if yes, it is determined that the data length of the read-write operation does not have an out-of-bound condition.
[0104] Further, the processor implements the following steps when executing the computer program:
[0105] If the data length of the read-write operation does not have an out-of-bound condition, the read-write data is directly read and written from the read-write address obtained in step S1.
[0106] In summary, the storage management method and system based on NOR Flash provided by the present application, when receiving a read-write instruction after the power-off reset of NOR FLASH, first determines whether the preset read-write space meets the read-write operation, and in the case of meeting, determines whether the data length of the read-write operation has an out-of-bound condition, if yes, adopts a loop read-write mode, specifically, the part of the read-write data corresponding to no out-of-bound condition is directly read and written from the read-write address obtained in step S1, and the part corresponding to the out-of-bound condition is read and written from the start position of the preset read-write space, so that the continuation of writing after power-off is realized, the power-off is not felt, and the infinite loop read-write in the limited space is realized.
[0107] The above is only an embodiment of the present application, and does not limit the patent range of the present application, any equivalent transformation or direct or indirect application in related technical fields based on the content of the specification and drawings of the present application are also included in the patent protection range of the present application.
Claims
1. A NOR Flash-based memory management method, characterized by, The method comprises the following steps: S1, when receiving a read-write instruction after power-off reset of the NOR FLASH, obtaining a read-write address; S2, judging whether a preset read-write space meets a read-write operation, if yes, judging whether a data length of the read-write operation is out of bounds, if yes, entering step S3; S3, directly reading and writing the data corresponding to no out-of-bounds part from the read-write address obtained in step S1, and reading and writing the data corresponding to the out-of-bounds part from a start position of the preset read-write space; Step S1 specifically comprises: S11, judging whether it is the first time to read and write the NOR FLASH, if yes, obtaining the read-write address from a mapped actual physical address, if no, entering step S12; S12, judging whether it is the first time to read and write after power-off reset, if no, obtaining the read-write address from a global cache, if yes, entering step S13; S13, reading a LOG data protocol from the NOR FLASH; S14, judging whether it is the last LOG data protocol, if yes, obtaining the read-write address from the LOG data protocol, if no, returning to step S13.
2. The NOR Flash based memory management method of claim 1, wherein, Step S2 further comprises: If the preset read-write space does not meet the read-write operation, returning to a preset error information.
3. The NOR Flash based memory management method of claim 1, wherein, The judgment method for judging whether the data length of the read-write operation is out of bounds in step S2 comprises: calculating a byte length between the read-write address obtained in step S1 and an end position of the preset read-write space to obtain a first byte length; judging whether the first byte length is greater than the data length of the read-write operation, if no, determining that the data length of the read-write operation is out of bounds, if yes, determining that the data length of the read-write operation is not out of bounds.
4. The NOR Flash based memory management method of claim 1, wherein, Further comprising: If the data length of the read-write operation is not out of bounds, directly reading and writing the data from the read-write address obtained in step S1.
5. A NOR Flash based memory management system, characterized by, A computer program product, comprising a memory, a processor and a computer program stored in the memory and capable of running on the processor, wherein the processor implements the following steps when executing the computer program: S1, when receiving a read-write instruction after power-off reset of the NOR FLASH, obtaining a read-write address; S2, judging whether a preset read-write space meets a read-write operation, if yes, judging whether a data length of the read-write operation is out of bounds, if yes, entering step S3; S3, directly reading and writing the data corresponding to no out-of-bounds part from the read-write address obtained in step S1, and reading and writing the data corresponding to the out-of-bounds part from a start position of the preset read-write space; The processor specifically implements the following steps when executing the computer program: S11, judging whether it is the first time to read and write the NOR FLASH, if yes, obtaining the read-write address from a mapped actual physical address, if no, entering step S12; S12, judging whether it is the first time to read and write after power-off reset, if no, obtaining the read-write address from a global cache, if yes, entering step S13; S13, reading a LOG data protocol from the NOR FLASH; S14, judging whether it is the last LOG data protocol, if yes, obtaining the read-write address from the LOG data protocol, if no, returning to step S13.
6. The NOR Flash based memory management system of claim 5, wherein, The processor further implements the following steps when executing the computer program: If the preset read-write space does not meet the read-write operation, preset error information is returned.
7. The NOR Flash based memory management system of claim 5, wherein, The processor, when executing the computer program, implements the following steps: A first byte length is obtained by calculating the byte length between the read-write address obtained in step S1 and the end position of the preset read-write space. It is determined whether the first byte length is greater than the data length of the read-write operation. If not, it is determined that the data length of the read-write operation has a boundary crossing situation. If yes, it is determined that the data length of the read-write operation does not have a boundary crossing situation.
8. The NOR Flash based memory management system of claim 5, wherein, The processor, when executing the computer program, also implements the following steps: If the data length of the read-write operation does not have a boundary crossing situation, the data of the read-write operation is directly read and written from the read-write address obtained in step S1.
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