A message processing method, device and electronic equipment

Abstract

The application provides a message processing method and device and electronic equipment, and relates to the technical field of information processing. In the application, a first message queue corresponding to a first target processor is first determined, then when it is determined that a traffic demand value of the first message queue exceeds a traffic threshold of the first target processor, the first message queue is divided into a first processing message queue and a first remaining message queue, finally the first target processor is instructed to process the first processing message queue, and the first remaining message queue is sent to a second target processor. In this way, the message queue with a large amount of data can be effectively distributed to multiple target processors, and the processing rate of the message queue with a large amount of data is improved.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of information processing, and in particular to a message processing method and device and electronic equipment. BACKGROUND

[0002] With the increase of information in network equipment, people have higher requirements for the processing rate of information in network equipment. In order to improve the processing rate of information, a multi-core processor is usually used to process information in network equipment. Compared with the way of improving the performance of the processor by increasing the frequency of the single-core processor, and then improving the processing rate of information, the multi-core processor structure has lower requirements for the process and is easier to implement.

[0003] The multi-core processor includes a plurality of sub-processors. When the multi-core processor is applied to an information processing task, there may be an imbalance in the amount of data processed by each sub-processor. If the amount of data processed by each sub-processor is not balanced, one sub-processor in the multi-core processor may have a heavy processing task, while another sub-processor is not assigned a corresponding processing task, thereby causing waste of the performance of some sub-processors.

[0004] In the prior art, methods such as sequential balancing, fixed strategy hash balancing, and multi-strategy hash balancing are usually used to solve the problem of imbalance in the amount of data processed by each sub-processor. Taking fixed strategy hash balancing as an example, first, a five-tuple of a message queue is taken as a key, and the five-tuple is a set of five quantities: source IP address, source port, destination IP address, destination port, and transport layer protocol. Then, the sub-processor number corresponding to the key is calculated by a hash algorithm. Because the result of the hash algorithm is random, the message queue is finally randomly assigned to the sub-processor corresponding to the sub-processor number for processing.

[0005] As can be seen from the above method, although the hash algorithm can randomly assign a message queue to a sub-processor, when the data amount of the message queue is large, for example, the message queue flow is a giant flow, the processing performance of a processor is limited, and thus the sub-processor processing the message queue may not meet the corresponding processing performance requirements, thereby reducing the processing rate of the multi-core processor for the message queue with a large data amount. SUMMARY

[0006] The present application provides a message processing method, device and electronic equipment for improving the processing rate of a message queue with a large data amount. The specific technical solutions are as follows:

[0007] In a first aspect, the present application provides a message processing method, comprising:

[0008] determining a first message queue corresponding to the first target processor;

[0009] when it is determined that the traffic demand value of the first message queue exceeds the traffic threshold of the first target processor, dividing the first message queue into a first processed message queue and a first residual message queue, wherein a first traffic demand value of the first processed message queue is not greater than the traffic threshold;

[0010] indicating the first target processor to process the first processed message queue and send the first residual message queue to a second target processor.

[0011] Based on the above method, the message queue with large data volume can be effectively allocated to multiple target processors, and the processing rate of the processor for the message queue with large data volume is improved.

[0012] In a possible implementation, before the first message queue corresponding to the first target processor is determined, the method further includes:

[0013] receiving the multiple message queues;

[0014] parsing the multiple message queues to obtain respective queue numbers of the multiple message queues.

[0015] In a possible implementation, the determination of the first message queue corresponding to the first target processor includes:

[0016] determining at least one message queue corresponding to the processor number of the first target processor from the multiple message queues based on the queue numbers of the multiple message queues and a preset correspondence between queue numbers and processor numbers;

[0017] determining a message queue with the largest traffic in the at least one message queue as the first message queue. Optionally, the at least one message queue can be sorted according to traffic, and the message queue with the largest traffic is selected; or optionally, the traffic values of the at least one message queue can be compared with each other, and the message queue with the largest traffic value is selected.

[0018] Based on the above method, the first message queue with the largest traffic value corresponding to each target processor can be determined.

[0019] In a possible implementation, before the first residual message queue is sent to the second target processor, the method further includes:

[0020] obtaining traffic residual values of respective target processors;

[0021] selecting, based on the traffic residual values of the respective target processors, a target processor with the largest traffic residual value as the second target processor.

[0022] Based on the above method, the second target processor with the least idle processor can be determined, and the first remaining message queue is allocated to the second target processor, thereby improving the rate of message queue processing of the processor.

[0023] In a possible implementation, after the indication that the first target processor processes the first processing message queue and sends the first remaining message queue to the second target processor, the method further includes:

[0024] obtaining each message data packet corresponding to the first processing message queue and each remaining message data packet corresponding to the first remaining message queue;

[0025] merging the each message data packet according to a fixed data packet length to obtain at least one first message set, and adding a corresponding first sequence number sequence to the at least one first message set;

[0026] merging the each remaining message data packet according to a fixed data packet length to obtain at least one second message set, and adding a corresponding second sequence number sequence to the at least one second message set;

[0027] sorting the first processing message queue and the first remaining message queue according to the first sequence number sequence and the second sequence number sequence to obtain a target message queue, wherein the first sequence number sequence and the second sequence number sequence are independent of each other.

[0028] Based on the above method, the first processing message queue allocated to the first target processor and the first remaining message queue in the second target processor can be merged according to a fixed data packet length, and the messages in the first processing message queue and the first remaining message queue can be reordered according to the first sequence number sequence and the second sequence number sequence to obtain a corresponding target message queue, thereby improving the rate of message reordering.

[0029] In a second aspect, the present application provides a message processing device, comprising:

[0030] a distribution module configured to determine a first message queue corresponding to a first target processor;

[0031] a processing module configured to divide the first message queue into a first processing message queue and a first remaining message queue when a traffic demand value of the first message queue exceeds a traffic threshold of the first target processor, wherein a first traffic demand value of the first processing message queue is not greater than the traffic threshold;

[0032] indicate the first target processor to process the first processing packet queue and send the first residual packet queue to a second target processor.

[0033] In a possible implementation, the distribution module is specifically configured to:

[0034] determine at least one packet queue corresponding to the processor number of the first target processor from the plurality of packet queues based on queue numbers of the plurality of packet queues and a preset correspondence between queue numbers and processor numbers.

[0035] determine a queue with a maximum traffic value in the at least one packet queue as a first packet queue.

[0036] In a possible implementation, the processing module is further configured to:

[0037] obtain a traffic residual value of each target processor.

[0038] select a target processor with a maximum traffic residual value as a second target processor based on the traffic residual values of the target processors.

[0039] In a possible implementation, the processing module is further configured to:

[0040] obtain each packet data packet corresponding to the first processing packet queue and each residual packet data packet corresponding to the first residual packet queue.

[0041] merge the each packet data packet in blocks according to a fixed packet length to obtain at least one first packet set, and add a corresponding first sequence number sequence to the at least one first packet set.

[0042] merge the each residual packet data packet in blocks according to a fixed packet length to obtain at least one second packet set, and add a corresponding second sequence number to the at least one second packet set.

[0043] sort the first processing packet queue and the first residual packet queue according to the first sequence number sequence and the second sequence number sequence to obtain a target packet queue, where the first sequence number sequence and the second sequence number sequence are independent of each other.

[0044] In a third aspect, the present application provides an electronic device, comprising:

[0045] a memory configured to store a computer program;

[0046] a processor configured to execute the computer program stored in the memory to implement the steps of the packet processing method.

[0047] In a fourth aspect, the present application provides a computer readable storage medium, wherein the computer readable storage medium stores a computer program, and the computer program, when executed by a processor, implements the steps of the packet processing method.

[0048] The technical effects of each of the second to fourth aspects and each aspect that can be achieved are described above in relation to the first aspect or the various possible solutions in the first aspect, and will not be repeated here. BRIEF DESCRIPTION OF DRAWINGS

[0049] Figure 1 A flowchart of a packet processing method provided by the present application is shown in the following figure;

[0050] Figure 2 A schematic diagram of a packet processing system architecture provided by the present application is shown in the following figure;

[0051] Figure 3 A schematic diagram of a packet processing device structure provided by the present application is shown in the following figure;

[0052] Figure 4 A schematic diagram of an electronic device provided by the present application is shown in the following figure. DETAILED DESCRIPTION

[0053] In order to make the purpose, technical solutions and advantages of the present application clearer, the present application will be described in further detail below with reference to the accompanying drawings. The specific operation methods in the method embodiment can also be applied to the device embodiment or the system embodiment. It should be noted that in the description of the present application, "multiple" is understood as "at least two". The association relationship of the associated objects is described, which means that there can be three relationships, for example, A and / or B, which means that there are three cases: A exists alone, A and B exist together, and B exists alone. A and B are connected, which means that A and B are directly connected and A and B are connected through C. In addition, in the description of the present application, "first", "second", etc. are used only for the purpose of distinguishing the description, and cannot be understood as indicating or implying relative importance, nor can it be understood as indicating or implying order.

[0054] The embodiments of the present application will be described in detail below with reference to the accompanying drawings.

[0055] With the increase of the amount of information in the network device, people have put forward higher requirements for the processing rate of information in the network device. In order to improve the processing rate of information, a multi-core processor is usually used to process the information in the network device. Compared with the way of improving the performance of the processor by increasing the frequency of the single-core processor, and then improving the rate of information processing, the multi-core processor structure has lower requirements for the process and is easier to implement.

[0056] A plurality of sub-processors are included in a multi-core processor. When the multi-core processor is applied to an information processing task, there can be an imbalance in the amount of data processed by each sub-processor. If the amount of data processed by each sub-processor is not balanced, one sub-processor in the multi-core processor can be heavily loaded with tasks, while another sub-processor is not assigned corresponding processing tasks, thereby causing waste of the performance of some sub-processors, and the heavily loaded sub-processor affects service performance.

[0057] In the prior art, sequential balancing, fixed strategy hash balancing, multi-strategy hash balancing, and the like are generally used to solve the problem of imbalance in the amount of data processed by each sub-processor. Taking fixed strategy hash balancing as an example, first, a five-tuple of a packet queue is taken as a key, and the five-tuple is a set of five quantities: source IP address, source port, destination IP address, destination port, and transport layer protocol. Then, a sub-processor number corresponding to the key is calculated through a hash algorithm. Because the result of the hash algorithm is random, the packet queue is finally randomly assigned to the sub-processor corresponding to the sub-processor number for processing.

[0058] As can be seen from the above method, although the hash algorithm can randomly assign a packet queue to a sub-processor, when the data amount of the packet queue is large, for example, the packet queue flow is a giant flow, because the processing performance of a processor is limited, the sub-processor processing the packet queue can not meet the corresponding processing performance requirement, thereby reducing the processing rate of the multi-core processor for the packet queue with a large data amount.

[0059] In view of this, in order to improve the processing rate of the multi-core processor for the packet queue with a large data amount, the present application provides a packet processing method, specifically including: first determining a first packet queue corresponding to a first target processor, then when determining that a flow demand value of the first packet queue exceeds a flow threshold value of the first target processor, dividing the first packet queue into a first processing packet queue and a first remaining packet queue, and finally instructing the first target processor to process the first processing packet queue and sending the first remaining packet queue to a second target processor.

[0060] It can be seen that, by the above manner, the first message queue corresponding to the first target processor can be determined first, then whether to divide the first message queue is judged according to the traffic demand value of the first message queue and the traffic threshold of the first target processor, if the traffic demand value is greater than the traffic threshold, the first message queue is divided into the first processing message queue and the first residual message queue, finally the first target processor is instructed to process the first processing message queue, and the first residual message queue is sent to the second target processor, so that the message queue with large data amount can be effectively allocated to multiple target processors, and the processing rate of the message queue with large data amount is improved.

[0061] Referring to Figure 1 As shown in the flowchart of a message processing method provided by the embodiment of the present application, the method comprises:

[0062] S1, determining a first message queue corresponding to a first target processor.

[0063] Firstly, the method provided by the present application can be applied to Figure 2 As shown in the system architecture, the system architecture comprises a message management server, wherein the message management server comprises a processor mapping table, each traffic detector (traffic detector 1, traffic detector 2, traffic detector 3, traffic detector 4), each target processor (target processor 1, target processor 2, target processor 3, target processor 4), and a message rearrangement module. The message management server, each traffic detector, each target processor, and the message rearrangement module can be physically integrated in one device, or can be independently deployed on different devices.

[0064] For example, if the message management server, each traffic detector, each target processor, and the message rearrangement module are integrated in one device, the device can be applied to a large data amount data processing task, the data processing task of each target processor is regulated by the message management server in the device, and the data processing rate is improved. Each traffic detector can be deployed in each target processor, and can also be deployed in the message management server as a message queue traffic detection module.

[0065] The number of the above devices is not limited in the embodiment of the present application, for example Figure 2 As shown, only the message management server, each traffic detector, each target processor, and the message rearrangement module are taken as examples for description, and the above devices and their respective functions are briefly introduced as follows.

[0066] The message management server is configured to receive a plurality of message queues and distribute the received plurality of message queues to target processors corresponding to the queue numbers of the plurality of message queues according to a processor mapping table. The processor mapping table stores the correspondence between the plurality of message queue numbers and the target processor numbers corresponding to the plurality of message queue numbers, and the message management server can modify the processor mapping table in real time.

[0067] The flow detector is configured to detect the flow of the message queue sent by the message management server to the corresponding target processor. When the flow of the message queue exceeds the flow threshold of the target processor, the flow detector sends a forwarding request to the message management server, and the message management server sends the remaining messages in the message queue to a target processor with more free resources. Each target processor is configured to process the message queue. The message rearrangement module is configured to reorder the message queue processed by the target processor and output a target message queue. When the message queue is reordered, only the message queue whose flow demand value exceeds the flow threshold of the target processor is reordered.

[0068] In the embodiment of the present application, first, the message management server receives a plurality of message queues, which can be obtained directly through a plurality of network ports provided in the system. For example, the message queue 0 corresponds to the port 0, and the message queue 1 corresponds to the port 1.

[0069] Then, the received plurality of message queues are parsed to obtain the respective queue numbers of the plurality of message queues. For example, the queue number xx0 corresponds to the message queue 0, and the queue number xx1 corresponds to the message queue 1.

[0070] After obtaining the respective queue numbers of the plurality of message queues, the correspondence between the message queue numbers and the target processor numbers needs to be established, and then the plurality of message queues are sent to the target processors corresponding to the respective queue numbers of the plurality of message queues. The correspondence between the message queue numbers and the target processor numbers is established, that is, a processor mapping table is established. The processor mapping table is established and modified in real time according to the flow ranking of the message queue in the target processor. In order to improve the balance of the data amount of the message queue between the processors, when the message queue is first distributed (initialization of the system), the plurality of message queues can be randomly distributed to the respective target processors according to a random distribution rule. For example, the processor number corresponding to the message queue number is calculated by a hash algorithm. The processor mapping table can be as shown in Table 1:

[0071] Message queue number Processor number xx0, xx3, xx10, xx13 xx1 xx1, xx2, xx5 xx2 xx6, xx7, xx9, xx3 xx8, xx11, xx12 xx4

[0072] Table 1

[0073] From Table 1, the multiple message queues can be distributed to the corresponding target processors according to the respective queue numbers and the preset correspondence between the queue numbers and the processor numbers, to obtain at least one first message queue corresponding to the processor number of the first target processor and at least one second message queue corresponding to the second target processor. The number of message queues that can be processed by one target processor is not specifically limited in the present application, and will not be described here.

[0074] In order to determine whether there is a giant flow in the message queue sent to each target processor, it is necessary to detect the flow of the respective received message queue before each target processor receives the message queue. For at least one message queue corresponding to the processor number of the first target processor, the flow of at least one message queue corresponding to the processor number of the first target processor is counted, and the counting result can be shown in Table 2 as follows:

[0075]

[0076] Table 2

[0077] From Table 2, it can be seen that the flow demand value in the message queue xx3 is the largest. The flow demand value represents the amount of message data that needs to be processed within a set time range. Here, it is assumed that the data length of each message is the same, i.e., the data amount of each message is the same. Then, the message number 100 corresponds to a certain message data amount, and then the respective flow demand values of each message queue in Table 2 are arranged to obtain the sorting result of message queue xx3, message queue xx13, message queue xx10, message queue xx0, and finally determine the message queue xx3 with the largest flow demand value as the first message queue. Alternatively, the flow values of each message queue in Table 2 can also be compared two by two, and the maximum value is taken. For example, message queue xx0 and message queue xx3 are compared, and the maximum value is taken as message queue xx3; message queue xx3 and message queue xx10 are compared, and the maximum value is taken as message queue xx3; message queue xx3 and message queue xx13 are compared, and the maximum value is taken as message queue xx3, and finally the message queue xx3 with the largest flow demand is determined as the first message queue.

[0078] In the above manner, the message queue with the largest flow demand value in each target processor can be determined. S2, when the flow demand value of the first message queue exceeds the flow threshold of the first target processor, the first message queue is divided into a first processing message queue and a first remaining message queue.

[0079] The packet management server determines that the packet queue xx3 is the first packet queue, and the flow detector can determine whether the flow demand value of the first packet queue exceeds the flow threshold of the first target processor. As shown in Table 2, the flow of the queue with the largest number of packets in the first target processor can be used as the flow demand value, the flow demand value of the first packet queue is 100, and the flow threshold of the first target processor is related to the performance of the processor. When the processor resource usage rate reaches 90%, the processing flow corresponding to the processor at this time can be set as the flow threshold.

[0080] For example, if the flow threshold of the first target processor is 25, it means that the first target processor can process a maximum of 25 packets corresponding to the data amount per nanosecond, and thus it can be known that the processing performance of the first target processor cannot meet the corresponding processing demand.

[0081] In the above manner, it can be determined whether the flow demand value of the first packet queue exceeds the flow threshold of the first target processor, and then it can be determined whether the first target processor can process the first packet queue within a set time.

[0082] In the embodiment of the present application, when it is determined that the flow threshold of the first target processor is 25, because the flow demand value of the first packet queue is 100, in order to improve the speed of processing the first packet queue by the target processor, the flow detector can send a forwarding request to the packet management server, and the packet management server divides the first packet queue into a first processing packet queue and a first remaining packet queue.

[0083] For example, the first packet group in the first packet queue, of which the total flow of the first half of the packets is less than or equal to the flow threshold 25, can be divided into the first packet queue, and the second packet group in the first packet queue, of which the total flow of the second half of the packets exceeds the flow threshold 25, can be divided into the first remaining packet queue. The divided first packet queue and first remaining packet queue can be as shown in Table 3:

[0084]

[0085] Table 3

[0086] In the above manner, the first processing packet queue can be divided into the first processing packet queue and the first remaining packet queue.

[0087] S3, instructing the first target processor to process the first processing packet queue and sending the first remaining packet queue to the second target processor.

[0088] In the embodiment of the present application, after the first processing packet queue is divided into the first processing packet queue and the first residual packet queue, as shown in Table 3, first, the packet management server instructs the first target processor to process the first processing packet queue, then, the respective queue flow demand values corresponding to each target processor are queried, as shown in Table 4, the respective queue flows corresponding to each packet queue in the processor 2.

[0089]

[0090]

[0091] Table 4

[0092] As shown in Table 4, the maximum flow demand value of the processor 2 is 5, assuming that the flow threshold value of the processor 2 is also 25, then the residual flow value in the processor 2 can be calculated by the maximum flow demand value and the flow threshold value of the processor 2, which is 20, as described above, the respective residual flow values corresponding to each target processor can be calculated by obtaining the respective queue flow demand values and the flow threshold values corresponding to each target processor, finally, the target processor with the largest residual flow value is selected from each target processor as the second target processor, for example, the target processors include the processor 1, the processor 2 and the processor 3, the residual flow value of the processor 1 is 0, the residual flow value of the processor 2 is 20, and the residual flow value of the processor 3 is 10, then it can be determined that the processor 2 is the second target processor, and the first residual packet queue is allocated to the processor 2.

[0093] The packet management server can allocate the first residual packet queue to the second target processor by establishing a mapping relationship between the queue number of the first residual packet queue and the second target processor number, that is, establishing or modifying the corresponding relationship between the queue number and the target processor number in the processor mapping table, the packet management server will update the processor mapping table in real time according to the flow ranking of the packet queue in each flow detector, and allocate the first residual packet queue to the second target processor according to the updated processor mapping table.

[0094] In the above manner, the first residual packet queue that cannot be processed in time by the first processor can be allocated to the second target processor which is relatively idle, thereby improving the speed of processing the first packet queue by the target processor.

[0095] Since the first packet queue is divided into the first processing packet queue and the first residual packet queue, and the first processing packet queue and the first residual packet queue are allocated to different target processors for processing, the problem of packet disorder of the first packet queue may occur, in order to obtain the target packet queue corresponding to the first packet queue.

[0096] For example, the first target processor processes the first message queue, and after the first residual message queue is sent to the second target processor for processing, the message management server first acquires each message data packet corresponding to the first processed message queue and each residual message data packet corresponding to the first residual message queue. For example, the message data packets are message data packet 1, message data packet 2, …, and message data packet 10000; and the residual message data packets are message data packet 10001, message data packet 10002, …, and message data packet 100000.

[0097] In the embodiment of the present application, each message data packet corresponds to a determined serial number. If each message data packet corresponding to the first message queue is directly sorted according to the serial number, a large amount of system resource time of the target processor will be consumed because of the large number of message data packets. Therefore, each message data packet can be combined according to a fixed packet length to obtain at least one first message set, that is, at least one message block, and the first message set is set with a corresponding first serial number sequence. For example, each first message data packet is combined according to a 4 KB message block, so that message data packet 1, message data packet 2, …, and message data packet 4096 are determined as a first message block, the first serial number sequence of the first message block is 1, and finally a second message block, a third message block, …, and the like can be obtained, and each message block is added with a corresponding first serial number sequence. The second message block includes message data packet 4097, message data packet 4098, …, and message data packet 8192, and the first serial number sequence of the second message block is 2. As can be seen, the above method can reduce the serial number of the data packet, and facilitate the quick rearrangement of the data packet processed by the first target processor and the second target processor. Similarly, each residual message data packet is combined according to a 4 KB message block, and at least one second message set, that is, at least one residual message block, can also be obtained. Message data packet 10001, message data packet 10002, …, and message data packet 104096 are determined as a first residual message block, and finally a second residual message block, a third residual message block, …, and the like can be obtained, and each residual message block is added with a corresponding second serial number sequence.

[0098] Subsequently, the message rearrangement module receives each message block output by the first target processor after processing and each residual message block output by the second target processor after processing, sorts the first processed message queue and the first residual message queue according to the first serial number sequence of each message block and the second serial number sequence of each residual message block, and obtains a target message queue.

[0099] In summary, the packet processing method provided in the application can perform real-time flow monitoring on the first packet queue input into the target processor, and determine whether to divide the first packet according to the flow requirement value of the first packet queue and the flow threshold of each target processor, and evenly distribute the first packet queue to each target processor.

[0100] For a giant flow, the giant flow can be first distributed to any target processor, which processes part of the packets in the giant flow, i.e., a first processing packet queue, according to the respective set flow threshold, and then distributes the remaining packets in the giant flow to a target processor that is relatively idle (with the largest flow residual value) for processing. After the respective packet queues are processed by each target processor, the packet data packets in the packet queue are merged according to a fixed packet length to obtain a corresponding packet block, and finally the packets are rearranged according to the sequence of the packet block sequence number, which can reduce the workload of reordering the packet data packets and improve the efficiency of sorting the packet data packets. Moreover, the packet queue with a large amount of data can be effectively distributed to multiple target processors, thereby improving the processing rate of the packet queue with a large amount of data.

[0101] Based on the method provided in the above embodiments, the embodiments of the application further provide a packet processing device, as shown in Figure 3 The structure of the packet processing device in the embodiments of the application is shown in the figure, and the device comprises:

[0102] The distribution module 301 is configured to determine a first packet queue corresponding to the first target processor;

[0103] The processing module 302 is configured to divide the first packet queue into a first processing packet queue and a first remaining packet queue when it is determined that the flow requirement value of the first packet queue exceeds the flow threshold of the first target processor, wherein the first flow requirement value of the first processing packet queue is not greater than the flow threshold.

[0104] The processing module 302 is configured to divide the first packet queue into a first processing packet queue and a first remaining packet queue when it is determined that the flow requirement value of the first packet queue exceeds the flow threshold of the first target processor, wherein the first flow requirement value of the first processing packet queue is not greater than the flow threshold.

[0105] In a possible implementation, the distribution module 301 is specifically configured to:

[0106] Determine at least one packet queue corresponding to the processor number of the first target processor from the plurality of packet queues based on the queue numbers of the plurality of packet queues and the preset correspondence between the queue numbers and the processor numbers.

[0107] Determine the queue with the largest flow value in the at least one packet queue as the first packet queue.

[0108] In one possible implementation, the processing module 302 is further configured to:

[0109] Obtain the remaining bandwidth value for each target processor;

[0110] Based on the remaining traffic value of each target processor, the target processor with the largest remaining traffic value is selected as the second target processor.

[0111] In one possible implementation, the processing module 302 is further configured to:

[0112] Obtain each packet data corresponding to the first processed packet queue and each remaining packet data corresponding to the first remaining packet queue;

[0113] The individual message data packets are divided into blocks according to a fixed data packet length and merged to obtain at least one first message set, and a corresponding first sequence number sequence is added to the at least one first message set;

[0114] The remaining message data packets are divided into blocks according to a fixed data packet length and merged to obtain at least one second message set, and a corresponding second sequence number is added to the at least one second message set;

[0115] The first processed message queue and the first remaining message queue are sorted according to the first sequence number sequence and the second sequence number sequence to obtain the target message queue, wherein the first sequence number sequence and the second sequence number sequence are independent of each other.

[0116] Based on the same inventive concept, this application also provides an electronic device that can implement the functions of the aforementioned message processing method. (Refer to...) Figure 4 The electronic device includes:

[0117] At least one processor 401 and a memory 402 connected to at least one processor 401. In this embodiment, the specific connection medium between the processor 401 and the memory 402 is not limited. Figure 4 The example shown is the connection between processor 401 and memory 402 via bus 400. Bus 400 is... Figure 4 The connections between other components are indicated by thick lines and are for illustrative purposes only, not as limiting information. The 400 bus can be divided into address bus, data bus, control bus, etc., for ease of representation. Figure 4 The term is represented by a single thick line, but this does not imply that there is only one bus or one type of bus. Alternatively, processor 401 can also be called a controller; there is no restriction on the name.

[0118] In the embodiments of the present application, the memory 402 stores instructions executable by the at least one processor 401, and the at least one processor 401 can execute the packet processing method discussed above by executing the instructions stored in the memory 402. The processor 401 can implement Figure 3 the functions of various modules of the apparatus shown.

[0119] The processor 401 is the control center of the apparatus, and can connect all parts of the apparatus through various interfaces and lines. The apparatus performs various functions and processes data by running or executing the instructions stored in the memory 402 and calling the data stored in the memory 402, thereby monitoring the apparatus as a whole.

[0120] In a possible implementation, the processor 401 can include one or more processing units, and the processor 401 can integrate an application processor and a modem processor. The application processor mainly processes the operating system, user interface, and application programs, and the modem processor mainly processes wireless communication. It can be understood that the modem processor can also not be integrated into the processor 401. In some embodiments, the processor 401 and the memory 402 can be implemented on the same chip, and in some embodiments, they can also be implemented on separate chips respectively.

[0121] The processor 401 can be a general-purpose processor, such as a central processing unit (CPU), a digital signal processor, an application-specific integrated circuit, a field programmable gate array, or other programmable logic device, a discrete gate or transistor logic device, a discrete hardware component, and can implement or execute the methods, steps, and logic block diagrams disclosed in the embodiments of the present application. The general-purpose processor can be a microprocessor or any conventional processor. The steps of the packet processing method disclosed in the embodiments of the present application can be directly embodied as execution completed by a hardware processor, or executed by a combination of hardware and software modules in the processor.

[0122] The memory 402, as a non-volatile computer readable storage medium, can be used to store non-volatile software programs, non-volatile computer executable programs and modules. The memory 402 can include at least one type of storage medium, for example, can include flash memory, hard disk, multimedia card, card type memory, random access memory (RAM), static random access memory (SRAM), programmable read-only memory (PROM), read-only memory (ROM), electrically erasable programmable read-only memory (EEPROM), magnetic storage, magnetic disk, optical disk, etc. The memory 402 is any other medium capable of carrying or storing desired program code in the form of instructions or data structures and capable of being accessed by a computer, but is not limited to this. The memory 402 in the embodiments of the present application can also be a circuit or any other device capable of realizing a storage function, used to store program instructions and / or data.

[0123] By designing and programming the processor 401, the code corresponding to the packet processing method introduced in the foregoing embodiments can be fixed in the chip, so that the chip can execute the steps of the packet processing method of the embodiments shown in the running time. Figure 1 How to design and program the processor 401 is a technology known to those skilled in the art, which will not be described here.

[0124] Based on the same inventive concept, the embodiments of the present application also provide a storage medium storing computer instructions, when the computer instructions run on a computer, the computer instructions make the computer execute the packet processing method discussed above.

[0125] In some possible implementation manners, various aspects of the packet processing method provided by the present application can also be implemented in the form of a program product, which includes program codes, when the program product runs on the device, the program codes are used to make the control device execute the steps in the packet processing method according to various exemplary embodiments of the present application described above in the specification.

[0126] Those skilled in the art will appreciate that embodiments of the application can be devised for a method, a system, or a computer program product. Accordingly, the present application can be embodied in the form of an entirely hardware embodiment, an entirely software embodiment, or an embodiment combining software and hardware aspects. Furthermore, the present application can take the form of a computer program product on one or more computer-usable storage media (including, but not limited to, disk storage, CD-ROMs, optical storage devices, and the like) embodying computer readable program code.

[0127] The present application is described in reference to the flowchart illustrations and / or block diagrams of methods, apparatus (systems) and computer program products according to embodiments of the application. It will be understood that each block of the flowchart illustrations and / or block diagrams, and combinations of blocks in the flowchart illustrations and / or block diagrams, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general purpose computer, special purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, create means for implementing the functions specified in the flowchart illustrations and / or block diagrams. Figure 1 one or more functions specified in the flowchart illustrations and / or block diagrams. Figure 1 one or more functions specified in the flowchart illustrations and / or block diagrams.

[0128] These computer program instructions can also be stored in a computer- readable memory that can direct a computer or other programmable data processing apparatus to function in a particular manner, such that the instructions stored in the computer-readable memory produce an article of manufacture including instructions which implement the functions specified in the flowchart illustrations and / or block diagrams. Figure 1 one or more functions specified in the flowchart illustrations and / or block diagrams. Figure 1 one or more functions specified in the flowchart illustrations and / or block diagrams.

[0129] These computer program instructions can also be loaded onto a computer or other programmable data processing apparatus to cause a series of operational steps to be performed on the computer or other programmable apparatus to produce a computer-implemented process such that the instructions which execute on the computer or other programmable apparatus provide steps for implementing the functions specified in the flowchart illustrations and / or block diagrams. Figure 1 one or more functions specified in the flowchart illustrations and / or block diagrams. Figure 1 one or more functions specified in the flowchart illustrations and / or block diagrams.

[0130] Obviously, numerous modifications and variations of the present application are possible in light of the above teachings. It is therefore to be understood that within the scope of the appended claims and their equivalents, the application can be practiced otherwise than as specifically described.

Claims

1. A message processing method, characterized in that, include: Determine the first message queue corresponding to the first target processor; When it is determined that the traffic demand value of the first message queue exceeds the traffic threshold of the first target processor, the first message queue is divided into a first processing message queue and a first remaining message queue, wherein the first traffic demand value of the first processing message queue is not greater than the traffic threshold. The first target processor is instructed to process the first processing message queue and send the first remaining message queue to the second target processor.

2. The method as described in claim 1, characterized in that, The determination of the first message queue corresponding to the first target processor includes: Based on the queue numbers of multiple message queues and the preset correspondence between queue numbers and processor numbers, at least one message queue corresponding to the processor number of the first target processor is determined from the multiple message queues. The queue with the largest traffic value among the at least one message queue is designated as the first message queue.

3. The method as described in claim 1, characterized in that, Before sending the first remaining message queue to the second target processor, the method further includes: Obtain the remaining bandwidth value for each target processor; Based on the remaining traffic value of each target processor, the target processor with the largest remaining traffic value is selected as the second target processor.

4. The method as described in claim 1, characterized in that, After instructing the first target processor to process the first processing message queue and sending the first remaining message queue to the second target processor, the method further includes: Obtain each packet data corresponding to the first processed packet queue and each remaining packet data corresponding to the first remaining packet queue; The individual message data packets are divided into blocks according to a fixed data packet length and merged to obtain at least one first message set, and a corresponding first sequence number sequence is added to the at least one first message set; The remaining message data packets are divided into blocks according to a fixed data packet length and merged to obtain at least one second message set, and a corresponding second sequence number is added to the at least one second message set; The first processed message queue and the first remaining message queue are sorted according to the first sequence number sequence and the second sequence number sequence to obtain the target message queue, wherein the first sequence number sequence and the second sequence number sequence are independent of each other.

5. A message processing apparatus, characterized in that, include: The distribution module is used to determine the first message queue corresponding to the first target processor; The processing module is configured to divide the first message queue into a first processing message queue and a first remaining message queue when it is determined that the traffic demand value of the first message queue exceeds the traffic threshold of the first target processor, wherein the first traffic demand value of the first processing message queue is not greater than the traffic threshold. The first target processor is instructed to process the first processing message queue and send the first remaining message queue to the second target processor.

6. The apparatus as claimed in claim 5, characterized in that, The distribution module is specifically used for: Based on the queue numbers of multiple message queues and the preset correspondence between queue numbers and processor numbers, at least one message queue corresponding to the processor number of the first target processor is determined from the multiple message queues. The queue with the largest traffic value among the at least one message queue is designated as the first message queue.

7. The apparatus as claimed in claim 5, characterized in that, The processing module is also used for: Obtain the remaining bandwidth value for each target processor; Based on the remaining traffic value of each target processor, the target processor with the largest remaining traffic value is selected as the second target processor.

8. The apparatus as claimed in claim 5, characterized in that, The processing module is also used for: Obtain each packet data corresponding to the first processed packet queue and each remaining packet data corresponding to the first remaining packet queue; The individual message data packets are divided into blocks according to a fixed data packet length and merged to obtain at least one first message set, and a corresponding first sequence number sequence is added to the at least one first message set; The remaining message data packets are divided into blocks according to a fixed data packet length and merged to obtain at least one second message set, and a corresponding second sequence number is added to the at least one second message set; The first processed message queue and the first remaining message queue are sorted according to the first sequence number sequence and the second sequence number sequence to obtain the target message queue, wherein the first sequence number sequence and the second sequence number sequence are independent of each other.

9. An electronic device, characterized in that, include: Memory, used to store computer programs; A processor, when executing a computer program stored in the memory, implements the method steps of any one of claims 1-4.

10. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores a computer program that, when executed by a processor, implements the steps of the method described in any one of claims 1-4.

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