A parallel-gate light-emitting tube device structure controlled by a gate

Abstract

The present invention discloses a gate-regulated parallel-gate light-emitting tube device structure, which relates to the field of optoelectronic displays and includes: a parallel-structure light-emitting unit, a gate insulating layer, and a gate regulating electrode; the parallel-structure light-emitting unit sequentially includes: a light-emitting material layer, a hole transport layer, an electron transport layer, a first electrode, and a second electrode; the gate regulating electrode is disposed on the back side of the light-emitting material layer opposite to the hole transport layer and the electron transport layer, and the gate insulating layer is disposed between the light-emitting material layer and the gate regulating electrode; when the device is operating, the first electrode and the second electrode apply a first power supply, the first power supply being used to power the parallel-structure light-emitting unit to emit light, and the gate regulating electrode applies a bias power supply relative to the first electrode or the second electrode, the bias power supply being used to construct an electric field to regulate the mobility of carriers within the parallel-structure light-emitting unit and thereby adjust the light-emitting brightness or light-emitting efficiency of the light-emitting unit. The present invention achieves improved light-emitting efficiency or light-emitting brightness through gate regulation.

Description

Technical Field

[0001] The present invention relates to the field of optoelectronic display, and in particular to a parallel-grid light-emitting tube device structure controlled by a grid. Background Art

[0002] As a luminescent material, quantum dots have the advantages of narrow half-width, high color purity, extremely high quantum yield, and full spectrum tunability. Therefore, quantum dot light-emitting diodes (QLEDs) are very likely to become the leader in the field of new display devices.

[0003] However, the luminous efficiency or brightness of QLED devices is greatly affected by the carrier recombination process, and different functional layers and quantum dots are usually required to achieve the optimal device efficiency. This experimental process consumes a lot of time, materials and labor costs. In addition, OLED devices also have corresponding problems. Summary of the Invention

[0004] In view of the shortcomings of the prior art, the technical problem to be solved by the present invention is to provide a gate-regulated parallel-gate light-emitting tube device structure, aiming to achieve an improvement in luminous efficiency or luminous brightness through gate regulation.

[0005] To achieve the above object, the present invention provides a gate-controlled parallel-gate light-emitting tube device structure, the device structure comprising: a parallel-structure light-emitting unit, a gate insulating layer, and a gate control electrode;

[0006] The parallel structure light-emitting unit includes, in sequence: a light-emitting material layer, a hole transport layer and an electron transport layer disposed on the same side of the light-emitting material layer and opposite to each other, a first electrode disposed on the hole transport layer, and a second electrode disposed on the electron transport layer;

[0007] The gate control electrode is arranged on the back side of the light-emitting material layer opposite to the hole transport layer and the electron transport layer, and the gate insulating layer is arranged between the light-emitting material layer and the gate control electrode;

[0008] When the device is working, a first power supply is applied to the first electrode and the second electrode, and the first power supply is used to power the parallel structure light-emitting unit to emit light. The gate control electrode applies a bias power supply relative to the first electrode or the second electrode, and the bias power supply is used to construct an electric field to regulate the mobility of carriers in the parallel structure light-emitting unit and adjust the luminous brightness or luminous efficiency of the light-emitting unit.

[0009] In a specific embodiment, the light-emitting material of the light-emitting material layer is a quantum dot light-emitting material or an organic light-emitting material; when the light-emitting material of the light-emitting material layer is an organic light-emitting material, the light-emitting unit further includes: a hole injection layer and an electron injection layer; the hole injection layer is located between the first electrode and the hole transport layer, and the electron injection layer is located between the second electrode and the electron transport layer.

[0010] In a specific embodiment, the gate control electrode and the second electrode are loaded with the bias power supply and form a control electric field, and the majority carriers of the parallel structure light-emitting unit are electronic carriers;

[0011] The applied potential of the gate control electrode is configured as follows:

[0012] The gate control electrode applies an adaptive negative potential relative to the second electrode according to the actual device to reduce the electronic carriers injected by the second electrode into the quantum dot light-emitting layer, so as to improve the luminous efficiency of the parallel structure light-emitting unit;

[0013] Or the gate control electrode applies an adaptive forward potential relative to the second electrode according to the actual device to increase the electronic carriers injected by the second electrode into the quantum dot light-emitting layer, so as to improve the luminous brightness of the parallel structure light-emitting unit.

[0014] In a specific embodiment, the gate control electrode and the first electrode are loaded with the bias power supply to form a control electric field, and the majority carriers of the parallel structure light-emitting unit are hole-type carriers;

[0015] The applied potential of the gate control electrode is configured as follows:

[0016] The gate control electrode applies an adapted forward potential relative to the first electrode according to the actual device to reduce the hole-type carriers injected by the first electrode into the quantum dot light-emitting layer, thereby improving the luminous efficiency of the parallel structure light-emitting unit;

[0017] Or the gate control electrode applies an adaptive negative potential relative to the first electrode according to the actual device to increase the hole-type carriers injected by the first electrode into the quantum dot light-emitting layer, so as to improve the luminous brightness of the parallel structure light-emitting unit.

[0018] In a specific embodiment, the gate control electrode and the second electrode are loaded with the bias power supply and form a control electric field, and the majority carriers of the parallel structure light-emitting unit are hole-type carriers;

[0019] The applied potential of the gate control electrode is configured as follows:

[0020] The gate control electrode applies an adaptive forward potential relative to the second electrode according to the actual device to increase the electronic carriers injected by the second electrode into the quantum dot light-emitting layer, so as to improve the luminous efficiency and brightness of the QLED light-emitting unit.

[0021] In a specific embodiment, the gate control electrode and the first electrode are loaded with the bias power supply to form a control electric field, and the majority carriers of the parallel structure light-emitting unit are electronic carriers;

[0022] The applied potential of the gate control electrode is configured as follows:

[0023] The gate control electrode applies an adaptive negative potential relative to the first electrode according to the actual device to increase the hole-type carriers injected by the first electrode into the quantum dot light-emitting layer, thereby improving the luminous efficiency and brightness of the parallel structure light-emitting unit.

[0024] In a specific embodiment, the potential of the first electrode corresponding to the hole transport layer is higher than the potential of the second electrode corresponding to the electron transport layer.

[0025] In a specific embodiment, the bias power supply is an adjustable voltage power supply, and the bias power supply is adjusted according to the luminous brightness or the luminous efficiency requirement.

[0026] In a specific embodiment, a current limiting resistor is further connected in series between the gate control electrode and the bias power supply loop.

[0027] In a specific embodiment, the gate control electrode is arranged on the light-emitting side of the device structure.

[0028] Optionally, the gate control electrode is a transparent conductive electrode or a hollow metal electrode; for example, when a metal electrode is used, a narrow-edge design can be adopted to increase the light output window rate, or a hollow structure, a grid metal structure, etc. can be adopted; typical transparent conductive electrodes can be made of ITO, AZO, graphene, etc.

[0029] Beneficial effects of the present invention: The present invention can construct a built-in electric field in the light-emitting device through gate regulation, thereby achieving regulation of the luminous efficiency or luminous brightness, which helps to improve the luminous efficiency or luminous brightness. BRIEF DESCRIPTION OF THE DRAWINGS

[0030] Figure 1 This is a schematic diagram of a parallel-gate light-emitting diode device structure in which the majority carriers are electrons and the gate is controlled based on quantum dot luminescence in a specific embodiment of the present invention;

[0031] Figure 2This is a schematic diagram of a parallel-gate light-emitting diode device structure in which the majority carriers are holes and the gate is controlled based on quantum dot luminescence in a specific embodiment of the present invention;

[0032] Figure 3 This is a schematic diagram of a parallel-gate light-emitting diode device structure in which the majority carriers are holes and the gate is controlled based on quantum dot luminescence in another specific embodiment of the present invention;

[0033] Figure 4 This is a schematic diagram of a parallel-gate light-emitting diode device structure in which the majority carriers are electrons and the gate is controlled based on quantum dot luminescence in another specific embodiment of the present invention;

[0034] Figure 5 This is a schematic diagram of a parallel-gate light-emitting diode device structure based on OLED gate regulation in a specific embodiment of the present invention, in which the majority carriers are electrons;

[0035] Figure 6 It is a schematic diagram of a parallel-gate light-emitting tube device structure based on OLED gate regulation in a specific embodiment of the present invention, in which the majority carriers are holes. DETAILED DESCRIPTION

[0036] The following describes in detail embodiments of the present invention, examples of which are shown in the accompanying drawings, wherein the same or similar reference numerals throughout represent the same or similar elements or elements having the same or similar functions. The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain the present invention, and should not be construed as limiting the present invention.

[0037] In the description of this patent, it should be understood that the terms "center", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inside", "outside", etc., indicating the orientation or position relationship, are based on the orientation or position relationship shown in the accompanying drawings. They are only for the convenience of describing this patent and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation. Therefore, they should not be understood as limitations on this patent.

[0038] In the description of this patent, it should be noted that, unless otherwise expressly specified or limited, the terms "installed," "connected," "connected," and "set" should be understood in a broad sense. For example, they can refer to fixed connection or set, detachable connection or set, or integral connection or set. Those skilled in the art will understand the specific meanings of the above terms in this patent based on the specific circumstances.

[0039] The embodiment of the present invention provides a parallel gate light emitting tube device structure controlled by a gate, such as Figures 1-6In the present invention, a gate control electrode is provided on one side of the parallel structure light-emitting unit, and a built-in electric field is created when a potential is applied. This reduces the injection of majority carriers and prevents excess recombination of majority carriers, which would otherwise cause a decrease in luminous efficiency. Furthermore, an opposite potential can be applied to the gate control electrode to create a built-in electric field, thereby increasing the injection of majority carriers and improving device brightness.

[0040] In addition, due to the applicability of the position setting of the gate control electrode, increasing the minority carriers through the gate control electrode can also increase the recombination rate, and improve the device brightness and device luminous efficiency.

[0041] Example 1

[0042] like Figures 1-6 As shown, in a first embodiment of the present invention, a gate-controlled parallel-gate light-emitting tube device structure is provided, comprising: a parallel-structure light-emitting unit, a gate insulating layer, and a gate control electrode;

[0043] The parallel structure light-emitting unit includes, in sequence: a light-emitting material layer, a hole transport layer and an electron transport layer disposed on the same side of the light-emitting material layer and opposite to each other, a first electrode disposed on the hole transport layer, and a second electrode disposed on the electron transport layer;

[0044] The gate control electrode is arranged on the back side of the light-emitting material layer opposite to the hole transport layer and the electron transport layer, and the gate insulating layer is arranged between the light-emitting material layer and the gate control electrode;

[0045] When the device is working, a first power supply is applied to the first electrode and the second electrode, and the first power supply is used to power the parallel structure light-emitting unit to emit light. The gate control electrode applies a bias power supply relative to the first electrode or the second electrode, and the bias power supply is used to construct an electric field to regulate the mobility of carriers in the parallel structure light-emitting unit and adjust the luminous brightness or luminous efficiency of the light-emitting unit.

[0046] The luminescent material layer can be selected according to actual conditions. The present invention does not limit the specific material of the luminescent material layer. Typically, quantum dot luminescent materials, OLED organic luminescent materials, and luminescent materials with PN junction composites can all be used as the luminescent material layer of the present invention. It is worth mentioning that the luminescent material of the luminescent material layer is a quantum dot luminescent material or an organic luminescent material; when the luminescent material of the luminescent material layer is an organic luminescent material, the luminescent unit further includes: a hole injection layer and an electron injection layer; the hole injection layer is located between the first electrode and the hole transport layer, and the electron injection layer is located between the second electrode and the electron transport layer. For example, Figure 1 As shown, the luminescent material of the luminescent material layer is a quantum dot luminescent material; Figure 5 、 Figure 6 As shown, the light-emitting material of the light-emitting material layer is an organic light-emitting material.

[0047] The patent of this invention mainly protects the structure. The structure of this invention achieved by adopting other processes based on the structure of this invention also falls within the protection scope of this invention.

[0048] Example 2

[0049] like Figure 1 As shown, based on Example 1, in a second embodiment of the present invention, the gate control electrode and the second electrode are loaded with the bias power supply and form a control electric field, and the majority carriers of the parallel structure light-emitting unit are electronic carriers;

[0050] The applied potential of the gate control electrode is configured as follows:

[0051] The gate control electrode applies an adaptive negative potential relative to the second electrode according to the actual device to reduce the electronic carriers injected by the second electrode into the quantum dot light-emitting layer, so as to improve the luminous efficiency of the parallel structure light-emitting unit;

[0052] Or the gate control electrode applies an adaptive forward potential relative to the second electrode according to the actual device to increase the electronic carriers injected by the second electrode into the quantum dot light-emitting layer, so as to improve the luminous brightness of the parallel structure light-emitting unit.

[0053] Supplementary instructions for preparation and testing

[0054] The preparation process is only a supplementary explanation and cannot limit the scope of protection of the invention patent. Device structures that are the same or similar to those of this application should all be within the scope of protection of the invention patent.

[0055] Illustratively, the manufacturing process corresponding to the device structure of the first embodiment can refer to the following steps:

[0056] Step S11: Parallel structure light-emitting unit

[0057] Step S111: Prepare a glass substrate. The size of the customized glass substrate is 3 cm×3 cm×0.11 cm.

[0058] Step S112, cleaning the glass substrate. The glass substrate customized in step S111 is cleaned. The specific steps are as follows: ultrasonic treatment in surfactant, deionized water, acetone and isopropyl alcohol for 30 minutes each, for a total of 2 hours. The thoroughly cleaned glass substrate is blown dry with a nitrogen gun. The cleaned and dried glass substrate is surface activated to allow better infiltration and coating of the quantum dot light-emitting layer. The activation method includes ultraviolet activation, ozone activation or heating. The preferred activation method in this embodiment is to place it in a UV box and bake it for 10 minutes.

[0059] Step S113: Spin coating to prepare an electron-rich quantum dot layer. The quantum dots form a uniform film with a thickness of approximately 30 nanometers. This embodiment uses a spin coating followed by annealing at 75°C for 10 minutes. The coating material is a 20 mg / ml n-octane dispersion.

[0060] Step S114: Prepare a hole transport layer of polyethylene dioxythiophene-polystyrene sulfonate (PEDOT:PSS). PEDOT:PSS is a uniform film with a thickness of about 25 nm. The coating method used in this embodiment is inkjet printing, and the raw material is a 1.5% aqueous solution.

[0061] Step S115: Prepare a hole transport layer and electron blocking layer of poly[(9,9-dioctylfluorene-2,7-diyl)-co-(4,4′-(N-(4-sec-butylphenyl)diphenylamine)] (TFB). The TFB layer is a uniform film with a thickness of approximately 15 nm. In this embodiment, the coating method selected is inkjet printing, and the raw material is a chlorobenzene solution with a concentration of 8 mg / ml.

[0062] Step S116: Prepare an electron transport layer of magnesium zinc oxide (Zn1-xMgxO). The Zn1-xMgxO layer is a uniform film with a thickness of about 90 nanometers. The coating method used in this embodiment is inkjet printing, and the raw material is a 25 mg / ml ethanol solution.

[0063] Step S117: Prepare the first and second electrodes. Place the glass substrate processed through steps S112 through S116 into a vacuum evaporator. Using a custom mask, deposit gold and silver electrodes onto the surface of the hole transport layer and electron transport layer, respectively. The electrodes are approximately 100 nanometers thick.

[0064] Step S12: preparing an insulating layer

[0065] The material of the insulating layer includes but is not limited to aluminum oxide or P(VDF-TrFE), etc. In this embodiment, aluminum oxide film is preferably used as the insulating layer.

[0066] In this embodiment, aluminum oxide is used as the insulating layer. The parallel QLEDs prepared in step S11 are placed in an atomic layer deposition system. Atomic layer deposition is used to deposit aluminum oxide as the insulating layer onto the surface of the parallel QLEDs prepared in step S117. The thickness of the aluminum oxide layer is approximately 200 nanometers.

[0067] In the embodiment where P(VDF-TrFE) is used as the insulating layer, the following method can be used: P(VDF-TrFE) powder is dissolved in DMF at a concentration of 100 mg / ml and applied to the parallel QLED surface using a spin coating process. The spin coating speed is 1000 rpm / min for 30 seconds, and the annealing temperature is selected at 90 degrees Celsius for 1-3 hours.

[0068] Step S13: preparing a control gate control electrode.

[0069] A silver electrode is evaporated onto the other side of the glass substrate using a custom mask. The electrode thickness is approximately 100 nanometers.

[0070] Step S14: Build a test circuit

[0071] The test circuit is used to obtain the startup voltage of the double-ended parallel structure QLED and verify the insulation of the insulating layer to ensure the accuracy of the third electrode regulation.

[0072] Step S141: Obtain the startup voltage (V turn-on The first electrode and the second electrode of the parallel structure QLED device prepared through S11 to S13 are connected through a DC circuit, and the startup voltage of the double-terminal parallel structure QLED is determined by a semiconductor device testing system, and the unregulated luminous efficiency is obtained at the same time.

[0073] Step S142: Verify the insulating properties of the glass substrate. Connect the first electrode or the second electrode of the parallel-structure QLED device prepared through S11 to S13 to the gate control electrode via a DC circuit, and use a semiconductor test system to confirm that the glass substrate's performance as an insulating layer is intact.

[0074] Step S15: Build a control circuit

[0075] The three-terminal parallel structure QLED device prepared through S11 to S13 and tested and verified through S14 is placed in the control circuit.

[0076] The primary carrier type of the device is electrons. The first and second electrodes are connected to a DC circuit, with the first electrode at a positive potential and the second electrode grounded. The second electrode and the gate control electrode are connected to an adjustable DC circuit, with a protective resistor connected in series. By adjusting the voltage of the gate control electrode, the parallel QLED is regulated to achieve maximum luminous efficiency or increase luminous brightness. Applying a negative voltage to the gate control electrode relative to the second electrode increases the device's luminous efficiency; applying a positive voltage to the gate control electrode relative to the second electrode increases the device's luminous brightness.

[0077] Step S16: test.

[0078] It is worth mentioning that due to the differences in device parameters such as structure and process conditions, the appropriate gate voltage for the relevant EQE (external quantum luminescence efficiency) is also different, and in the low-brightness area, the majority carriers and minority carriers are not active. At this time, the gate voltage is deliberately used to reduce the injection of majority carriers in the low-brightness area, or the luminous efficiency is reduced. Therefore, in actual applications, reasonable application scenarios and reasonable gate voltages can be set according to the specific device conditions to suppress majority carriers and improve luminous efficiency through gate voltage. In addition, the reduction in luminous efficiency caused by low-brightness areas can also be improved by using a lower gate voltage to match the power supply voltage in the low-brightness area.

[0079] The principle behind this embodiment is that the majority carriers in this device are electrons. When a positive gate voltage is applied to the gate control electrode on the electron transport layer side, a built-in electric field is generated, which reduces electron injection from the electron transport layer into the quantum dot light-emitting layer. This, in turn, minimizes hole injection from the hole transport layer, thus preventing excess electrons from not recombine and causing a decrease in luminous efficiency. Conversely, the built-in electric field created by applying a negative gate voltage enhances electron carrier injection, increases the recombination rate, and thus improves brightness.

[0080] Example 3

[0081] like Figure 2 As shown, based on Example 1, in a third embodiment of the present invention, the gate control electrode and the first electrode are loaded with the bias power supply and form a control electric field, and the majority carriers of the parallel structure light-emitting unit are hole carriers;

[0082] The applied potential of the gate control electrode is configured as follows:

[0083] The gate control electrode applies an adapted forward potential relative to the first electrode according to the actual device to reduce the hole-type carriers injected by the first electrode into the quantum dot light-emitting layer, thereby improving the luminous efficiency of the parallel structure light-emitting unit;

[0084] Or the gate control electrode applies an adaptive negative potential relative to the first electrode according to the actual device to increase the hole-type carriers injected by the first electrode into the quantum dot light-emitting layer, so as to improve the luminous brightness of the parallel structure light-emitting unit.

[0085] In terms of the preparation process, the third embodiment can adjust the process of the second embodiment with reference to the actual structure. At the same time, it should be noted that since the majority carriers of the parallel structure light-emitting unit of this embodiment are hole-type carriers, step S115 in the second embodiment needs to be modified to prepare a hole-rich quantum dot layer. In addition, the driving voltage in this embodiment also needs to be adaptively adjusted. Moreover, the patent of this invention mainly protects the structure of the invention. Using other processes to realize the structure of the invention based on the structure of the invention also falls within the scope of protection of the invention.

[0086] The principle behind this embodiment is that the majority carriers in this device are holes. The gate control electrode is positioned on the hole transport layer side. When a negative gate voltage is applied, a built-in electric field is generated, reducing hole injection from the hole transport layer into the quantum dot light-emitting layer. This has a minimal impact on electron injection from the electron transport layer, preventing excess holes from not recombine and causing a decrease in luminous efficiency. Conversely, the built-in electric field generated by a positive gate voltage enhances hole carrier injection, speeding up recombination and boosting brightness.

[0087] Example 4

[0088] like Figure 3 As shown, based on Example 1, in a fourth embodiment of the present invention, the gate control electrode and the second electrode are loaded with the bias power supply and form a control electric field, and the majority carriers of the parallel structure light-emitting unit are hole carriers;

[0089] The applied potential of the gate control electrode is configured as follows:

[0090] The gate control electrode applies an adaptive forward potential relative to the second electrode according to the actual device to increase the electronic carriers injected by the second electrode into the quantum dot light-emitting layer, so as to improve the luminous efficiency and brightness of the QLED light-emitting unit.

[0091] The principle of this embodiment is that the majority carriers of this device are holes, and when the gate control electrode applies a negative gate voltage on the electron transport layer side, a built-in electric field is formed, which increases the injection of electrons from the electron transport layer to the quantum dot light-emitting layer, while the hole injection of the hole transport layer has a smaller effect, thereby increasing the total amount of minority carrier electrons and increasing the luminous brightness while increasing the recombination rate (improving the luminous efficiency).

[0092] Example 5

[0093] like Figure 4As shown, based on Example 1, in a fifth embodiment of the present invention, the gate control electrode and the first electrode are loaded with the bias power supply and form a control electric field, and the majority carriers of the parallel structure light-emitting unit are electronic carriers;

[0094] The applied potential of the gate control electrode is configured as follows:

[0095] The gate control electrode applies an adaptive negative potential relative to the first electrode according to the actual device to increase the hole-type carriers injected by the first electrode into the quantum dot light-emitting layer, thereby improving the luminous efficiency and brightness of the parallel structure light-emitting unit.

[0096] The principle of this embodiment is that the majority carriers of this device are electrons, and when the gate control electrode applies a positive gate voltage on the hole transport layer side, a built-in electric field is formed, which increases the injection of holes from the hole transport layer to the quantum dot light-emitting layer, while the electron injection of the electron transport layer has a smaller effect, thereby increasing the total amount of minority carrier holes, and increasing the luminous brightness while increasing the recombination rate (improving the luminous efficiency).

[0097] In addition, it is worth mentioning that in the above five embodiments, due to the characteristics of quantum dots and QLEDs themselves, the potential of the first electrode corresponding to the hole transport layer is higher than the potential of the second electrode corresponding to the electron transport layer, so as to encourage electrons and holes to recombine and emit light in the light-emitting material layer.

[0098] Furthermore, the bias power supply is an adjustable voltage power supply, and the bias power supply is adjusted according to the luminous brightness or the luminous efficiency requirements. In addition, a current limiting resistor is connected in series between the gate control electrode and the bias power supply circuit.

[0099] It is worth mentioning that the gate control electrode can be arranged on the light-emitting side or the backlight side of the device structure. Typically, the gate control electrode is arranged on the backlight side of the device structure to reduce the loss of light transmittance caused by the gate control electrode, thereby improving the brightness of the light. In addition, in practice, the light emission angle can also be perpendicular to the radial direction of the first electrode, the second electrode, and the gate control electrode. The present invention does not actually limit the light emission direction of the device.

[0100] Optionally, the gate control electrode is arranged on the light-emitting side of the device structure.

[0101] Optionally, the gate control electrode is a transparent conductive electrode or a hollow metal electrode; for example, when a metal electrode is used, a narrow-edge design can be adopted to increase the light output window rate, or a hollow structure, a grid metal structure, etc. can be adopted; typical transparent conductive electrodes can be made of ITO, AZO, graphene, etc.

[0102] also, Figure 5 、 Figure 6 The parallel structure light-emitting unit adopts OLED, and the hole injection layer and electron injection layer are added accordingly.

[0103] The above describes in detail the preferred embodiments of the present invention. It should be understood that those skilled in the art can make numerous modifications and variations based on the concepts of the present invention without inventive effort. Therefore, any technical solutions that can be derived by those skilled in the art through logical analysis, reasoning, or limited experimentation based on the concepts of the present invention and the prior art should be within the scope of protection defined by the claims.

Claims

1. A gate-controlled parallel-gate light-emitting diode device structure, characterized in that: The device structure includes: a parallel structure light emitting unit, a gate insulating layer, and a gate regulating electrode; The parallel structure light-emitting unit includes, in sequence: a light-emitting material layer, a hole transport layer and an electron transport layer disposed on the same side of the light-emitting material layer and opposite to each other, a first electrode disposed on the hole transport layer, and a second electrode disposed on the electron transport layer; The gate control electrode is arranged on the back side of the light-emitting material layer opposite to the hole transport layer and the electron transport layer, and the gate insulating layer is arranged between the light-emitting material layer and the gate control electrode; When the device is in operation, a first power supply is applied to the first electrode and the second electrode, the first power supply being used to power the parallel structure light-emitting unit to emit light, and the gate control electrode applies a bias power supply relative to the first electrode or the second electrode, the bias power supply being used to construct an electric field to control the mobility of carriers in the parallel structure light-emitting unit and adjust the luminous brightness or luminous efficiency of the light-emitting unit; The luminescent material of the luminescent material layer is a quantum dot luminescent material; The potential of the first electrode corresponding to the hole transport layer is higher than the potential of the second electrode corresponding to the electron transport layer.

2. The gate-controlled parallel-gate light-emitting diode device structure according to claim 1, wherein: The gate control electrode and the second electrode are loaded with the bias power supply to form a control electric field, and the majority carriers of the parallel structure light-emitting unit are electronic carriers; The applied potential of the gate control electrode is configured as follows: The gate control electrode applies an adaptive negative potential relative to the second electrode according to the actual device to reduce the electronic carriers injected by the second electrode into the light-emitting material layer, so as to improve the luminous efficiency of the parallel structure light-emitting unit; Or the gate control electrode applies an adaptive forward potential relative to the second electrode according to the actual device to increase the electronic carriers injected by the second electrode into the light-emitting material layer, so as to improve the luminous brightness of the parallel structure light-emitting unit.

3. The gate-controlled parallel-gate light-emitting diode device structure according to claim 1, wherein: The gate control electrode and the first electrode are loaded with the bias power supply to form a control electric field, and the majority carriers of the parallel structure light-emitting unit are hole-type carriers; The applied potential of the gate control electrode is configured as follows: The gate control electrode applies an adapted forward potential relative to the first electrode according to the actual device to reduce the hole-type carriers injected by the first electrode into the light-emitting material layer, so as to improve the luminous efficiency of the parallel structure light-emitting unit; Or the gate control electrode applies an adaptive negative potential relative to the first electrode according to the actual device to increase the hole-type carriers injected by the first electrode into the light-emitting material layer, so as to improve the luminous brightness of the parallel structure light-emitting unit.

4. The gate-controlled parallel-gate light-emitting diode device structure according to claim 1, wherein: The gate control electrode and the second electrode are loaded with the bias power supply to form a control electric field, and the majority carriers of the parallel structure light-emitting unit are hole-type carriers; The applied potential of the gate control electrode is configured as follows: The gate control electrode applies an adaptive forward potential relative to the second electrode according to the actual device to increase the electron carriers injected by the second electrode into the light-emitting material layer, thereby improving the luminous efficiency and brightness of the parallel structure light-emitting unit.

5. The gate-controlled parallel-gate light-emitting diode device structure according to claim 1, wherein: The gate control electrode and the first electrode are loaded with the bias power supply to form a control electric field, and the majority carriers of the parallel structure light-emitting unit are electronic carriers; The applied potential of the gate control electrode is configured as follows: The gate control electrode applies an adaptive negative potential relative to the first electrode according to the actual device to increase the hole-type carriers injected by the first electrode into the light-emitting material layer, thereby improving the luminous efficiency and luminous brightness of the parallel structure light-emitting unit.

6. The gate-controlled parallel-gate light-emitting diode device structure according to claim 1, wherein: The bias power supply is an adjustable voltage power supply, and the bias power supply is adjusted according to the luminous brightness or the luminous efficiency requirement.

7. The gate-controlled parallel-gate light-emitting diode device structure according to claim 1, wherein: A current limiting resistor is further connected in series between the gate control electrode and the bias power supply loop.

8. The gate-controlled parallel-gate light-emitting diode device structure according to claim 1, wherein: The gate control electrode is arranged on the light-emitting side of the device structure.

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