A source code-free chip program debugging method, system, and medium

Abstract

Embodiments of the present application provide a chip program debugging method and system without passive code and a medium. The method comprises: obtaining a chip program, slicing the chip program based on a program slicing technology to obtain a plurality of program slices; receiving a debugging instruction, analyzing function information of the debugging instruction based on the debugging instruction, and executing a corresponding debugging program according to the function information of the debugging instruction; linking the plurality of program slices to generate a plurality of debugging groups, performing program debugging on the plurality of debugging groups based on the debugging program, and generating a sub-debugging result corresponding to each debugging group; integrating the plurality of sub-debugging results to obtain a final debugging result, and saving the final debugging result to a register. The chip program is sliced by the program slicing technology, the plurality of program slices can be grouped and debugged or debugged in parallel, the debugging flexibility is improved, the number of program instructions analyzed by a developer is reduced, and the work efficiency is improved.

Description

TECHNICAL FIELD

[0001] The present application relates to the chip debugging technical field, in particular, relates to a kind of passive code's chip program debugging method, system and medium. BACKGROUND

[0002] With the development of chip production process, more and more transistors can be integrated on the same size silicon wafer, so that ICE (on-chip analog In-Circuit Emulator) unit is realized in the internal of processor without increasing the cost of chip production, and the debugging process is completed by sending debugging commands and receiving debugging information through the debugging port introduced on the development board. At present, in order to meet the needs of users in the development process, and because the existing chip program cannot obtain source code, when the chip program is debugged by the developer, due to the lack of source code, the debugging result in the running process of chip program cannot be accurately analyzed. For the above problems, effective technical solutions are urgently needed. SUMMARY

[0003] The purpose of the embodiments of the present application is to provide a kind of passive code's chip program debugging method, system and medium, a plurality of program slice grouping debugging or multi-group parallel debugging can be realized by slicing the chip program through program slicing technology, improve the flexibility of debugging, at the same time, reduce the number of program instructions analyzed by the developer, improve work efficiency.

[0004] The embodiments of the present application also provide a kind of passive code's chip program debugging method, comprising:

[0005] obtain chip program, slice the chip program based on program slicing technology, obtain a plurality of program slices;

[0006] receive debugging instruction, analyze the function information of debugging instruction based on debugging instruction, execute corresponding debugging program according to the function information of debugging instruction;

[0007] Link a plurality of program slices to generate a plurality of debugging groups, program debugging is carried out on the plurality of debugging groups based on debugging program, and the corresponding sub-debugging result of each debugging group is generated;

[0008] Integrate a plurality of sub-debugging results to obtain the final debugging result, save the final debugging result to register.

[0009] Optionally, in the passive code's chip program debugging method described in the embodiments of the present application, the chip program is obtained, the chip program is sliced based on program slicing technology, and a plurality of program slices are obtained, specifically comprising:

[0010] obtain chip program, analyze the chip program to obtain program statement set;

[0011] Establish several slice given points, generate corresponding slice conditions based on the slice given points, and determine whether the data in the program statement set meets the requirements according to the slice conditions;

[0012] If the requirements are met, the set of program statements that meet the requirements will be divided into several program blocks according to the slicing conditions, resulting in several program slices;

[0013] If the requirements are not met, adjustment information is generated, the given points of the slice are adjusted according to the adjustment information, new slice conditions are generated, and the program statement set is sliced ​​a second time based on the new slice conditions.

[0014] Optionally, in the chip program debugging method without source code described in the embodiments of this application, receiving a debugging instruction, analyzing the functional information of the debugging instruction based on the debugging instruction, and executing the corresponding debugging program according to the functional information of the debugging instruction specifically includes:

[0015] Obtain debugging commands, analyze their functional parameters, and obtain their functional information.

[0016] Obtain the historical debugging information of each debugger for the chip program, analyze the debugging function of each debugger based on the historical debugging information, and obtain the functional information of the debugger.

[0017] The similarity between the functional information of the debugging instructions and the functional information of the debugging program is calculated to obtain the functional similarity.

[0018] The debugger with the highest functional similarity is invoked and executed according to the debug instructions.

[0019] Optionally, in the chip program debugging method without source code described in the embodiments of this application, if the requirements are met, the program statement set that meets the requirements is divided into several program blocks according to the slicing conditions, and after obtaining several program blocks, the method further includes:

[0020] Obtain the program statement set of several program slices and extract data features;

[0021] Several program slices are numbered, and data duplication analysis is performed on the data characteristics of adjacent program slices according to the numbers to obtain the data duplication ratio.

[0022] Determine whether the data repetition ratio is greater than or equal to a set ratio;

[0023] If it is greater than or equal to, the corresponding two program slices will be merged into one program slice, and duplicate data in the two program slices will be overwritten and updated.

[0024] If the value is less than the specified value, the next two adjacent program slices will be analyzed repeatedly according to their numbering order until all program blocks have been analyzed.

[0025] Optionally, in the chip program debugging method without source code described in the embodiments of this application, several program slices are linked and coordinated to generate multiple debugging groups. Program debugging is performed on the multiple debugging groups based on the debugging program, and a sub-debugging result corresponding to each debugging group is generated. Specifically, this includes:

[0026] Number several program slices and assign them a combination number;

[0027] Based on the number of combinations, program slices are called in numerical order to form multiple debugging groups;

[0028] Each debugging group is debugged individually using the debugging program to obtain sub-debugging results;

[0029] Set a floating value, add the floating value to the coordination number to calculate a new coordination number;

[0030] Based on the new coordination number, the corresponding number of program slices are called in numerical order to form new debug groups;

[0031] Each new debugging group is debugged separately based on the debugging program to obtain new sub-debugging results;

[0032] All sub-debug results are integrated into a sub-debug database.

[0033] Optionally, in the chip program debugging method without source code described in the embodiments of this application, several sub-debugging results are integrated to obtain the final debugging result, and the final debugging result is saved to a register, specifically including:

[0034] Obtain several sub-debug results, get sub-debug data, create a table from the sub-debug data, and get the final debug result;

[0035] Obtain the data space occupied by each sub-debug data, resulting in several data sub-spaces;

[0036] The register is divided into several corresponding memory addresses based on several data subspaces; the memory space of the several memory addresses corresponds one-to-one with the several data subspaces;

[0037] Several sub-debugging data are stored in their respective storage addresses.

[0038] Secondly, embodiments of this application provide a source code-free chip program debugging system. The system includes a memory and a processor. The memory includes a program for a source code-free chip program debugging method. When the program for the source code-free chip program debugging method is executed by the processor, it performs the following steps:

[0039] The chip program is obtained, and the chip program is sliced ​​using program slicing technology to obtain several program slices;

[0040] Receive debugging instructions, analyze the functional information of the debugging instructions, and execute the corresponding debugging program according to the functional information of the debugging instructions.

[0041] Several program slices are linked together to generate multiple debugging groups. The program is debugged based on the debugging program, and the sub-debugging results corresponding to each debugging group are generated.

[0042] The results of several sub-debugging operations are integrated to obtain the final debugging result, which is then saved to a register.

[0043] Optionally, in the chip program debugging system without source code described in the embodiments of this application, the chip program is obtained, and the chip program is sliced ​​based on program slicing technology to obtain several program slices, specifically including:

[0044] Obtain the chip program, parse the chip program, and obtain the program statement set;

[0045] Establish several slice given points, and generate corresponding slice conditions based on the slice given points;

[0046] Determine whether the data within the program statement set meets the requirements based on the slice conditions;

[0047] If the requirements are met, the set of program statements that meet the requirements will be divided into several program blocks according to the slicing conditions, resulting in several program slices;

[0048] If the requirements are not met, adjustment information is generated, the given points of the slice are adjusted according to the adjustment information, new slice conditions are generated, and the program statement set is sliced ​​a second time based on the new slice conditions.

[0049] Optionally, in the chip program debugging system without source code described in this application embodiment, receiving debugging instructions, analyzing the functional information of the debugging instructions based on the debugging instructions, and executing the corresponding debugging program according to the functional information of the debugging instructions specifically includes:

[0050] Obtain debugging commands, analyze their functional parameters, and obtain their functional information.

[0051] Obtain the historical debugging information of each debugger for the chip program, analyze the debugging function of each debugger based on the historical debugging information, and obtain the functional information of the debugger.

[0052] The similarity between the functional information of the debugging instructions and the functional information of the debugging program is calculated to obtain the functional similarity.

[0053] The debugger with the highest functional similarity is invoked and executed according to the debug instructions.

[0054] Thirdly, embodiments of this application also provide a computer-readable storage medium, which includes a chip program debugging method program without source code. When the chip program debugging method program without source code is executed by a processor, it implements the steps of the chip program debugging method without source code as described in any of the above claims.

[0055] As can be seen from the above, the chip program debugging method, system, and medium provided in this application embodiment involve acquiring the chip program, processing the chip program into slices based on program slicing technology to obtain several program slices; receiving debugging instructions, analyzing the functional information of the debugging instructions based on the debugging instructions, and executing the corresponding debugging program according to the functional information of the debugging instructions; linking several program slices together to generate multiple debugging groups, performing program debugging on multiple debugging groups based on the debugging program, and generating sub-debugging results corresponding to each debugging group; integrating several sub-debugging results to obtain the final debugging result, and saving the final debugging result to a register; by processing the chip program into slices using program slicing technology, it is possible to achieve group debugging of several program slices or parallel debugging of multiple groups, improving debugging flexibility, while reducing the number of program instructions that developers need to analyze, and improving work efficiency. Attached Figure Description

[0056] To more clearly illustrate the technical solutions of the embodiments of this application, the accompanying drawings used in the embodiments of this application will be briefly introduced below. It should be understood that the following drawings only show some embodiments of this application and should not be regarded as a limitation of the scope. For those skilled in the art, other related drawings can be obtained based on these drawings without creative effort.

[0057] Figure 1 A flowchart illustrating a source code-free chip program debugging method provided in this application embodiment;

[0058] Figure 2 A flowchart of a source code-free chip program debugging method provided in an embodiment of this application;

[0059] Figure 3 The flowchart illustrates the execution of a source code-free chip program debugging method provided in this application embodiment. Detailed Implementation

[0060] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of this application, and not all of the embodiments. The components of the embodiments of this application described and shown in the accompanying drawings can generally be arranged and designed in various different configurations. Therefore, the following detailed description of the embodiments of this application provided in the accompanying drawings is not intended to limit the scope of the claimed application, but merely represents selected embodiments of this application. All other embodiments obtained by those skilled in the art based on the embodiments of this application without inventive effort are within the scope of protection of this application.

[0061] It should be noted that similar reference numerals and letters in the following figures indicate similar items; therefore, once an item is defined in one figure, it does not need to be further defined and explained in subsequent figures. Furthermore, in the description of this application, the terms "first," "second," etc., are used only to distinguish descriptions and should not be construed as indicating or implying relative importance.

[0062] Please refer to Figure 1 , Figure 1 This is a flowchart of a source-code-free chip program debugging method according to some embodiments of this application. This source-code-free chip program debugging method is used in a terminal device and includes the following steps:

[0063] S101, Obtain the chip program, process the chip program into slices based on program slicing technology, and obtain several program slices;

[0064] S102, Receive debugging instructions, analyze the functional information of the debugging instructions based on the debugging instructions, and execute the corresponding debugging program according to the functional information of the debugging instructions;

[0065] S103, link several program slices together to generate multiple debugging groups, debug the program in multiple debugging groups based on the debugging program, and generate sub-debugging results corresponding to each debugging group;

[0066] S104 integrates several sub-debugging results to obtain the final debugging result, and saves the final debugging result to a register.

[0067] It should be noted that by analyzing the function calls of the debugging instructions to match the debugging program, the chip program can be debugged accurately. In addition, during the chip program processing, the chip program is sliced, and multiple program slices work together to improve the debugging accuracy.

[0068] Please refer to Figure 2 , Figure 2This is a flowchart of a program slicing method for a source-code-free chip program debugging method according to some embodiments of this application. According to embodiments of the present invention, the chip program is obtained, and the chip program is sliced ​​based on program slicing technology to obtain several program slices, specifically including:

[0069] S201, Obtain the chip program, parse the chip program, and obtain the program statement set;

[0070] S202, establish several slice given points, generate corresponding slice conditions based on the slice given points, and determine whether the data in the program statement set meets the requirements according to the slice conditions;

[0071] S203, if the requirements are met, the set of program statements that meet the requirements will be divided into several program blocks according to the slicing conditions to obtain several program slices;

[0072] S204 If the requirements are not met, adjustment information is generated, the given points of the slice are adjusted according to the adjustment information, new slice conditions are generated, and the program statement set is sliced ​​a second time based on the new slice conditions.

[0073] It should be noted that by parsing the chip program, slicing conditions are established according to the given slicing points, thereby enabling precise division of the chip program based on the slicing conditions.

[0074] Please refer to Figure 3 , Figure 3 This is a flowchart illustrating the execution of a debugger method for a chip program debugging method without source code, as described in some embodiments of this application. According to an embodiment of the present invention, the method includes receiving a debug instruction, analyzing the functional information of the debug instruction based on the debug instruction, and executing the corresponding debugger program according to the functional information of the debug instruction, specifically including:

[0075] S301: Obtain debugging instructions, analyze the functional parameters of the debugging instructions, and obtain the functional information of the debugging instructions;

[0076] S302: Obtain the historical debugging information of each debugger for the chip program, analyze the debugging function of each debugger based on the historical debugging information, and obtain the functional information of the debugger.

[0077] S303, calculate the similarity between the functional information of the debugging instruction and the functional information of the debugging program to obtain the functional similarity;

[0078] S304 calls and executes the debugger with the highest functional similarity according to the debug command.

[0079] It should be noted that when calling a debugger, in order to ensure that the called debugger can better debug the chip program, it is necessary to analyze the matching degree between the debugging requirements of the debugging instructions and the functional information of the debugger, so as to call the debugger with the highest matching degree and meet all debugging requirements.

[0080] According to an embodiment of the present invention, if the requirements are met, the set of program statements that meet the requirements is divided into several program blocks according to the slicing conditions. After obtaining several program blocks, the method further includes:

[0081] Obtain the program statement set of several program slices and extract data features;

[0082] Several program slices are numbered, and data duplication analysis is performed on the data characteristics of adjacent program slices according to the numbers to obtain the data duplication ratio.

[0083] Determine whether the data duplication ratio is greater than or equal to the set ratio;

[0084] If it is greater than or equal to, the corresponding two program slices will be merged into one program slice, and duplicate data in the two program slices will be overwritten and updated.

[0085] If the value is less than the specified value, the next two adjacent program slices will be analyzed repeatedly according to their numbering order until all program blocks have been analyzed.

[0086] It should be noted that after the program slices are processed, in order to reduce the amount of data analysis during debugging, the program slices are integrated and updated by analyzing the data duplication ratio in the two program slices, and duplicate data is updated and overwritten to reduce the duplication of program slices.

[0087] According to an embodiment of the present invention, several program slices are linked and coordinated to generate multiple debugging groups. Program debugging is performed on the multiple debugging groups based on a debugging program, and sub-debugging results are generated for each debugging group. Specifically, this includes:

[0088] Number several program slices and assign them a combination number;

[0089] Based on the number of combinations, program slices are called in numerical order to form multiple debugging groups;

[0090] Each debugging group is debugged individually using the debugging program to obtain sub-debugging results;

[0091] Set a floating value, add the floating value to the coordination number to calculate a new coordination number;

[0092] Based on the new coordination number, the corresponding number of program slices are called in numerical order to form new debug groups;

[0093] Each new debugging group is debugged separately based on the debugging program to obtain new sub-debugging results;

[0094] All sub-debug results are integrated into a sub-debug database.

[0095] It should be noted that the program slices are divided into multiple debugging groups. Each debugging group will not interfere with the others and can be run in parallel to improve debugging efficiency.

[0096] According to an embodiment of the present invention, several sub-debugging results are integrated to obtain a final debugging result, and the final debugging result is saved to a register, specifically including:

[0097] Obtain several sub-debug results, get sub-debug data, create a table from the sub-debug data, and get the final debug result;

[0098] Obtain the data space occupied by each sub-debug data, resulting in several data sub-spaces;

[0099] The register is divided into several corresponding memory addresses based on several data subspaces; the memory space of the several memory addresses corresponds one-to-one with the several data subspaces;

[0100] Several sub-debugging data are stored in their respective storage addresses.

[0101] It should be noted that different sub-debug data are stored in different storage addresses. When historical debug data needs to be retrieved, the data in the corresponding debug address can be accurately obtained, improving the data retrieval speed.

[0102] According to an embodiment of the present invention, the method further includes: obtaining the debugging time of different debugging groups;

[0103] The debugging time for each debugging group is compared with the set debugging time to obtain the time difference;

[0104] Determine whether the time difference is less than or equal to the time difference threshold;

[0105] If it is less than or equal to, then the program slice grouping is deemed to meet the requirements;

[0106] If the difference is greater than the specified value, the program slice grouping is deemed not to meet the requirements, and the program slice combination within the debugging group is adjusted according to the time difference.

[0107] It should be noted that by reasonably grouping program slices, the debugging time of each debugging group is ensured to be the same, so that when multiple debugging groups are debugged in parallel, the debugging time will not deviate significantly.

[0108] Secondly, embodiments of this application provide a chip program debugging system without source code. The system includes a memory and a processor. The memory contains a program for a chip program debugging method without source code. When the program for the chip program debugging method without source code is executed by the processor, it performs the following steps:

[0109] The chip program is obtained, and the chip program is sliced ​​using program slicing technology to obtain several program slices;

[0110] Receive debugging instructions, analyze the functional information of the debugging instructions, and execute the corresponding debugging program according to the functional information of the debugging instructions.

[0111] Several program slices are linked together to generate multiple debugging groups. The program is debugged based on the debugging program, and the sub-debugging results corresponding to each debugging group are generated.

[0112] The results of several sub-debugging operations are integrated to obtain the final debugging result, which is then saved to a register.

[0113] It should be noted that by analyzing the function calls of the debugging instructions to match the debugging program, the chip program can be debugged accurately. In addition, during the chip program processing, the chip program is sliced, and multiple program slices work together to improve the debugging accuracy.

[0114] According to an embodiment of the present invention, a chip program is obtained, and the chip program is sliced ​​based on program slicing technology to obtain several program slices, specifically including:

[0115] Obtain the chip program, parse the chip program, and obtain the program statement set;

[0116] Establish several slice given points, and generate corresponding slice conditions based on the slice given points;

[0117] Determine whether the data within the program statement set meets the requirements based on the slice conditions;

[0118] If the requirements are met, the set of program statements that meet the requirements will be divided into several program blocks according to the slicing conditions, resulting in several program slices;

[0119] If the requirements are not met, adjustment information is generated, the given points of the slice are adjusted according to the adjustment information, new slice conditions are generated, and the program statement set is sliced ​​a second time based on the new slice conditions.

[0120] It should be noted that by parsing the chip program, slicing conditions are established according to the given slicing points, thereby enabling precise division of the chip program based on the slicing conditions.

[0121] According to an embodiment of the present invention, receiving a debugging instruction, analyzing the functional information of the debugging instruction based on the debugging instruction, and executing the corresponding debugging program according to the functional information of the debugging instruction, specifically includes:

[0122] Obtain debugging commands, analyze their functional parameters, and obtain their functional information.

[0123] Obtain the historical debugging information of each debugger for the chip program, analyze the debugging function of each debugger based on the historical debugging information, and obtain the functional information of the debugger.

[0124] The similarity between the functional information of the debugging instructions and the functional information of the debugging program is calculated to obtain the functional similarity.

[0125] The debugger with the highest functional similarity is invoked and executed according to the debug instructions.

[0126] It should be noted that when calling a debugger, in order to ensure that the called debugger can better debug the chip program, it is necessary to analyze the matching degree between the debugging requirements of the debugging instructions and the functional information of the debugger, so as to call the debugger with the highest matching degree and meet all debugging requirements.

[0127] According to an embodiment of the present invention, if the requirements are met, the set of program statements that meet the requirements is divided into several program blocks according to the slicing conditions. After obtaining several program blocks, the method further includes:

[0128] Obtain the program statement set of several program slices and extract data features;

[0129] Several program slices are numbered, and data duplication analysis is performed on the data characteristics of adjacent program slices according to the numbers to obtain the data duplication ratio.

[0130] Determine whether the data duplication ratio is greater than or equal to the set ratio;

[0131] If it is greater than or equal to, the corresponding two program slices will be merged into one program slice, and duplicate data in the two program slices will be overwritten and updated.

[0132] If the value is less than the specified value, the next two adjacent program slices will be analyzed repeatedly according to their numbering order until all program blocks have been analyzed.

[0133] It should be noted that after the program slices are processed, in order to reduce the amount of data analysis during debugging, the program slices are integrated and updated by analyzing the data duplication ratio in the two program slices, and duplicate data is updated and overwritten to reduce the duplication of program slices.

[0134] According to an embodiment of the present invention, several program slices are linked and coordinated to generate multiple debugging groups. Program debugging is performed on the multiple debugging groups based on a debugging program, and sub-debugging results are generated for each debugging group. Specifically, this includes:

[0135] Number several program slices and assign them a combination number;

[0136] Based on the number of combinations, program slices are called in numerical order to form multiple debugging groups;

[0137] Each debugging group is debugged individually using the debugging program to obtain sub-debugging results;

[0138] Set a floating value, add the floating value to the coordination number to calculate a new coordination number;

[0139] Based on the new coordination number, the corresponding number of program slices are called in numerical order to form new debug groups;

[0140] Each new debugging group is debugged separately based on the debugging program to obtain new sub-debugging results;

[0141] All sub-debug results are integrated into a sub-debug database.

[0142] It should be noted that the program slices are divided into multiple debugging groups. Each debugging group will not interfere with the others and can be run in parallel to improve debugging efficiency.

[0143] According to an embodiment of the present invention, several sub-debugging results are integrated to obtain a final debugging result, and the final debugging result is saved to a register, specifically including:

[0144] Obtain several sub-debug results, get sub-debug data, create a table from the sub-debug data, and get the final debug result;

[0145] Obtain the data space occupied by each sub-debug data, resulting in several data sub-spaces;

[0146] The register is divided into several corresponding memory addresses based on several data subspaces; the memory space of the several memory addresses corresponds one-to-one with the several data subspaces;

[0147] Several sub-debugging data are stored in their respective storage addresses.

[0148] It should be noted that different sub-debug data are stored in different storage addresses. When historical debug data needs to be retrieved, the data in the corresponding debug address can be accurately obtained, improving the data retrieval speed.

[0149] According to an embodiment of the present invention, the method further includes: obtaining the debugging time of different debugging groups;

[0150] The debugging time for each debugging group is compared with the set debugging time to obtain the time difference;

[0151] Determine whether the time difference is less than or equal to the time difference threshold;

[0152] If it is less than or equal to, then the program slice grouping is deemed to meet the requirements;

[0153] If the difference is greater than the specified value, the program slice grouping is deemed not to meet the requirements, and the program slice combination within the debugging group is adjusted according to the time difference.

[0154] It should be noted that by reasonably grouping program slices, the debugging time of each debugging group is ensured to be the same, so that when multiple debugging groups are debugged in parallel, the debugging time will not deviate significantly.

[0155] A third aspect of the present invention provides a computer-readable storage medium including a chip program debugging method program without source code. When the chip program debugging method program without source code is executed by a processor, it implements the steps of the chip program debugging method without source code as described in any of the above claims.

[0156] This invention discloses a chip program debugging method, system, and medium without source code. The method involves acquiring the chip program, processing it into several program slices using program slicing technology, receiving debugging instructions, analyzing the functional information of the instructions, and executing the corresponding debugging program. The method also involves coordinating the program slices to generate multiple debugging groups, debugging these groups using the debugging program, and generating sub-debugging results for each group. Finally, the method integrates these sub-debugging results to obtain the final debugging result, which is then saved to a register. By using program slicing technology to process the chip program, it is possible to perform grouped debugging or parallel debugging of multiple program slices, improving debugging flexibility and reducing the number of program instructions developers need to analyze, thus increasing work efficiency.

[0157] In the several embodiments provided in this application, it should be understood that the disclosed devices and methods can be implemented in other ways. The device embodiments described above are merely illustrative. For example, the division of units is only a logical functional division, and in actual implementation, there may be other division methods, such as: multiple units or components can be combined, or integrated into another system, or some features can be ignored or not executed. In addition, the coupling, direct coupling, or communication connection between the various components shown or discussed can be through some interfaces, and the indirect coupling or communication connection between devices or units can be electrical, mechanical, or other forms.

[0158] The units described above as separate components may or may not be physically separate. The components shown as units may or may not be physical units. They may be located in one place or distributed across multiple network units. Some or all of the units may be selected to achieve the purpose of this embodiment according to actual needs.

[0159] In addition, in the various embodiments of the present invention, each functional unit can be integrated into one processing unit, or each unit can be a separate unit, or two or more units can be integrated into one unit; the integrated unit can be implemented in hardware or in the form of hardware plus software functional units.

[0160] Those skilled in the art will understand that all or part of the steps of the above method embodiments can be implemented by hardware related to program instructions. The aforementioned program can be stored in a readable storage medium. When the program is executed, it performs the steps of the above method embodiments. The aforementioned storage medium includes various media capable of storing program code, such as mobile storage devices, read-only memory (ROM), random access memory (RAM), magnetic disks, or optical disks.

[0161] Alternatively, if the integrated units of this invention are implemented as software functional modules and sold or used as independent products, they can also be stored in a readable storage medium. Based on this understanding, the technical solutions of the embodiments of this invention, or the parts that contribute to the prior art, can be embodied in the form of a software product. This software product is stored in a storage medium and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute all or part of the methods described in the various embodiments of this invention. The aforementioned storage medium includes various media capable of storing program code, such as mobile storage devices, ROM, RAM, magnetic disks, or optical disks.

Claims

1. A method of debugging a program of a chip without using a code, characterized by, The application comprises the following steps: Obtaining a chip program, slicing the chip program based on a program slicing technology to obtain a plurality of program slices; Receiving a debugging instruction, analyzing the function information of the debugging instruction based on the debugging instruction, and executing the corresponding debugging program according to the function information of the debugging instruction; Linking and cooperating the plurality of program slices to generate a plurality of debugging groups, performing program debugging on the plurality of debugging groups based on the debugging program, and generating a corresponding sub-debugging result for each debugging group; Integrating the plurality of sub-debugging results to obtain a final debugging result, and saving the final debugging result to a register; Linking and cooperating the plurality of program slices to generate a plurality of debugging groups, performing program debugging on the plurality of debugging groups based on the debugging program, and generating a corresponding sub-debugging result for each debugging group, specifically comprising: Numbering the plurality of program slices and setting a cooperation number; Grouping a corresponding number of program slices in the order of numbering based on the cooperation number to obtain a plurality of debugging groups; Individually debugging each debugging group based on the debugging program to obtain a sub-debugging result; Setting a floating value, adding the floating value and the cooperation number to generate a new cooperation number; Grouping a corresponding number of program slices in the order of numbering based on the new cooperation number to obtain new debugging groups; Individually debugging each new debugging group based on the debugging program to obtain a new sub-debugging result; Integrating all the sub-debugging results into a sub-debugging database; Integrating the plurality of sub-debugging results to obtain a final debugging result, and saving the final debugging result to a register, specifically comprising: Obtaining a plurality of sub-debugging results to obtain sub-debugging data, making a table of the sub-debugging data to obtain a final debugging result; Obtaining the data occupation space of each sub-debugging data to obtain a plurality of data subspaces; Dividing the register into a corresponding plurality of storage addresses based on the plurality of data subspaces; the storage space of the plurality of storage addresses corresponds one-to-one to the plurality of data subspaces; Storing the plurality of sub-debugging data in the corresponding storage space of the storage addresses.

2. The method of claim 1, wherein Obtaining a chip program, slicing the chip program based on a program slicing technology to obtain a plurality of program slices, specifically comprising: Obtaining a chip program, analyzing the chip program to obtain a program statement set; Establishing a plurality of slicing given points, generating corresponding slicing conditions according to the slicing given points, and determining whether the data in the program statement set meets the requirements according to the slicing conditions; If the requirements are met, dividing the program statement set that meets the requirements into a plurality of program slices according to the slicing conditions; If the requirements are not met, generating adjustment information, adjusting the slicing given points according to the adjustment information, generating new slicing conditions, and performing secondary slicing on the program statement set based on the new slicing conditions.

3. The method of claim 2, wherein Receiving a debugging instruction, analyzing the function information of the debugging instruction based on the debugging instruction, and executing the corresponding debugging program according to the function information of the debugging instruction, specifically comprising: Obtaining a debugging instruction, analyzing the function parameters of the debugging instruction to obtain the function information of the debugging instruction; Obtaining the historical debugging information of each debugging program on the chip program, analyzing the debugging function of each debugging program based on the historical debugging information, and obtaining the function information of the debugging program; The function information of the debugging instruction is compared with the function information of the debugging program to obtain a function similarity; The debugging program with the largest function similarity is called and executed according to the debugging instruction.

4. The method of claim 3, wherein, If the requirement is met, the program statement set meeting the requirement is divided into a plurality of program slices according to the slicing condition, and a plurality of program slices are obtained, and the method further comprises: Obtaining the program statement set of the plurality of program slices, and extracting data features; The plurality of program slices are numbered, and the data features in the adjacent two program slices are analyzed for repeated data according to the number in sequence, and a data repetition ratio is obtained; It is judged whether the data repetition ratio is greater than or equal to a set ratio; If greater than or equal to, the corresponding two program slices are integrated into one program slice, and the repeated data in the two program slices is updated; If less than, the next adjacent two program slices are analyzed for repeated data in sequence according to the number order until all program blocks are analyzed.

5. A passive code chip program debugging system, characterized by, The system comprises a memory and a processor, the memory comprising a program of a chip program debugging method without source code, and the program of the chip program debugging method without source code is executed by the processor to realize the following steps: Obtaining a chip program, slicing the chip program based on program slicing technology to obtain a plurality of program slices; Receiving a debugging instruction, analyzing the function information of the debugging instruction based on the debugging instruction, and executing the corresponding debugging program according to the function information of the debugging instruction; The plurality of program slices are linked and matched to generate a plurality of debugging groups, the plurality of debugging groups are debugged based on the debugging program, and a sub-debugging result corresponding to each debugging group is generated; The plurality of sub-debugging results are integrated to obtain a final debugging result, and the final debugging result is saved to a register; The plurality of program slices are linked and matched to generate a plurality of debugging groups, the plurality of debugging groups are debugged based on the debugging program, and a sub-debugging result corresponding to each debugging group is generated, specifically comprising: The plurality of program slices are numbered, and a matching number is set; A corresponding number of program slices are grouped according to the number order based on the matching number to obtain a plurality of debugging groups; Each debugging group is individually debugged based on the debugging program to obtain a sub-debugging result; A floating value is set, the floating value and the matching number are added to generate a new matching number; A corresponding number of program slices are grouped according to the number order based on the new matching number to obtain new debugging groups; Each new debugging group is individually debugged based on the debugging program to obtain a new sub-debugging result; All sub-debugging results are integrated into a sub-debugging database; The plurality of sub-debugging results are integrated to obtain a final debugging result, and the final debugging result is saved to a register, specifically comprising: Obtaining a plurality of sub-debugging results to obtain sub-debugging data, making a table of the sub-debugging data to obtain a final debugging result; Obtaining the data occupation space of each sub-debugging data to obtain a plurality of data subspaces; Based on the plurality of data subspaces, the register is divided into a corresponding plurality of storage addresses; the storage space of the plurality of storage addresses corresponds to the plurality of data subspaces one by one; The plurality of sub-debugging data are respectively stored in the storage addresses of the corresponding storage spaces.

6. The passive code chip program debugging system according to claim 5, wherein, The chip program is acquired, the chip program is sliced based on the program slicing technology, and a plurality of program slices are obtained, specifically including: Acquiring a chip program, analyzing the chip program to obtain a program statement set; A plurality of slice given points are established, and corresponding slice conditions are generated according to the slice given points; Data in the program statement set is judged according to the slice conditions to determine whether the requirements are met; If the requirements are met, the program statement set that meets the requirements is divided into a plurality of program blocks according to the slice conditions, and a plurality of program slices are obtained; If the requirements are not met, adjustment information is generated, the slice given points are adjusted according to the adjustment information, new slice conditions are generated, and the program statement set is secondarily blocked based on the new slice conditions.

7. The passive code-chip program debugging system according to claim 6, wherein, Receiving a debugging instruction, analyzing the function information of the debugging instruction based on the debugging instruction, and executing the corresponding debugging program according to the function information of the debugging instruction, specifically including: Acquiring a debugging instruction, analyzing the function parameters of the debugging instruction to obtain the function information of the debugging instruction; Acquiring the historical debugging information of each debugging program on the chip program, analyzing the debugging function of each debugging program based on the historical debugging information, and obtaining the function information of the debugging program; The function information of the debugging instruction and the function information of the debugging program are similarity calculated to obtain the function similarity; According to the debugging instruction, the debugging program with the largest function similarity is called and executed.

8. A computer-readable storage medium, characterized in that, The computer readable storage medium includes a chip program debugging method program without source code, and the chip program debugging method program without source code is executed by the processor to realize the steps of the chip program debugging method without source code in any one of claims 1 to 4.

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