Cross-bus domain device space access method, system, terminal and medium
By using connection bridges and control bridges to convert address in the cross-PC Ie bus domain, the problem that the existing technology cannot realize device virtualization across bus domain is solved, and efficient access and control of the virtualized devices by the device borrower is realized.
Patent Information
- Application Number
- CN202410548995.9
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2024-05-06
- Publication Date
- 2025-02-11
- Estimated Expiration
- 2044-05-06
AI Technical Summary
The prior art cannot realize virtualization of PC Ie devices across the PC Ie bus domain, and further control of the virtualized devices cannot be performed.
By obtaining the requested access address of the device borrower to the virtual device, using the connection bridge and the control bridge to convert the address based on the preset address space conversion mapping table, device space access across the bus domain is realized.
The device borrower can access the space of the virtualized device just like accessing its own device space, support access to multiple virtualized devices, and maximize access to the memory space of the virtualized device.
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Figure CN118445230B_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the field of device virtualization technology, and in particular to a device space access method, system, terminal and medium across bus domains. Background Art
[0002] PCIe device virtualization is usually the process of emulating and managing physical PCIe devices in a virtual machine environment under only one PCIe bus domain. Virtualizing PCIe devices allows virtual machines to access and use these devices as if they were directly connected to the virtual machine.
[0003] Currently, PCIe devices across PCIe bus domains (two or more host systems) can expose access interfaces to each other through PCIe NTB (Non-Transparent Bridge), such as interrupts, BARs, and DMA execution. Current PCIe device virtualization cannot achieve PCIe device virtualization across PCIe bus domains (i.e., two or more host systems). In the prior art, PCIe device access across PCIe bus domains is achieved through a single or multiple NTBs, but further control of the virtualized devices cannot be achieved.
[0004] Therefore, the prior art still needs to be improved and enhanced. Summary of the invention
[0005] The technical problem to be solved by the present invention is to provide a device space access method, system, terminal and medium across bus domains in view of the above-mentioned defects of the prior art. The technical solution adopted by the present invention is as follows:
[0006] In a first aspect, the present invention provides a method for accessing a device space across bus domains, wherein the method comprises:
[0007] Obtaining a request access address of a device borrower to a virtual device, wherein the virtual device is a device virtualized by the device borrower based on a virtual device in a device lender;
[0008] By means of a connection bridge, the request access address is converted based on a preset address space conversion mapping table to obtain a request after the conversion address, wherein the connection bridge is used to connect buses corresponding to the device borrower and the device lender respectively;
[0009] The request after the address conversion is forwarded to the control bridge corresponding to the virtualized device through the connection bridge, and the control bridge forwards the request after the address conversion to the virtualized device, wherein the control bridge is used to connect the bus of the virtualized device and the device lender.
[0010] In one implementation, the method further includes:
[0011] The connection bridge and the control bridge are configured to establish an address space conversion mapping table.
[0012] In one implementation, configuring the connection bridge and the control bridge to establish an address space conversion mapping table includes:
[0013] Based on the number of virtualized devices, the BDF IDs of the virtualized devices, the IO space information of the virtualized devices, the memory space information of the virtualized devices, the BDF ID of the control bridge, and the BAR space information of the control bridge, the configuration of the connection bridge is completed;
[0014] Based on the BAR space information of the connection bridge and the BDF ID of the connection bridge, completing the configuration of the control bridge;
[0015] Based on the BAR space information of the connection bridge, the BAR space information of the control bridge, and a mapping table from the BAR space information of the connection bridge to each space of the virtualized device, the address space conversion mapping table is established. The address space conversion mapping table is used to reflect the address offset between the BAR space information of the connection bridge and the BAR space information of the control bridge.
[0016] In one implementation, after configuring the connection bridge and the control bridge, the method further includes:
[0017] When establishing a virtual device, the device borrower calculates the total size of all virtual device memory spaces;
[0018] The virtual device driver adjusts the BAR space size of the connection bridge.
[0019] In one implementation, performing address conversion on the request access address based on a preset address space conversion mapping table through the connection bridge to obtain a request after the converted address includes:
[0020] If the access area of the requested access address is the configuration space, the configuration space access base address in the BAR space information of the control bridge is added with the low-order offset address to replace the requested access address, so as to obtain the request after the converted address;
[0021] If the access area of the requested access address is the IO space, the IO space access base address in the BAR space information of the control bridge is added with the low-order offset address to replace the requested access address, so as to obtain the request after the converted address;
[0022] If the access area of the requested access address is a memory space, the requested access address will be replaced by the memory space base address of the virtual device itself plus a low-order offset address to obtain the request after the converted address.
[0023] In one implementation, the control bridge forwards the request after the address conversion to the virtualized device, including:
[0024] If the access area of the request after the address conversion is the configuration space or the IO space, the control bridge implements the characteristics of the non-transparent bridge through the BAR space to complete the access to the configuration space or the IO space of the virtualized device;
[0025] If the access area of the request after the address conversion is the memory space, the control bridge implements the transparent bridge characteristic and directly forwards the request to the memory space of the virtualized device.
[0026] In one implementation, if the access area of the request after the address conversion is the configuration space or the IO space, the control bridge implements the characteristics of the non-transparent bridge through the BAR space to complete the access to the configuration space or the IO space of the virtualized device, including:
[0027] If the access area of the request after the address conversion is the configuration space, the low-order offset address is taken as the access address of the configuration space according to the frame header information of the configuration space setting request, and the component ID is set to the BDF ID of the virtualized device;
[0028] If the access area of the request after the address conversion is the IO space, the frame header information of the request is set according to the IO space, and the low-order offset address is taken as the access address of the IO space.
[0029] In a second aspect, an embodiment of the present invention provides a cross-bus domain device space access system, wherein the system is applied to the cross-bus domain device space access method according to any one of claims 1 to 7, and the system comprises: a device borrower, a device lender, and a connection bridge, wherein the connection bridge is used to connect the buses corresponding to the device borrower and the device lender respectively;
[0030] The device borrower includes a virtual device, and the virtual device is a device virtualized by the device borrower based on the virtual device in the device lender;
[0031] The connection bridge is used to receive a request access address, perform address conversion on the request access address, obtain a request after the address conversion, and send the request after the address conversion to the control bridge;
[0032] The device lender includes the control bridge, which is used to forward the received request after the address conversion to the virtualized device through the control bridge, wherein the control bridge is used to connect the bus of the virtualized device and the device lender.
[0033] In a third aspect, an embodiment of the present invention further provides a terminal, wherein the terminal includes a memory, a processor, and a cross-bus domain device space access program stored in the memory and executable on the processor, and when the processor executes the cross-bus domain device space access program, the steps of the cross-bus domain device space access method of any one of the above-mentioned schemes are implemented.
[0034] In a fourth aspect, an embodiment of the present invention further provides a computer-readable storage medium, wherein a cross-bus domain device space access program is stored on the computer-readable storage medium, and when the cross-bus domain device space access program is executed by a processor, the steps of the cross-bus domain device space access method described in any one of the above-mentioned schemes are implemented.
[0035] Beneficial effect: Compared with the prior art, the present invention provides a device space access method across bus domains. The present invention first obtains the request access address of the device borrower to the virtual device, wherein the virtual device is a device virtualized by the device borrower based on the virtual device in the device lender. Then, through the connection bridge, the request access address is converted based on the preset address space conversion mapping table to obtain the request after the conversion address, and the connection bridge is used to connect the buses corresponding to the device borrower and the device lender respectively. Finally, the request after the conversion address is forwarded to the control bridge corresponding to the virtualized device through the connection bridge, and the control bridge forwards the request after the conversion address to the virtualized device, wherein the control bridge is used to connect the bus of the virtualized device and the device lender. The device borrower of the present invention can access the space of the virtualized device like accessing its own device space, and can support access to multiple virtualized devices, and the device borrower can obtain the access capability of the memory space of the virtualized device to the maximum extent. BRIEF DESCRIPTION OF THE DRAWINGS
[0036] Figure 1 A flowchart of a preferred embodiment of a device space access method across bus domains provided in an embodiment of the present invention.
[0037] Figure 2 A structural diagram of a device space access system across bus domains provided by an embodiment of the present invention.
[0038] Figure 3 A functional block diagram of a terminal provided by an embodiment of the present invention. DETAILED DESCRIPTION
[0039] In order to make the purpose, technical solution and effect of the present invention clearer and more specific, the present invention is further described in detail with reference to the accompanying drawings and examples. It should be understood that the specific embodiments described herein are only used to explain the present invention and are not used to limit the present invention.
[0040] It will be understood by those skilled in the art that, unless expressly stated, the singular forms "one", "said", and "the" used herein may also include plural forms. It should be further understood that the term "comprising" used in the specification of the present invention refers to the presence of the features, integers, steps, operations, elements and / or components, but does not exclude the presence or addition of one or more other features, integers, steps, operations, elements, components and / or groups thereof. It should be understood that when we refer to an element as being "connected" or "coupled" to another element, it may be directly connected or coupled to the other element, or there may be intermediate elements. In addition, the "connection" or "coupling" used herein may include wireless connection or wireless coupling. The term "and / or" used herein includes all or any unit and all combinations of one or more associated listed items.
[0041] It will be understood by those skilled in the art that, unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as generally understood by those skilled in the art in the art to which the present invention belongs. It should also be understood that terms such as those defined in general dictionaries should be understood to have meanings consistent with the meanings in the context of the prior art, and will not be interpreted with idealized or overly formal meanings unless specifically defined as herein.
[0042] This embodiment provides a method for accessing device space across bus domains. Based on the method of this embodiment, a device borrower can access the space of a virtualized device just as it accesses its own device space, and can support access to multiple virtualized devices. The device borrower can obtain the ability to access the memory space of the virtualized device to the maximum extent.
[0043] like Figure 1 As shown in , the cross-bus domain device space access method of this embodiment can be applied to a terminal or a server. Specifically, the cross-bus domain device space access method of this embodiment includes the following steps:
[0044] Step S100: obtaining a request access address of a device borrower to a virtual device, wherein the virtual device is a device virtualized by the device borrower based on a virtual device in a device lender;
[0045] Step S200: performing address conversion on the request access address based on a preset address space conversion mapping table through a connection bridge to obtain a request after the address conversion, wherein the connection bridge is used to connect buses corresponding to the device borrower and the device lender respectively;
[0046] Step S300: forwarding the request after the address conversion to the control bridge corresponding to the virtualized device through the connection bridge, and the control bridge forwarding the request after the address conversion to the virtualized device, wherein the control bridge is used to connect the bus of the virtualized device and the device lender.
[0047] For example, host machine H1 is the device lender, and device A is mounted on the bus of H1 through the control bridge. Host machine H2 is the device borrower. In order to borrow device A, H2 generates a virtual device a corresponding to device A through virtualization technology, and device A is the virtualized device. Since H1 and H2 correspond to different bus domains, in order to achieve cross-bus domain device access, a memory space (i.e., BAR space) EP0 is set in H2, and a memory space EP1 is set in H1. EP0 and EP1 form the two ends of the connection bridge, and the connection bridge forwards the access request address between H1 and H2 across the bus domain. When H2 needs to borrow device A, H2 will initiate an access request address for virtual device a, and the access request address will be redirected to EP0. Since virtual device a and device A are in different bus domains and have different address spaces, after the connection bridge obtains the access request address, it needs to perform address conversion on the access request address to obtain an updated access request. The access request is then sent from the bus of H1 through EP1. The access request will first reach the control bridge and then be forwarded to device A through the control bridge, thereby enabling H2 to access device A.
[0048] Specifically, this embodiment provides a device space access system across bus domains, such as Figure 2 As shown in, the system includes a device borrower, a device lender and a connection bridge, wherein the connection bridge is used to connect the buses corresponding to the device borrower and the device lender respectively; the device borrower includes a virtual device, which is a device virtualized by the device borrower based on the virtual device in the device lender; the connection bridge is used to receive a request access address, and perform address conversion on the request access address to obtain a request after the converted address, and send the request after the converted address to the control bridge; the device lender includes the control bridge, which is used to forward the received request after the converted address to the virtualized device through the control bridge, wherein the control bridge is used to connect the bus of the virtualized device and the device lender.
[0049] In this embodiment, the connection bridge is a PCI e non-transparent bridge (Non-transparent Bridge), which is represented as a PCI e EP (Endpoint) in the PCI e bus of the device borrower and the device lender. In this embodiment, the EP of the device borrower is called EP0, and the EP of the device lender is called EP1. Both EP0 and EP1 of the connection bridge have specific address spaces. When the device borrower accesses the specific space of EP0, the connection bridge will convert the access through the address space and send it on the PCI e bus of the device lender through EP1, so as to realize the access from the device borrower to the device lender; conversely, when the device lender accesses the specific space of EP1, the connection bridge will convert the access through EP0 on the PCI e bus of the device borrower after the address conversion operation, so as to realize the access from the device lender to the device borrower.
[0050] One end of the control bridge of this embodiment is connected to the PCI e bus of the device lender, and the other end is connected to the virtualized device, and it has the functions of a PCI e transparent bridge and a non-transparent bridge. As a transparent bridge, it does not change the PCI e bus topology of the device lender, ensuring the normal use of the virtualized device in the device lender. As a non-transparent bridge, when the device borrower uses the virtualized device, it can further process and control the PCI e data entering and leaving the virtualized device, including: realizing the access of the connection bridge to the configuration space of the virtualized device; realizing the redirection of the DMA request and MSI / MSI-X request of the virtualized device.
[0051] In one implementation, this embodiment pre-configures the connection bridge and the control bridge, and establishes an address space conversion mapping table. The bridge driver of the device lender configures the connection bridge EP1 and the control bridge. Specifically, based on the number of virtualized devices, the BDF ID of the virtualized devices, the IO space information of the virtualized devices, the memory space information of the virtualized devices, the BDF ID of the control bridge, and the BAR space information of the control bridge, the configuration of the connection bridge is completed. Based on the BAR space information of the connection bridge and the BDF ID of the connection bridge, the configuration of the control bridge is completed. Next, this embodiment establishes the address space conversion mapping table based on the BAR space information of the connection bridge, the BAR space information of the control bridge, and the mapping table of the BAR space information of the connection bridge to each space of the virtualized device. The address space conversion mapping table is used to reflect the address offset between the BAR space information of the connection bridge and the BAR space information of the control bridge. In addition, during the process of initializing the virtual device by the device borrower, the virtual device driver limits its write operations on some special configuration spaces and BAR space addresses (including: BAR registers, MSI / MSI-X registers, etc.) to ensure the normal operation of the virtual device.
[0052] The EP0 of the connection bridge of this embodiment provides a memory mapping space (BAR space) for mapping various addresses and resources of the virtualized devices. The control bridge of each virtualized device includes: configuration space, IO space, memory space, and supports multiple virtualized devices. The BAR space of EP0 of the connection bridge supports the Res i zab le BAR feature. The size of the BAR space used for mapping can be adjusted according to the size of the BAR space accessed by the 64-bit address of the virtualized device and the hardware limitations of the device borrower, so that the device borrower can obtain the access capability of the memory space of the virtualized device to the maximum extent. Specifically, after the configuration of the connection bridge and the control bridge is completed, the device borrower can calculate the total size of the memory space of all virtualized devices when establishing a virtual device, and then the virtual device driver adjusts the BAR space size of the connection bridge. For example, if the virtualized device is 4 GPUs, each with a video memory space of 24GB, a total of 96GB is required (other smaller memory spaces can be implemented using other BAR spaces, and only the largest space is described here). The virtual device driver adjusts the EP0 BAR space size to If the device borrower's system successfully allocates an address to the BAR space, the adjustment is successful; otherwise, the EP0BAR space size is adjusted to 1 / 2 of the size adjusted in the last attempt until the adjustment is successful.
[0053] The BAR space is divided into three areas (which can be implemented on one BAR space or using multiple BAR spaces), namely the "configuration space access" area, the "IO space access" area, and the "memory space access" area.
[0054] When performing address space conversion, if the access area of the requested access address is the configuration space, the configuration space access base address in the BAR space information of the control bridge plus the low-order offset address will replace the requested access address to obtain the request after the conversion address; if the access area of the requested access address is the IO space, the IO space access base address in the BAR space information of the control bridge plus the low-order offset address will replace the requested access address to obtain the request after the conversion address; if the access area of the requested access address is the memory space, the memory space base address of the virtual device itself plus the low-order offset address will replace the requested access address to obtain the request after the conversion address. That is to say, the address space conversion mapping table in this embodiment is used to reflect the address offset between the BAR space information of the connection bridge and the BAR space information of the control bridge.
[0055] When accessing the virtualized device, if the access area of the request after the conversion address is the configuration space or the IO space, the control bridge implements the characteristics of a non-transparent bridge through the BAR space to complete the access to the configuration space or the IO space of the virtualized device. If the access area of the request after the conversion address is the memory space, the control bridge implements the characteristics of a transparent bridge to directly forward the request to the memory space of the virtualized device. Specifically, if the access area of the request after the conversion address is the configuration space, the frame header information of the request is set according to the configuration space, and the frame header information includes: request type, AT, TC. Take the low-order offset address as the access address of the configuration space, and set the Completer ID to the BDF ID of the virtualized device. If the access area of the request after the conversion address is the IO space, the frame header information of the request is set according to the IO space, and take the low-order offset address as the access address of the IO space;
[0056] It can be seen that the device borrower of the present invention can access the space of the virtualized device just like accessing its own device space, and can support access to multiple virtualized devices, and the device borrower can obtain the access capability of the memory space of the virtualized device to the maximum extent.
[0057] Based on the above embodiments, the present invention also provides a device space access system across bus domains, such as Figure 2 As shown in , the system is applied to the device space access method across bus domains described in the above-mentioned embodiments, and the system includes: a device borrower, a device lender, and a connection bridge, wherein the connection bridge is used to connect the buses corresponding to the device borrower and the device lender respectively; the device borrower includes a virtual device, and the virtual device is a device virtualized by the device borrower based on the virtual device in the device lender; the connection bridge is used to receive a request access address, and perform address conversion on the request access address to obtain a request after the conversion address, and send the request after the conversion address to the control bridge; the device lender includes the control bridge, which is used to forward the received request after the conversion address to the virtualized device through the control bridge, wherein the control bridge is used to connect the bus of the virtualized device and the device lender.
[0058] The functional principles of each module in the cross-bus domain device space access system of this embodiment are the same as the functions to be implemented in the method steps in the above embodiments, and will not be repeated here.
[0059] Based on the above embodiment, the present invention further provides a terminal, the principle block diagram of the terminal can be as follows: Figure 3 The terminal may include one or more processors 100 ( Figure 3Only one is shown), a memory 101 and a computer program 102 stored in the memory 101 and executable on one or more processors 100, for example, a device space access program across bus domains. When one or more processors 100 execute the computer program 102, the various steps in the embodiment of the device space access method across bus domains can be implemented. Alternatively, when one or more processors 100 execute the computer program 102, the functions of the various modules / units in the embodiment of the device space access method across bus domains can be implemented, which is not limited here.
[0060] In one embodiment, the processor 100 may be a central processing unit (CPU), or other general-purpose processors, digital signal processors (DSP), application-specific integrated circuits (ASIC), field-programmable gate arrays (FPGA), or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc. A general-purpose processor may be a microprocessor or any conventional processor, etc.
[0061] In one embodiment, the memory 101 may be an internal storage unit of an electronic device, such as a hard disk or memory of the electronic device. The memory 101 may also be an external storage device of the electronic device, such as a plug-in hard disk, a smart memory card (SMC), a secure digital (SD) card, a flash card, etc. equipped on the electronic device. Further, the memory 101 may also include both an internal storage unit of the electronic device and an external storage device. The memory 101 is used to store computer programs and other programs and data required by the terminal. The memory 101 may also be used to temporarily store data that has been output or is to be output.
[0062] Those skilled in the art will understand that Figure 3 The principle block diagram shown in the figure is only a block diagram of a partial structure related to the scheme of the present invention, and does not constitute a limitation on the terminal to which the scheme of the present invention is applied. The specific terminal may include more or fewer components than those shown in the figure, or combine certain components, or have a different arrangement of components.
[0063] Those of ordinary skill in the art can understand that all or part of the processes in the above-mentioned embodiment methods can be completed by instructing the relevant hardware through a computer program, and the computer program can be stored in a non-volatile computer-readable storage medium. When the computer program is executed, it can include the processes of the embodiments of the above-mentioned methods. Among them, any reference to memory, storage, operating database or other media used in the embodiments provided by the present invention may include non-volatile and / or volatile memory. Non-volatile memory may include read-only memory (ROM), programmable ROM (PROM), electrically programmable ROM (EPROM), electrically erasable programmable ROM (EEPROM) or flash memory. Volatile memory may include random access memory (RAM) or external cache memory. By way of illustration and not limitation, RAM is available in many forms, such as static RAM (SRAM), dynamic RAM (DRAM), synchronous DRAM (SDRAM), double data rate SDRAM (DDRSDRAM), enhanced SDRAM (ESDRAM), synchronous link DRAM (SLDRAM), RAMbus direct RAM (RDRAM), direct RAMbus dynamic RAM (DRDRAM), and RAMbus dynamic RAM (RDRAM), etc.
[0064] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit it. Although the present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or make equivalent replacements for some of the technical features therein. However, these modifications or replacements do not deviate the essence of the corresponding technical solutions from the spirit and scope of the technical solutions of the embodiments of the present invention.
Claims
1. A method for accessing device space across bus domains, characterized in that: The method comprises: Obtaining a request access address of a device borrower to a virtual device, wherein the virtual device is a device virtualized by the device borrower based on a virtual device in a device lender; By means of a connection bridge, the request access address is converted based on a preset address space conversion mapping table to obtain a request after the conversion address, wherein the connection bridge is used to connect buses corresponding to the device borrower and the device lender respectively; Forwarding the request after the address conversion to the control bridge corresponding to the virtualized device through the connection bridge, and the control bridge forwarding the request after the address conversion to the virtualized device, wherein the control bridge is used to connect the bus of the virtualized device and the device lender; The method further comprises: configuring the connection bridge and the control bridge, and establishing an address space conversion mapping table; The configuring the connection bridge and the control bridge to establish an address space conversion mapping table includes: Based on the number of virtualized devices, the BDFID of the virtualized devices, the IO space information of the virtualized devices, the memory space information of the virtualized devices, the BDF ID of the control bridge, and the BAR space information of the control bridge, the configuration of the connection bridge is completed; Based on the BAR space information of the connection bridge and the BDF ID of the connection bridge, completing the configuration of the control bridge; Based on the BAR space information of the connection bridge, the BAR space information of the control bridge, and a mapping table from the BAR space information of the connection bridge to each space of the virtualized device, the address space conversion mapping table is established. The address space conversion mapping table is used to reflect the address offset between the BAR space information of the connection bridge and the BAR space information of the control bridge.
2. The device space access method across bus domains according to claim 1, characterized in that: After configuring the connection bridge and the control bridge, the method further includes: When establishing a virtual device, the device borrower calculates the total size of all virtual device memory spaces; The virtual device driver adjusts the BAR space size of the connection bridge.
3. The device space access method across bus domains according to claim 2, characterized in that: The step of performing address conversion on the requested access address based on a preset address space conversion mapping table through the connection bridge to obtain a request after the converted address comprises: If the access area of the requested access address is the configuration space, the configuration space access base address in the BAR space information of the control bridge is added with the low-order offset address to replace the requested access address, so as to obtain the request after the converted address; If the access area of the requested access address is the IO space, the IO space access base address in the BAR space information of the control bridge is added with the low-order offset address to replace the requested access address, so as to obtain the request after the converted address; If the access area of the requested access address is a memory space, the requested access address will be replaced by the memory space base address of the virtual device itself plus a low-order offset address to obtain the request after the converted address.
4. The device space access method across bus domains according to claim 3 is characterized in that: The control bridge forwards the request after the address conversion to the virtualized device, including: If the access area of the request after the address conversion is the configuration space or the IO space, the control bridge implements the characteristics of the non-transparent bridge through the BAR space to complete the access to the configuration space or the IO space of the virtualized device; If the access area of the request after the address conversion is the memory space, the control bridge implements the transparent bridge characteristic and directly forwards the request to the memory space of the virtualized device.
5. The device space access method across bus domains according to claim 4, characterized in that: If the access area of the request after the address conversion is the configuration space or the IO space, the control bridge implements the characteristics of the non-transparent bridge through the BAR space to complete the access to the configuration space or the IO space of the virtualized device, including: If the access area of the request after the address conversion is the configuration space, the frame header information of the configuration space setting request is used as the access address of the configuration space, and the Completer ID is set to the BDFID of the virtualized device; If the access area of the request after the address conversion is the IO space, the frame header information of the request is set according to the IO space, and the low-order offset address is taken as the access address of the IO space.
6. A device space access system across bus domains, characterized in that: The system is applied to the device space access method across bus domains according to any one of claims 1 to 5, and the system includes: A device borrower, a device lender, and a connection bridge, wherein the connection bridge is used to connect buses corresponding to the device borrower and the device lender respectively; The device borrower includes a virtual device, and the virtual device is a device virtualized by the device borrower based on the virtual device in the device lender; The connection bridge is used to receive a request access address, perform address conversion on the request access address, obtain a request after the address conversion, and send the request after the address conversion to the control bridge; The device lender includes the control bridge, which is used to forward the received request after the address conversion to the virtualized device through the control bridge, wherein the control bridge is used to connect the bus of the virtualized device and the device lender.
7. A terminal, characterized in that: The terminal includes a memory, a processor, and a cross-bus domain device space access program stored in the memory and executable on the processor. When the processor executes the cross-bus domain device space access program, the steps of the cross-bus domain device space access method as described in any one of claims 1 to 5 are implemented.
8. A computer-readable storage medium, characterized in that: The computer-readable storage medium stores a cross-bus domain device space access program, and when the cross-bus domain device space access program is executed by the processor, the steps of the cross-bus domain device space access method according to any one of claims 1-5 are implemented.
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