transistor
By designing gate dielectric layers of varying thicknesses and conductive materials with different work functions within the transistor, combined with a metal barrier layer, the gate-induced leakage current problem was solved, improving the transistor's reliability and stability while reducing static power consumption.
Patent Information
- Application Number
- CN202410584824.1
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2024-05-11
- Publication Date
- 2025-11-11
- Estimated Expiration
- 2044-05-11
AI Technical Summary
As semiconductor device sizes shrink and gate dielectric layers become thinner, gate-induced leakage current (GIDL) generated in the off state of transistors becomes severe, affecting reliability and static power consumption, and limiting further reduction in transistor size.
Design a transistor structure in which the gate dielectric layer has a thicker second portion above the gate trench, and uses first and second work function materials with different work functions in the gate conductive layer, combined with a metal barrier layer to improve adhesion and prevent diffusion.
This reduces the gate-induced leakage current of the transistor, improves the reliability and stability of the transistor, and reduces static power consumption.
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Figure CN118448444B_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of semiconductor technology, and in particular to a transistor. Background Technology
[0002] As the size of semiconductor devices continues to shrink, the feature size of transistors is also shrinking rapidly, and the thickness of the corresponding gate dielectric layer is becoming thinner and thinner. The gate-induced drain leakage (GIDL) generated by the transistor in the off state or standby state is becoming more and more serious, which has a significant impact on the reliability of transistors, increases the instability and static power consumption of transistors, and restricts the further reduction of transistor size. Summary of the Invention
[0003] Based on this, this application provides a transistor that can optimize transistor reliability.
[0004] A transistor, comprising:
[0005] A substrate having gate trenches therein;
[0006] A gate dielectric layer, covering the bottom and sidewalls of the gate trench, includes a first portion and a second portion; the first portion is located at the bottom and lower part of the gate trench; the second portion is located at the upper part of the gate trench and connected to the first portion, and the thickness of the second portion is greater than the thickness of the first portion;
[0007] A gate conductive layer is located in the gate trench; the gate conductive layer includes a first work function material and a second work function material; the first work function material is located at the lower part of the gate trench, and the second work function material is located at the top surface of the first work function material, wherein the work function of the first work function material is greater than the work function of the second work function material.
[0008] In some embodiments, the transistor further includes:
[0009] A metal barrier layer is located at least between the first work function material and the first portion, and is in contact with both the first work function material and the first portion.
[0010] The sidewall of the second work function material is in contact with the second part.
[0011] In some embodiments, the second portion and the second work function material extend in opposite directions along the top surface of the metal barrier layer until they come into contact with each other.
[0012] In some embodiments, the second work function material extends along the top surface of the metal barrier layer to contact the second portion.
[0013] In some embodiments, the second portion extends along the top surface of the metal barrier layer to contact the sidewall of the second work function material.
[0014] In some embodiments, the second part includes:
[0015] The first protrusion is located between the first work function material and the second work function material, and is in contact with both the first work function material and the second work function material.
[0016] In some embodiments, in a direction perpendicular to the substrate, the distance between the bottom surface of the second portion and the bottom of the gate trench is less than or equal to the distance between the top surface of the first work function material and the bottom of the gate trench.
[0017] In some embodiments, the second part includes:
[0018] The overlapping portion is located on the sidewall of the gate trench and contacts the top surface of the first portion;
[0019] The inner portion is located in the gate trench and is in contact with the sidewall of the overlapping portion.
[0020] In some embodiments, the second part further includes:
[0021] The outer portion is located on the side of the overlapping portion away from the gate trench and is in contact with the sidewall of the overlapping portion. In a direction perpendicular to the substrate, the distance between the bottom surface of the outer portion and the bottom of the gate trench is greater than or equal to the distance between the bottom surface of the overlapping portion and the bottom of the gate trench.
[0022] In some embodiments, the overlapping portion is integrally formed with the first portion.
[0023] In the aforementioned transistor, the thickness of the second portion of the gate dielectric layer located at the upper part of the gate trench is greater than the thickness of the first portion located at the bottom and sidewall of the gate trench. The work function of the first work function material located at the lower part of the gate trench in the gate conductive layer is greater than the work function of the second work function material located on the top surface of the first work function material. This reduces the gate-induced leakage current of the transistor and improves the reliability of the transistor. Attached Figure Description
[0024] To more clearly illustrate the technical solutions in the embodiments of this application or the conventional technology, the drawings used in the description of the embodiments or the conventional technology will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.
[0025] Figure 1 This is a cross-sectional schematic diagram of the transistor in the first embodiment;
[0026] Figure 2 for Figure 1 Enlarged schematic diagram of region A in the middle;
[0027] Figure 3 This is a cross-sectional schematic diagram of the transistor in the second embodiment;
[0028] Figure 4 This is a cross-sectional schematic diagram of the transistor in the third embodiment;
[0029] Figure 5 This is a cross-sectional schematic diagram of the transistor in the fourth embodiment;
[0030] Figure 6 This is a cross-sectional schematic diagram of the transistor in the fifth embodiment;
[0031] Figure 7 This is a cross-sectional schematic diagram of the transistor in the sixth embodiment;
[0032] Figure 8 This is a cross-sectional schematic diagram of the transistor in the 7th embodiment;
[0033] Figure 9 This is a cross-sectional schematic diagram of the transistor in the 8th embodiment;
[0034] Figure 10 This is a cross-sectional schematic diagram of the transistor in the 9th embodiment;
[0035] Figure 11 This is a cross-sectional schematic diagram of the transistor in the 10th embodiment;
[0036] Figure 12 This is a cross-sectional schematic diagram of the transistor in the 11th embodiment;
[0037] Figure 13 This is a cross-sectional schematic diagram of the transistor in the 12th embodiment;
[0038] Figure 14 This is a cross-sectional schematic diagram of the transistor in the 13th embodiment;
[0039] Figure 15 This is a cross-sectional schematic diagram of the transistor in the 14th embodiment.
[0040] Explanation of reference numerals in the attached figures:
[0041] Substrate 102, gate trench 104, gate dielectric layer 106, gate conductive layer 108, metal barrier layer 110, first portion 202, second portion 204, first work function material 206, second work function material 208, first protrusion 302, overlapping portion 304, inner portion 306, outer portion 308. Detailed Implementation
[0042] To facilitate understanding of this application, a more complete description will be provided below with reference to the accompanying drawings, which illustrate preferred embodiments of the application. However, this application may be implemented in many different forms and is not limited to the embodiments described herein. Rather, these embodiments are provided so that the disclosure of this application will be thorough and complete.
[0043] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the application.
[0044] It should be understood that when an element or layer is referred to as "on," "adjacent to," "connected to," or "coupled to" other elements or layers, it may be directly on, adjacent to, connected to, or coupled to other elements or layers, or there may be intervening elements or layers. Conversely, when an element is referred to as "directly on," "directly adjacent to," "directly connected to," or "directly coupled to" other elements or layers, there are no intervening elements or layers. It should be understood that although the terms first, second, third, etc., may be used to describe various elements, parts, regions, layers, doping types, and / or portions, these elements, parts, regions, layers, doping types, and / or portions should not be limited by these terms. These terms are only used to distinguish one element, part, region, layer, doping type, or portion from another element, part, region, layer, doping type, or portion. Therefore, without departing from the teachings of this invention, the first element, component, region, layer, doping type, or portion discussed below may be represented as a second element, component, region, layer, or portion; for example, the first work function material may be referred to as the second work function material, and similarly, the second work function material may be referred to as the first work function material; the first work function material and the second work function material are different work function materials.
[0045] Spatial relation terms such as “below,” “under,” “below,” “under,” “above,” “above,” etc., are used herein to describe the relationship between one element or feature shown in the figure and other elements or features. It should be understood that, in addition to the orientation shown in the figure, spatial relation terms also include different orientations of the device in use and operation. For example, if the device in the figure is flipped, the element or feature described as “below,” “under,” or “below” will be oriented “above” the other element or feature. Therefore, the exemplary terms “below” and “under” can include both above and below orientations. Furthermore, the device may also include other orientations (e.g., rotated 90 degrees or other orientations), and the spatial descriptive terms used herein will be interpreted accordingly.
[0046] When used herein, the singular forms of “a,” “an,” and “the” may also include the plural forms unless the context clearly indicates otherwise. It should also be understood that when the terms “comprise” and / or “comprising” are used in this specification, the presence of the stated feature, integer, step, operation, element, and / or part is established, but the presence or addition of one or more other features, integers, steps, operations, elements, parts, and / or groups is not excluded. Meanwhile, when used herein, the term “and / or” includes any and all combinations of the associated listed items.
[0047] Embodiments of the invention are described herein with reference to cross-sectional views illustrating ideal embodiments (and intermediate structures) of the invention, thus allowing for variations in the illustrated shape due to, for example, manufacturing techniques and / or tolerances. Therefore, embodiments of the invention should not be limited to the specific shapes of the regions shown herein, but rather include shape deviations due to, for example, manufacturing techniques. For instance, implantation regions shown as rectangular typically have rounded or curved features at their edges and / or implantation concentration gradients, rather than a binary change from implantation regions to non-implantation regions. Similarly, the buried regions formed by implantation can result in some implantation in the region between the buried region and the surface traversed during implantation. Therefore, the regions shown in the figures are substantially schematic, and their shapes do not represent the actual shapes of regions of the device and do not limit the scope of the invention.
[0048] Figure 1 This is a cross-sectional view of the transistor in the first embodiment. Figure 2 for Figure 1 An enlarged schematic diagram of region A in the middle. Figure 1 The X and Z directions shown are the first and second directions in a plane parallel to the base, respectively. The X and Z directions intersect, and the Y direction is the third direction perpendicular to the base. Figure 1 , Figure 2As shown, in this embodiment, a transistor is provided, including: a substrate 102, a gate dielectric layer 106, and a gate conductive layer 108; a gate trench 104 is provided in the substrate 102; the gate dielectric layer 106 covers the bottom and sidewalls of the gate trench 104, including a first portion 202 and a second portion 204, the first portion 202 is located at the bottom and lower part of the gate trench 104, the second portion 204 is located at the upper part of the gate trench 104 and is connected to the first portion 202, the thickness of the second portion 204 is greater than the thickness of the first portion 202; the gate conductive layer 108 is located in the gate trench 104, the gate conductive layer 108 includes a first work function material 206 and a second work function material 208; the first work function material 206 is located at the lower part of the gate trench 104, the second work function material 208 is located at the top surface of the first work function material 206, and the work function of the first work function material 206 is greater than the work function of the second work function material 208.
[0049] In a third direction Z perpendicular to the substrate 102, a gate trench 104 extends from a first surface of the substrate 102 into the substrate 102. The bottom of the gate trench 104 is the surface where the extension of the gate trench 104 in the third direction Z stops. The sidewall of the gate trench 104 is the surface of the gate trench 104 in the third direction Z. The bottom and sidewall of the gate trench 104 constitute the inner wall of the gate trench 104. The lower part of the gate trench 104 is the portion of the gate trench 104 away from the opening. The upper part of the gate trench 104 is the portion between the lower part of the gate trench 104 and the opening of the gate trench 104. The sidewall of the upper part of the gate trench 104 extends in the same direction as the sidewall of the lower part of the gate trench 104, and the sidewall of the upper part of the gate trench 104 contacts the sidewall of the lower part of the gate trench 104.
[0050] The gate dielectric layer 106 covers the inner wall of the gate trench 104. The first portion 202 is located at the bottom of the gate trench 104 and extends along the bottom of the gate trench 104 to the lower sidewall of the gate trench 104. The second portion 204 extends from the first portion 202 away from the first portion 202 along the upper sidewall of the gate trench 104. In a direction parallel to the plane of the substrate 102 (i.e., the first direction X), the first thickness T1 of the second portion 204 is greater than the second thickness T2 of the first portion 202.
[0051] The first work function material 206 in the gate conductive layer 108 is located at the lower part of the gate trench 104. The surface of the first work function material 206 away from the bottom of the gate trench 104 is the top surface. The second work function material 208 in the gate conductive layer 108 is located on the top surface of the first work function material layer 206 and is in contact with the top surface of the first work function material layer 206.
[0052] In the aforementioned transistor, the thickness of the second portion 204 located at the upper part of the gate trench 104 in the gate dielectric layer 106 is greater than the thickness of the first portion 202 located at the bottom and sidewall of the gate trench 104. The work function of the first work function material 206 located at the lower part of the gate trench 104 in the gate conductive layer 108 is greater than the work function of the second work function material 208 located on the top surface of the first work function material 206. This reduces the gate-induced leakage current of the transistor and improves the reliability of the transistor.
[0053] Figure 3 This is a cross-sectional schematic diagram of the transistor in the second embodiment, as shown below. Figure 1 , Figure 3 As shown, in some embodiments, the transistor further includes a metal barrier layer 110, which is located at least between the first work function material 206 and the first portion 202, and is in contact with both the first work function material 206 and the first portion 202, wherein the sidewall of the second work function material 208 is in contact with the second portion 204. The metal barrier layer 110 increases the adhesion between the gate dielectric layer 106 and the gate conductive layer 108, and blocks diffusion between the gate dielectric layer 106 and the gate conductive layer 108.
[0054] It is understandable that, such as Figure 1 As shown, the metal barrier layer 110 is located between the first work function material 206 and the first portion 202. The opposing surfaces of the metal barrier layer 110 are in contact with the first work function material 206 and the first portion 202, respectively. At this time, the distance between the top surface of the metal barrier layer 110 away from the bottom of the gate trench 104 and the bottom of the gate trench 104 is less than or equal to the distance between the bottom surface of the second portion 204 near the bottom of the gate trench 104 and the bottom of the gate trench 104. Figure 3 As shown, the metal barrier layer 110 is located between the first work function material 206 and the first portion 202, and between the first work function material 206 and the portion of the second portion 204 near the bottom of the gate trench 104. The opposing surfaces of the metal barrier layer 110 are in contact with the first work function material 206, the first portion 202, and the portion of the second portion 204 near the bottom of the gate trench 104, respectively. At this time, the distance between the top surface of the metal barrier layer 110 away from the bottom of the gate trench 104 and the bottom of the gate trench 104 is greater than the distance between the bottom surface of the second portion 204 near the bottom of the gate trench 104 and the bottom of the gate trench 104. For example, the material of the metal barrier layer 110 includes titanium metal and titanium nitride.
[0055] Figure 4 This is a cross-sectional schematic diagram of the transistor in the third embodiment. Figure 5 This is a cross-sectional schematic diagram of the transistor in the fourth embodiment. Figure 6This is a cross-sectional schematic diagram of the transistor in the fifth embodiment. Figure 7 This is a cross-sectional schematic diagram of the transistor in the sixth embodiment, as shown. Figures 1-7 As shown, in some embodiments, in the direction perpendicular to the substrate 102, i.e., in the third direction Y, the distance D1 between the top surface of the first work function material 206 away from the bottom of the gate trench 104 and the bottom of the gate trench 104 is equal to the distance D2 between the top surface of the metal barrier layer 110 away from the bottom of the gate trench 104 and the bottom of the gate trench 104. Here, "equal to" means approximately equal, and the non-uniformity of film thickness caused by the manufacturing process can be ignored.
[0056] Figure 8 This is a cross-sectional schematic diagram of the transistor in the 7th embodiment. Figure 9 This is a cross-sectional schematic diagram of the transistor in the 8th embodiment. Figure 10 This is a cross-sectional schematic diagram of the transistor in the 9th embodiment. Figure 11 This is a cross-sectional schematic diagram of the transistor in the 10th embodiment. Figure 12 This is a cross-sectional schematic diagram of the transistor in the 11th embodiment. Figure 13 This is a cross-sectional schematic diagram of the transistor in the 12th embodiment. Figure 14 This is a cross-sectional schematic diagram of the transistor in the 13th embodiment. Figure 15 This is a cross-sectional schematic diagram of the transistor in the 14th embodiment, as shown. Figures 8-15 As shown, in some embodiments, in the direction perpendicular to the substrate 102, i.e., in the third direction Y, the distance D1 between the top surface of the first work function material 206 away from the bottom of the gate trench 104 and the bottom of the gate trench 104 is greater than the distance D2 between the top surface of the metal barrier layer 110 away from the bottom of the gate trench 104 and the bottom of the gate trench 104. In this case, in the third direction Y, the first work function material 206 has a portion protruding from the metal barrier layer 110.
[0057] like Figure 1 , Figure 4 , Figure 5 , Figure 7 As shown, in some embodiments, in a direction perpendicular to the substrate 102, i.e., in the third direction Y, the distance D3 between the bottom surface of the second portion 204 near the bottom of the gate trench 104 and the bottom of the gate trench 104 is equal to the distance D1 between the top surface of the first work function material 206 away from the bottom of the gate trench 104 and the bottom of the gate trench 104.
[0058] like Figure 3 , Figure 6 , Figures 8-15As shown, in some embodiments, in a direction perpendicular to the substrate 102, i.e., in the third direction Y, the distance D3 between the bottom surface of the second portion 204 near the bottom of the gate trench 104 and the bottom of the gate trench 104 is less than the distance D1 between the top surface of the first work function material 206 away from the bottom of the gate trench 104 and the bottom of the gate trench 104.
[0059] like Figure 1 , Figure 3 , Figures 8-13 As shown, in some embodiments, the second portion 204 extends along the top surface of the metal barrier layer 110 away from the bottom of the gate trench 104 to contact the sidewall of the second work function material 208. In this case, the second portion 204 is present on the top surface of the metal barrier layer 110, but the second work function material 208 is not present. Exemplarily, the sidewall of the second work function material 208 is in a direction perpendicular to the substrate 102 (e.g., the third direction Y).
[0060] like Figure 4 , Figure 5 As shown, in some embodiments, the second portion 204 and the second work function material 208 extend in opposite directions along the top surface of the metal barrier layer 110 away from the bottom of the gate trench 104 until they come into contact with each other. The second portion 204 and the second work function material 208 extending in opposite directions until they come into contact with each other means that the second portion 204 extends in the direction toward the second work function material 208, and the second work function material 208 extends in the direction toward the second portion 204 until they come into contact with each other. At this time, the second portion 204 and the second work function material 208 are present on the top surface of the metal barrier layer 110 at the same time.
[0061] like Figure 6 , Figure 7 , Figure 14 , Figure 15 As shown, in some embodiments, the second work function material 208 extends along the top surface of the metal barrier layer 110 away from the bottom of the gate trench 104 to contact the second portion 204. In this case, the second work function material 208 is present on the top surface of the metal barrier layer 110, but the second portion 204 is not present.
[0062] like Figure 6 , Figure 7 , Figure 14 , Figure 15 As shown, in some embodiments, the second work function material 208 covers the top surface of the first work function material 206.
[0063] like Figure 9 , Figure 10 , Figure 11 , Figure 13 As shown, in some embodiments, the second part 204 includes a first protrusion 302, which is located between the first work function material 206 and the second work function material 208, and contacts the first work function material 206 and the second work function material 208 respectively.
[0064] like Figure 1 , Figure 4 , Figure 8 , Figure 9 As shown, in some embodiments, the second portion 204 includes: an overlapping portion 304 and an inner portion 306. The overlapping portion 304 is located on the sidewall of the gate trench 104 and contacts the top surface of the first portion 202 away from the bottom of the gate trench 104. The inner portion 306 is located in the gate trench 104 and contacts the sidewall of the overlapping portion 304. The inner portion 306 is located on one side of the overlapping portion 304.
[0065] like Figure 3 , Figure 5 , Figures 10-13 As shown, in some embodiments, the second portion 204 includes: an overlapping portion 304, an inner portion 306, and an outer portion 308. The overlapping portion 304 is located on the sidewall of the gate trench 104 and contacts the top surface of the first portion 202 away from the bottom of the gate trench 104. The inner portion 306 is located in the gate trench 104 and contacts the sidewall of the overlapping portion 304. The outer portion 308 is located on the side of the overlapping portion 304 away from the gate trench 104 and contacts the sidewall of the overlapping portion 304. The outer portion 308 and the inner portion 306 are located on opposite sides of the overlapping portion 304. For example, the outer portion 308 may be obtained by oxidizing the substrate 102.
[0066] like Figure 6 , Figure 7 , Figure 14 and Figure 15 As shown, in some embodiments, the second portion 204 includes: an overlapping portion 304 and an outer portion 308. The overlapping portion 304 is located on the sidewall of the gate trench 104 and contacts the top surface of the first portion 202 away from the bottom of the gate trench 104. The outer portion 308 is located on the side of the overlapping portion 304 away from the gate trench 104 and contacts the sidewall of the overlapping portion 304. The outer portion 308 is located on one side of the overlapping portion 304.
[0067] In some embodiments, the overlapping portion 304 is integrally formed with the first portion 202.
[0068] like Figure 3, Figure 5 , Figure 6 As shown, in some embodiments, in a direction perpendicular to the substrate 102 (third direction Y), the distance between the bottom surface of the outer portion 308 and the bottom of the gate trench 104 is equal to the distance between the bottom surface of the overlapping portion 304 and the bottom of the gate trench 104.
[0069] In other embodiments, in a direction perpendicular to the substrate 102, the distance between the bottom surface of the outer portion 308 and the bottom of the gate trench 104 is greater than the distance between the bottom surface of the overlapping portion 304 and the bottom of the gate trench 104.
[0070] like Figure 3 As shown, in some embodiments, in a direction perpendicular to the substrate 102, the distance between the bottom surface of the inner portion 306 and the bottom of the gate trench 104 is greater than the distance between the bottom surface of the overlapping portion 304 and the bottom of the gate trench 104.
[0071] like Figure 5 As shown, in some other embodiments, in a direction perpendicular to the substrate 102, the distance between the bottom surface of the inner portion 306 and the bottom of the gate trench 104 is equal to the distance between the bottom surface of the overlapping portion 304 and the bottom of the gate trench 104.
[0072] For example, the constituent materials of the inner portion 306 and the outer portion 308 may be the same as or different from the constituent materials of the overlapping portion 304. In this embodiment, the constituent materials of the inner portion 306, the outer portion 308, and the overlapping portion 304 are the same, which is silicon oxide.
[0073] like Figure 1 As shown, in some embodiments, the distance D4 between the top surface of the second work function material 208 and the bottom of the gate trench 104 is less than the depth D5 of the gate trench 104. That is, the top surface of the gate conductive layer 108 is lower than the top surfaces of the first source / drain and the second source / drain, reducing the area of the gate conductive layer 108 covering the first source / drain and the second source / drain, thereby effectively improving the phenomenon of junction current generated by electric field changes.
[0074] like Figure 4As shown, in some embodiments, the transistor further includes a first source / drain 112 and a second source / drain 114, the first source / drain 112 and the second source / drain 114 being located in the substrate 102 on opposite sides of the gate trench 104, the distance D6 between the bottom surface of the first source / drain 112 and the bottom of the gate trench 104 being greater than the distance D7 between the bottom surface of the second work function material 208 and the bottom of the gate trench 104, and the distance D6 between the bottom surface of the second source / drain 114 and the bottom of the gate trench 104 being greater than the distance D7 between the bottom surface of the second work function material 208 and the bottom of the gate trench 104 being greater than the distance D8 between the bottom surface of the second source / drain 114 and the bottom of the gate trench 104 being greater than the distance D7 between the bottom surface of the second source / drain 114 and the bottom of the gate trench 104 being greater than the distance D8 ... The distance D7 between the bottom surface of the second work function material 208 and the bottom of the gate trench 104 is greater than that between the bottom surface of the first source / drain 112 and the bottom of the gate trench 104, and the distance D6 between the bottom surface of the first source / drain 112 and the bottom of the gate trench 104 is less than that between the top surface of the second work function material 208 and the bottom of the gate trench 104, and the distance D8 between the bottom surface of the second source / drain 114 and the bottom of the gate trench 104 is less than that between the top surface of the second work function material 208 and the bottom of the gate trench 104.
[0075] For example, the first work function material 206 is composed of tungsten metal, and the second work function material 208 is composed of polycrystalline silicon.
[0076] This disclosure also provides a semiconductor device including a plurality of transistors and word lines, wherein the word lines are electrically connected to a second work function material 208 of the transistors.
[0077] This disclosure also provides an electronic device including a plurality of the aforementioned transistors. The electronic device may include a smartphone, computer, tablet computer, artificial intelligence, wearable device, or smart mobile terminal. The embodiments of this application do not impose special limitations on the specific form of the aforementioned electronic device.
[0078] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features of the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.
[0079] The embodiments described above are merely illustrative of several implementation methods of this application, and while the descriptions are relatively specific and detailed, they should not be construed as limiting the scope of the patent application. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of this application, and these all fall within the protection scope of this application. Therefore, the protection scope of this patent application should be determined by the appended claims.
Claims
1. A transistor, characterized in that, include: A substrate having gate trenches therein; A gate dielectric layer, covering the bottom and sidewalls of the gate trench, comprising a first portion and a second portion; The first portion is located at the bottom and lower part of the gate trench; The second part is located at the upper part of the gate trench and is connected to the first part, and the thickness of the second part is greater than the thickness of the first part; A gate conductive layer is located in the gate trench; The gate conductive layer includes a first work function material and a second work function material; the first work function material is located at the lower part of the gate trench, and the second work function material is located at the top surface of the first work function material; the work function of the first work function material is greater than the work function of the second work function material. The second part includes: The first protrusion is located between the first work function material and the second work function material, and is in contact with both the first work function material and the second work function material.
2. The transistor according to claim 1, characterized in that, Also includes: A metal barrier layer is located at least between the first work function material and the first portion, and is in contact with both the first work function material and the first portion. The sidewall of the second work function material is in contact with the second part.
3. The transistor according to claim 2, characterized in that, The second part and the second work function material extend in opposite directions along the top surface of the metal barrier layer until they come into contact with each other.
4. The transistor according to claim 2, characterized in that, The second work function material extends along the top surface of the metal barrier layer to contact the second portion.
5. The transistor according to claim 2, characterized in that, The second portion extends along the top surface of the metal barrier layer to contact the sidewall of the second work function material.
6. The transistor according to any one of claims 1-5, characterized in that, In a direction perpendicular to the substrate, the distance between the bottom surface of the second portion and the bottom of the gate trench is less than or equal to the distance between the top surface of the first work function material and the bottom of the gate trench.
7. The transistor according to any one of claims 1-5, characterized in that, The second part includes: The overlapping portion is located on the sidewall of the gate trench and contacts the top surface of the first portion; The inner portion is located in the gate trench and is in contact with the sidewall of the overlapping portion.
8. The transistor according to claim 7, characterized in that, The second part also includes: The outer portion is located on the side of the overlapping portion away from the gate trench and is in contact with the sidewall of the overlapping portion. In a direction perpendicular to the substrate, the distance between the bottom surface of the outer portion and the bottom of the gate trench is greater than or equal to the distance between the bottom surface of the overlapping portion and the bottom of the gate trench.
9. The transistor according to claim 7, characterized in that, The overlapping portion is integrally formed with the first portion.
10. The transistor according to claim 7, characterized in that, In a direction perpendicular to the substrate, the distance between the bottom surface of the inner portion and the bottom of the gate trench is equal to the distance between the bottom surface of the overlapping portion and the bottom of the gate trench.
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