A Thermal Balance Method Based on a Three-Phase DC-DC Converter

Abstract

The present invention provides a thermal balance method based on a three-phase DC-DC converter, belonging to the field of three-phase DC-DC converters. The thermal balance method includes steps such as defining the state of power transmission, calculating the phase shift value, generating PWM waves to drive the switching tubes to work, and exchanging PWM waves to drive the switching tubes to work. Aiming at the problem that under the three-degree-of-freedom asymmetric control mode of the three-phase DC-DC converter, the switching tubes do not conduct for half a cycle each, resulting in temperature rise differences of the switching tubes, which in turn affect the performance and service life of the devices and the reliability of the converter. Without changing the topology structure, the present invention proposes a thermal balance method based on a three-phase DC-DC converter. Under the three-degree-of-freedom asymmetric control mode of the DAB converter, by exchanging the conduction time of the switching tubes, the thermal losses of the switching devices are balanced, and the working efficiency of the entire prototype is improved.

Description

Technical Field

[0001] The present invention relates to the field of three-phase DC-DC converters, and particularly to a thermal balance method based on a three-phase DC-DC converter. Background Art

[0002] For traditional single-phase DAB converters, the control method is very flexible. Common control methods include single-phase shift (SPS) control, extended phase shift (EPS) control, double-phase shift (DPS) control, triple-phase shift (TPS) control, and five-degree-of-freedom (5-DOF) control, etc. By optimizing the control strategy, zero-voltage turn-on of the switching devices in the DAB converter can be achieved, and at the same time, the effective value of the current in the devices can be reduced, enabling the DAB converter to have a high transmission efficiency. In recent years, with the further development of switching devices, the switching frequency and power density of the DAB converter have been further improved. Thus, the DAB converter is widely used in photovoltaic energy storage power stations and the field of electric vehicles. Adding a new half-bridge to both the primary and secondary bridge arms of the DAB and replacing the transformer with a three-phase transformer can obtain a three-phase DC-DC (3p-DAB) converter. Compared with a single-phase DC-DC (1p-DAB) converter, the 3p-DAB adds a new bridge arm. Since the new bridge arm shares the current of the other two bridge arms, the converter has the ability to transmit greater power. Similarly, the 3p-DAB can also achieve ZVS by using the leakage inductance of the transformer without adding additional resonant elements. The symmetrical structure of the primary and secondary sides can make the converter modular and is also conducive to realizing bidirectional operation. Different from the single-phase DAB, the three-phase interleaved parallel structure can be equivalent to three times the switching frequency, which can effectively reduce the input and output ripples, thereby reducing the volume of the filter and improving the quality of the output voltage and current.

[0003] Reference 1 "Optimized modulation and dynamic control of a three-phase dual-active bridge converter with variable duty cycles, IEEE Trans. Power Electron., vol. 34, no. 3, pp. 2856-2873, Mar. 2019, doi: 10.1109 / TPEL.2018.2842021." ("Optimized Modulation and Dynamic Control of a Three-Phase Dual-Active Bridge Converter with Variable Duty Cycles") applies different duty cycles to the arms of the primary and secondary sides to form a three-degree-of-freedom control scheme, but does not consider the problem of thermal imbalance of the switching tubes caused by different duty cycles.

[0004] Reference 2 "Optimal Simultaneous PWM Control for Three-Phase Dual-Active-Bridge Converters to Minimize Current Stress in the Whole Load Range, in IEEE Journal of Emerging and Selected Topics in Power Electronics, vol. 9, no. 5, pp. 5822-5837, Oct. 2021" ("Optimized Simultaneous PWM Control for Three-Phase Dual-Active-Bridge Converters to Minimize Current Stress in the Whole Load Range") also adopts a three-degree-of-freedom scheme with different primary and secondary duty cycles, and conducts optimization calculations with current stress as the optimization goal to further improve the transmission efficiency of the converter, but does not consider the problem of thermal imbalance of the switching tubes caused by different duty cycles.

[0005] The Chinese invention patent publication specification (CN107070241A) discloses a bidirectional DC-DC system with two full bridges on the primary and secondary sides and a method for its thermal balance. The invention proposes a modulation strategy for this system, but the proposed optimized modulation strategy is only applicable to the topology of this full bridge. With the further increase of the transmission power and the further improvement of the requirements for the quality of the output voltage and current, the application scenarios of this topology are limited, and three-phase DC-DC converters suitable for higher power levels need to be promoted.

[0006] In summary, the following problems still exist in the prior art:

[0007] 1. Many documents only consider the efficiency optimization method of three-phase DC-DC converters, but do not take into account the inconsistent loss conditions of different switching tubes, resulting in thermal imbalance, which still limits the transmission efficiency of the converter.

[0008] 2. For single-phase DC-DC converters, there are still some thermal balance optimization methods, but no scholars have studied the thermal balance of three-phase DC-DC converters.

[0009] 3. In the prior art, under the three-degree-of-freedom asymmetric control mode of the DAB converter, the switching tubes do not conduct for half a cycle each, which will cause temperature rise differences in the switching tubes. The operating temperature of the power switching devices affects the performance and service life of the devices, and thus also affects the reliability of the converter. Summary of the Invention

[0010] The technical problem to be solved by the present invention is the problems existing in the above prior art. Specifically, based on the three-phase DC-DC converter topology, without adding or modifying any hardware, an optimization method is proposed. Under the three-degree-of-freedom asymmetric control mode of the DAB converter, without changing the output voltage and current, by exchanging the conduction time of the switching tubes, the thermal losses of the switching devices are balanced, and the operating efficiency of the entire prototype is improved.

[0011] The object of the present invention is achieved as follows. The present invention provides a thermal balance method based on a three-phase DC-DC converter. The three-phase DC-DC converter system includes a primary-side DC power supply, a secondary-side DC power supply, and a bidirectional DC-DC module. The bidirectional DC-DC module includes a primary-side three-phase half-bridge circuit, a primary-side three-phase inductor, a primary-side transmitting coil, a secondary-side receiving coil, and a secondary-side three-phase half-bridge circuit. The primary-side three-phase half-bridge circuit is connected in parallel between the positive and negative DC buses of the primary-side DC power supply E1, and the secondary-side three-phase half-bridge circuit is connected in parallel between the positive and negative DC buses of the secondary-side DC power supply E2.

[0012] The primary-side three-phase half-bridge circuit includes 6 switching tubes S with anti-parallel diodes and output capacitors Pi , i = 1, 2,..., 6. Among them, the emitter of switching tube S P1 and the collector of switching tube S P2 are connected to form the primary-side phase A bridge arm. The emitter of switching tube S P3 and the collector of switching tube S P4 are connected to form the primary-side phase B bridge arm. The emitter of switching tube S P5 and the collector of switching tube S P6The collector electrodes are connected to form the C-phase bridge arm on the primary side, and the three connection points form the output terminal of the three-phase half-bridge circuit on the primary side. This output terminal is connected to the three-phase inductor on the primary side, and the other end of the three-phase inductor on the primary side is connected to the transmitting coil on the primary side; the three-phase half-bridge circuit on the secondary side includes 6 switching transistors S si , among which, the emitter of the switching transistor S s1 and the collector electrode of the switching transistor S s2 are connected to form the A-phase bridge arm on the secondary side. The emitter of the switching transistor S s3 and the collector electrode of the switching transistor S s4 are connected to form the B-phase bridge arm on the secondary side. The emitter of the switching transistor S s5 and the collector electrode of the switching transistor S s6 are connected to form the C-phase bridge arm on the secondary side. And the three connection points form the output terminal of the three-phase half-bridge circuit on the secondary side. The output terminal of this three-phase half-bridge circuit on the secondary side is connected to the receiving coil on the secondary side. The receiving coil on the secondary side receives the electromagnetic field emitted by the transmitting coil on the primary side through mutual inductance M and converts it into electrical energy;

[0013] The steps of the thermal balance method are as follows:

[0014] Step 1, define the state of power transmission

[0015] Given the DC output current command value I ref of the DC power supply on the secondary side, define the power transmission state as follows: If I ref > 0, the power flows from the DC power supply on the primary side to the DC power supply on the secondary side, and it is defined as forward power transmission; if I ref < 0, the power flows from the DC power supply on the secondary side to the DC power supply on the primary side, and it is defined as reverse power transmission; if I ref = 0, no power transmission occurs;

[0016] Step 2, calculate the phase shift value

[0017] Sample the DC output current I out of the DC power supply on the secondary side, calculate the DC output current error signal ΔI out , ΔI out = I ref - I out , and send the DC output current error signal ΔI out into the PI regulator to obtain the phase shift value (D1, D2, D3). Among them, D1 is the duty cycle when the switching transistors S P1 , S P2 , S P3 are at high level. D2 is the duty cycle when the switching transistors S s1 , S s2 , S s3 are at high level. D3 is the duty cycle when the switching transistor SP1 and the switching transistor S s1 phase difference;

[0018] Step 3, define the drive signal and the carrier wave

[0019] Denote the drive signal of the switching transistor S Pi as the drive signal Q Pi and denote the drive signal of the switching transistor S si as the drive signal Q si where:

[0020] The drive signal Q P1 and the drive signal Q P2 have a triangular carrier wave VT1, the drive signal Q P3 and the drive signal Q P4 have a triangular carrier wave VT2, the drive signal Q P5 and the drive signal Q P6 have a triangular carrier wave VT3. Among them, the phase difference between the carrier wave VT1 and the carrier wave VT2 is 120°, and the phase difference between the carrier wave VT2 and the carrier wave VT3 is 120°; the drive signal Q s1 and the drive signal Q s2 have a triangular carrier wave VT1 * , the drive signal Q s3 and the drive signal Q s4 have a triangular carrier wave VT2 * , the drive signal Q s5 and the drive signal Q s6 have a triangular carrier wave VT3 * where the phase difference between the carrier wave VT1 * and the carrier wave VT2 * is 120°, and the phase difference between the carrier wave VT2 * and the carrier wave VT3 * is 120°; define the carrier frequency as f and the period

[0021] Step 4, generate a PWM wave to drive the switching transistor to work;

[0022] When the carrier wave VT1 is within the time period (0 - D1T), the drive signal Q P1 outputs a high level, and the drive signal Q P2 outputs a low level; when the carrier wave VT1 is within the time period (D1T - T), the drive signal Q P1 outputs a low level, and the drive signal Q P2 outputs a high level; when the carrier wave VT2 is within the time period (0 - D1T), the drive signal Q P3 outputs a high level, and the drive signal Q P4Outputs a low level; when the carrier wave VT2 is within the time period (D1T - T), the drive signal Q P3 Outputs a low level, the drive signal Q P4 Outputs a high level; when the carrier wave VT3 is within the time period (0 - D1T), the drive signal Q P5 Outputs a high level, the drive signal Q P6 Outputs a low level; when the carrier wave VT3 is within the time period (D1T - T), the drive signal QP5 outputs a low level, the drive signal Q P6 Outputs a high level; when the carrier wave VT1 * Is within the time period (0 - D2T), the drive signal Q s1 Outputs a high level, the drive signal Q s2 Outputs a low level; when the carrier wave VT1 * Is within the time period (D2T - T), the drive signal Q s1 Outputs a low level, the drive signal Q s2 Outputs a high level; when the carrier wave VT2 * Is within the time period (0 - D2T), the drive signal Q s3 Outputs a high level, the drive signal Q s4 Outputs a low level; when the carrier wave VT2 * Is within the time period (D2T - T), the drive signal Q s3 Outputs a low level, the drive signal Q s4 Outputs a high level; when the carrier wave VT3 * Is within the time period (0 - D2T), the drive signal Q s5 Outputs a high level, the drive signal Q s6 Outputs a low level; when the carrier wave VT3 * Is within the time period (D2T - T), the drive signal Q s5 Outputs a low level, the drive signal Q s6 Outputs a high level; among them, when the drive signal is high, the switching tube conducts, and when the drive signal is low, the switching tube turns off;

[0023] Step 5, exchange the operation of the switching tube driven by the PWM wave

[0024] When the preset condition for exchanging the PWM wave is met, generate an instruction for the exchanged PWM wave to drive the switching tube to operate, and its specific states are as follows:

[0025] Define D1’ as the duty cycle of the switching tubes S P1 , switching tube S P2 , switching tube S P3 When at a high level, D2’ is the duty cycle of the switching tubes S s1 , switching tube S s2 , switching tube S s3At high level, the duty cycle is D1’ = 1 - D1, D2’ = 1 - D2;

[0026] When the carrier wave VT1 is within the time period (0 - D1’T), the driving signal Q P1 outputs a high level, and the driving signal Q P2 outputs a low level; when the carrier wave VT1 is within the time period (D1’T - T), the driving signal Q P1 outputs a low level, and the driving signal Q P2 outputs a high level; when the carrier wave VT2 is within the time period (0 - D1’T), the driving signal Q P3 outputs a high level, and the driving signal Q P4 outputs a low level; when the carrier wave VT2 is within the time period (D1’T - T), the driving signal Q P3 outputs a low level, and the driving signal Q P4 outputs a high level; when the carrier wave VT3 is within the time period (0 - D1’T), the driving signal Q P5 outputs a high level, and the driving signal Q P6 outputs a low level; when the carrier wave VT3 is within the time period (D1’T - T), the driving signal Q P5 outputs a low level, and the driving signal Q P6 outputs a high level; when the carrier wave VT1 * is within the time period (0 - D2’T), the driving signal Q s1 outputs a high level, and the driving signal Q s2 outputs a low level; when the carrier wave VT1 * is within the time period (D2’T - T), the driving signal Q s1 outputs a low level, and the driving signal Q s2 outputs a high level; when the carrier wave VT2 * is within the time period (0 - D2’T), the driving signal Q s3 outputs a high level, and the driving signal Q s4 outputs a low level; when the carrier wave VT2 * is within the time period (D2’T - T), the driving signal Q s3 outputs a low level, and the driving signal Q s4 outputs a high level; when the carrier wave VT3 * is within the time period (0 - D2’T), the driving signal Q s5 outputs a high level, and the driving signal Q s6 outputs a low level; when the carrier wave VT3 * is within the time period (D2’T - T), the driving signal Q s5 outputs a low level, and the driving signal Q s6 outputs a high level; where when the driving signal is at a high level, the switching tube conducts, and when the driving signal is at a low level, the switching tube turns off.

[0027] Preferably, the preset condition for the switching PWM wave is a preset interval time D; the process of generating the switching PWM wave instruction is as follows: preset an interval time D, when the interval time D arrives, interrupt the wave generation in step 4, and at the same time generate a switching PWM wave instruction to drive the switching tube to work. After the switching PWM wave drives the switching tube to work, enter the next interval cycle.

[0028] Preferably, the preset condition for the switching PWM wave is the temperature difference threshold Δt of the switching tube ref , and the process of generating the switching PWM wave instruction is as follows:

[0029] Preset a temperature difference threshold Δt ref ;

[0030] Suppose that under the same heat dissipation conditions, the temperatures of switching tube S P1 , switching tube S P3 and switching tube S P5 are the same, the temperatures of switching tube S P2 , switching tube S P4 and switching tube S P6 are the same, the temperatures of switching tube S s1 , switching tube S s3 and switching tube S s5 are the same, the temperatures of switching tube S s2 , switching tube S s4 , switching tube S s6 are the same;

[0031] Real-time sample the temperatures of two switching tubes on any one arm of the primary-side three-phase half-bridge circuit, and calculate the temperature difference T1 therebetween. Real-time sample the temperatures of two switching tubes on any one arm of the secondary-side three-phase half-bridge circuit, and calculate the temperature difference T2 therebetween;

[0032] As long as one of the temperature differences T1 and T2 is greater than the temperature difference threshold Δt ref in a state, interrupt the wave generation in step 4, and at the same time generate a switching PWM wave instruction to drive the switching tube to work; when both the temperature differences T1 and T2 are less than or equal to the temperature difference threshold Δt ref , the switching PWM wave ends.

[0033] Preferably, the functional expression of the PI regulator is:

[0034]

[0035] wherein, K p is the proportional coefficient of the PI regulator, K i is the integral coefficient of the PI regulator, and s is the Laplace operator.

[0036] Compared with the prior art, the beneficial effects of the present invention include:

[0037] 1. The present invention does not require adding additional hardware circuits and other components. Only by optimizing and modifying at the software level can the goal of thermal balance be achieved, improving the efficiency of the platform and making it more suitable for engineering applications.

[0038] 2. The present invention fully considers the advantages and disadvantages of the existing solutions. On the basis of ensuring the realization of other optimization goals of the circuit, it fully considers the thermal balance problem existing in the actual operation of the three-phase DC-DC circuit and solves it by using the switching wave method.

[0039] 3. The present invention has a wide range of applications and is also applicable to devices such as Si-MOSFET and IGBT. BRIEF DESCRIPTION OF THE DRAWINGS

[0040] Figure 1 is the topology diagram of the three-phase DC-DC converter in the embodiment of the present invention;

[0041] Figure 2 is the flow chart of the thermal balance method of the present invention;

[0042] Figure 3 is the control diagram adopted by the phase-shift angle closed-loop control in the embodiment of the present invention;

[0043] Figure 4 is the schematic diagram of the present invention for generating PWM waves and switching PWM waves to drive the switching tubes to work;

[0044] Figure 5 is the efficiency comparison diagram between the present invention and the non-switching wave method. DETAILED DESCRIPTION OF THE INVENTION

[0045] The present invention will be described in detail below with reference to the accompanying drawings.

[0046] Figure 1 is the topology diagram of the three-phase DC-DC converter in the embodiment of the present invention, and it consists of Figure 1 As can be seen, the three-phase DC-DC converter system includes a primary-side DC power supply, a secondary-side DC power supply, and a bidirectional DC-DC module; the bidirectional DC-DC module includes a primary-side three-phase half-bridge circuit, a primary-side three-phase inductor, a primary-side transmitting coil, a secondary-side receiving coil, and a secondary-side three-phase half-bridge circuit. The primary-side three-phase half-bridge circuit is connected in parallel between the positive and negative DC buses of the primary-side DC power supply E1, and the secondary-side three-phase half-bridge circuit is connected in parallel between the positive and negative DC buses of the secondary-side DC power supply E2.

[0047] The primary-side three-phase half-bridge circuit includes 6 switching tubes S with anti-parallel diodes and output capacitors Pi , where i = 1, 2,..., 6; among them, the emitter of the switching tube S P1 and the switching tube S P2The collector is connected to form the primary side A-phase bridge arm, and the emitter of the switching transistor S P3 and the collector of the switching transistor S P4 are connected to form the primary side B-phase bridge arm, and the emitter of the switching transistor S P5 and the collector of the switching transistor S P6 are connected to form the primary side C-phase bridge arm, and the three connection points form the output terminal of the primary side three-phase half-bridge circuit. This output terminal is connected to the primary side three-phase inductor, and the other end of the primary side three-phase inductor is connected to the primary side transmitting coil; the secondary side three-phase half-bridge circuit includes 6 switching transistors S si， with anti-parallel diodes and output capacitors. Among them, the emitter of the switching transistor S s1 and the collector of the switching transistor S s2 are connected to form the secondary side A-phase bridge arm, the emitter of the switching transistor S s3 and the collector of the switching transistor S s4 are connected to form the secondary side B-phase bridge arm, the emitter of the switching transistor S s5 and the collector of the switching transistor S s6 are connected to form the secondary side C-phase bridge arm, and the three connection points form the output terminal of the secondary side three-phase half-bridge circuit. The output terminal of this secondary side three-phase half-bridge circuit is connected to the secondary side receiving coil. The secondary side receiving coil receives the electromagnetic field emitted by the primary side transmitting coil through mutual inductance M and converts it into electrical energy.

[0048] On Figure 1 , L0 is the primary side three-phase inductor, E1 is the primary side DC power supply, E2 is the secondary side DC power supply, L1 is the primary side transmitting coil, and L2 is the secondary side receiving coil. A is the connection point of the emitter of the switching transistor S P1 and the collector of the switching transistor S P2 , B is the connection point of the emitter of the switching transistor S P3 and the collector of the switching transistor S P4 , C is the connection point of the emitter of the switching transistor S P5 and the collector of the switching transistor S P6 , a is the connection point of the emitter of the switching transistor S s1 and the collector of the switching transistor S s2 , b is the connection point of the emitter of the switching transistor S s3 and the collector of the switching transistor S s4 , c is the connection point of the emitter of the switching transistor S s5 and the collector of the switching transistor S s6 . In addition, it can be seen from Figure 1 that the bidirectional DC-DC module also includes a primary side filter capacitor C 10 and a secondary side filter capacitor C 20 . The primary side filter capacitor C 10 is connected in parallel with the primary side three-phase half-bridge circuit, and the secondary side filter capacitor C 20In parallel with the three-phase half-bridge circuit on the secondary side.

[0049] Embodiment 1.

[0050] Figure 2 This is the flowchart of the thermal balance method of the present invention. As can be seen from the figure, the thermal balance method of a three-phase DC-DC converter includes the following steps:

[0051] Step 1, define the state of power transmission

[0052] Given the DC output current command value I of the DC power supply on the secondary side ref , define the power transmission state as follows: If I ref >0, the power flows from the primary-side DC power supply to the secondary-side DC power supply, and it is defined as forward power transmission; if I ref <0, the power flows from the secondary-side DC power supply to the primary-side DC power supply, and it is defined as reverse power transmission; if I ref =0, no power transmission occurs.

[0053] Step 2, calculate the phase shift value

[0054] Sample the DC output current I of the DC power supply on the secondary side out , calculate the DC output current error signal ΔI out , ΔI out =I ref -I out , send the DC output current error signal ΔI out to the PI regulator to obtain the phase shift value (D1, D2, D3), where D1 is the duty cycle of the switching transistors S P1 , switching transistor S P2 , switching transistor S P3 when at a high level, D2 is the duty cycle of the switching transistors S s1 , switching transistor S s2 , switching transistor S s3 when at a high level, D3 is the phase difference between the switching transistors S P1 and switching transistor S s1 .

[0055] In this embodiment, the functional expression of the PI regulator is:

[0056]

[0057] where, K p is the proportional coefficient of the PI regulator, K i is the integral coefficient of the PI regulator, and s is the Laplace operator.

[0058] Figure 3 This is the control diagram adopted for the closed-loop control of the phase shift angle in the embodiment of the present invention.

[0059] Step 3, define the drive signal and the carrier wave

[0060] Denote the drive signal of switch tube S Pi as drive signal Q Pi ; denote the drive signal of switch tube S si as drive signal Q si , where:

[0061] The triangular carrier wave of drive signal Q P1 and drive signal Q P2 is carrier wave VT1; the triangular carrier wave of drive signal Q P3 and drive signal Q P4 is carrier wave VT2; the triangular carrier wave of drive signal Q P5 and drive signal Q P6 is carrier wave VT3. Among them, the phase difference between carrier wave VT1 and carrier wave VT2 is 120°; the phase difference between carrier wave VT2 and carrier wave VT3 is 120°; the triangular carrier wave of drive signal Q s1 and drive signal Q s2 is carrier wave VT1 * ; the triangular carrier wave of drive signal Q s3 and drive signal Q s4 is carrier wave VT2 * ; the triangular carrier wave of drive signal Q s5 and drive signal Q s6 is carrier wave VT3 * , where the phase difference between carrier wave VT1 * and carrier wave VT2 * is 120°; the phase difference between carrier wave VT2 * and carrier wave VT3 * is 120°; define the carrier frequency as.f, the period

[0062] Step 4, generate a PWM wave to drive the switch tube to work;

[0063] When carrier wave VT1 is within the time period (0 - D1T), drive signal Q P1 outputs a high level, and drive signal Q P2 outputs a low level; when carrier wave VT1 is within the time period (D1T - T), drive signal Q P1 outputs a low level, and drive signal Q P2 outputs a high level; when carrier wave VT2 is within the time period (0 - D1T), drive signal Q P3 outputs a high level, and drive signal Q P4 outputs a low level; when carrier wave VT2 is within the time period (D1T - T), drive signal Q P3 outputs a low level, and drive signal QP4 Outputs a high level; when the carrier wave VT3 is within the time period (0 - D1T), the drive signal Q P5 Outputs a high level, and the drive signal Q P6 Outputs a low level; when the carrier wave VT3 is within the time period (D1T - T), the drive signal Q P5 Outputs a low level, and the drive signal Q P6 Outputs a high level; when the carrier wave VT1 * is within the time period (0 - D2T), the drive signal Q s1 Outputs a high level, and the drive signal Q s2 Outputs a low level; when the carrier wave VT1 * is within the time period (D2T - T), the drive signal Q s1 Outputs a low level, and the drive signal Q s2 Outputs a high level; when the carrier wave VT2 * is within the time period (0 - D2T), the drive signal Q s3 Outputs a high level, and the drive signal Q s4 Outputs a low level; when the carrier wave VT2 * is within the time period (D2T - T), the drive signal Q s3 Outputs a low level, and the drive signal Q s4 Outputs a high level; when the carrier wave VT3 * is within the time period (0 - D2T), the drive signal Q s5 Outputs a high level, and the drive signal Q s6 Outputs a low level. When the carrier wave VT3 * is within the time period (D2T - T), the drive signal Q s5 Outputs a low level, and the drive signal Q s6 Outputs a high level; among them, when the drive signal is at a high level, the switching tube conducts, and when the drive signal is at a low level, the switching tube turns off.

[0064] Step 5, exchange the operation of the PWM wave driving the switching tube

[0065] When the preset condition for exchanging the PWM wave is met, generate an instruction for the exchanged PWM wave to drive the switching tube to operate, and its specific states are as follows:

[0066] Define D1’ as the duty cycle of switching tubes S P1 , S P2 , S P3 when they are at a high level after the exchanged PWM wave, and D2’ as the duty cycle of switching tubes S s1 , S s2 , S s3 when they are at a high level after the exchanged PWM wave, D1’ = 1 - D1, D2’ = 1 - D2.

[0067] When the carrier wave VT1 is within the time period (0 - D1’T), the driving signal Q P1 outputs a high level, and the driving signal Q P2 outputs a low level; when the carrier wave VT1 is within the time period (D1’T - T), the driving signal Q P1 outputs a low level, and the driving signal Q P2 outputs a high level; when the carrier wave VT2 is within the time period (0 - D1’T), the driving signal Q P3 outputs a high level, and the driving signal Q P4 outputs a low level; when the carrier wave VT2 is within the time period (D1’T - T), the driving signal Q P3 outputs a low level, and the driving signal Q P4 outputs a high level; when the carrier wave VT3 is within the time period (0 - D1’T), the driving signal Q P5 outputs a high level, and the driving signal Q P6 outputs a low level; when the carrier wave VT3 is within the time period (D1’T - T), the driving signal Q P5 outputs a low level, and the driving signal Q P6 outputs a high level; when the carrier wave VT1 * is within the time period (0 - D2’T), the driving signal Q s1 outputs a high level, and the driving signal Q s2 outputs a low level; when the carrier wave VT1 * is within the time period (D2’T - T), the driving signal Q s1 outputs a low level, and the driving signal Q s2 outputs a high level; when the carrier wave VT2 * is within the time period (0 - D2’T), the driving signal Q s3 outputs a high level, and the driving signal Q s4 outputs a low level; when the carrier wave VT2 * is within the time period (D2’T - T), the driving signal Q s3 outputs a low level, and the driving signal Q s4 outputs a high level; when the carrier wave VT3 * is within the time period (0 - D2’T), the driving signal Q s5 outputs a high level, and the driving signal Q s6 outputs a low level; when the carrier wave VT3 * is within the time period (D2’T - T), the driving signal Q s5 outputs a low level, and the driving signal Q s6 outputs a high level. Among them, when the driving signal is at a high level, the switching tube conducts, and when the driving signal is at a low level, the switching tube turns off.

[0068] Figure 4 is a schematic diagram of generating a PWM wave and switching the PWM wave to drive the switching tube in this embodiment.

[0069] In this embodiment, the preset condition for exchanging PWM waves is a preset interval time D, and the process of generating the instruction for exchanging PWM waves is as follows: A preset interval time D is set in advance. When the interval time D arrives, the wave generation in step 4 is interrupted, and at the same time, an instruction for exchanging PWM waves is generated to drive the switching tube to work. After the PWM wave for exchanging drives the switching tube to finish working, it enters the next interval cycle.

[0070] In this embodiment, the interval time D is 5 milliseconds.

[0071] The control mode with the preset condition for exchanging wave generation being the preset interval time D is called the time-base control mode.

[0072] Embodiment 2.

[0073] In this embodiment, except for the preset wave generation time for exchanging, the rest are the same as those in Embodiment 1.

[0074] The preset condition for exchanging PWM waves is the temperature difference threshold Δt of the switching tube ref , and the process of generating the instruction for exchanging PWM waves is as follows:

[0075] A temperature difference threshold Δt is set in advance ref ;

[0076] Suppose that under the same heat dissipation conditions, the temperatures of switching tube S P1 , switching tube S P3 and switching tube S P5 are the same, the temperatures of switching tube S P2 , switching tube S P4 and switching tube S P6 are the same, the temperatures of switching tube S s1 , switching tube S s3 and switching tube S s5 are the same, and the temperatures of switching tube S s2 , switching tube S s4 , switching tube S s6 are the same;

[0077] The temperatures of any two switching tubes on any one arm of the primary-side three-phase half-bridge circuit are sampled in real time, and their temperature difference T1 is calculated. The temperatures of any two switching tubes on any one arm of the secondary-side three-phase half-bridge circuit are sampled in real time, and their temperature difference T2 is calculated;

[0078] As long as one of the temperature differences T1 and T2 is greater than the temperature difference threshold Δt ref in a state, the wave generation in step 4 is interrupted, and at the same time, an instruction for exchanging PWM waves is generated to drive the switching tube to work; when both the temperature differences T1 and T2 are less than or equal to the temperature difference threshold Δt ref , the PWM wave for exchanging ends.

[0079] In this embodiment, the temperature difference threshold Δt ref = 3°C.

[0080] The set switching wave generation condition with the temperature difference threshold Δt of the switching tube ref is denoted as the temperature difference control mode.

[0081] Simulations were carried out to verify the beneficial effects proposed by the present invention, and comparisons were made to obtain Figure 5 . The relevant parameters are as follows: V1 is the rated value of the primary-side DC power supply E1, V2 is the rated value of the secondary-side DC power supply E2, and I is the actual value of the DC output current I out . Taking V1 = 300V, V2 = 200V, and I varying from 0 - 40A. It can be seen that Figure 5 in the interval with relatively small power and when the load rate is less than 50%, due to the obvious difference in the conduction time of the switching tubes, the switching wave generation method can significantly improve the efficiency of the system. When the output power increases, the conduction time of all switching tubes approaches half a cycle, and the efficiencies of the non-switching wave generation method and the switching wave generation method gradually become the same. At the same time, the temperature difference between different switching tubes can be controlled within 3°C.

Claims

1. A thermal balance method based on a three-phase DC-DC converter, wherein the three-phase DC-DC converter system comprises a primary-side DC power supply, a secondary-side DC power supply and a bidirectional DC-DC module; the bidirectional DC-DC module comprises a primary-side three-phase half-bridge circuit, a primary-side three-phase inductor, a primary-side transmitting coil, a secondary-side receiving coil and a secondary-side three-phase half-bridge circuit; the primary-side three-phase half-bridge circuit is connected in parallel between the positive and negative DC bus bars of the primary-side DC power supply E1, and the secondary-side three-phase half-bridge circuit is connected in parallel between the positive and negative DC bus bars of the secondary-side DC power supply E2; The primary side three-phase half-bridge circuit includes 6 switch tubes S with reverse parallel diodes and output capacitors. Pi ,i=1,2,...,6; where, Switching tube S P1 The emitter and switch tube S P2 The collectors of the switches S P3 The emitter and switch tube S P4 The collectors of the switches S P5 The emitter and switch tube S P6 The collectors of the secondary side are connected to form the C-phase bridge arm of the primary side, and the three contacts constitute the output end of the primary side three-phase half-bridge circuit, the output end is connected to the primary side three-phase inductor, and the other end of the primary side three-phase inductor is connected to the primary side transmitting coil; the secondary side three-phase half-bridge circuit includes 6 switch tubes S with reverse parallel diodes and output capacitors si , where the switch tube S s1 The emitter and switch tube S s2 The collectors of the switches S s3 The emitter and switch tube S s4 The collectors of the switches S s5 The emitter and switch tube S s6 The collectors of the primary side are connected to form a C-phase bridge arm on the secondary side, and the three contacts constitute the output end of the three-phase half-bridge circuit on the secondary side. The output end of the three-phase half-bridge circuit on the secondary side is connected to the secondary side receiving coil, and the secondary side receiving coil receives the electromagnetic field emitted by the primary side transmitting coil through the mutual inductance M. The steps of the heat balance method are as follows: Step 1, define the state of power transmission; Step 2, calculate the phase shift value, and obtain the phase shift value (D1, D2, D3) based on the PI regulator, where D1 is the switch tube S P1 , switch tube S P2 , switch tube S P3 The duty cycle at high level, D2 is the switch tube S s1 , switch tube S s2 , switch tube S s3 The duty cycle at high level, D3 is the switch tube S P1 And switch tube S s1 The phase difference; Step 3, define the driving signal and carrier; The switch tube S Pi The driving signal is recorded as the driving signal Q Pi , the switch tube S si The driving signal is recorded as the driving signal Q si , driving signal Q P1 , drive signal Q P2 The triangular carrier is carrier VT1, and the driving signal Q P3 , drive signal Q P4 The triangular carrier is carrier VT2, and the driving signal Q P5 , drive signal Q P6 The triangular carrier is carrier VT3, and the driving signal Q s1 , drive signal Q s2 The triangular carrier is carrier VT1 * , driving signal Q s3 , drive signal Q s4 The triangular carrier is carrier VT2 * , driving signal Q s5 , drive signal Q s6 The triangular carrier is carrier VT3 * ; The carrier frequency is f, the period ; Step 4, generate PWM wave to drive the switch tube to work; When the carrier VT1 is within the (0-D1T) time, the driving signal Q P1 Output high level, drive signal Q P2 Output low level; when carrier VT1 is within (D1T-T) time, drive signal Q P1 Output low level, drive signal Q P2 Output high level; Step 5, switching the PWM wave to drive the switch tube to work; When the preset exchange PWM wave condition is met, an exchange PWM wave instruction is generated to drive the switch tube to work, and D1' is defined as the duty cycle of the switch tubes SP1, SP2, and SP3 at a high level after the exchange PWM wave, and D2' is the duty cycle of the switch tubes Ss1, Ss2, and Ss3 at a high level after the exchange PWM wave, D1'=1-D1, D2'=1-D2; when the carrier VT1 is within the time (0-D1'T), the drive signal QP1 outputs a high level, and the drive signal QP2 outputs a low level; when the carrier VT1 is within the time (D1'TT), the drive signal QP1 outputs a low level; Among them, a temperature difference threshold Δt is pre-set ref ; Assuming that under the same heat dissipation conditions, the switch tube S P1 , switch tube S P3 And switch tube S P5 The temperature of the switch tube S is the same. P2 , switch tube S P4 And switch tube S P6 The temperature of the switch tube S is the same. s1 , switch tube S s3 And switch tube S s5 The temperature of the switch tube S is the same. s2 , switch tube S s4 , switch tube S s6 The temperature is the same; the temperature of the two switching tubes on any bridge arm of the three-phase half-bridge circuit on the primary side is sampled in real time, and the temperature difference T1 is calculated; the temperature of the two switching tubes on any bridge arm of the three-phase half-bridge circuit on the secondary side is sampled in real time, and the temperature difference T2 is calculated; as long as one of the temperature differences T1 and T2 is greater than the temperature difference threshold Δt ref The state is that the wave generation in step 4 is interrupted, and the switching PWM wave instruction is generated to drive the switch tube to work; when the temperature difference T1 and the temperature difference T2 are both less than or equal to the temperature difference threshold Δt ref When , the exchange of PWM waves ends; the preset exchange of PWM waves condition is the preset interval time D; The preset exchange PWM wave condition is the preset interval time D; the process of generating the exchange PWM wave instruction is as follows: pre-set an interval time D, and when the interval time D is reached, the wave generation in step 4 is interrupted, and at the same time, an exchange PWM wave instruction is generated to drive the switch tube to work. After the exchange PWM wave drives the switch tube to work, it enters the next interval cycle.

2. A thermal balance method based on a three-phase DC-DC converter according to claim 1, characterized in that: In step 4, when the carrier VT2 is within the (0-D1T) time, the driving signal Q P3 Output high level, drive signal Q P4 Output low level; when carrier VT2 is within (D1T-T) time, drive signal Q P3 Output low level, drive signal Q P4 Output high level; when carrier VT3 is within (0-D1T) time, drive signal Q P5 Output high level, drive signal Q P6 Output low level; when carrier VT3 is within (D1T-T) time, drive signal Q P5 Output low level, drive signal Q P6 Output high level; when carrier VT1 * During the time (0-D2T), the driving signal Q s1 Output high level, drive signal Q s2 Output low level; when carrier VT1 * During the (D2T-T) time, the driving signal Q s1 Output low level, drive signal Q s2 Output high level; when carrier VT2 * During the time (0-D2T), the driving signal Q s3 Output high level, drive signal Q s4 Output low level; when carrier VT2 * During the (D2T-T) time, the driving signal Q s3 Output low level, drive signal Q s4 Output high level; when carrier VT3 * During the time (0-D2T), the driving signal Q s5 Output high level, drive signal Q s6 Output low level; when carrier VT3 * During the (D2T-T) time, the driving signal Q s5 Output low level, drive signal Q s6 Output high level; when the drive signal is high level, the switch tube is turned on, and when the drive signal is low level, the switch tube is turned off.

3. A thermal balance method based on a three-phase DC-DC converter according to claim 2, characterized in that: In step 5, when the carrier VT2 is within the time (0-D1'T), the driving signal Q P3 Output high level, drive signal Q P4 Output low level; when carrier VT2 is within (D1'TT) time, drive signal Q P3 Output low level, drive signal Q P4 Output high level; when carrier VT3 is within (0-D1'T) time, drive signal Q P5 Output high level, drive signal Q P6 Output low level; when carrier VT3 is within (D1'TT) time, drive signal Q P5 Output low level, drive signal Q P6 Output high level; when carrier VT1 * During the time (0-D2'T), the driving signal Q s1 Output high level, drive signal Q s2 Output low level; when carrier VT1 * During (D2'TT) time, the driving signal Q s1 Output low level, drive signal Q s2 Output high level; when carrier VT2 * During the time (0-D2'T), the driving signal Q s3 Output high level, drive signal Q s4 Output low level; when carrier VT2 * During (D2'TT) time, the driving signal Q s3 Output low level, drive signal Q s4 Output high level; when carrier VT3 * During the time (0-D2'T), the driving signal Q s5 Output high level, drive signal Q s6 Output low level; when carrier VT3 * During (D2'TT) time, the driving signal Q s5 Output low level, drive signal Q s6 Output high level.

4. A thermal balance method based on a three-phase DC-DC converter according to claim 3, characterized in that: The functional expression of the PI regulator is: ； Among them, K p K is the proportional coefficient of the PI regulator. i is the integral coefficient of the PI regulator, and s is the Laplace operator.

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