A method, system, device and storage medium for testing power chip

Abstract

A method, system, device, and storage medium for testing a power supply chip relate to the field of chip testing. In this method, a first temperature and a first actual load of the power supply chip at a first moment are obtained, and a first preset model is used to predict the first load of the power supply chip at a second moment based on the first temperature and the first actual load; the second actual load of the power supply chip at the second moment is adjusted to the first load, and a second preset model is used to predict the first output voltage and the first output current of the power supply chip based on the first load; the first actual output voltage and the first actual output current of the power supply chip at the second moment are obtained, and it is determined whether the first difference and the second difference are both within a preset range; when the first difference and the second difference are both not within the preset range, it is indicated that the probability of an abnormality in the power supply chip is a preset first value. Implementing the technical solution provided by this application achieves the effect of improving testing efficiency.

Description

Technical Field

[0001] The present application relates to the technical field of chip testing, and in particular to a method, system, device and storage medium for testing a power supply chip. Background Art

[0002] With the continuous development of electronic technology, power chips play a vital role in various electronic devices. In order to ensure the performance and stability of power chips, accurate testing has become an essential link.

[0003] Conventional testing methods are typically based on fixed load conditions. However, this approach cannot fully reflect the performance of power supply chips in actual operating environments. Testers also test the output voltage and output current of power supply chips by setting a series of fixed load points. While this method is simple and easy to use, it has obvious limitations. Because loads in actual operating environments change dynamically, test results at fixed load points cannot accurately reflect the performance of power supply chips in real-world scenarios.

[0004] Therefore, how to more realistically simulate the actual working environment of the power chip and conduct comprehensive and accurate testing on this basis has become an urgent problem to be solved in the current power chip testing field. Summary of the Invention

[0005] The present application provides a method, system, device and storage medium for testing power supply chips, which have significant technical effects such as real-time, predictive and efficient, and are of great significance for improving the performance and reliability of power supply chips.

[0006] In a first aspect of the present application, a method for testing a power supply chip is provided, which is applied to a chip testing platform. The method comprises:

[0007] Obtaining a first temperature and a first actual load of a power chip at a first moment, and predicting a first load of the power chip at a second moment based on the first temperature and the first actual load using a first preset model, where the second moment is a moment subsequent to the first moment;

[0008] adjusting a second actual load of the power chip at the second moment to the first load, and predicting a first output voltage and a first output current of the power chip according to the first load using a second preset model;

[0009] obtaining a second temperature, a first actual output voltage, and a first actual output current of the power chip at the second moment, and determining whether a first difference and a second difference are both within a preset range, where the first difference is a difference between the first actual output voltage and the first output voltage, and the second difference is a difference between the first actual output current and the first output current;

[0010] When both the first difference and the second difference are outside the preset range, the probability of indicating that the power chip is abnormal is a preset first value.

[0011] By employing the above technical solution, the power chip's status (including temperature and actual load) at the first moment is acquired, and the load at the second moment is predicted using a preset model. This enables real-time performance monitoring and prediction. This predictive capability is crucial for proactively identifying potential issues and optimizing the use and scheduling of power chips. By comparing the predicted output voltage and output current with the actual measured results, the power chip's performance can be accurately assessed. When the difference between the predicted and actual values ​​exceeds a preset range, potential power chip anomalies can be quickly identified, providing a basis for subsequent troubleshooting and repair. Automated and continuous testing can be implemented on the chip test platform without manual intervention, significantly improving test efficiency and accuracy. Furthermore, the preset model and automated process enable rapid processing of large amounts of data, providing strong support for power chip performance analysis and optimization. Real-time monitoring and prediction of the power chip's performance status allows for timely identification of potential issues and preventive maintenance, avoiding serious consequences such as equipment downtime or data loss caused by power chip failures. This is crucial for improving equipment stability and reliability.

[0012] Optionally, the method includes:

[0013] When both the first difference and the second difference are within a preset range, predicting a second load of the power chip at a third moment according to the second temperature and the first load using the first preset model, where the third moment is a moment after the second moment;

[0014] adjusting the third actual load of the power chip at the third moment to the second load, and predicting the second output voltage and the second output current of the power chip according to the second load using the second preset model;

[0015] Obtaining a second actual output voltage and a second actual output current of the power chip at the third moment, and determining whether a third difference and a fourth difference are both within a preset range, the third difference being the difference between the second actual output voltage and the second output voltage, and the fourth difference being the difference between the second actual output current and the second output current;

[0016] When both the third difference and the fourth difference are outside the preset range, the probability that the power chip is abnormal is a preset second value, and the preset second value is greater than the preset first value.

[0017] By implementing this technical solution, the performance parameters of the power supply chip can be continuously monitored at different times (such as the second time, the third time, and so on), and the load, output voltage, and output current at the next time can be predicted in real time based on the current state. This continuity and real-time nature ensures comprehensive and accurate testing, more comprehensively reflecting the performance changes of the power supply chip. Multiple predictions and verifications enable a more precise assessment of the power supply chip's performance. Based on the first prediction and verification, a second prediction and verification is performed based on the new actual state, further improving the accuracy of the assessment. When the difference between the predicted and actual values ​​exceeds a preset range, different abnormality warning probabilities are issued based on the degree of excess. For example, if the difference exceeds the preset range twice in a row, the abnormality probability (preset second value) will be higher than the probability (preset first value) if the difference exceeds the preset range only once. This refined warning mechanism helps users more accurately assess the performance status and potential risks of the power supply chip.

[0018] Optionally, the method includes:

[0019] When the two target differences corresponding to multiple consecutive moments are both within the preset range, the power supply chip is prompted to pass the test, and the two target differences are the first target difference and the second target difference at the target moment. The first target difference is the difference between the actual output voltage and the predicted output voltage at the target moment, and the second target difference is the difference between the actual output current and the predicted output current at the target moment. The target moment is any one of the multiple moments.

[0020] By employing this technical solution, the actual output voltage and output current of a power supply chip are compared with the predicted values ​​at multiple consecutive moments. The power supply chip is considered to have passed the test only if the difference between these values ​​at multiple consecutive moments is within a preset range. This ensures that the power supply chip maintains stable and reliable performance over long periods of operation and under a variety of operating conditions. Continuous monitoring and prediction at multiple moments provides a more comprehensive assessment of the power supply chip's performance. Compared to single or limited testing, continuous testing at multiple moments covers a wider range of operating conditions and states, enabling a more accurate assessment of the power supply chip's performance and stability. Preset models and automated processes enable rapid processing of large amounts of data and provide real-time test results. This significantly improves testing efficiency, reduces the need for manual intervention, and lowers testing costs. If the power supply chip's performance parameters consistently remain within the preset range during multiple consecutive tests, the chip is considered to have high reliability and stability. This helps users conduct preventive maintenance, identify potential problems in advance, and take appropriate measures, avoiding serious consequences such as equipment downtime or data loss.

[0021] Optionally, the method includes:

[0022] When the first difference is within the preset range and the second difference is not within the preset range, or when the first difference is not within the preset range and the second difference is within the preset range, controlling the temperature of the power chip to be the second temperature, controlling the load of the power chip to be the first load, and continuously measuring a third actual output voltage and a third actual output current corresponding to a plurality of moments;

[0023] Calculating a first average value of a plurality of the third actual output voltages, and calculating a second average value of a plurality of the third actual output currents, and determining whether the first average value and the second average value are both within the preset range;

[0024] When both the first average value and the second average value are outside the preset range, the probability of indicating that the power chip is abnormal is a preset third value, and the preset third value is greater than the preset first value.

[0025] By adopting the above technical solution, when a power chip's output voltage or output current significantly deviates from the predicted value (i.e., the first or second difference exceeds a preset range), the power chip is not immediately deemed abnormal. Instead, the output voltage and output current are continuously measured at multiple times and their average values ​​are calculated for further evaluation. This method eliminates random errors associated with single measurements and improves test sensitivity and accuracy. By continuously measuring the output voltage and output current at multiple times and calculating their average values, a more comprehensive performance assessment of the power chip can be achieved. This evaluation method reflects the overall performance of the power chip over a period of time, rather than just the performance at a specific moment. If both the average output voltage and average output current at multiple times exceed the preset range, an abnormality is indicated and a high probability of abnormality (preset third value) is assigned. This early warning mechanism helps users identify power chip performance issues in advance, allowing them to take preventive maintenance measures and avoid potential equipment failures and data loss. Continuous measurements, while maintaining the power chip's temperature and load at specific values, help eliminate the impact of environmental changes and external interference on test results, thereby enhancing test robustness.

[0026] Optionally, the method further includes:

[0027] When the first average value is within the preset range and the second average value is not within the preset range, or the first average value is not within the preset range and the second average value is within the preset range, the probability that the power chip is abnormal is a preset fourth value, the preset fourth value is greater than the preset first value, and the preset fourth value is less than the preset third value.

[0028] By implementing the above technical solution, when only one of the continuously measured average values ​​of output voltage or output current falls outside the preset range, this incomplete match is identified and a corresponding abnormality probability alert is provided. This more detailed abnormality identification helps users more accurately understand the specific performance issues of the power supply chip. By setting different abnormality probability values, the chip testing platform establishes a graded early warning mechanism. This mechanism allows users to determine the severity of power supply chip problems based on the abnormality probability and take appropriate maintenance or replacement measures. In some cases, due to environmental factors or measurement errors, a single or a few measurement results may fall outside the preset range, but this does not necessarily indicate a serious problem with the power supply chip. By continuously measuring and calculating the average value, such false alarms can be reduced and test reliability improved. Although the average value evaluation step is added, the entire testing process remains efficient due to automated testing and data analysis. Users can obtain power supply chip performance evaluation results in a shorter time and perform subsequent operations as needed. Through intuitive test results and early warning mechanisms, users can easily understand the performance status of the power supply chip and take appropriate measures. This user-friendly testing method helps improve user satisfaction and trust.

[0029] Optionally, predicting the first load of the power chip at the second moment according to the first temperature and the first actual load using a first preset model includes:

[0030] Acquire a first historical data set of the power chip, and extract features from the first historical data set, the features including the temperature, load, and corresponding time of the power chip;

[0031] Performing an importance score on each feature in the historical data set, regenerating a sample set based on features whose importance scores are greater than a threshold, and dividing the sample set into a first training set, a first validation set, and a first test set;

[0032] Constructing a basic model, training the basic model using the first training set to obtain the first preset model, and evaluating the first preset model using the first validation set and the first test set;

[0033] When the first preset model passes the evaluation, the first temperature and the first actual load are input into the first preset model to obtain the first load of the power chip at the second moment; wherein, the first preset model includes the temperature, load, moment and a first corresponding relationship of the power chip, and the first corresponding relationship includes the corresponding relationship between the temperature, load and moment of the power chip, and one moment corresponds to one load and one temperature.

[0034] By employing the above technical solution, a first historical data set for the power chip is acquired and key features (such as temperature, load, and corresponding time) are extracted. This information can be fully utilized to predict future loads. This method, based on a large amount of real-world data, provides relatively accurate prediction results. Each feature in the historical data set is assigned an importance score, and based on the score, the most important features are selected to regenerate a sample set. This feature selection method removes redundant and irrelevant features, improving model efficiency and prediction accuracy. The sample set is divided into a first training set, a first validation set, and a first test set for model training, validation, and testing, respectively. This rigorous model training and validation process ensures the model's generalization and robustness, reducing overfitting and underfitting. Once the first preset model passes the evaluation, the current actual temperature and load are input into the model for prediction. The resulting prediction results are highly reliable. This is because the model has been thoroughly trained and validated, and its predictions are based on the statistical patterns of historical data. The entire prediction process is automated and performed in real time. This means users can quickly obtain future load predictions for the power chip and make decisions and actions based on the predictions.

[0035] Optionally, predicting the first output voltage and the first output current of the power chip according to the first load using a second preset model includes:

[0036] Acquire a second historical data set of the power supply chip, where the second historical data set includes output voltage and output current under different load conditions;

[0037] constructing a neural network architecture based on the second historical data set, and dividing the second historical data set into a second training set, a second validation set, and a second test set;

[0038] Training the neural network architecture using the second training set to obtain a second preset model, and evaluating the second preset model using the second validation set and the second test set;

[0039] When the second preset model passes the evaluation, the first load is input into the second preset model to obtain the first output voltage and the first output current of the power chip; wherein, the second preset model includes the load, output voltage, output current and the second corresponding relationship of the power chip, and the second corresponding relationship includes the corresponding relationship between the output current, output voltage and load of the power chip, and one load corresponds to one output current and one output voltage.

[0040] By employing the above technical solution, a second historical dataset of the power chip's output voltage and output current under different load conditions is acquired, enabling a mapping between load and output performance. This enables the model to accurately predict the power chip's output voltage and output current based on given load conditions. Choosing a neural network architecture as the prediction model allows it to capture complex patterns and nonlinear relationships in the data. By learning and adjusting internal parameters (weights and biases), the neural network can fit the complex functional relationship between input (load) and output (voltage and current), thereby improving prediction accuracy. The second historical dataset is divided into a second training set, a second validation set, and a second test set, which are used for model training, validation, and testing, respectively. This dataset partitioning and model evaluation process ensures the model's generalization across different datasets and reduces the risk of overfitting and underfitting. Once the second preset model passes the evaluation, the first load is input into the model for prediction. The resulting output voltage and output current predictions are highly reliable. This is because the model has been thoroughly trained and validated, accurately reflecting the power chip's performance under the given load. The prediction process can be performed in real time and is fully automated. The user only needs to provide the load conditions, and the model can quickly provide the corresponding output voltage and output current prediction values, improving the efficiency of testing and analysis.

[0041] In a second aspect of the present application, a system for testing a power supply chip is provided, comprising a first prediction module, a second prediction module, a judgment module, and a prompt module, wherein:

[0042] a first prediction module configured to obtain a first temperature and a first actual load of a power chip at a first moment, and predict a first load of the power chip at a second moment based on the first temperature and the first actual load using a first preset model, where the second moment is a moment subsequent to the first moment;

[0043] a second prediction module, configured to adjust a second actual load of the power chip at the second moment to the first load, and predict a first output voltage and a first output current of the power chip according to the first load using a second preset model;

[0044] a determination module configured to obtain a second temperature, a first actual output voltage, and a first actual output current of the power chip at the second moment, and determine whether a first difference and a second difference are both within a preset range, wherein the first difference is a difference between the first actual output voltage and the first output voltage, and the second difference is a difference between the first actual output current and the first output current;

[0045] The prompt module is configured to prompt that the probability of the power chip being abnormal is a preset first value when both the first difference and the second difference are not within a preset range.

[0046] In the third aspect of the present application, an electronic device is provided, including a processor, a memory, a user interface and a network interface, the memory is used to store instructions, the user interface and the network interface are both used to communicate with other devices, and the processor is used to execute the instructions stored in the memory so that the electronic device performs any of the methods described above.

[0047] In a fourth aspect of the present application, a computer-readable storage medium is provided, wherein the computer-readable storage medium stores instructions. When the instructions are executed, any one of the methods described above is executed.

[0048] In summary, one or more technical solutions provided in the embodiments of the present application have at least the following technical effects or advantages:

[0049] 1. Using the first preset model, the power chip's temperature and actual load at a given moment can be used to accurately predict the load at the next moment. Subsequently, using the second preset model, the power chip's output voltage and output current can be predicted based on the predicted load. This prediction and adjustment mechanism helps precisely control the power chip's performance during the testing phase.

[0050] 2. After obtaining the actual output voltage and output current of the power chip under the predicted load, compare them with the predicted voltage and current. By calculating the difference and determining whether it is within the preset range, it can be used to evaluate in real time whether the performance of the power chip meets expectations;

[0051] 3. When the difference between the actual output voltage and output current and the predicted value exceeds the preset range, the chip test platform can quickly identify the possible abnormality of the power chip and give corresponding prompts. This rapid abnormality identification capability helps to discover and solve problems in a timely manner, reducing potential losses.

[0052] 4. Through the automated prediction and evaluation process, the need for manual intervention is reduced, improving test efficiency. At the same time, due to the accuracy of prediction and adjustment, unnecessary test times and test time are reduced. Intuitive, accurate test results and rapid anomaly identification capabilities help improve the user experience. Users can more quickly understand the performance status of power chips and make appropriate decisions accordingly. BRIEF DESCRIPTION OF THE DRAWINGS

[0053] Figure 1 This is a flow chart of a method for testing a power chip disclosed in an embodiment of the present application;

[0054] Figure 2 This is a module diagram of a system for testing a power chip disclosed in an embodiment of the present application;

[0055] Figure 3 This is a structural diagram of an electronic device disclosed in an embodiment of the present application.

[0056] Explanation of the accompanying drawings: 201, first prediction module; 202, second prediction module; 203, judgment module; 204, prompt module; 301, processor; 302, communication bus; 303, user interface; 304, network interface; 305, memory. DETAILED DESCRIPTION

[0057] In order to enable those skilled in the art to better understand the technical solutions in this specification, the technical solutions in the embodiments of this specification will be clearly and completely described below in conjunction with the drawings in the embodiments of this specification. Obviously, the described embodiments are only part of the embodiments of this application, not all of the embodiments.

[0058] In the description of the embodiments of this application, words such as "for example" or "for instance" are used to indicate examples, illustrations, or explanations. Any embodiment or design described as "for example" or "for instance" in the embodiments of this application should not be construed as being preferred or advantageous over other embodiments or designs. Rather, the use of words such as "for example" or "for instance" is intended to present the relevant concepts in a concrete manner.

[0059] In the description of the embodiments of the present application, the term "multiple" means two or more. For example, multiple systems refer to two or more systems, and multiple screen terminals refer to two or more screen terminals. In addition, the terms "first" and "second" are used for descriptive purposes only and are not to be understood as indicating or implying relative importance or implicitly indicating the indicated technical features. Thus, the features defined as "first" and "second" may explicitly or implicitly include one or more of the features. The terms "including", "comprising", "having" and their variations all mean "including but not limited to", unless otherwise specifically emphasized.

[0060] This embodiment discloses a method for testing a power supply chip, which is applied to a chip testing platform. Figure 1 This is a flow chart of a method for testing a power chip disclosed in an embodiment of the present application, such as Figure 1 As shown, the method includes the following steps:

[0061] S110: Obtain a first temperature and a first actual load of a power chip at a first moment, and predict a first load of the power chip at a second moment based on the first temperature and the first actual load using a first preset model, where the second moment is a moment subsequent to the first moment;

[0062] The power chip is placed in a constant temperature test chamber to ensure a stable and controllable ambient temperature. A temperature sensor and load measurement device (such as a power analyzer or ammeter) are connected to the power chip to monitor its temperature and load in real time. Specifically, the chip test platform periodically (e.g., every second or every millisecond) reads the power chip's temperature from the temperature sensor and records the temperature at that moment (i.e., the first time point) as the first temperature. In addition to temperature, the power chip's load is also an important indicator for evaluating its performance. Load typically refers to parameters such as the power, current, or voltage currently being applied to the power chip. During testing, the chip test platform monitors the power chip's load and records the actual load value at the first moment as the first actual load. This actual load value may include multiple parameters such as power, current, and voltage, depending on the test requirements and the characteristics of the power chip. The first temperature and first actual load are used to predict the load at the next moment (i.e., the second time point). The first preset model is typically a trained machine learning model or statistical model. This model has been trained using a large amount of historical data and has learned the complex relationship between the power chip's temperature, load, and time. Specifically, the first temperature and the first actual load at the first moment are input into the first preset model as input data. The first preset model calculates the predicted load value at the second moment, i.e., the first load, based on its internal learning rules and algorithms.

[0063] Optionally, predicting the first load of the power chip at the second moment according to the first temperature and the first actual load using a first preset model includes:

[0064] Acquire a first historical data set of the power chip, and extract features from the first historical data set, the features including the temperature, load, and corresponding time of the power chip;

[0065] Performing an importance score on each feature in the historical data set, regenerating a sample set based on features whose importance scores are greater than a threshold, and dividing the sample set into a first training set, a first validation set, and a first test set;

[0066] Constructing a basic model, training the basic model using the first training set to obtain the first preset model, and evaluating the first preset model using the first validation set and the first test set;

[0067] When the first preset model passes the evaluation, the first temperature and the first actual load are input into the first preset model to obtain the first load of the power chip at the second moment; wherein, the first preset model includes the temperature, load, moment and a first corresponding relationship of the power chip, and the first corresponding relationship includes the corresponding relationship between the temperature, load and moment of the power chip, and one moment corresponds to one load and one temperature.

[0068] Historical data for power supply chips of the same type as the one to be tested can be obtained. This data includes the chip's temperature, load, and other possible parameters at different times. This historical data is organized into a first historical dataset. Key features are extracted from the first historical dataset. These key features typically include the chip's temperature, load, and the corresponding time (such as a timestamp). Further processing of these key features may be required, such as converting the timestamp into a time difference or other time-related variable relative to the predicted target (i.e., the load at the next moment). Importance scores are assigned to the extracted features using feature selection methods (such as random forests and gradient boosting). These algorithms assess the importance of each feature based on model performance during training. Based on the feature importance scores, features with scores greater than a preset threshold are selected. A new sample set is generated based on these selected features. This new sample set is used for subsequent model training and validation. The new sample set is randomly divided into three parts: a first training set, a first validation set, and a first test set. Typically, the first training set is used for model training, the first validation set is used for model selection and parameter adjustment, and the first test set is used to evaluate the model's generalization ability. An appropriate machine learning algorithm (such as a neural network, support vector machine, or decision tree) is selected as the base model. This model will be used to learn the relationship between the power chip's temperature, load, and time of day, and the load at the next moment. The basic model is trained using the first training set. During training, the model learns how to predict the power chip's load at the second moment based on the input features (i.e., the first temperature and the first actual load). The trained model is initially evaluated using the first validation set. By comparing the model's predictions on the validation set with the actual results, we can understand the model's performance and make adjustments (such as adjusting model parameters or selecting better features). When the model performs well on the validation set, a final evaluation is performed using the first test set. The test set results provide an estimate of the model's performance on unknown data. Once the first preset model passes the evaluation, it can be used for actual predictions. The power chip's temperature and load at the first moment are input to the first preset model, and the model outputs the predicted load value for the power chip at the second moment. The first load is typically the optimal load for the power chip at the second moment, and the power chip operates most efficiently under the first load.

[0069] By extracting key features from historical datasets and regenerating sample sets based on their importance scores, the model training process ensures that data highly relevant to the prediction target is used. This helps improve the model's prediction accuracy, making the predicted load value of the power chip at the next moment closer to the actual value. By dividing the sample set into training, validation, and test sets, and using the validation set for model selection and parameter adjustment during training, the model ensures that it performs well not only on the training data but also on unknown data (i.e., the test set). This enhances the model's generalization ability and makes it more reliable in real-world applications. Accurately predicting the optimal load of the power chip at future moments allows for proactive resource allocation. For example, the power supply strategy and cooling solution can be adjusted based on the prediction results to ensure stable operation during peak loads and avoid performance degradation or damage due to overload. Accurate load prediction helps promptly identify potential performance bottlenecks or issues with the power chip. By taking proactive intervention and adjustments, system crashes or failures caused by insufficient power chip performance can be avoided, thereby improving the stability and reliability of the entire system. Accurate load forecasting and resource allocation optimization can reduce unnecessary resource waste and cost expenditures. For example, it can avoid energy waste and increased maintenance costs caused by over-configuring power chips, and it can also avoid system crashes and repair costs caused by insufficient power chip performance.

[0070] S120: Adjusting a second actual load of the power chip at the second moment to the first load, and predicting a first output voltage and a first output current of the power chip according to the first load using a second preset model;

[0071] After determining the first load of the power supply chip at the second moment, a second preset model can be used to predict the power supply chip's output voltage and output current. This second preset model can also be trained based on a historical dataset, but its input feature is the power supply chip's load, and its output is the power supply chip's output voltage and output current under that load. The first load is fed into the second preset model. Based on its internal algorithm and trained knowledge, the model calculates the predicted output voltage and predicted output current of the power supply chip under that load. These two predicted values ​​are referred to as the first output voltage and first output current, respectively. The predicted first output voltage and first output current can provide valuable reference for the design, testing, and application of the power supply chip. For example, these predicted values ​​can be used to evaluate the performance of the power supply chip under different loads, thereby optimizing its design and power supply strategy. They can also be used to monitor the actual operation of the power supply chip and promptly identify and resolve issues.

[0072] Optionally, predicting the first output voltage and the first output current of the power chip according to the first load using a second preset model includes:

[0073] Acquire a second historical data set of the power supply chip, where the second historical data set includes output voltage and output current under different load conditions;

[0074] constructing a neural network architecture based on the second historical data set, and dividing the second historical data set into a second training set, a second validation set, and a second test set;

[0075] Training the neural network architecture using the second training set to obtain a second preset model, and evaluating the second preset model using the second validation set and the second test set;

[0076] When the second preset model passes the evaluation, the first load is input into the second preset model to obtain the first output voltage and the first output current of the power chip; wherein, the second preset model includes the load, output voltage, output current and the second corresponding relationship of the power chip, and the second corresponding relationship includes the corresponding relationship between the output current, output voltage and load of the power chip, and one load corresponds to one output current and one output voltage.

[0077] Collect output voltage and output current data from the power chip under different load conditions. This data constitutes the second historical dataset. This data may come from actual operating records of the power chip, experimental data, or simulation data. This data should cover as wide a range of load conditions as possible to provide sufficient information for subsequent model training. Construct an appropriate neural network architecture based on the characteristics of the problem and the data. For the output voltage and output current prediction problem, choose a neural network structure suitable for regression problems, such as a multilayer perceptron (MLP), recurrent neural network (RNN), or its variants (such as LSTM or GRU). The neural network architecture design should take into account factors such as the data dimension and complexity, as well as the required prediction accuracy. Divide the second historical dataset into three parts: a second training set, a second validation set, and a second test set. Typically, the training set is used for model training, the validation set is used for model selection and parameter adjustment, and the test set is used to evaluate the model's generalization ability. The data partition ratio can be adjusted based on actual conditions, but generally, the majority (e.g., 70%) of the data in the second historical dataset can be allocated to the training set, while a smaller portion (e.g., 15% each) of the data in the second historical dataset can be allocated to the validation and test sets. The neural network architecture is trained using the second training set. The backpropagation algorithm adjusts the neural network's weights and biases to minimize the error between predicted and actual values. During training, the second validation set can be used to monitor model performance and adjust the model structure or parameters as needed. When the model's performance on the second validation set meets the preset standard, the model is considered trained. The trained model is then evaluated using the second test set. Model performance is evaluated by calculating metrics such as the prediction error and correlation coefficient on the second test set. Good performance on the test set indicates good generalization and suitability for practical prediction tasks. Once the second preset model passes the evaluation, it can be used for practical prediction tasks. The first load is fed into the second preset model. Based on its internal algorithm and knowledge gained from training, the model calculates the predicted output voltage and output current of the power supply chip under that load. These two predicted values ​​are referred to as the first output voltage and first output current, respectively.

[0078] By building a neural network architecture and training it using the power chip's second historical dataset, the second preset model learns the complex relationship between load conditions and output voltage and current. This enables the second preset model to more accurately predict the power chip's output voltage and current under different loads, thereby improving prediction accuracy. During model training, by dividing the second historical dataset into training, validation, and test sets, and using the validation set for model selection and parameter adjustment, the model ensures that it performs well not only on the training data but also on unknown data (i.e., the test set). This enhances the model's generalization and makes it more reliable in practical applications. Once the second preset model passes the evaluation, it can use the real-time first load as input data to quickly obtain the predicted output voltage and current of the power chip under that load. This rapid response and real-time prediction capability are crucial for the management and control of power chips, enabling more refined energy management and performance optimization. Accurately predicting output voltage and current helps optimize the power chip's resource allocation and energy utilization. Based on the prediction results, the power chip's power supply strategy, cooling scheme, and other aspects can be adjusted to ensure efficient and stable operation under different load conditions. This helps reduce energy waste and improve energy efficiency. By predicting the output voltage and current of power chips under different loads, potential power supply issues or performance bottlenecks can be detected in advance. This helps to take timely intervention and adjustment measures to avoid system crashes or failures caused by power supply issues, thereby improving the stability and reliability of the entire system.

[0079] S130: Obtain a second temperature, a first actual output voltage, and a first actual output current of the power chip at a second moment, and determine whether a first difference and a second difference are both within a preset range, where the first difference is a difference between the first actual output voltage and the first output voltage, and the second difference is a difference between the first actual output current and the first output current;

[0080] The actual state data of the power chip at the second moment is obtained, including the second temperature, first actual output voltage, and first actual output current of the power chip. This data can typically be obtained using sensors or specialized measuring equipment on the power chip. This data reflects the real-time state of the power chip during actual operation. The first actual output voltage is compared with the first output voltage predicted by the second preset model, and the difference between them is calculated. This difference is referred to as the first difference. Similarly, the first actual output current is compared with the predicted first output current, and the difference between them is calculated. This difference is referred to as the second difference. A determination is made as to whether these two differences (the first difference and the second difference) are both within a preset range. The preset range is set based on factors such as the power chip's performance requirements, safety thresholds, and actual application scenarios. For example, a ±X% tolerance range may be set for the output voltage and output current differences, where X is a specific percentage. If both differences are within the preset range, the actual operating state of the power chip is considered to be substantially consistent with the predicted results, and the operating state of the power chip at the second moment is stable and acceptable. This indicates that the previous prediction was accurate and the power chip's performance met expectations. If any of the differences are outside the preset range, it's necessary to further check the power chip's operating status and take appropriate measures to resolve the issue. For example, you can check whether the power chip's power supply strategy and cooling solution are properly configured, or check whether the power chip itself is faulty or damaged.

[0081] S140: When both the first difference and the second difference are outside a preset range, the probability of indicating that an abnormality exists in the power chip is a preset first value.

[0082] When the first difference between the measured first actual output voltage and the predicted first output voltage, as well as the second difference between the measured first actual output current and the predicted first output current, both exceed a preset acceptable range, the chip testing platform will deem this to indicate a possible anomaly in the power supply chip. The preset first value is a probability value, determined based on factors such as the actual application scenario, the performance characteristics of the power supply chip, and historical data. This value represents the likelihood that the power supply chip is anomaly in this situation. Typically, the setting of this value requires a balance between false positive rate and false negative rate, ensuring that the system neither issues frequent false alarms nor misses important anomaly information. When both the first and second differences fall outside the preset range, the chip testing platform will issue an anomaly notification based on the preset first value. This notification can be a warning message, a flashing indicator light, an audible alarm, or other means to alert personnel to the status of the power supply chip and to take appropriate measures for inspection and repair.

[0083] Optionally, the method includes:

[0084] When both the first difference and the second difference are within a preset range, predicting a second load of the power chip at a third moment according to the second temperature and the first load using the first preset model, where the third moment is a moment after the second moment;

[0085] adjusting the third actual load of the power chip at the third moment to the second load, and predicting the second output voltage and the second output current of the power chip according to the second load using the second preset model;

[0086] Obtaining a second actual output voltage and a second actual output current of the power chip at the third moment, and determining whether a third difference and a fourth difference are both within a preset range, the third difference being the difference between the second actual output voltage and the second output voltage, and the fourth difference being the difference between the second actual output current and the second output current;

[0087] When both the third difference and the fourth difference are outside the preset range, the probability that the power chip is abnormal is a preset second value, and the preset second value is greater than the preset first value.

[0088] At the second moment, the second temperature, first actual output voltage, and first actual output current of the power chip are obtained. A first difference (the difference between the first actual output voltage and the first output voltage) and a second difference (the difference between the first actual output current and the first output current) are calculated. If both the first difference and the second difference are within a preset range, the power chip is operating normally at the second moment. Using the first preset model, the second load of the power chip at a third moment (i.e., the moment following the second moment) is predicted based on the second temperature and the first load. The third actual load of the power chip at the third moment is adjusted to the predicted second load. Using the second preset model, the second output voltage and second output current of the power chip at the third moment are predicted based on the adjusted second load. At the third moment, the second actual output voltage and second actual output current of the power chip are obtained. A third difference (the difference between the second actual output voltage and the second output voltage) and a fourth difference (the difference between the second actual output current and the second output current) are calculated. If both the third difference and the fourth difference are outside the preset range, the power chip may be operating abnormally at the third moment. In this case, the chip testing platform will indicate that the probability of an abnormality in the power chip is a preset second value. Since this anomaly is derived based on the predicted and adjusted load and may involve more complex factors, the preset second value is usually greater than the preset first value to reflect this higher uncertainty or risk.

[0089] When both the first and second differences are within the preset range, the current state of the power chip closely matches the predicted value. At this point, the second load at the third moment is predicted using the first preset model, and the power chip's load is adjusted accordingly, ensuring that the power chip's operating state at the next moment is closer to the ideal state. This method dynamically adjusts based on real-time data and the prediction model, improving the accuracy of prediction and adjustment. At the third moment, the actual output voltage and output current of the power chip are obtained and compared with the predicted values ​​to detect the power chip's operating state in real time. If both the third and fourth differences are outside the preset range, the chip testing platform can immediately identify a possible abnormality in the power chip and issue a corresponding prompt. This real-time detection and response capability helps identify problems promptly and avoid potential failures or damage. By setting two different preset values ​​(the first and second values), the chip testing platform can more precisely manage power chip abnormalities. If both the third and fourth differences are outside the preset range, the chip testing platform indicates that the probability of a power chip abnormality is the preset second value, which is greater than the preset first value. This setting reflects the increased uncertainty or risk of power chip anomalies after adjustments based on predicted values, thus requiring greater attention. By predicting and adjusting the power chip's load in real time, and optimizing its output voltage and current based on the predicted values, we ensure optimal chip operation. This helps improve the chip's operating efficiency, reduce energy consumption, and extend its lifespan.

[0090] Optionally, the method includes:

[0091] When the two target differences corresponding to multiple consecutive moments are both within the preset range, the power supply chip is prompted to pass the test, and the two target differences are the first target difference and the second target difference at the target moment. The first target difference is the difference between the actual output voltage and the predicted output voltage at the target moment, and the second target difference is the difference between the actual output current and the predicted output current at the target moment. The target moment is any one of the multiple moments.

[0092] At every time interval (e.g., every second, every minute), the chip test platform acquires actual operating data for the power supply chip, including temperature, load, actual output voltage, and actual output current. Simultaneously, the chip test platform uses a predictive model to predict the optimal load at the next moment based on the current temperature and load, and then predicts the output voltage and output current based on the optimal load. At the end of each time interval (i.e., the target moment), the chip test platform calculates two target differences: a first target difference (the difference between the actual output voltage and the predicted output voltage) and a second target difference (the difference between the actual output current and the predicted output current). The chip test platform sets a condition: if the two target differences (the first target difference and the second target difference) corresponding to multiple consecutive moments (e.g., five or ten consecutive moments) are both within a preset range, the power supply chip is considered to have passed the test. This preset range is determined based on factors such as the power supply chip's performance requirements, safety thresholds, and actual application scenarios. If the pass criteria are met, the chip test platform will issue a notification, notifying the power supply chip of the passing criteria. If the criteria are not met, the chip test platform will continue monitoring and wait for the next time interval to recalculate the target differences and make a judgment. Assume that a test cycle spans five consecutive moments, with a preset tolerance of ±5%. The chip test platform acquires the actual operating data of the power chip at each moment and uses the prediction model to generate a prediction. After calculation, the chip test platform finds that the first target difference and the second target difference for the five consecutive moments are within the ±5% range. The chip test platform then issues a notification, notifying the power chip that it has passed the test.

[0093] By monitoring and comparing data at multiple consecutive moments, the chip testing platform can more accurately evaluate the performance of power supply chips. This method not only considers the results of a single measurement but also combines data from multiple moments for a comprehensive assessment, thereby reducing the impact of single measurement errors on the results. The chip testing platform will only indicate that the power supply chip has passed the test when the two target differences (i.e., the difference between the actual value and the predicted value) corresponding to multiple consecutive moments are within a preset range. This significantly improves the accuracy and reliability of the test. Traditional single-shot measurement methods can result in misjudgments due to various factors (such as environmental noise and measurement errors). However, by monitoring and comparing data at multiple consecutive moments, the embodiments of the present application can more comprehensively reflect the performance of the power supply chip, thereby reducing the misjudgment rate. The chip testing platform will only indicate a pass when data from multiple moments meets the requirements, significantly improving the accuracy of the test results. The entire testing process is completed automatically by the chip testing platform, requiring no human intervention. At each target moment, the chip testing platform automatically obtains the actual operating data of the power supply chip, generates a prediction using a prediction model, calculates the target difference, and compares it with the preset range. When the test pass criteria are met, the chip testing platform automatically issues a notification. This highly automated test process not only improves test efficiency, but also reduces the impact of human factors on test results. The chip testing platform can provide test results in real time, making it easy to promptly discover problems with the power chip and take appropriate measures. The preset range and the number of continuous monitoring moments in the embodiments of the present application can be adjusted according to actual needs. For example, different preset ranges can be set or the number of continuous monitoring moments can be adjusted based on factors such as the performance requirements, safety thresholds, and application scenarios of the power chip. This flexibility and scalability enable the method to adapt to different testing needs and application scenarios.

[0094] Optionally, the method includes:

[0095] When the first difference is within the preset range and the second difference is not within the preset range, or when the first difference is not within the preset range and the second difference is within the preset range, controlling the temperature of the power chip to be the second temperature, controlling the load of the power chip to be the first load, and continuously measuring a third actual output voltage and a third actual output current corresponding to a plurality of moments;

[0096] Calculating a first average value of a plurality of the third actual output voltages, and calculating a second average value of a plurality of the third actual output currents, and determining whether the first average value and the second average value are both within the preset range;

[0097] When both the first average value and the second average value are outside the preset range, the probability of indicating that the power chip is abnormal is a preset third value, and the preset third value is greater than the preset first value.

[0098] The actual output voltage and actual output current of the power chip at a specific moment are obtained, and the output voltage and output current are predicted based on the current load using a prediction model. A first difference (the difference between the actual output voltage and the predicted output voltage) and a second difference (the difference between the actual output current and the predicted output current) are calculated, and a determination is made as to whether these two differences are within a preset range. If the first difference is within the preset range but the second difference is not, or if the first difference is not within the preset range but the second difference is within the preset range, continuous measurement is required. The power chip temperature is controlled to a previously recorded second temperature, and its load is controlled to a previously recorded first load. The actual output voltage and actual output current are continuously measured at multiple moments (e.g., five moments). The average of the multiple actual output voltages and the average of the multiple actual output currents are calculated, and a determination is made as to whether these two averages are within a preset range. If both the first average (the average of the multiple actual output voltages) and the second average (the average of the multiple actual output currents) are not within the preset range, the chip testing platform indicates that the probability of an abnormality in the power chip is a preset third value, and this value is greater than the previously mentioned preset first value.

[0099] When there's a mismatch between the predicted and actual output voltage or current of a power supply chip (i.e., one of the first and second differences is within a preset range, while the other is not), the chip's performance changes can be more accurately captured by controlling the power supply chip under specific conditions (such as a second temperature and a first load) and continuously measuring the actual output voltage and current at multiple moments. This refined testing process helps more accurately identify potential anomalies or faults in the power supply chip, thereby improving fault diagnosis accuracy. By calculating the average of the actual output voltage and current over multiple consecutive moments and determining whether these averages are within a preset range, the impact of individual measurement errors on the results can be reduced. This statistically based judgment method is more reliable, helps reduce false positives, and improves test reliability. When a power supply chip anomaly occurs, not only a simple anomaly notification is provided, but also a quantified anomaly probability (i.e., a preset third value). This quantitative risk indicator helps users or system administrators more intuitively understand the power supply chip's operating status, enabling more accurate risk assessment and appropriate action. The preset range, control conditions (such as temperature and load), and anomaly probability values ​​can all be adjusted according to actual needs. This enables the method to adapt to different power chip models, application scenarios or performance requirements, and has strong flexibility and scalability.

[0100] Optionally, the method further includes:

[0101] When the first average value is within the preset range and the second average value is not within the preset range, or the first average value is not within the preset range and the second average value is within the preset range, the probability that the power chip is abnormal is a preset fourth value, the preset fourth value is greater than the preset first value, and the preset fourth value is less than the preset third value.

[0102] Similar to the previous method, the actual output voltage and actual output current of the power supply chip are first obtained and compared using a prediction model. When the first difference is within a preset range and the second difference is not, or when the first difference is not and the second difference is within the preset range, continuous measurement is performed. The power supply chip is controlled to specific conditions (such as a second temperature and a first load), and a third actual output voltage and a third actual output current are continuously measured at multiple times. A first average value of the multiple third actual output voltages and a second average value of the multiple third actual output currents are calculated, and a determination is made as to whether both average values ​​are within a preset range. When the first average value is within the preset range and the second average value is not, or when the first average value is not and the second average value is, the probability that the power supply chip is abnormal is a preset fourth value, which is greater than the preset first value and less than the preset third value.

[0103] This method enables more detailed monitoring of the power supply chip's status. While not as serious as if both average values ​​exceed the preset range, it may indicate a performance issue in some aspect of the power supply chip. By indicating the abnormal probability of a preset fourth value, the operating status of the power supply chip can be more accurately assessed. The preset first, third, and fourth values ​​provide different levels of risk assessment. When both average values ​​exceed the preset range, the abnormal probability of the third value is indicated, indicating a higher risk. When only one average value exceeds the range, the abnormal probability of the fourth value is indicated, indicating a relatively lower risk but still requiring attention. This multi-level risk assessment helps users or system administrators gain a more comprehensive understanding of the power supply chip's operating status. This method uses continuous measurements and average calculations to determine the power supply chip's status, enhancing the test's sensitivity and accuracy. It can, to a certain extent, capture performance changes of the power supply chip under certain specific conditions, thereby more accurately reflecting its actual operating status.

[0104] This embodiment also discloses a system for testing a power supply chip. Figure 2 This is a module diagram of a system for testing a power chip disclosed in an embodiment of the present application, such as Figure 2 As shown, the system includes a first prediction module 201, a second prediction module 202, a judgment module 203 and a prompt module 204, wherein:

[0105] A first prediction module 201 is configured to obtain a first temperature and a first actual load of a power chip at a first moment, and predict a first load of the power chip at a second moment based on the first temperature and the first actual load using a first preset model, where the second moment is a moment after the first moment;

[0106] A second prediction module 202 is configured to adjust a second actual load of the power chip at the second moment to the first load, and predict a first output voltage and a first output current of the power chip according to the first load using a second preset model;

[0107] a determination module 203 configured to obtain a second temperature, a first actual output voltage, and a first actual output current of the power chip at the second moment, and determine whether a first difference and a second difference are both within a preset range, where the first difference is a difference between the first actual output voltage and the first output voltage, and the second difference is a difference between the first actual output current and the first output current;

[0108] The prompt module 204 is configured to prompt that the probability of the power chip being abnormal is a preset first value when both the first difference and the second difference are outside a preset range.

[0109] Optionally, the system includes a first execution module, wherein the first execution module is configured to:

[0110] When both the first difference and the second difference are within a preset range, predicting a second load of the power chip at a third moment according to the second temperature and the first load using the first preset model, where the third moment is a moment after the second moment;

[0111] adjusting the third actual load of the power chip at the third moment to the second load, and predicting the second output voltage and the second output current of the power chip according to the second load using the second preset model;

[0112] Obtaining a second actual output voltage and a second actual output current of the power chip at the third moment, and determining whether a third difference and a fourth difference are both within a preset range, the third difference being the difference between the second actual output voltage and the second output voltage, and the fourth difference being the difference between the second actual output current and the second output current;

[0113] When both the third difference and the fourth difference are outside the preset range, the probability that the power chip is abnormal is a preset second value, and the preset second value is greater than the preset first value.

[0114] Optionally, the system includes a first display module, wherein the first display module is configured to:

[0115] When the two target differences corresponding to multiple consecutive moments are both within the preset range, the power supply chip is prompted to pass the test, and the two target differences are the first target difference and the second target difference at the target moment. The first target difference is the difference between the actual output voltage and the predicted output voltage at the target moment, and the second target difference is the difference between the actual output current and the predicted output current at the target moment. The target moment is any one of the multiple moments.

[0116] Optionally, the system includes a second execution module, wherein the second execution module is configured to:

[0117] When the first difference is within the preset range and the second difference is not within the preset range, or when the first difference is not within the preset range and the second difference is within the preset range, controlling the temperature of the power chip to be the second temperature, controlling the load of the power chip to be the first load, and continuously measuring a third actual output voltage and a third actual output current corresponding to a plurality of moments;

[0118] Calculating a first average value of a plurality of the third actual output voltages, and calculating a second average value of a plurality of the third actual output currents, and determining whether the first average value and the second average value are both within the preset range;

[0119] When both the first average value and the second average value are outside the preset range, the probability of indicating that the power chip is abnormal is a preset third value, and the preset third value is greater than the preset first value.

[0120] Optionally, the system further includes a second display module, wherein the second display module is configured to:

[0121] When the first average value is within the preset range and the second average value is not within the preset range, or the first average value is not within the preset range and the second average value is within the preset range, the probability that the power chip is abnormal is a preset fourth value, the preset fourth value is greater than the preset first value, and the preset fourth value is less than the preset third value.

[0122] Optionally, the first prediction module 201 is configured to:

[0123] Acquire a first historical data set of the power chip, and extract features from the first historical data set, the features including the temperature, load, and corresponding time of the power chip;

[0124] Performing an importance score on each feature in the historical data set, regenerating a sample set based on features whose importance scores are greater than a threshold, and dividing the sample set into a first training set, a first validation set, and a first test set;

[0125] Constructing a basic model, training the basic model using the first training set to obtain the first preset model, and evaluating the first preset model using the first validation set and the first test set;

[0126] When the first preset model passes the evaluation, the first temperature and the first actual load are input into the first preset model to obtain the first load of the power chip at the second moment.

[0127] Optionally, the second prediction module 202 is configured to:

[0128] Acquire a second historical data set of the power supply chip, where the second historical data set includes output voltage and output current under different load conditions;

[0129] constructing a neural network architecture based on the second historical data set, and dividing the second historical data set into a second training set, a second validation set, and a second test set;

[0130] Training the neural network architecture using the second training set to obtain a second preset model, and evaluating the second preset model using the second validation set and the second test set;

[0131] When the second preset model passes the evaluation, the first load is input into the second preset model to obtain a first output voltage and a first output current of the power chip.

[0132] It should be noted that the above embodiments provide devices that implement their functions using only the division of the above functional modules as examples. In actual applications, the above functions can be assigned to different functional modules as needed, that is, the internal structure of the device can be divided into different functional modules to complete all or part of the functions described above. In addition, the device and method embodiments provided in the above embodiments are based on the same concept. The specific implementation process is detailed in the method embodiment and will not be repeated here.

[0133] This embodiment also discloses an electronic device, referring to Figure 3 The electronic device may include: at least one processor 301 , at least one communication bus 302 , a user interface 303 , a network interface 304 , and at least one memory 305 .

[0134] The communication bus 302 is used to implement the connection and communication between these components.

[0135] The user interface 303 may include a display screen (Display) and a camera (Camera). Optionally, the user interface 303 may also include a standard wired interface and a wireless interface.

[0136] The network interface 304 may optionally include a standard wired interface or a wireless interface (such as a WI-FI interface).

[0137] The processor 301 may include one or more processing cores. Using various interfaces and circuits, the processor 301 connects to various components within the server. It executes instructions, programs, code sets, or instruction sets stored in the memory 305, as well as accesses data stored in the memory 305, to perform various server functions and process data. Optionally, the processor 301 may be implemented using at least one of the following hardware forms: a digital signal processing (DSP), a field-programmable gate array (FPGA), or a programmable logic array (PLA). The processor 301 may integrate one or a combination of a central processing unit (CPU), a graphics processing unit (GPU), and a modem. The CPU primarily processes the operating system, user interface, and application programs; the GPU is responsible for rendering and drawing content displayed on the display screen; and the modem handles wireless communications. It is understood that the modem may not be integrated into the processor 301 but implemented as a separate chip.

[0138] Among them, the memory 305 may include a random access memory (RAM) or a read-only memory (Read-Only Memory). Optionally, the memory 305 includes a non-transitory computer-readable storage medium. The memory 305 can be used to store instructions, programs, codes, code sets or instruction sets. The memory 305 may include a program storage area and a data storage area, wherein the program storage area may store instructions for implementing an operating system, instructions for at least one function (such as a touch function, a sound playback function, an image playback function, etc.), instructions for implementing the above-mentioned various method embodiments, etc.; the data storage area may store data involved in the above-mentioned various method embodiments, etc. The memory 305 may also be optionally at least one storage device located away from the aforementioned processor 301. As Figure 3As shown, the memory 305 as a computer storage medium may include an operating system, a network communication module, a user interface module, and an application program for a method of testing a power chip.

[0139] exist Figure 3 In the electronic device shown, the user interface 303 is mainly used to provide an input interface for the user and obtain data input by the user; and the processor 301 can be used to call the application program stored in the memory 305 for the method for testing the power chip. When executed by one or more processors 301, the electronic device executes one or more methods as in the above embodiments.

[0140] It should be noted that for the aforementioned method embodiments, for simplicity of description, they are all expressed as a series of action combinations, but those skilled in the art should be aware that this application is not limited by the order of the actions described, because according to this application, certain steps can be performed in other orders or simultaneously. Secondly, those skilled in the art should also be aware that the embodiments described in the specification are all preferred embodiments, and the actions and modules involved are not necessarily required for this application.

[0141] In the above embodiments, the description of each embodiment has its own focus. For parts that are not described in detail in a certain embodiment, reference can be made to the relevant descriptions of other embodiments.

[0142] In the several embodiments provided in this application, it should be understood that the disclosed devices can be implemented in other ways. For example, the device embodiments described above are merely schematic, such as the division of units, which is only a logical function division. In actual implementation, there may be other division methods, such as multiple units or components can be combined or integrated into another system, or some features can be ignored or not executed. Another point is that the mutual coupling or direct coupling or communication connection shown or discussed can be through some service interface, and the indirect coupling or communication connection of devices or units can be electrical or other forms.

[0143] Units described as separate components may or may not be physically separate, and components shown as units may or may not be physical units, that is, they may be located in one place or distributed across multiple network units. Some or all of these units may be selected to achieve the purpose of this embodiment according to actual needs.

[0144] In addition, the functional units in the various embodiments of the present application may be integrated into a single processing unit, or each unit may exist physically separately, or two or more units may be integrated into a single unit. The aforementioned integrated units may be implemented in the form of hardware or software functional units.

[0145] If the integrated unit is implemented as a software functional unit and sold or used as an independent product, it can be stored in a computer-readable memory. Based on this understanding, the technical solution of this application, or the portion that contributes to the prior art, or all or part of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a memory 305 and includes several instructions for causing a computer device (which can be a personal computer, server, or network device, etc.) to execute all or part of the steps of the various embodiments of the method of this application. The aforementioned memory 305 includes various media that can store program code, such as a USB flash drive, a mobile hard drive, a magnetic disk, or an optical disk.

[0146] The above is only an exemplary embodiment of the present disclosure and cannot be used to limit the scope of the present disclosure. That is, any equivalent changes and modifications made according to the teachings of the present disclosure are still within the scope of the present disclosure. After considering the disclosure of the specification and the truth of practice, those skilled in the art will easily think of other embodiments of the present disclosure. This application is intended to cover any variation, use or adaptive change of the present disclosure, which follows the general principles of the present disclosure and includes common knowledge or customary technical means in the art that are not recorded in the present disclosure. The description and examples are to be regarded as exemplary only, and the scope and spirit of the present disclosure are defined by the claims.

Claims

1. A method for testing a power chip, characterized in that: Applied to a chip testing platform, the method includes: Obtaining a first temperature and a first actual load of a power chip at a first moment, and predicting a first load of the power chip at a second moment based on the first temperature and the first actual load using a first preset model, where the second moment is a moment after the first moment, the first actual load is an actual load value at the first moment, and the first load is a predicted load value at the second moment, the first preset model includes the temperature, load, time, and a first corresponding relationship of the power chip, the first corresponding relationship including a corresponding relationship between the temperature, load, and time of the power chip, where one time corresponds to one load and one temperature; adjusting a second actual load of the power chip at the second moment to the first load, and predicting a first output voltage and a first output current of the power chip based on the first load using a second preset model, wherein the second actual load is an actual load value at the second moment, the second preset model including the load, output voltage, output current, and a second corresponding relationship of the power chip, the second corresponding relationship including a corresponding relationship between the output current, output voltage, and load of the power chip, where one load corresponds to one output current and one output voltage; obtaining a second temperature, a first actual output voltage, and a first actual output current of the power chip at the second moment, and determining whether a first difference and a second difference are both within a preset range, where the first difference is a difference between the first actual output voltage and the first output voltage, and the second difference is a difference between the first actual output current and the first output current; When both the first difference and the second difference are outside the preset range, the probability of the power chip being abnormal is a preset first value. When both the first difference and the second difference are within a preset range, predicting a second load of the power chip at a third moment according to the second temperature and the first load using the first preset model, where the third moment is a moment after the second moment; adjusting the third actual load of the power chip at the third moment to the second load, and predicting the second output voltage and the second output current of the power chip according to the second load using the second preset model; Obtaining a second actual output voltage and a second actual output current of the power chip at the third moment, and determining whether a third difference and a fourth difference are both within a preset range, the third difference being the difference between the second actual output voltage and the second output voltage, and the fourth difference being the difference between the second actual output current and the second output current; When both the third difference and the fourth difference are outside the preset range, the probability of the power chip being abnormal is a preset second value, and the preset second value is greater than the preset first value. When the first difference is within the preset range and the second difference is not within the preset range, or when the first difference is not within the preset range and the second difference is within the preset range, controlling the temperature of the power chip to be the second temperature, controlling the load of the power chip to be the first load, and continuously measuring a third actual output voltage and a third actual output current corresponding to a plurality of moments; Calculating a first average value of a plurality of the third actual output voltages, and calculating a second average value of a plurality of the third actual output currents, and determining whether the first average value and the second average value are both within the preset range; When both the first average value and the second average value are outside the preset range, the probability of indicating that the power chip is abnormal is a preset third value, and the preset third value is greater than the preset first value.

2. The method for testing a power chip according to claim 1, wherein: The method comprises: When the two target differences corresponding to multiple consecutive moments are both within the preset range, the power supply chip is prompted to pass the test, and the two target differences are the first target difference and the second target difference at the target moment. The first target difference is the difference between the actual output voltage and the predicted output voltage at the target moment, and the second target difference is the difference between the actual output current and the predicted output current at the target moment. The target moment is any one of the multiple moments.

3. The method for testing a power chip according to claim 1, wherein: The method further comprises: When the first average value is within the preset range and the second average value is not within the preset range, or the first average value is not within the preset range and the second average value is within the preset range, the probability that the power chip is abnormal is a preset fourth value, the preset fourth value is greater than the preset first value, and the preset fourth value is less than the preset third value.

4. The method for testing a power chip according to claim 1, wherein: Predicting the first load of the power chip at the second moment according to the first temperature and the first actual load using a first preset model includes: Acquire a first historical data set of a power chip, and extract features from the first historical data set, the features including the temperature, load, and corresponding time of the power chip; Performing an importance score on each feature in the historical data set, regenerating a sample set based on features whose importance scores are greater than a threshold, and dividing the sample set into a first training set, a first validation set, and a first test set; Constructing a basic model, training the basic model using the first training set to obtain the first preset model, and evaluating the first preset model using the first validation set and the first test set; When the first preset model passes the evaluation, the first temperature and the first actual load are input into the first preset model to obtain the first load of the power chip at the second moment.

5. The method for testing a power chip according to claim 1, wherein: The predicting the first output voltage and the first output current of the power chip according to the first load by using the second preset model includes: Acquire a second historical data set of the power supply chip, where the second historical data set includes output voltage and output current under different load conditions; constructing a neural network architecture based on the second historical data set, and dividing the second historical data set into a second training set, a second validation set, and a second test set; Training the neural network architecture using the second training set to obtain a second preset model, and evaluating the second preset model using the second validation set and the second test set; When the second preset model passes the evaluation, the first load is input into the second preset model to obtain a first output voltage and a first output current of the power chip.

6. A system for testing a power chip, characterized in that: It includes a first prediction module, a second prediction module, a judgment module and a prompt module, wherein: a first prediction module, configured to obtain a first temperature and a first actual load of a power chip at a first moment, and predict a first load of the power chip at a second moment based on the first temperature and the first actual load using a first preset model, where the second moment is a moment after the first moment, the first actual load is an actual load value at the first moment, and the first load is a predicted load value at the second moment, the first preset model includes the temperature, load, moment, and a first corresponding relationship of the power chip, the first corresponding relationship including a corresponding relationship between the temperature, load, and moment of the power chip, where one moment corresponds to one load and one temperature; a second prediction module, configured to adjust a second actual load of the power chip at the second moment to the first load, and predict a first output voltage and a first output current of the power chip according to the first load using a second preset model, wherein the second actual load is an actual load value at the second moment, the second preset model includes the load, output voltage, output current, and a second corresponding relationship of the power chip, the second corresponding relationship including a corresponding relationship between the output current, output voltage, and load of the power chip, where one load corresponds to one output current and one output voltage; a determination module configured to obtain a second temperature, a first actual output voltage, and a first actual output current of the power chip at the second moment, and determine whether a first difference and a second difference are both within a preset range, wherein the first difference is a difference between the first actual output voltage and the first output voltage, and the second difference is a difference between the first actual output current and the first output current; a prompt module configured to prompt that the probability of the power chip being abnormal is a preset first value when both the first difference and the second difference are outside a preset range; The system further includes a first execution module, wherein the first execution module is configured to: When both the first difference and the second difference are within a preset range, predicting a second load of the power chip at a third moment according to the second temperature and the first load using the first preset model, where the third moment is a moment after the second moment; adjusting the third actual load of the power chip at the third moment to the second load, and predicting the second output voltage and the second output current of the power chip according to the second load using the second preset model; Obtaining a second actual output voltage and a second actual output current of the power chip at the third moment, and determining whether a third difference and a fourth difference are both within a preset range, the third difference being the difference between the second actual output voltage and the second output voltage, and the fourth difference being the difference between the second actual output current and the second output current; When both the third difference and the fourth difference are outside the preset range, the probability of the power chip being abnormal is a preset second value, and the preset second value is greater than the preset first value. The system includes a second execution module, wherein the second execution module is configured to: When the first difference is within the preset range and the second difference is not within the preset range, or when the first difference is not within the preset range and the second difference is within the preset range, controlling the temperature of the power chip to be the second temperature, controlling the load of the power chip to be the first load, and continuously measuring a third actual output voltage and a third actual output current corresponding to a plurality of moments; Calculating a first average value of a plurality of the third actual output voltages, and calculating a second average value of a plurality of the third actual output currents, and determining whether the first average value and the second average value are both within the preset range; When both the first average value and the second average value are outside the preset range, the probability of indicating that the power chip is abnormal is a preset third value, and the preset third value is greater than the preset first value.

7. An electronic device, characterized in that: It includes a processor, a memory, a user interface and a network interface, the memory is used to store instructions, the user interface and the network interface are both used to communicate with other devices, and the processor is used to execute the instructions stored in the memory so that the electronic device executes the method according to any one of claims 1 to 5.

8. A computer-readable storage medium, characterized in that The computer-readable storage medium stores instructions, and when the instructions are executed, the method according to any one of claims 1 to 5 is executed.

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