A multi-quantum well layer, an epitaxial structure and a preparation method thereof

Abstract

The present application relates to a kind of multi-quantum well layer, epitaxial structure and preparation method thereof, belong to LED semiconductor technical field;Multi-quantum well layer includes first BInN layer, first InSe layer, InGaN well layer, second InSe layer, second BInN layer, GaN barrier layer interlaced periodic structure of stacking;Epitaxial structure includes sapphire substrate, and sequentially located on sapphire substrate AlN buffer layer, three-dimensional nucleation layer, two-dimensional buffer recovery layer, u type GaN layer, n type GaN layer, stress release layer and p type layer;It further includes above-mentioned multi-quantum well layer, the multi-quantum well layer is located between stress release layer and p type layer;Preparation method is used to prepare above-mentioned epitaxial structure;By adjusting B component and In component content in BInN layer, the polarization electric field generated between well and barrier due to lattice mismatch can be reduced, it is favorable to improve the wave function overlap rate of electron hole in multi-quantum well layer, improve the crystal quality of well layer and barrier layer and finally improve the luminous efficiency of light emitting diode.

Description

Technical Field

[0001] This invention relates to a multi-quantum well layer, an epitaxial structure, and its fabrication method, belonging to the field of LED semiconductor technology. Background Technology

[0002] A light-emitting diode (LED) is a semiconductor electronic component that emits light. As a highly efficient, environmentally friendly, and green new type of solid-state lighting source, it is being rapidly and widely used in applications such as traffic lights, automotive interior and exterior lights, urban landscape lighting, and mobile phone backlights. Improving the luminous efficiency of LED chips is a goal that LEDs are constantly pursuing.

[0003] Epitaxial wafers are crucial components in the manufacture of light-emitting diodes (LEDs). In related technologies, LED epitaxial wafers typically consist of a substrate and n-type GaN layers, multiple quantum well layers, and p-type GaN layers grown sequentially on the substrate. In these technologies, the multiple quantum well layers usually comprise alternating layers of InGaN well layers and GaN barrier layers. However, the inherent lattice mismatch and piezoelectric polarization effects between the InGaN well layers and GaN barrier layers lead to numerous defects and leakage channels within the multiple quantum well layers, resulting in lower luminous efficiency in the final LED epitaxial wafer.

[0004] Furthermore, the wavelength uniformity of the LED epitaxial wafer is ultimately determined by the uniformity of the In composition in the LED quantum well. Therefore, it is necessary to design and grow quantum wells with high In composition uniformity.

[0005] For example, Chinese Patent Publication No. CN 103456851A discloses an LED epitaxial wafer, comprising a substrate, a GaN buffer layer, a first N-GaN contact layer, a first multi-quantum-well light-emitting layer, a P-GaN contact layer, an N-type electrode, and a P-type electrode stacked sequentially. A second multi-quantum-well light-emitting layer and a second N-GaN contact layer are sequentially disposed on the other side of the P-GaN contact layer. Both the first and second N-GaN contact layers are connected to the N-type electrode. This invention provides parallel light-emitting layers on both sides of the P-GaN contact layer, doubling the area of ​​the active light-emitting layer. Under the same driving current, the current density flowing through the light-emitting layer is halved, improving current density uniformity and reducing current suppression degradation. Simultaneously, the forward voltage drop of the LED is reduced, resulting in high luminous efficiency. However, the problem of "numerous defects and leakage channels in the multi-quantum-well layer leading to lower luminous efficiency in the final LED epitaxial wafer" still exists.

[0006] Furthermore, the wavelength uniformity of the LED epitaxial wafer is ultimately determined by the uniformity of the In composition in the LED quantum well. Therefore, it is necessary to design and grow quantum wells with high In composition uniformity. Summary of the Invention

[0007] The purpose of this invention is to propose a multi-quantum well layer, an epitaxial structure, and a method for fabricating the same, so as to avoid the problem that the multi-quantum well layer has many defects and leakage channels, which leads to the low luminous efficiency of the final light-emitting diode epitaxial wafer; and to design and grow a quantum well with high In composition uniformity.

[0008] The present invention provides a multi-quantum well layer comprising a periodic structure in which a first BInN layer, a first InSe layer, an InGaN well layer, a second InSe layer, a second BInN layer, and a GaN barrier layer are stacked alternately.

[0009] The content of B component in the first BlnN layer gradually decreases towards the InGaN well layer, while the content of In component gradually increases towards the InGaN well layer.

[0010] The content of the B component in the second BlnN layer gradually increases from the InGaN well layer side to the GaN barrier layer side, while the content of the In component gradually decreases from the InGaN well layer side to the GaN barrier layer side.

[0011] In the BInN layers (i.e., the first and second BlnN layers), the In content gradually decreases from the InGaN well layer to the GaN barrier layer. This reduces the possibility of In atoms penetrating into the barrier layer during growth, significantly preserving In in the well layers. By adjusting the B and In content in the BInN layers, the polarization electric field caused by lattice mismatch between the well and barrier layers can be reduced. This is beneficial for improving the wavefunction overlap rate of electrons and holes in the multi-quantum well layer, improving the crystal quality of the well and barrier layers, and ultimately enhancing the luminous efficiency of the light-emitting diode.

[0012] The present invention discloses an epitaxial structure with a multi-quantum well layer, comprising a sapphire substrate, and an AlN buffer layer, a three-dimensional nucleation layer, a two-dimensional buffer recovery layer, a u-type GaN layer, an n-type GaN layer, a stress relief layer, and a p-type layer sequentially located on the sapphire substrate; it also includes the aforementioned multi-quantum well layer, wherein the multi-quantum well layer is located between the stress relief layer and the p-type layer.

[0013] The method for fabricating an epitaxial structure with multiple quantum well layers according to the present invention includes the following steps:

[0014] Step S1: Provide a sapphire substrate;

[0015] Step S2: Grow an AlN buffer layer on the sapphire substrate;

[0016] Step S3: Grow a three-dimensional nucleation layer on the AlN buffer layer;

[0017] Step S4: Grow a two-dimensional buffer recovery layer on the three-dimensional nucleation layer;

[0018] Step S5: Grow a U-shaped GaN layer on the two-dimensional buffer recovery layer;

[0019] Step S6: Grow an n-type GaN layer on the u-type GaN layer;

[0020] Step S7: Grow a stress-relieving layer on the n-type GaN layer;

[0021] Step S8: Grow a multi-quantum well layer on the stress relief layer. The multi-quantum well layer includes a periodic structure in which a first BInN layer, a first InSe layer, an InGaN well layer, a second InSe layer, a second BInN layer, and a GaN barrier layer are stacked alternately.

[0022] Step S9: Grow a p-type layer on the multi-quantum-well layer.

[0023] After the nGaN well layer is grown, a quantum barrier layer with a relatively high growth temperature is grown next. This causes the In group in the InGaN quantum well layer to be precipitated. However, the precipitation of the In group is not uniform, which also leads to the uneven distribution of the In group in the InGaN layer. In order to further ensure the uniformity of the In group in the quantum well, the BinN layer acts as an interface depletion layer. The growth temperature of the BinN layer is close to that of the InGaN well layer, which ensures that the In group in the InGaN well layer is not affected, and ultimately ensures the wavelength uniformity of the epitaxial wafer.

[0024] The growth conditions of the InSe layers (i.e., the first InSe layer and the second InSe layer) are low temperature and low pressure, and the growth temperature is close to that of the InGaN well layer. This reduces the destructive effect of the high temperature barrier layer on the low temperature quantum well, thereby reducing the precipitation of In groups in the InGaN quantum well, which is beneficial to improving luminous efficiency. In addition, the InSe insertion layer has low resistivity and high hole mobility, which can reduce the operating voltage of the LED and increase the hole concentration in the quantum well.

[0025] Preferably, the In component content in the first BInN layer gradually increases from 0 to 0.1-0.3, and the B component content in the first BInN gradually decreases from 1 to 0.1-0.3.

[0026] Preferably, the In component content in the second BlnN layer gradually decreases from 0.1-0.3 to 0, and the B component content in the second BlnN layer gradually increases from 0.1-0.3 to 1.

[0027] Preferably, the number of periods in the multi-quantum well layer is 6 to 12.

[0028] Preferably, the thickness of the first BInN layer is 0.5–3 nm, and the thickness of the second BInN layer is 0.5–3 nm.

[0029] Preferably, the InGaN well layer has a thickness of 3–4 nm, and the GaN barrier layer has a thickness of 9–20 nm.

[0030] Preferably, the growth temperature of the first BInN is 750℃~800℃ and the growth pressure is 100 torr~300 torr; the growth temperature of the second BInN is 750℃~800℃ and the growth pressure is 100 torr~300 torr.

[0031] Preferably, the growth temperature of the first InSe layer is 700℃~750℃, and the growth pressure is 10~50 torr; the growth temperature of the second InSe layer is 700℃~750℃, and the growth pressure is 10~50 torr.

[0032] Compared with existing technologies, the advantages of the multi-quantum well layer, epitaxial structure and its fabrication method of the present invention are as follows:

[0033] ① By inserting BInN layers before and after the InGaN well layer, the In content in this structure gradually decreases from the InGaN well layer to the GaN barrier layer. This reduces the possibility of In atoms penetrating into the barrier layer during growth, significantly retaining the In element in the well layer while also improving the growth quality of the barrier layer itself.

[0034] ② By adjusting the content of B and In components in the BInN layer, the polarization electric field caused by lattice mismatch between the well and the barrier can be reduced, which is beneficial to improving the wave function overlap rate of electrons and holes in the multi-quantum well layer, improving the crystal quality of the well layer and the barrier layer, and ultimately improving the luminous efficiency of the light-emitting diode.

[0035] ③ The BInN layer contains B atoms. Smaller B atoms can easily fill the positions of defects and dislocations in InGaN and GaN materials, forming a stable cell structure and reducing the presence of defects. This reduces the probability of carriers undergoing non-radiative recombination at defects, thereby improving the luminous efficiency of the light-emitting diode.

[0036] ④ After the InGaN well layer is grown, a quantum barrier layer with a relatively high growth temperature is grown next. This will cause the In group in the quantum well layer of the InGaN layer to be precipitated. However, the precipitation of the In group is not uniform, which will also lead to the uneven distribution of the In group in the InGaN layer. In order to further ensure the uniformity of the In group in the quantum well, the BinN layer acts as an interface depletion layer. The growth temperature of the BinN layer is close to the growth temperature of the InGaN well layer, ensuring that the In group in the InGaN well layer is not affected, and ultimately ensuring the wavelength uniformity of the epitaxial wafer.

[0037] ⑤ By adjusting the content of B and In components in the BInN layer, materials with a larger band gap than that of the GaN barrier layer were added to both sides of the InGaN well layer, which increased the height of the effective barrier, suppressed the overflow of charge carriers in the quantum well, improved the charge carrier injection efficiency, and improved the internal quantum efficiency of the device.

[0038] ⑥ The growth conditions of the InSe layer are low temperature and low pressure, and the growth temperature is close to that of the InGaN well layer. This reduces the destructive effect of the high temperature barrier layer on the low temperature quantum well, thereby reducing the precipitation of In groups in the InGaN quantum well, which is beneficial to improving luminous efficiency. In addition, the InSe insertion layer has low resistivity and high hole mobility, which can reduce the operating voltage of the LED and increase the hole concentration in the quantum well. Attached Figure Description

[0039] Figure 1 This is a schematic diagram of a multi-quantum well layer according to the present invention;

[0040] Figure 2 This is a schematic diagram of the epitaxial structure of a multi-quantum-well layer according to the present invention;

[0041] The layers are: 1. Sapphire substrate; 2. AlN buffer layer; 3. Three-dimensional nucleation layer; 4. Two-dimensional buffer recovery layer; 5. U-type GaN layer; 6. n-type GaN layer; 7. Stress relief layer; 8. Multiple quantum well layer; 9. P-type layer; 81. First BInN layer; 82. InGaN well layer; 83. Second BInN layer; 84. GaN barrier layer. Detailed Implementation

[0042] The technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings of the embodiments of the present invention. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments.

[0043] Example 1

[0044] like Figure 1 As shown, this embodiment discloses a multi-quantum well layer according to the present invention, including a periodic structure in which a first BInN layer 81, a first InSe layer, an InGaN well layer 82, a second InSe layer, a second BInN layer 83, and a GaN barrier layer 84 are stacked alternately.

[0045] The content of B in the first BlnN layer gradually decreases towards the InGaN well layer 82, while the content of In gradually increases towards the InGaN well layer 82.

[0046] The content of B component in the second BlnN layer gradually increases from the well layer side to the barrier layer side, and the content of In component gradually decreases from the well layer side to the barrier layer side.

[0047] In the BInN layers (i.e., the first BlnN layer and the second BlnN layer), the In content gradually decreases from the InGaN well layer 82 to the GaN barrier layer 84. This reduces the possibility of In atoms penetrating into the barrier layer during growth, significantly preserving the In element in the well layer. By adjusting the B and In content in the BInN layers, the polarization electric field caused by lattice mismatch between the well and the barrier can be reduced. This is beneficial for improving the wave function overlap rate of electrons and holes in the multi-quantum well layer 8, improving the crystal quality of the well and barrier layers, and ultimately improving the luminous efficiency of the light-emitting diode.

[0048] Example 2

[0049] like Figure 2 As shown, this embodiment discloses an epitaxial structure with multiple quantum well layers, including a sapphire substrate 1, and AlN buffer layer 2, three-dimensional nucleation layer 3, two-dimensional buffer recovery layer 4, u-type GaN layer 5, n-type GaN layer 6, stress relief layer 7 and p-type layer 9 sequentially located on the sapphire substrate 1; it also includes a multiple quantum well layer 8 as described in Embodiment 1, wherein the multiple quantum well layer 8 is located between the stress relief layer 7 and the p-type layer 9.

[0050] Example 3

[0051] This embodiment discloses a method for fabricating an epitaxial structure with multiple quantum well layers, including the following steps:

[0052] 1. Provide a sapphire substrate 1.

[0053] 2. An AlN buffer layer 2 is grown on the sapphire substrate 1. The AlN buffer layer 2 is used to alleviate lattice and thermal mismatches between the substrate and the subsequently grown epitaxial layers, reduce crystal defects, and improve the crystal quality of the subsequent epitaxial layers. Specifically, the thickness of the AlN buffer layer 2 is 10–20 nm, the growth temperature is 800℃–900℃, and the growth pressure is 100–200 torr.

[0054] 3. A three-dimensional nucleation layer 3 is grown on the AlN buffer layer 2. The reaction chamber temperature is adjusted to 1000-1080℃, the reaction chamber pressure is controlled at 250-550 torr, and a three-dimensional nucleation layer 3 with a thickness of 400-600 nm is grown for 10-30 min.

[0055] 4. Grow a two-dimensional buffer recovery layer 4 on the three-dimensional nucleation layer 3. Adjust the reaction chamber temperature to 1050-1150℃, control the reaction chamber pressure to 100-500 torr, and grow a two-dimensional buffer recovery layer 4 with a thickness of 500-800 nm for 20-40 min.

[0056] 5. Grow a U-shaped GaN layer 5 on the two-dimensional buffer recovery layer 4. Adjust the reaction chamber temperature to 1050-1200℃ and control the reaction chamber pressure to 100-500 torr to grow an undoped U-shaped GaN layer 5 with a thickness of 1-2 μm.

[0057] 6. Grow an n-type GaN layer 6 on the u-type GaN layer 5. Adjust the reaction chamber temperature to 1050–1200℃ and control the reaction chamber pressure at 100–500 torr to grow an n-type GaN layer 6 with a thickness of 1–3 μm. The n-type GaN layer 6 can be a Si-doped GaN layer, and the Si doping concentration can be [missing information].

[0058] 7. A stress relief layer 7 is grown on the n-type GaN layer 6. The reaction chamber temperature is adjusted to 800-900℃, and the reaction chamber pressure is controlled at 100-500 torr to grow a stress relief layer 7 with a thickness of 50-70 nm.

[0059] 8. A multi-quantum well layer 8 is grown on the stress relief layer 7. The multi-quantum well layer 8 comprises 6 to 12 alternating cycles of a first BInN layer 81, a first InSe layer, an InGaN well layer 82, a second InSe layer, a second BInN layer 83, and a GaN barrier layer 84. The thickness of the InGaN well layer 82 is 3 to 4 nm, and the thickness of the GaN barrier layer 84 can be 9 to 20 nm. The growth temperature of the InGaN well layer 82 is 750 to 800 °C, and the growth pressure is 400 to 600 torr. The growth temperature of the GaN barrier layer 84 is 850 to 900 °C, and the growth pressure is 400 to 600 torr. The thickness of the first BInN layer 81 is 0.5–3 nm; the growth temperature is 750℃–800℃, and the growth pressure is 100 torr–300 torr. The thickness of the second BInN layer 83 is 0.5–3 nm; the growth temperature is 750℃–800℃, and the growth pressure is 100 torr–300 torr. The In content in the first BInN layer gradually increases from 0 to 0.1–0.3, and the B content gradually decreases from 1 to 0.1–0.3. The In content of the second BInN gradually decreases from 0.1 to 0.3 to 0, and the B content of the third BInN gradually increases from 0.1 to 0.3 to 1; the thickness of the first InSe layer is 0.5 nm to 1.5 nm; the growth temperature is 700 °C to 750 °C, and the growth pressure is 10 to 50 torr; the thickness of the second InSe layer is 0.5 nm to 1.5 nm; the growth temperature is 700 °C to 750 °C, and the growth pressure is 10 to 50 torr.

[0060] 9. A p-type layer 9 is grown on the multi-quantum-well layer 8. The p-type layer 9 is a composite layer, comprising a p-type AlGaN electron blocking layer, a p-type GaN layer, and a p-type GaN contact layer stacked sequentially. The growth temperature of the p-type AlGaN electron blocking layer is 900–1000℃, and the growth pressure can be 100–500 torr. The growth temperature of the p-type GaN layer can be 850–950℃, and the growth pressure can be 100–300 torr. The doping concentration of Mg in the p-type GaN layer can be [not specified in the original text]. The growth temperature of the p-type GaN contact layer can be 850–1000℃, and the growth pressure can be 100–300 torr. After the growth of the p-type layer 9100 is completed, it can be annealed in an ammonia atmosphere at a temperature of 650–850℃ for 5–15 minutes.

[0061] The above description is only a preferred embodiment of the present invention, but the scope of protection of the present invention is not limited thereto. Any equivalent substitutions or modifications made by those skilled in the art within the scope of the technology disclosed in the present invention, based on the technical solution and inventive concept of the present invention, should be covered within the scope of protection of the present invention.

Claims

1. A multiple quantum well layer, characterized by, The periodic structure comprises a first BInN layer (81), a first InSe layer, an InGaN well layer (82), a second InSe layer, a second BInN layer (83), and a GaN barrier layer (84) alternately stacked; The B component content in the first BInN layer (81) gradually decreases towards the side of the InGaN well layer (82), and the In component content gradually increases towards the side of the InGaN well layer (82). The B component content in the second BInN layer (83) gradually increases from the side of the InGaN well layer (82) to the side of the GaN barrier layer (84), and the In component content gradually decreases from the side of the InGaN well layer (82) to the side of the GaN barrier layer (84).

2. An epitaxial structure of a multiple quantum well layer, comprising a sapphire substrate (1) and, in succession on the sapphire substrate (1), an AlN buffer layer (2), a three-dimensional nucleation layer (3), a two-dimensional buffer recovery layer (4), a u-shaped GaN layer, an n-type GaN layer (6), a stress release layer (7) and a p-type layer (9); characterized in that, The multi-quantum well layer (8) of claim 1 is further included between the stress release layer (7) and the p-type layer (9).

3. A method of fabricating an epitaxial structure of a multiple quantum well layer as claimed in claim 2, characterized in that The method comprises the following steps: Step S1, providing a sapphire substrate (1); Step S2, growing an AlN buffer layer (2) on the sapphire substrate (1); Step S3, growing a three-dimensional nucleation layer (3) on the AlN buffer layer (2); Step S4, growing a two-dimensional buffer recovery layer (4) on the three-dimensional nucleation layer (3); Step S5, growing a u-type GaN layer (5) on the two-dimensional buffer recovery layer (4); Step S6, growing an n-type GaN layer (6) on the u-type GaN layer (5); Step S7, growing a stress release layer (7) on the n-type GaN layer (6); Step S8, growing a multi-quantum well layer (8) on the stress release layer (7), wherein the multi-quantum well layer (8) comprises a first BInN layer (81), a first InSe layer, an InGaN well layer (82), a second InSe layer, a second BInN layer (83), and a GaN barrier layer (84) alternately stacked; Step S9, growing a p-type layer (9) on the multi-quantum well layer (8).

4. The method of claim 3, wherein the step of growing the epitaxial structure is performed by metal organic chemical vapor deposition (MOCVD) or molecular beam epitaxy (MBE). The In component content in the first BInN layer (81) gradually increases from 0 to 0.1-0.3, and the B component content gradually decreases from 1 to 0.1-0.

3.

5. The method of claim 3, wherein the step of growing the epitaxial structure is performed by metal organic chemical vapor deposition (MOCVD) or molecular beam epitaxy (MBE). The In component content in the second BInN layer (83) gradually decreases from 0.1-0.3 to 0, and the B component content gradually increases from 0.1-0.3 to 1.

6. The method of claim 3, wherein the step of growing the epitaxial structure is performed by metal organic chemical vapor deposition (MOCVD) or molecular beam epitaxy (MBE). The number of periods of the multi-quantum well layer (8) is 6-12.

7. The method of claim 3, wherein the step of growing the epitaxial structure is performed by metal organic chemical vapor deposition (MOCVD) or molecular beam epitaxy (MBE). The thickness of the first BInN layer (81) is 0.5-3 nm, and the thickness of the second BInN layer (83) is 0.5-3 nm.

8. The method of claim 3, wherein the step of growing the epitaxial structure is performed by metal organic chemical vapor deposition (MOCVD) or molecular beam epitaxy (MBE). The thickness of the InGaN well layer (82) is 3-4 nm, and the thickness of the GaN barrier layer (84) is 9-20 nm.

9. The method of claim 3, wherein the step of growing the epitaxial structure is performed by metal organic chemical vapor deposition (MOCVD) or molecular beam epitaxy (MBE). The growth temperature of the first BInN is 750-800℃, and the growth pressure is 100-300 torr; the growth temperature of the second BInN is 750-800℃, and the growth pressure is 100-300 torr.

10. The method of claim 3, wherein the plurality of quantum well layers are formed by the steps of: growing a first quantum well layer on the substrate; growing a second quantum well layer on the first quantum well layer; and growing a third quantum well layer on the second quantum well layer. The first InSe layer has a growth temperature of 700 DEG C to 750 DEG C and a growth pressure of 10 to 50 torr; and the second InSe layer has a growth temperature of 700 DEG C to 750 DEG C and a growth pressure of 10 to 50 torr.

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