Solar cell and preparation method thereof, photovoltaic module

Abstract

The application discloses a solar cell and a preparation method and a photovoltaic module thereof, and relates to the technical field of photovoltaics, to solve the problem that the defects of the part of the N-type doped layer and the P-type doped layer close to the edge of the cell sheet are relatively large, and the risk of electric leakage is relatively high. The solar cell comprises a substrate and a current collection layer. The current collection layer is arranged on the first surface of the substrate and comprises a plurality of first current collection parts and second current collection parts which are arranged at intervals along a first direction and extend along a second direction. The first current collection part and the second current collection part between adjacent first current collection parts have a first isolation area, the first surface has a first edge and a second edge which are oppositely arranged along the second direction, the boundary of the first current collection part close to the first edge has a second isolation area with the first edge, the boundary of the second current collection part close to the first edge has a third isolation area with the first edge, and the width of the second isolation area and / or the third isolation area in the second direction is greater than the width of the first isolation area in the first direction.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of solar cells, in particular to a solar cell, a preparation method thereof and a photovoltaic module. BACKGROUND

[0002] A solar cell is a device for converting solar energy into electricity through photoelectric effect or photochemical effect. The solar cell generally comprises a semiconductor substrate and a metal grid.

[0003] In the prior art, the solar cell has an N-type doped layer and a P-type doped layer, and the part of the N-type doped layer and the P-type doped layer close to the edge of the cell sheet has a larger defect and a higher risk of electric leakage. SUMMARY

[0004] The present application aims to provide a solar cell, a preparation method thereof and a photovoltaic module, which can reduce the risk of electric leakage and reduce the safety hazard.

[0005] To achieve the above-mentioned purpose, in a first aspect, the present application provides a solar cell. The solar cell comprises a substrate and a current collecting layer. The substrate comprises a first surface and a second surface opposite to each other, and the current collecting layer is arranged on the first surface and comprises a plurality of first current collecting parts and a plurality of second current collecting parts. The first current collecting parts and the second current collecting parts are arranged alternately and spaced in a first direction and extend in a second direction, and the first direction and the second direction are orthogonal. The first current collecting part and the second current collecting part between adjacent first current collecting parts and second current collecting parts have a first isolation zone. The first surface has a first edge and a second edge arranged opposite to each other along the second direction. The boundary of the first current collecting part closest to the first edge and the first edge have a second isolation zone, and the boundary of the second current collecting part closest to the first edge and the first edge have a third isolation zone. The width of the second isolation zone and / or the third isolation zone in the second direction is greater than the width of the first isolation zone in the first direction.

[0006] Compared with the prior art, the solar cell provided by the application has a second isolation region between the boundary of the first current collecting part adjacent to the first edge and the first edge, and the second isolation region separates the boundary of the first current collecting part adjacent to the first edge from the first edge, thereby facilitating suppression of electric leakage. Further, the third isolation region is between the boundary of the second current collecting part adjacent to the first edge and the first edge, and the third isolation region separates the boundary of the second current collecting part adjacent to the first edge from the first edge, thereby facilitating suppression of electric leakage. Further, since the edge of the cell sheet has more defects and more existing recombination centers, the isolation between the collecting region and the edge of the cell sheet needs to be relatively large, and the first isolation region is PN isolation, which is already small enough to improve the surface utilization of the cell sheet, and therefore the second isolation region and / or the third isolation region are particularly made to have a width in the second direction greater than the width of the first isolation region in the first direction.

[0007] In an implementation manner, the current collecting layer is a transparent conductive layer.

[0008] In the case of the above technical solution, the transparent conductive layer has high conductivity, can timely guide the collected carriers out, and reduces the recombination rate of the carriers. Further, the transparent conductive layer can not only improve the current collecting capacity of the solar cell, but also can be used as an anti-reflection film to improve the light absorption rate of the solar cell. In addition, the transparent conductive layer has passivation performance. In addition, as described above, the first current collecting part and the second current collecting part are insulated by the first isolation region, and the first isolation region physically insulates the first current collecting part and the second current collecting part. Specifically, the first current collecting part is in ohmic connection with the first electrode, and the second current collecting part is in ohmic connection with the second electrode, so the transparent conductive layers of the two parts cannot be directly electrically connected, that is, the transparent conductive layers of the two parts must be physically insulated, that is, not in contact.

[0009] In an implementation manner, the first surface further includes a ring-shaped conductor layer surrounding the current collecting layer. The ring-shaped conductor layer has a fourth isolation region between the inner boundary adjacent to the first edge of the ring-shaped conductor layer and the boundary of the first current collecting part adjacent to the first edge; and / or, the ring-shaped conductor layer has a fifth isolation region between the inner boundary adjacent to the first edge of the ring-shaped conductor layer and the boundary of the second current collecting part adjacent to the first edge. The fourth isolation region and / or the fifth isolation region have a width in the second direction greater than the width of the first isolation region in the first direction.

[0010] Because solar cells often have numerous defects at their edges, ineffective isolation of these edges can lead to leakage, reduced cell conversion efficiency, and hot spot effects in the photovoltaic module, thus impacting its performance. Therefore, the aforementioned technical solution not only further isolates the first and second current collection sections from the first edge to reduce leakage risk and safety hazards, but also improves cell conversion efficiency and reduces or eliminates hot spot effects, ensuring the module's performance.

[0011] In one implementation, the annular conductor layer includes a first annular conductor portion and a second annular conductor portion; the first annular conductor portion is in direct contact with the substrate, while the second annular conductor portion is not in direct contact with the substrate. The second annular conductor portion is located between the first annular conductor portion and a fourth isolation region; or, the second annular conductor portion is located between the first annular conductor portion and a fifth isolation region.

[0012] With the above technical solution, the first annular conductor portion can further ensure the electrical isolation effect at the edge, prevent microcracks at the edge from propagating into the solar cell, and ensure the quality of the solar cell.

[0013] In one implementation, a doped semiconductor layer is disposed between the annular conductor layer and the substrate. That is, the boundary of the annular conductor layer near its first edge is approximately flush with the boundary of the doped semiconductor layer. The doped semiconductor layer can be a first doped semiconductor layer, a second doped semiconductor layer with the opposite doping polarity to the first doped semiconductor layer, or a stack of both. This arrangement, by passivating the entire edge of the solar cell with a doped semiconductor layer, can reduce surface defects at the edge, reduce minority carrier recombination at the edge, and thus improve the electrical performance at the edge.

[0014] In one implementation, the solar cell further includes grid lines disposed on the current collection layer, with the grid lines located on the first current collection section and the second current collection section, respectively. The minimum distance between the end of the grid line near the first side and the second isolation region and / or the third isolation region in the second direction is L1, and the minimum distance between the grid line and the first isolation region in the first direction is L2, where L1 is greater than L2.

[0015] When the above technical solution is adopted, since L1 is greater than L2, it can be ensured that the grid line can collect the current on the width of the first current collection section or the second current collection section, while taking into account the current collection at both ends (i.e. the ends near the first side or the second side); since the defects at the edge of the cell are larger, there are more recombination centers and larger leakage, L1 needs to be set larger to prevent minority carrier concentration recombination at the end.

[0016] In one implementation, L1 is greater than or equal to 100 micrometers and less than or equal to 500 micrometers. This ensures effective current collection by the gate line while preventing leakage caused by the gate line being too close to the second and / or third isolation regions.

[0017] In one implementation, L2 is greater than or equal to 50 micrometers and less than or equal to 400 micrometers. This ensures effective current collection by the gate line while preventing leakage caused by the gate line being too close to the first isolation zone.

[0018] In one implementation, the first surface further includes a third side located between the first side and the second side, one end of the third side being connected to the end of the first side via a first chamfer, and the other end of the third side being connected to the end of the second side via a second chamfer. The boundary of the first current collecting portion adjacent to the first chamfer and / or the second chamfer is a chamfered edge; and / or, the boundary of the second current collecting portion adjacent to the first chamfer and / or the second chamfer is a chamfered edge.

[0019] When the above technical solution is adopted, the chamfered edge can effectively prevent the solar cell from breaking and developing microcracks during the manufacturing process.

[0020] In one implementation, the length of the first current collecting portion adjacent to the first chamfer and the second chamfer is less than the length of the remaining first current collecting portions; and / or, the length of the second current collecting portion adjacent to the first chamfer and the second chamfer is less than the length of the remaining second current collecting portions.

[0021] By adopting the above technical solution, defects near the first chamfer and the second chamfer of the first current collection part and / or the second current collection part can be isolated to improve the quality of the solar cell.

[0022] In one implementation, the first surface of the substrate has a plurality of recessed regions corresponding to a plurality of first current collecting portions, and a plurality of flat regions corresponding to a plurality of second current collecting portions. Alternatively, the first surface of the substrate has a plurality of recessed regions corresponding to a plurality of first current collecting portions, and flat regions corresponding to a ring conductor layer.

[0023] In this section, along the direction from the first surface to the second surface, the recessed area is lower than the flat area, and there are inclined sidewalls between adjacent recessed areas and flat areas.

[0024] When the above technical solution is adopted, the presence of the above-mentioned recessed area can at least partially offset the first current collecting part and the second current collecting part along the thickness direction of the substrate, thereby facilitating the at least partial offset of the electrode structures located in the first current collecting part and the second current collecting part along the thickness direction of the substrate, thereby reducing the risk of leakage.

[0025] In one implementation, the recessed area is formed with a first texture structure, which includes a pyramid-shaped velvet structure.

[0026] When the above technical solution is adopted, the first textured structure includes a pyramid-shaped velvety structure, which is beneficial to increasing the surface area of ​​the recessed area, improving the light-trapping effect of the recessed area, and allowing more light to be refracted through the recessed area into the substrate and utilized by the substrate. Furthermore, the first current-collecting part has a portion located on the recessed area, and the side of the portion of the first current-collecting part formed on the recessed area through processes such as deposition also undulates with the undulations of the recessed area. That is, the side of the portion of the first current-collecting part formed on the recessed area that is away from the substrate also has a roughly the same undulating morphology as the recessed area. Therefore, when the first textured structure is formed on the recessed area, the side of the portion of the first current-collecting part formed on the recessed area that is away from the substrate also has corresponding uneven characteristics, which is beneficial to increasing the surface area of ​​the side of the portion of the first current-collecting part formed on the recessed area that is away from the substrate. This, in turn, is beneficial to increasing the contact area between the first current-collecting part and the corresponding electrode, reducing the contact resistance between the first current-collecting part and the corresponding electrode, and further improving the working performance of the solar cell.

[0027] In one implementation, the flat area is shaped like the base of a pyramid.

[0028] When the above technical solution is adopted, the recessed area creates a height difference between the areas on both sides of the recessed area, and since the recessed area has a first textured structure, the first current collection part containing the first textured structure can be effectively protected from process damage.

[0029] In one implementation, a second texture structure is formed on the inclined sidewall. The second texture structure includes a prism-shaped structure that slopes gradually from the concave area toward the adjacent flat area.

[0030] When the above technical solution is adopted, the prism-shaped structure can increase the reflection of light toward the bottom surface of the recessed area, thereby increasing the absorption of light.

[0031] In one implementation, the prism-shaped structure has a pyramid at its apex away from the base, with the pyramid's apex below the surface of the flat area.

[0032] When the above technical solution is adopted, the flat region provides a smooth transition interface for the formation of the annular conductor layer and / or the second current collection part, which is beneficial to increase the formation thickness of the annular conductor layer and / or the second current collection part on the flat region, and makes the shape retention of the annular conductor layer and / or the second current collection part better.

[0033] In one implementation, the solar cell further includes: a first doped semiconductor layer and a second doped semiconductor layer disposed on a first surface of a substrate, the first doped semiconductor layer and the second doped semiconductor layer having opposite conductivity types. A first current collection portion covers a portion of the first doped semiconductor layer, the first doped semiconductor layer having an overlapping portion extending to cover a portion of the second doped semiconductor layer, and a second current collection portion covers a portion of the overlapping portion and a portion of the second doped semiconductor layer.

[0034] In one implementation, the solar cell further includes: a second doped semiconductor layer and a first doped semiconductor layer disposed on a first surface, and a stacked structure of the second doped semiconductor layer and the first doped semiconductor layer between the second annular conductor portion and the substrate; the first doped semiconductor layer and the second doped semiconductor layer have opposite conductivity types.

[0035] When the above technical solution is adopted, the first doped semiconductor layer and the second doped semiconductor layer can effectively shun the charge carriers, which is beneficial to the formation of photocurrent.

[0036] In one implementation, the first doped semiconductor layer includes a doped amorphous silicon layer and / or a doped microcrystalline silicon layer; the second doped semiconductor layer includes a doped polycrystalline silicon layer.

[0037] When the above technical solution is adopted, the second doped semiconductor layer includes a doped polycrystalline silicon layer. In this case, compared with a doped amorphous silicon layer, the doped polycrystalline silicon layer has higher carrier transport characteristics. Therefore, when the second doped semiconductor layer is a doped polycrystalline silicon layer, the carrier recombination rate can be further reduced, which is beneficial to improving the photoelectric conversion efficiency of the solar cell.

[0038] In one implementation, the width of the first isolation region in the first direction is greater than or equal to 40 micrometers and less than or equal to 80 micrometers.

[0039] In one implementation, the widths of the fourth isolation region and the fifth isolation region in the second direction are both greater than or equal to 80 micrometers and less than or equal to 200 micrometers. Because leakage current is relatively high in the edge region of the solar cell, a larger isolation space is required. The width range of the fourth and fifth isolation regions can ensure electrical isolation while fully utilizing the active area at the edge to improve photoelectric conversion efficiency; and / or, the width of the fourth isolation region in the second direction is equal to the width of the fifth isolation region in the second direction; and / or, the ratio of the width of the fourth isolation region in the second direction and / or the width of the fifth isolation region in the second direction to the width of the first isolation region in the first direction is greater than or equal to 1.5 and less than or equal to 3. Since the passivation effect of the edge region of the solar cell is poor, the above technical solution can effectively isolate the influence of the edge region on passivation-related open-circuit voltage, pseudo-fill factor, and other electrical performance parameters, thereby improving the cell conversion efficiency of the solar cell. Furthermore, considering that the first isolation region is located between the first and second current collection sections, and that the first isolation region requires a relatively narrow width, and that screen printing needs to be done along a specific direction, if the etching paste printing openings of the fourth and / or fifth isolation regions are too narrow (i.e., the width of the fourth and / or fifth isolation regions in the second direction is too small), it can easily lead to printed grid breaks in the fourth and / or fifth isolation regions, resulting in ineffective isolation. This can cause leakage current in the solar cell, reduced cell conversion efficiency, and hot spot effects in the photovoltaic module, affecting the performance of the photovoltaic module. Therefore, adopting the above technical solution can not only further reduce the risk of leakage current and minimize safety hazards, but also improve cell conversion efficiency and reduce or avoid hot spot effects in the photovoltaic module, thus ensuring the performance of the photovoltaic module.

[0040] In one implementation, the width of the overlapping portion along the first direction is greater than or equal to 60 micrometers and less than or equal to 140 micrometers.

[0041] If the overlapping portion is set too large, it will reduce the width of the first doped semiconductor layer and the second doped semiconductor layer, thus reducing the collection of charge carriers. If the overlapping portion is set too small, the error caused by the current screen printing precision may lead to incomplete isolation and battery failure, since electrical isolation is required at the corresponding position of the overlapping portion.

[0042] In one implementation, the width of the stacked structure along the second direction is greater than or equal to 100 micrometers and less than or equal to 500 micrometers.

[0043] By adopting the above technical solution, compared with forming a first doped semiconductor layer or a second doped semiconductor layer in the second annular conductor portion, the passivation effect of the second annular conductor portion can be effectively improved, the probability of fixture damage to the solar cell during the manufacturing process can be reduced, and the quality of the solar cell can be ensured.

[0044] In one implementation, the width of the second annular conductor portion along the second direction is greater than or equal to 50 micrometers and less than or equal to 400 micrometers.

[0045] By adopting the above technical solution, in actual production, the problem of etching paste being printed onto the screen printing table due to excessively narrow etching paste (i.e., the width of the second annular conductor portion being too small) can be reduced or avoided, thereby increasing the production capacity of solar cells.

[0046] In one implementation, the height difference between the second current collecting section and the first current collecting section is greater than the height difference between the second annular conductor section and the second current collecting section; and / or, the height difference between the second annular conductor section and the first current collecting section is greater than the height difference between the second annular conductor section and the second current collecting section.

[0047] When the above technical solution is adopted, if a second doped semiconductor layer is formed on the first surface of the substrate, and the doping type of the second doped semiconductor layer is the same as that of the substrate, the second doped semiconductor layer is a majority carrier, so recombination does not need to be considered at the fifth isolation region. However, recombination needs to be considered at the first and fourth isolation regions. Therefore, the height difference between the first and fourth isolation regions is large to reduce the probability of majority carrier recombination in the first doped semiconductor layer.

[0048] Secondly, the present invention also provides a method for preparing a solar cell. The method for preparing the solar cell includes:

[0049] A substrate is provided, the substrate including opposing first and second surfaces;

[0050] A current collection layer is formed on the first surface of the substrate;

[0051] The current collection layer includes a plurality of first current collection sections and a plurality of second current collection sections; the first current collection sections and the second current collection sections are arranged alternately and spaced apart along a first direction and extend along a second direction, the first direction and the second direction being orthogonal; a first isolation zone is provided between adjacent first current collection sections and second current collection sections;

[0052] The first surface has a first side and a second side disposed opposite to each other along a second direction. A second isolation region is provided between the boundary of the first current collecting part adjacent to the first side and the first side. A third isolation region is provided between the boundary of the second current collecting part adjacent to the first side and the first side. The width of the second isolation region and / or the third isolation region in the second direction is greater than the width of the first isolation region in the first direction.

[0053] Compared with the prior art, the beneficial effects of the method for preparing solar cells provided by the present invention are the same as those of the solar cells described in the first aspect, and will not be repeated here.

[0054] In one implementation, forming a current collection layer on a first surface of the substrate includes:

[0055] A current-collecting material layer is integrally formed on the first surface of the substrate;

[0056] Remove the current-collecting material layer at the corresponding position of the first isolation zone to form a current-collecting layer including multiple first current-collecting parts and multiple second current-collecting parts.

[0057] Thirdly, the present invention also provides a photovoltaic module. This photovoltaic module includes a plurality of solar cells as described in the first aspect, or solar cells prepared by the method described in the second aspect. An encapsulation layer covers the surfaces of the plurality of solar cells, and a cover plate covers the surface of the encapsulation layer away from the solar cells.

[0058] Compared with the prior art, the photovoltaic module provided by the present invention has the same beneficial effects as the solar cell described in the first aspect or the same beneficial effects as the solar cell prepared by the method described in the second aspect, which will not be elaborated here. Attached Figure Description

[0059] The accompanying drawings, which are included to provide a further understanding of the invention and form part of this invention, illustrate exemplary embodiments of the invention and are used to explain the invention, but do not constitute an undue limitation of the invention. In the drawings:

[0060] Figure 1 This is a top view of the solar cell in an embodiment of the present invention;

[0061] Figure 2 As described in the embodiments of the present invention Figure 1 Enlarged schematic diagram of part of the structure;

[0062] Figure 3 As described in the embodiments of the present invention Figure 2 The first type of sectional view along the A1-A2 direction;

[0063] Figure 4 As described in the embodiments of the present inventionFigure 2 The second type of sectional view along the A1-A2 direction;

[0064] Figure 5 As described in the embodiments of the present invention Figure 2 The first type of sectional view along the B1-B2 direction;

[0065] Figure 6 As described in the embodiments of the present invention Figure 2 The second type of sectional view along the B1-B2 direction;

[0066] Figure 7 As described in the embodiments of the present invention Figure 2 The first type of sectional view along the C1-C2 direction;

[0067] Figure 8 As described in the embodiments of the present invention Figure 2 The second type of sectional view along the C1-C2 direction;

[0068] Figure 9 This is a partially enlarged top view of a solar cell including grid lines in an embodiment of the present invention;

[0069] Figure 10 This is a partially enlarged top view of another solar cell including grid lines in an embodiment of the present invention;

[0070] Figure 11 This is a SEM image of a portion of the structure of the solar cell in an embodiment of the present invention;

[0071] Figure 12 As described in the embodiments of the present invention Figure 11 Enlarged schematic diagram of the middle section structure;

[0072] Figure 13 This is a schematic diagram of the prism-shaped structure in an embodiment of the present invention.

[0073] Figure label:

[0074] 1-Substrate, 10-First side, 11-Second side, 12-Third side, 13-First chamfer, 14-Second chamfer; 2-Current collection layer, 20-First current collection section, 21-Second current collection section; 3-First isolation region, 4-Second isolation region, 5-Third isolation region, 6-Annular conductor layer, 60-First annular conductor section, 61-Second annular conductor section, 7-Fourth isolation region, 8-Fifth isolation region, 90-Gate line, 91-Pyramid structure, 910-Pyramid, 92-First doped semiconductor layer, 93-Second doped semiconductor layer, 94-First passivation layer, 95-Second passivation layer, 96-Planar, 97-Pyramid-shaped textured structure. Detailed Implementation

[0075] To make the technical problems to be solved, the technical solutions, and the beneficial effects of the present invention clearer, the present invention will be further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only for explaining the present invention and are not intended to limit the present invention.

[0076] It should be noted that when a component is referred to as being "fixed to" or "set on" another component, it can be directly on or indirectly on that other component. When a component is referred to as being "connected to" another component, it can be directly connected to or indirectly connected to that other component.

[0077] Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of indicated technical features. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of this invention, "a plurality of" means two or more, unless otherwise explicitly specified. "Several" means one or more, unless otherwise explicitly specified.

[0078] In the description of this invention, it should be understood that the terms "upper", "lower", "front", "rear", "left", "right", etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are only for the convenience of describing this invention and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on this invention.

[0079] In the description of this invention, it should be noted that, unless otherwise explicitly specified and limited, the terms "installation," "connection," and "linking" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral connection; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; they can refer to the internal communication of two components or the interaction between two components. Those skilled in the art can understand the specific meaning of the above terms in this invention according to the specific circumstances.

[0080] To address the aforementioned technical problems, in a first aspect, embodiments of the present invention provide a solar cell. See also... Figures 1 to 8The solar cell includes a substrate 1 and a current collection layer 2. The substrate 1 includes a first surface and a second surface facing each other. The current collection layer 2 is disposed on the first surface and includes a plurality of first current collection portions 20 and a plurality of second current collection portions 21. The first current collection portions 20 and the second current collection portions 21 are arranged alternately along a first direction A and extend along a second direction B, where the first direction A and the second direction B are orthogonal. A first isolation region 3 is provided between adjacent first current collection portions 20 and second current collection portions 21. The first surface has a first side 10 and a second side 11 disposed opposite each other along the second direction B. A second isolation region 4 is provided between the boundary of the first current collection portion 20 adjacent to the first side 10 and the first side 10. A third isolation region 5 is provided between the boundary of the second current collection portion 21 adjacent to the first side 10 and the first side 10. The width of the second isolation region 4 and / or the third isolation region 5 in the second direction B is greater than the width of the first isolation region 3 in the first direction A.

[0081] In terms of shape, the first and second surfaces of the substrate may have the same or different shapes. In this embodiment of the invention, the first and second surfaces have the same shape. For example, the shape of the first or second surface may be a square, a rectangle, a rounded square, a circle, etc.

[0082] In terms of materials, the aforementioned substrate can be a semiconductor substrate. For example, the substrate can be any semiconductor material such as a silicon substrate, a germanium-silicon substrate, a germanium substrate, or a gallium arsenide substrate.

[0083] In terms of conductivity type, the substrate can be an intrinsically conductive substrate, an N-type conductive substrate, or a P-type conductive substrate. Preferably, the substrate is a P-type conductive substrate or an N-type conductive substrate. Compared with an intrinsically conductive substrate, a P-type conductive substrate or an N-type conductive substrate has better conductivity, resulting in a lower bulk resistivity in the final solar cell and thus improving the efficiency of the solar cell. For example, an N-type silicon substrate is used. Compared with a P-type conductive substrate, an N-type silicon substrate has advantages such as higher minority carrier lifetime, no light decay, and better performance in low light conditions.

[0084] It should be understood that the first surface mentioned above is the backlight surface, and the second surface is the light-facing surface. The light-facing surface of the substrate (i.e., the second surface) can be flat, or it can be textured. Since textured surfaces have a light-trapping effect, when the light-facing surface of the substrate is textured, the reflectivity of the light-facing surface can be reduced, allowing more light to be refracted from the light-facing surface into the substrate and absorbed and utilized, thus improving the photoelectric conversion efficiency of the solar cell.

[0085] See Figures 1 to 8In the solar cell provided in this embodiment of the invention, a second isolation region 4 is provided between the boundary of the first current collecting section 20 adjacent to the first side 10 and the first side 10. The second isolation region 4 separates the boundary of the first current collecting section 20 adjacent to the first side 10 from the first side 10, thereby suppressing leakage current. Furthermore, a third isolation region 5 is provided between the boundary of the second current collecting section 21 adjacent to the first side 10 and the first side 10. The third isolation region 5 separates the boundary of the second current collecting section 21 adjacent to the first side 10 from the first side 10, thereby suppressing leakage current. Furthermore, since there are many defects and composite centers at the edge of the battery cell, the isolation between the current collection section and the edge of the battery cell needs to be relatively large. The first isolation region is a PN isolation region, which is already set small enough to improve the surface utilization of the battery cell. Therefore, the present invention specifically makes the width of the second isolation region 4 and / or the third isolation region 5 in the second direction B greater than the width of the first isolation region 3 in the first direction A. At this time, the first current collection section 20 and the second current collection section 21 can be further separated from the first side 10 to reduce the risk of leakage and reduce safety hazards.

[0086] The first, second, and third isolation zones mentioned above are regions where electron / hole collection is not performed. They do not contribute current and therefore do not generate or collect photocurrent.

[0087] As one possible implementation, see Figure 2 The width of the first isolation region 3 in the first direction A is greater than or equal to 40 micrometers and less than or equal to 80 micrometers. For example, the width of the first isolation region 3 in the first direction A can be 40 micrometers, 45 micrometers, 50 micrometers, 55 micrometers, 60 micrometers, 65 micrometers, 70 micrometers, 75 micrometers or 80 micrometers, etc.

[0088] As one possible implementation, the current collection layer described above is a transparent conductive layer. For example, the transparent conductive layer may be composed of one or more stacks of ITO (indium tin oxide), ITiO (titanium tin oxide), IWO (tungsten tin oxide), and ICO (cerium tin oxide).

[0089] With the above technical solution, the transparent conductive layer has high conductivity, which can promptly guide the collected charge carriers and reduce the carrier recombination rate. Furthermore, the transparent conductive layer not only improves the current collection capability of the solar cell but also acts as an anti-reflection coating to improve the light absorption rate of the solar cell. In addition, the transparent conductive layer also has passivation properties. Furthermore, as described above, the first current collecting section and the second current collecting section are insulated from each other by a first isolation region, which physically insulates them. Specifically, since the first current collecting section is ohmically connected to the first electrode and the second current collecting section is ohmically connected to the second electrode, the transparent conductive layers of these two parts cannot be directly electrically connected; that is, they must be physically insulated from each other, i.e., they must not contact each other.

[0090] As one possible implementation, see Figures 1 to 8 The first surface also includes an annular conductor layer 6 surrounding the current collecting layer 2. A fourth isolation region 7 is formed between the inner boundary of the annular conductor layer 6 near the first side 10 and the boundary of the first current collecting portion 20 near the first side 10; and / or, a fifth isolation region 8 is formed between the inner boundary of the annular conductor layer 6 near the first side 10 and the boundary of the second current collecting portion 21 near the first side 10. The width of the fourth isolation region 7 and / or the fifth isolation region 8 in the second direction B is greater than the width of the first isolation region 3 in the first direction A.

[0091] Because solar cells often have numerous defects at their edges, ineffective isolation of these edges can lead to leakage, reduced cell conversion efficiency, and hot spot effects in the photovoltaic module, thus impacting its performance. Therefore, the aforementioned technical solution not only further isolates the first and second current collection sections from the first edge to reduce leakage risk and safety hazards, but also improves cell conversion efficiency and reduces or eliminates hot spot effects, ensuring the module's performance.

[0092] In one alternative approach, see Figures 5 to 8 The aforementioned annular conductor layer 6 includes a first annular conductor portion 60 and a second annular conductor portion 61. The first annular conductor portion 60 is in direct contact with the substrate 1, while the second annular conductor portion 61 is not in direct contact with the substrate 1. The second annular conductor portion 61 is located between the first annular conductor portion 60 and the fourth isolation region 7; or, the second annular conductor portion 61 is located between the first annular conductor portion 60 and the fifth isolation region 8.

[0093] With the above technical solution, the first annular conductor portion can further ensure the electrical isolation effect at the edge, prevent microcracks at the edge from propagating into the solar cell, and ensure the quality of the solar cell.

[0094] Although the annular conductor layer 6 shown in the figure includes a first annular conductor portion 60 and a second annular conductor portion 61, in another embodiment, the annular conductor layer 6 may also be formed entirely on a doped semiconductor layer, which may be at least one of a first doped semiconductor layer 92 and a second doped semiconductor layer 93. That is, the boundary of the annular conductor layer 6 near the first side is approximately flush with the boundary of the doped semiconductor layer, and the doped semiconductor layer may be the first doped semiconductor layer 92 or a second doped semiconductor layer 93 with the opposite doping polarity to the first doped semiconductor layer 92, or a stack of both. With this configuration, the entire edge of the solar cell is passivated with a doped semiconductor layer, which can reduce surface defects at the edge and reduce minority carrier recombination at the edge, thereby improving the electrical performance at the edge.

[0095] In one alternative embodiment, the aforementioned annular conductor layer is a transparent conductive layer.

[0096] In one alternative approach, see Figure 2 The widths of the fourth isolation region 7 and the fifth isolation region 8 in the second direction B are both greater than or equal to 80 micrometers and less than or equal to 200 micrometers. For example, the widths of the fourth isolation region 7 or the fifth isolation region 8 in the second direction B can be 80 micrometers, 90 micrometers, 100 micrometers, 120 micrometers, 150 micrometers, 160 micrometers, 190 micrometers, or 200 micrometers, etc. Because leakage current is relatively large in the edge region of the solar cell, a larger isolation space is required. The width range of the fourth and fifth isolation regions can ensure electrical isolation while fully utilizing the active area at the edge to improve photoelectric conversion efficiency.

[0097] The relationship between the width values ​​of the fourth isolation zone and the fifth isolation zone in the second direction can be set according to the actual situation. In one optional mode, the width of the fourth isolation zone in the second direction is equal to the width of the fifth isolation zone in the second direction.

[0098] In one alternative embodiment, the ratio of the width of the fourth isolation zone in the second direction and / or the width of the fifth isolation zone in the second direction to the width of the first isolation zone in the first direction is greater than or equal to 1.5 and less than or equal to 3.

[0099] Because the passivation effect at the edge of a solar cell is poor, the above-mentioned technical solution can effectively isolate the influence of the edge region on passivation-related electrical performance parameters such as open-circuit voltage and pseudo-fill factor, thereby improving the cell conversion efficiency. Furthermore, considering that the first isolation region is located between the first and second current collection sections, and that the first isolation region requires a narrow width, screen printing needs to be done along a specific direction. If the etching paste (e.g., oxalic acid or phosphoric acid system) for the fourth and / or fifth isolation regions has too narrow an opening (i.e., the width of the fourth and / or fifth isolation regions in the second direction is too small), it can easily lead to printed grid breaks in the fourth and / or fifth isolation regions, resulting in ineffective isolation. This can cause leakage current in the solar cell, reduced cell conversion efficiency, and hot spot effects in the photovoltaic module, affecting the performance of the photovoltaic module. Therefore, the above-mentioned technical solution can not only further reduce the risk of leakage current and minimize safety hazards, but also improve cell conversion efficiency and reduce or avoid hot spot effects in the photovoltaic module, ensuring the performance of the photovoltaic module.

[0100] In one alternative approach, see Figures 5 to 8 The width W1 of the second annular conductor portion 61 along the second direction is greater than or equal to 50 micrometers and less than or equal to 400 micrometers. For example, the width W1 of the second annular conductor portion 61 can be 50 micrometers, 60 micrometers, 70 micrometers, 80 micrometers, 90 micrometers, 100 micrometers, 110 micrometers, 120 micrometers, 130 micrometers, 140 micrometers, 150 micrometers, 160 micrometers, 170 micrometers, 180 micrometers, 190 micrometers, 200 micrometers, 230 micrometers, 260 micrometers, 280 micrometers, 300 micrometers, 310 micrometers, 320 micrometers, 350 micrometers, 380 micrometers, 400 micrometers, etc.

[0101] By adopting the above technical solution, in actual production, the problem of etching paste being printed onto the screen printing table due to excessively narrow etching paste (i.e., the width of the second annular conductor portion being too small) can be reduced or avoided, thereby increasing the production capacity of solar cells.

[0102] In one alternative approach, see Figures 3 to 8 The height difference between the second current collecting section 21 and the first current collecting section 20 is greater than the height difference between the second annular conductor section 61 and the second current collecting section 21; and / or, the height difference between the second annular conductor section 61 and the first current collecting section 20 is greater than the height difference between the second annular conductor section 61 and the second current collecting section 21.

[0103] When the above technical solution is adopted, if a second doped semiconductor layer 93 is formed on the first surface of the substrate 1, and the doping type of the second doped semiconductor layer 93 is the same as that of the substrate 1, the second doped semiconductor layer 93 is a majority carrier, so recombination does not need to be considered at the fifth isolation region 8. However, recombination needs to be considered at the first isolation region 3 and the fourth isolation region 7. Therefore, the height difference between the first isolation region 3 and the fourth isolation region 7 is relatively large to reduce the probability of majority carrier recombination in the first doped semiconductor layer.

[0104] Figure 1 and Figure 2 Although the annular conductor layer 6 is shown as a continuous annular structure, with a fourth isolation region 7 between the first current collecting section 20 and the annular conductor layer 6, and a fifth isolation region 8 between the second current collecting section 21 and the annular conductor layer 6, in another embodiment, the annular conductor layer 6 may be discontinuous, having only the fourth isolation region 7 between it and the first current collecting section 20, and the annular conductor layer 6 being interrupted by the second current collecting section 21. In this case, the first current collecting section 20 may extend to a first side 10 or a second side 11 near the substrate, and the end of the first current collecting section 20 near the first side 10 is closer to the edge of the substrate than the fourth isolation region 7. When the annular conductor layer 6 is a discontinuous annular structure, and it is interrupted by the first current collecting section 20, the first doped semiconductor layer 92 at the bottom of the first current collecting section 20 is continuously formed on the substrate 1 and does not form a stacked structure with the second doped semiconductor layer 93.

[0105] Alternatively, the annular conductor layer 6 may have a fifth isolation region 8 only between it and the second current collecting section 21, and the annular conductor layer 6 may be interrupted by the first current collecting section 20. In this case, the second current collecting section 21 may extend to the first side 10 or the second side 11 near the substrate, and the end of the second current collecting section 21 near the first side 10 may be closer to the edge of the substrate than the fifth isolation region 8. The annular conductor layer 6 is a discontinuous annular structure. When it is interrupted by the second current collecting section 21, the second doped semiconductor layer 93 at the bottom of the second current collecting section 21 is continuously formed on the substrate 1 and does not form a stacked structure with the first doped semiconductor layer 92.

[0106] Preferably, the annular conductor layer 6 is interrupted by the second current collection section 21, and the doping type of the second doped semiconductor layer 93 below the second current collection section 21 is the same as the doping type of the substrate 1, for example, both can be N-type doped. Because when the second doped semiconductor layer 93, which has the same doping type as the substrate 1, is close to the edge of the solar cell, the carriers in the second doped semiconductor layer 93 are majority carriers, which will not increase the recombination efficiency of minority carriers.

[0107] As one possible implementation, see Figure 9The aforementioned solar cell also includes grid lines 90 disposed on the current collection layer. The grid lines 90 are located on the first current collection section 20 and the second current collection section 21, respectively. The minimum distance between the end of the grid line 90 near the first side and the second isolation region 4 and / or the third isolation region 5 in the second direction B is L1, and the minimum distance between the grid line and the first isolation region in the first direction is L2, where L1 is greater than L2. Since L1 is greater than L2, it can be ensured that the grid line 90 can collect the current across the width of the first current collection section 20 or the second current collection section 21, while also taking into account the current collection at both ends (i.e., the ends near the first side 10 or the second side 11). Furthermore, since the defects at the edge of the cell are larger, there are more recombination centers and greater leakage, L1 needs to be set larger to prevent minority carrier concentration recombination at the ends.

[0108] In one alternative approach, see Figure 9 L1 is greater than or equal to 100 micrometers and less than or equal to 500 micrometers. For example, L1 can be 100 micrometers, 120 micrometers, 180 micrometers, 200 micrometers, 220 micrometers, 260 micrometers, 300 micrometers, 350 micrometers, 400 micrometers, 480 micrometers, or 500 micrometers, etc. In this case, it can ensure the effective collection of current by the grid line 90, and also prevent the grid line 90 from being too close to the second isolation region 4 and / or the third isolation region 5, which would cause leakage.

[0109] In one alternative approach, see Figure 9 The minimum distance L2 between the grid line 90 and the first isolation region 3 in the first direction A is greater than or equal to 50 micrometers and less than or equal to 400 micrometers. For example, L2 can be 50 micrometers, 100 micrometers, 120 micrometers, 180 micrometers, 200 micrometers, 220 micrometers, 260 micrometers, 300 micrometers, 320 micrometers, 350 micrometers, 380 micrometers, or 400 micrometers, etc. In this way, it can ensure the effective collection of current by the grid line 90, and prevent the grid line 90 from being too close to the first isolation region 3, which would cause leakage.

[0110] As one possible implementation, see Figure 1 and Figure 10 The first surface also includes a third side 12 located between the first side 10 and the second side 11.

[0111] In one alternative approach, see Figure 1 The third side 12 is perpendicular to the first side 10 and the second side 11, respectively.

[0112] In another alternative approach, see Figure 10One end of the third side 12 is connected to the end of the first side 10 via a first chamfer 13, and the other end of the third side 12 is connected to the end of the second side 11 via a second chamfer 14. The boundary of the first current collecting part 20 adjacent to the first chamfer 13 and / or the second chamfer 14 is a chamfered edge; and / or, the boundary of the second current collecting part 21 adjacent to the first chamfer 13 and / or the second chamfer 14 is a chamfered edge. The aforementioned chamfered edges can effectively prevent fragmentation and microcracks in the solar cell during the manufacturing process.

[0113] In one alternative approach, see Figure 10 The length of the first current collecting section 20 adjacent to the first chamfer 13 and the second chamfer 14 is less than the length of the remaining first current collecting sections 20; and / or, the length of the second current collecting section 21 adjacent to the first chamfer 13 and the second chamfer 14 is less than the length of the remaining second current collecting sections 21.

[0114] By adopting the above technical solution, defects near the first chamfer 13 and the second chamfer 14 of the first current collecting part 20 and / or the second current collecting part 21 can be isolated to improve the quality of the solar cell.

[0115] In one alternative approach, see Figure 10 When the solar cell further includes grid lines 90, the minimum distance L3 between the end of the grid line 90 adjacent to the first chamfer 13 and the second chamfer 14 and the end of the first current collecting part 20 corresponding to the grid line 90 in the second direction B is less than the minimum distance L4 between the end of the grid line 90 away from the first chamfer 13 and the second chamfer 14 and the end of the first current collecting part 20 corresponding to the grid line 90 in the second direction B. Alternatively, when the solar cell further includes grid lines, the minimum distance in the second direction between the end of the grid line adjacent to the first chamfer and the second chamfer and the end of the second current collecting part corresponding to the grid line is less than the minimum distance in the second direction between the end of the grid line away from the first chamfer and the second chamfer and the end of the second current collecting part corresponding to the grid line.

[0116] In one alternative approach, see Figure 10 The chamfered edge of the first current collecting section 20 and / or the second current collecting section 21 adjacent to the first chamfer 13 is a hypotenuse, and the hypotenuse gradually slopes towards the first chamfer 13 in a direction away from the third side 12. The chamfered edge of the first current collecting section 20 and / or the second current collecting section 21 adjacent to the second chamfer 14 is a hypotenuse, and the hypotenuse gradually slopes towards the second chamfer 14 in a direction away from the third side 12.

[0117] With the above technical solution, the sharp corner of the hypotenuse is far from the third side 12, which can prevent stress concentration at the sharp corner of the hypotenuse and the occurrence of microcracks. Furthermore, the area between the first current collecting part 20 and the first chamfer 13 and / or the second chamfer 14 can be made larger, or the area between the second current collecting part 21 and the first chamfer 13 and / or the second chamfer 14 can be made larger, to disperse the stress in the area between the first current collecting part 20 and the first chamfer 13 and / or the second chamfer 14, or the stress in the area between the second current collecting part 21 and the first chamfer 13 and / or the second chamfer 14, thereby preventing stress concentration and reducing the occurrence of microcracks.

[0118] As one possible implementation, see Figure 3 and Figure 4 The first surface of the substrate 1 has a plurality of recessed regions corresponding to the plurality of first current collecting portions 20, and a plurality of flat regions corresponding to the plurality of second current collecting portions 21. Alternatively, see [link to documentation]. Figure 5 and Figure 6 The first surface of the substrate 1 has a plurality of recessed regions corresponding to the plurality of first current collecting portions 20, and a flat region corresponding to the annular conductor layer 6. The recessed regions are recessed relative to the flat regions along the direction from the first surface to the second surface, and there are inclined sidewalls between adjacent recessed regions and flat regions.

[0119] When the above technical solution is adopted, the presence of the above-mentioned recessed area can at least partially offset the first current collecting part 20 and the second current collecting part 21 along the thickness direction of the substrate 1, thereby facilitating the at least partial offset of the electrode structures located in the first current collecting part 20 and the second current collecting part 21 along the thickness direction of the substrate 1, thereby reducing the risk of leakage.

[0120] In one alternative approach, see Figure 11 The recessed area has a first texture structure, which includes a pyramid-shaped velvet structure 97.

[0121] When the above technical solution is adopted, the first textured structure includes a pyramid-shaped velvety structure, which is beneficial to increasing the surface area of ​​the recessed area, improving the light-trapping effect of the recessed area, and allowing more light to be refracted through the recessed area into the substrate and utilized by the substrate. Furthermore, the first current-collecting part has a portion located on the recessed area, and the side of the portion of the first current-collecting part formed on the recessed area through processes such as deposition also undulates with the undulations of the recessed area. That is, the side of the portion of the first current-collecting part formed on the recessed area that is away from the substrate also has a roughly the same undulating morphology as the recessed area. Therefore, when the first textured structure is formed on the recessed area, the side of the portion of the first current-collecting part formed on the recessed area that is away from the substrate also has corresponding uneven characteristics, which is beneficial to increasing the surface area of ​​the side of the portion of the first current-collecting part formed on the recessed area that is away from the substrate. This, in turn, is beneficial to increasing the contact area between the first current-collecting part and the corresponding electrode, reducing the contact resistance between the first current-collecting part and the corresponding electrode, and further improving the working performance of the solar cell.

[0122] In one alternative approach, the flat area is shaped like the base of a pyramid.

[0123] When the above technical solution is adopted, the recessed area creates a height difference between the areas on both sides of the recessed area, and since the recessed area has a first textured structure, the first current collection part containing the first textured structure can be effectively protected from process damage.

[0124] In one alternative embodiment, a second textured structure is formed on the inclined sidewalls, the second textured structure comprising a prism-shaped structure. See also Figures 3 to 6 ,as well as Figure 12 The second texture structure includes a prism structure 91, which slopes gradually from the concave area toward the adjacent flat area.

[0125] When the above technical solution is adopted, the prism-shaped structure can increase the reflection of light toward the bottom surface of the recessed area, thereby increasing the absorption of light.

[0126] In one alternative approach, see Figures 3 to 6 , Figure 12 and Figure 13 The prism-shaped structure 91 has a pyramid 910 at its top, which is far from the base 1, and the apex of the pyramid 910 is lower than the surface of the flat area.

[0127] When the above technical solution is adopted, the flat region provides a smooth transition interface for the formation of the annular conductor layer and / or the second current collection part, which is beneficial to increase the formation thickness of the annular conductor layer and / or the second current collection part on the flat region, and makes the shape retention of the annular conductor layer and / or the second current collection part better.

[0128] The aforementioned solar cell also includes a first doped semiconductor layer and a second doped semiconductor layer disposed on the first surface. The following descriptions will be based on the different formation regions of the first doped semiconductor layer and the second doped semiconductor layer.

[0129] For the first example, see [link / reference] Figure 3 The solar cell further includes a first doped semiconductor layer 92 and a second doped semiconductor layer 93 disposed on a first surface of the substrate 1, wherein the first doped semiconductor layer 92 and the second doped semiconductor layer 93 have opposite conductivity types. A first current collection section 20 covers a portion of the first doped semiconductor layer 92, the first doped semiconductor layer 92 having an overlapping portion extending to cover a portion of the second doped semiconductor layer 93, and a second current collection section 21 covers the overlapping portion and a portion of the second doped semiconductor layer 93.

[0130] For the second example, see Figure 5 and Figure 7 The solar cell further includes a second doped semiconductor layer 93 and a first doped semiconductor layer 92 disposed on the first surface, and a stacked structure of the second doped semiconductor layer 93 and the first doped semiconductor layer 92 between the second annular conductor portion 61 and the substrate, wherein the first doped semiconductor layer 92 and the second doped semiconductor layer 93 have opposite conductivity types.

[0131] When the above technical solution is adopted, the first doped semiconductor layer 92 and the second doped semiconductor layer 93 can effectively shun the charge carriers, which is beneficial to the formation of photocurrent.

[0132] In both examples above, from a material perspective, the first doped semiconductor layer includes a doped amorphous silicon layer and / or a doped microcrystalline silicon layer. It should be noted that "microcrystalline" in the context of the doped microcrystalline silicon layer refers to the grain size of the silicon material. Specifically, microcrystalline silicon material refers to silicon material with a grain size at the nanometer scale. The second doped semiconductor layer includes a doped polycrystalline silicon layer. In this case, compared to a doped amorphous silicon layer, the doped polycrystalline silicon layer exhibits higher carrier transport characteristics. Therefore, when the second doped semiconductor layer is a doped polycrystalline silicon layer, the carrier recombination rate can be further reduced, which is beneficial for improving the photoelectric conversion efficiency of the solar cell.

[0133] In terms of conductivity type, if the first doped semiconductor layer is N-type, then the second doped semiconductor layer is P-type. Alternatively, if the first doped semiconductor layer is P-type, then the second doped semiconductor layer is N-type.

[0134] In this embodiment of the invention, the doping type of the second doped semiconductor layer is the same as the doping type of the substrate. In some examples, when the substrate is an N-type substrate, the first doped semiconductor layer can be a P-type first doped semiconductor layer, and the second doped semiconductor layer can be an N-type second doped semiconductor layer. Alternatively, when the substrate is a P-type substrate, the first doped semiconductor layer can be an N-type first doped semiconductor layer, and the second doped semiconductor layer can be a P-type second doped semiconductor layer. For example, the substrate is an N-type silicon substrate, the first doped semiconductor layer is a boron-doped P-type first doped semiconductor layer, and the second doped semiconductor layer is a phosphorus-doped N-type second doped semiconductor layer. In this case, since the heavily phosphorus-doped region has greater solubility for metal impurities, the phosphorus in the second doped semiconductor layer can provide phosphorus getter passivation for the first doped semiconductor layer, thereby improving battery efficiency.

[0135] In terms of formation location, see Figures 3 to 6 The first doped semiconductor layer 92 can be directly formed on the first surface of the substrate 1 and extend to cover a portion of the second doped semiconductor layer 93. For example... Figure 7 and Figure 8 The first doped semiconductor layer 92 may cover the second doped semiconductor layer 93 formed on the first surface. Or, as... Figures 3 to 8 As shown, the aforementioned solar cell further includes a first passivation layer 94. Figures 3 to 6 As shown, the first passivation layer 94 is located between the substrate 1 and the first doped semiconductor layer 92, and extends between the first doped semiconductor layer 92 and the second doped semiconductor layer 93. And / or, as... Figure 7 and Figure 8 As shown, the first passivation layer 94 is located between the first doped semiconductor layer 92 and the second doped semiconductor layer 93. The first passivation layer 94 and the first doped semiconductor layer 92 can form a passivation contact structure, exhibiting excellent interface passivation effects and enabling selective collection of charge carriers, reducing the carrier recombination rate of the substrate 1, and further improving the photoelectric conversion efficiency of the solar cell. The material of the first passivation layer 94 can be determined based on the material of the first doped semiconductor layer 92. For example, if the first doped semiconductor layer 92 includes a doped amorphous silicon layer, the first passivation layer 94 may include an intrinsic amorphous silicon layer. The thickness of the first passivation layer 94 can be set according to actual needs and is not specifically limited here.

[0136] like Figures 3 to 8 As shown, the second doped semiconductor layer can be directly formed on the first surface of the substrate. Alternatively, as... Figures 3 to 8As shown, the aforementioned solar cell further includes a second passivation layer 95. The second passivation layer 95 is disposed on the substrate 1, and a second doped semiconductor layer 93 covers the second passivation layer 95. The second passivation layer 95 and the second doped semiconductor layer 93 can form a passivation contact structure, exhibiting excellent interface passivation effects and enabling selective collection of charge carriers, reducing the carrier recombination rate of the substrate 1, and further improving the photoelectric conversion efficiency of the solar cell. The material of the second passivation layer 95 can be determined based on the material of the second doped semiconductor layer 93. For example, when the second doped semiconductor layer 93 includes a doped polycrystalline silicon layer, the second passivation layer 95 is a tunneling passivation layer. Preferably, the material of the second passivation layer 95 can be silicon oxide. Alternatively, when the second doped semiconductor layer 93 includes a doped amorphous silicon layer or a doped microcrystalline silicon layer, the second passivation layer 95 is an intrinsic amorphous silicon layer. The thickness of the second passivation layer 95 can be set according to actual needs and is not specifically limited here.

[0137] At this point, the solar cell provided in this embodiment of the invention is a hybrid HBC (Hetero-Junction BackContact) cell. HBC stands for back-contact heterojunction solar cell. One electrode of the hybrid HBC cell is a heterojunction passivation structure composed of a first passivation layer and a first doped semiconductor layer, and the other electrode is a tunneling oxidation passivation structure composed of a second passivation layer and a second doped semiconductor layer.

[0138] As described above, the width of the first isolation region in the first direction is greater than or equal to 40 micrometers and less than or equal to 80 micrometers. By adopting the above technical solution, the width of the first isolation region in the first direction can be avoided from being too large, thus preventing the widths of the first and second doped semiconductor layers from being too small, thereby ensuring carrier collection. Furthermore, the width of the first isolation region in the first direction can be avoided from being too small, preventing the current screen printing engineering capabilities from being insufficient, leading to incomplete isolation and causing solar cell failure.

[0139] In one alternative approach, see Figure 3 and Figure 4 The width W2 of the overlapping portion along the first direction is greater than or equal to 60 micrometers and less than or equal to 140 micrometers. For example, the width W2 can be 60 micrometers, 70 micrometers, 80 micrometers, 90 micrometers, 100 micrometers, 110 micrometers, 120 micrometers, 130 micrometers, or 140 micrometers, etc. If the overlapping portion is set too large, it will reduce the width of the first doped semiconductor layer and the second doped semiconductor layer, reducing the collection of charge carriers; if the overlapping portion is set too small, due to the need for electrical isolation at the corresponding position of the overlapping portion, the current error caused by the precision of screen printing may lead to incomplete isolation and battery failure.

[0140] As one possible implementation, see Figures 5 to 8 The width W3 of the laminated structure along the second direction is greater than or equal to 100 micrometers and less than or equal to 500 micrometers. For example, the width W3 can be 100 micrometers, 130 micrometers, 180 micrometers, 200 micrometers, 230 micrometers, 250 micrometers, 280 micrometers, 300 micrometers, 320 micrometers, 350 micrometers, 380 micrometers, 400 micrometers, 430 micrometers, 450 micrometers, 480 micrometers, or 500 micrometers, etc.

[0141] By adopting the above technical solution, compared with forming a first doped semiconductor layer 92 or a second doped semiconductor layer 93 on the second annular conductor portion 61, the passivation effect of the second annular conductor portion 61 can be effectively improved, the probability of the fixture damaging the solar cell during the manufacturing process can be reduced, and the quality of the solar cell can be ensured.

[0142] As one possible implementation, see Figure 12 At least a portion of the first surface corresponding to the first isolation region 3 is a plane 96, and the plane is flush with the height of the first surface corresponding to the second current collection section 21. The plane is covered only with a first doped semiconductor layer 92 and has no second doped semiconductor layer 93.

[0143] As one possible implementation, at least a portion of the first surface corresponding to the fourth isolation region is a plane, and the plane is flush with the height of the first surface corresponding to the annular conductor region. The plane is covered only with a first doped semiconductor layer and has no second doped semiconductor layer.

[0144] Secondly, embodiments of the present invention also provide a method for fabricating a solar cell. See [link to previous section]. Figures 1 to 13 The method for preparing this solar cell may include:

[0145] First, a substrate 1 is provided, which includes opposing first and second surfaces. A description of the substrate 1 can be found in the description in the first aspect, and will not be repeated here.

[0146] In practical applications, the substrate is first polished and cleaned. Specific polishing and cleaning steps can be found in existing technologies and are not limited here.

[0147] Next, a second doped semiconductor material layer is formed integrally on the first surface of the substrate. For example, a process such as chemical vapor deposition can be used to form the semiconductor material layer integrally on the first surface. Then, the semiconductor material layer is doped to form the second doped semiconductor material layer integrally on the first surface.

[0148] Next, a mask layer is formed integrally on the second doped semiconductor material layer. The material of the mask layer can be one or more of silicon nitride, silicon oxynitride, silicon oxide, silicon carbide, or intrinsic silicon. The method for forming the mask layer includes one or more of plasma-enhanced chemical vapor deposition, low-pressure chemical vapor deposition, catalytic chemical vapor deposition (Cat-CVD), or atomic layer deposition (ALD).

[0149] Next, a laser process is used to process the mask layer and the second doped semiconductor material layer. Under the protection of the mask layer, part of the second doped semiconductor material layer is removed, and the remaining part of the second doped semiconductor material layer forms the second doped semiconductor layer.

[0150] Furthermore, when the solar cell also includes a second passivation layer, after providing a substrate and before forming the second doped semiconductor layer, the method for fabricating the solar cell includes: forming a second passivation layer on a first surface of the substrate, wherein the second passivation layer corresponds to the second doped semiconductor layer. Descriptions regarding the material and thickness of the second passivation layer can be found in the description in the first aspect and will not be repeated here.

[0151] For example, before forming the second doped semiconductor layer, processes such as deposition and etching can be used to form the second passivation layer only at locations that meet the above-mentioned practical requirements. Alternatively, before forming the second doped semiconductor layer, a deposition process can be used to form a second passivation layer that is entirely disposed on the first surface. Then, under the protection of a mask layer, the unwanted second doped semiconductor layer is removed, and a corresponding etching process is used, under the protection of a mask layer, to remove the exposed second passivation layer, leaving only the portion of the second passivation layer corresponding to the second doped semiconductor layer. It should be noted that the above-mentioned methods for forming the second passivation layer include one or more of plasma-enhanced chemical vapor deposition, low-pressure chemical vapor deposition, catalytic chemical vapor deposition (Cat-CVD), or atomic layer deposition (ALD).

[0152] It should be noted that when removing part of the second doped semiconductor layer and part of the second passivation layer, a recessed region is formed in a portion of the first surface of the substrate. A description of the recessed region can be found in the first aspect and will not be detailed here.

[0153] Next, remove the mask layer.

[0154] Next, a first doped semiconductor layer 92 is formed, and a second doped semiconductor layer 93 is formed with the opposite conductivity type to the first doped semiconductor layer 92.

[0155] For example, a semiconductor material layer can be integrally formed on the first surface using a process such as chemical vapor deposition (e.g., one or more of plasma-enhanced chemical vapor deposition, low-pressure chemical vapor deposition, catalytic chemical vapor deposition (Cat-CVD), or atomic layer deposition (ALD)). Next, the semiconductor material layer is doped to form a first doped semiconductor material layer integrally on the first surface. Then, a portion of the first doped semiconductor material layer is ablated using laser vaporization to form a first doped semiconductor layer covering the first surface of the substrate and a portion of the second doped semiconductor layer. It should be noted that the formation location of the first doped semiconductor layer is not limited to this, and can be chosen as long as the practical requirements are met.

[0156] Furthermore, when the solar cell also includes a first passivation layer, the method for fabricating the solar cell further includes forming a first passivation layer, which corresponds to the first doped semiconductor layer, after forming the second doped semiconductor layer and before forming the first doped semiconductor layer. For example, before forming the first doped semiconductor layer, a deposition and etching process can be used to form a first passivation layer that only covers the locations required by the aforementioned actual conditions. Alternatively, after forming the second doped semiconductor layer, a deposition process can be used to form a first passivation layer that is entirely disposed on the first surface. Then, after removing the unwanted first doped semiconductor material layer using a laser process, a corresponding laser process can be used to remove the unwanted first passivation layer.

[0157] Next, a current collection layer 2 is formed on the first surface of the substrate 1;

[0158] The current collection layer 2 includes a plurality of first current collection sections 20 and a plurality of second current collection sections 21. The first current collection sections 20 and second current collection sections 21 are arranged alternately along a first direction A and extend along a second direction B. The first direction A and the second direction B are orthogonal. A first isolation region 3 is provided between adjacent first current collection sections 20 and second current collection sections 21. The first surface has a first side 10 and a second side 11 arranged opposite to each other along the second direction B. A second isolation region 4 is provided between the boundary of the first current collection section 20 adjacent to the first side 10 and the first side 10. A third isolation region 5 is provided between the boundary of the second current collection section 21 adjacent to the first side 10 and the first side 10. The width of the second isolation region 4 and / or the third isolation region 5 in the second direction B is greater than the width of the first isolation region 3 in the first direction A.

[0159] In one alternative approach, the step of forming a current-collecting layer on a first surface of the substrate may include:

[0160] First, a current-collecting material layer is formed on the first surface of the substrate; for example, a current-collecting material layer is formed on the first doped semiconductor layer, the second doped semiconductor layer, and the first surface of the substrate.

[0161] Next, the current collecting material layer at the corresponding position of the first isolation region and at least part of the current collecting material layer located in the second and third isolation regions are removed to form a current collecting layer including a plurality of first current collecting parts and a plurality of second current collecting parts.

[0162] In the same step of forming the first isolation region 3, an annular conductor layer 6 is formed around the current collecting layer 2;

[0163] The annular conductor layer 6 has a fourth isolation region 7 between its inner boundary near the first side 10 and the boundary of the first current collecting part 20 near the first side 10, and the annular conductor layer 6 has a fifth isolation region 8 between its inner boundary near the first side 10 and the boundary of the second current collecting part 21 near the first side 10. The width of the fourth isolation region 7 and / or the fifth isolation region 8 in the second direction B is greater than the width of the first isolation region 3 in the first direction A.

[0164] For example, if the annular conductive layer and the current collecting layer are made of the same material, then in conjunction with the process of forming the current collecting layer in the previous step, the current collecting material layer located in the annular region where the fourth isolation region and the fifth isolation region are located is removed, so as to simultaneously form an annular conductive layer surrounding the current collecting layer and the current collecting layer. If the annular conductive layer and the current collecting layer are made of different materials, then all the current collecting material layers located in the second isolation region and the third isolation region are removed, and then an annular conductive layer is deposited between the edge of the substrate and the annular region where the fourth isolation region and the fifth isolation region are located.

[0165] Next, electrode paste is printed on the current collection layer located on the first doped semiconductor layer and the second doped semiconductor layer to form a first electrode electrically connected to the first doped semiconductor layer and a second electrode electrically connected to the second doped semiconductor layer.

[0166] Compared with the prior art, the beneficial effects of the solar cell preparation method provided in the embodiments of the present invention are the same as those of the solar cell described in the first aspect, and will not be repeated here.

[0167] Thirdly, embodiments of the present invention also provide a photovoltaic module. This photovoltaic module includes a plurality of solar cells as described in the first aspect, or solar cells prepared by the method described in the second aspect. An encapsulation layer covers the surfaces of the plurality of solar cells, and a cover plate covers the surface of the encapsulation layer away from the solar cells.

[0168] Compared with the prior art, the beneficial effects of the photovoltaic modules provided in the embodiments of the present invention are the same as those of the solar cells described in the first aspect or the same as those of the solar cells prepared by the method described in the second aspect, which will not be elaborated here.

[0169] In the description of the above embodiments, specific features, structures, materials, or characteristics may be combined in any suitable manner in one or more embodiments or examples.

[0170] The above description is merely a specific embodiment of the present invention, but the scope of protection of the present invention is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the technical scope disclosed in the present invention should be included within the scope of protection of the present invention. Therefore, the scope of protection of the present invention should be determined by the scope of the claims.

Claims

1. A solar cell, characterized in that, include: The substrate includes opposing first and second surfaces; A current collection layer is disposed on the first surface and includes a plurality of first current collection parts and a plurality of second current collection parts; The first current collecting section and the second current collecting section are arranged alternately along a first direction and extend along a second direction, the first direction and the second direction being orthogonal; a first isolation zone is provided between adjacent first current collecting sections and second current collecting sections; The first surface has a first side and a second side disposed opposite to each other along the second direction. A second isolation region is provided between the boundary of the first current collecting part adjacent to the first side and the first side. A third isolation region is provided between the boundary of the second current collecting part adjacent to the first side and the first side. The width of the second isolation region and the third isolation region in the second direction is greater than the width of the first isolation region in the first direction. The current collection layer is a transparent conductive layer.

2. The solar cell according to claim 1, characterized in that, The first surface also includes an annular conductor layer surrounding the current collecting layer; A fourth isolation region is provided between the inner boundary of the annular conductor layer near the first side and the boundary of the first current collection part near the first side; and / or, a fifth isolation region is provided between the inner boundary of the annular conductor layer near the first side and the boundary of the second current collection part near the first side. The width of the fourth isolation zone and / or the fifth isolation zone in the second direction is greater than the width of the first isolation zone in the first direction.

3. The solar cell according to claim 2, characterized in that, The annular conductor layer includes a first annular conductor portion and a second annular conductor portion; the first annular conductor portion is in direct contact with the substrate, while the second annular conductor portion is not in direct contact with the substrate; The second annular conductor portion is located between the first annular conductor portion and the fourth isolation region; or, the second annular conductor portion is located between the first annular conductor portion and the fifth isolation region.

4. The solar cell according to claim 2, characterized in that, A doped semiconductor layer is disposed between the annular conductor layer and the substrate.

5. The solar cell according to claim 1, characterized in that, The solar cell further includes grid lines disposed on the current collection layer; the grid lines are respectively located on the first current collection section and the second current collection section. The minimum distance between the end of the gate line near the first side and the second isolation area and / or the third isolation area in the second direction is L1; the minimum distance between the gate line and the first isolation area in the first direction is L2; ​​L1 is greater than L2.

6. The solar cell according to claim 5, characterized in that, L1 is greater than or equal to 100 micrometers and less than or equal to 500 micrometers; L2 is greater than or equal to 50 micrometers and less than or equal to 400 micrometers.

7. The solar cell according to claim 1 or 5, characterized in that, The first surface further includes a third side located between the first side and the second side; one end of the third side is connected to the end of the first side by a first chamfer; the other end of the third side is connected to the end of the second side by a second chamfer. The boundary of the first current collecting part adjacent to the first chamfer and / or the second chamfer is a chamfered edge; and / or, the boundary of the second current collecting part adjacent to the first chamfer and / or the second chamfer is a chamfered edge.

8. The solar cell according to claim 7, characterized in that, The length of the first current collecting portion adjacent to the first chamfer and the second chamfer is less than the length of the remaining first current collecting portions; and / or, the length of the second current collecting portion adjacent to the first chamfer and the second chamfer is less than the length of the remaining second current collecting portions.

9. The solar cell according to claim 2, characterized in that, The first surface of the substrate has a plurality of recessed areas corresponding to the plurality of first current collecting portions, and a plurality of flat areas corresponding to the plurality of second current collecting portions; Alternatively, the first surface of the substrate has a plurality of recessed regions corresponding to the plurality of first current collecting portions, and a flat region corresponding to the annular conductor layer. Wherein, along the direction from the first surface to the second surface, the recessed area is recessed relative to the flat area; and there is an inclined sidewall between adjacent recessed areas and flat areas.

10. The solar cell according to claim 9, characterized in that, The recessed area is formed with a first texture structure; the first texture structure includes a pyramid-shaped velvet structure. The flat area is shaped like the base of a pyramid.

11. The solar cell according to claim 9, characterized in that, A second textured structure is formed on the inclined sidewall; the second textured structure includes a prismatic structure; the prismatic structure is inclined along the direction from the concave area toward the adjacent flat area.

12. The solar cell according to claim 11, characterized in that, The prism-shaped structure has a pyramid at its apex away from the base, the apex of the pyramid being lower than the surface of the flat area.

13. The solar cell according to claim 2, characterized in that, The solar cell further includes: a first doped semiconductor layer and a second doped semiconductor layer disposed on the first surface of the substrate; the first doped semiconductor layer and the second doped semiconductor layer have opposite conductivity types; The first current collecting section covers a portion of the first doped semiconductor layer; The first doped semiconductor layer has an overlapping portion that extends to cover a portion of the second doped semiconductor layer; The second current collection section covers part of the overlapping portion and part of the second doped semiconductor layer.

14. The solar cell according to claim 3, characterized in that, The solar cell further includes: a second doped semiconductor layer and a first doped semiconductor layer disposed on the first surface, wherein the second annular conductor portion and the substrate have a stacked structure of the second doped semiconductor layer and the first doped semiconductor layer; the first doped semiconductor layer and the second doped semiconductor layer have opposite conductivity types.

15. The solar cell according to claim 13 or 14, characterized in that, The first doped semiconductor layer includes a doped amorphous silicon layer and / or a doped microcrystalline silicon layer; the second doped semiconductor layer includes a doped polycrystalline silicon layer.

16. The solar cell according to claim 1, characterized in that, The width of the first isolation region in the first direction is greater than or equal to 40 micrometers and less than or equal to 80 micrometers.

17. The solar cell according to claim 2, characterized in that, The width of the fourth isolation zone in the second direction and the width of the fifth isolation zone in the second direction are both greater than or equal to 80 micrometers and less than or equal to 200 micrometers; And / or, the width of the fourth isolation zone in the second direction is equal to the width of the fifth isolation zone in the second direction; And / or, the ratio of the width of the fourth isolation zone in the second direction and / or the width of the fifth isolation zone in the second direction to the width of the first isolation zone in the first direction is greater than or equal to 1.5 and less than or equal to 3.

18. The solar cell according to claim 13, characterized in that, The width of the overlapping portion along the first direction is greater than or equal to 60 micrometers and less than or equal to 140 micrometers.

19. The solar cell according to claim 14, characterized in that, The width of the stacked structure along the second direction is greater than or equal to 100 micrometers and less than or equal to 500 micrometers.

20. The solar cell according to claim 3, characterized in that, The width of the second annular conductor portion along the second direction is greater than or equal to 50 micrometers and less than or equal to 400 micrometers.

21. The solar cell according to claim 3, characterized in that, The height difference between the second current collecting part and the first current collecting part is greater than the height difference between the second annular conductor part and the second current collecting part; And / or, the height difference between the second annular conductor portion and the first current collecting portion is greater than the height difference between the second annular conductor portion and the second current collecting portion.

22. A method for preparing a solar cell, characterized in that, include: A substrate is provided, the substrate including opposing first and second surfaces; A current collection layer is formed on the first surface of the substrate; The current collection layer includes a plurality of first current collection sections and a plurality of second current collection sections; The first current collecting section and the second current collecting section are arranged alternately along a first direction and extend along a second direction, the first direction and the second direction being orthogonal; a first isolation zone is provided between adjacent first current collecting sections and second current collecting sections; The first surface has a first side and a second side disposed opposite to each other along the second direction. The boundary of the first current collecting part adjacent to the first side has a second isolation region between it and the first side. The boundary of the second current collecting part adjacent to the first side has a third isolation region between it and the first side. The width of the second isolation region and the third isolation region in the second direction is greater than the width of the first isolation region in the first direction. The current collecting layer is a transparent conductive layer.

23. The method for preparing a solar cell according to claim 22, characterized in that, Forming a current collection layer on the first surface of the substrate includes: A current-collecting material layer is formed integrally on the first surface of the substrate; Remove the current-collecting material layer at the corresponding location of the first isolation zone to form the current-collecting layer comprising a plurality of first current-collecting portions and a plurality of second current-collecting portions.

24. A photovoltaic module, characterized in that, include: A plurality of solar cells as described in any one of claims 1-21, or a plurality of solar cells prepared by a method for preparing a solar cell as described in claim 22 or 23; An encapsulation layer covers the surfaces of the plurality of solar cells; A cover plate that covers the surface of the encapsulation layer away from the solar cell.

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