A chip non-contact scanning detection method and system

Abstract

The present invention provides a chip non-contact scanning detection method and system, which relates to the field of data processing technology. The method includes: obtaining a three-dimensional model of a chip to be tested; obtaining position information of key components of the chip to be tested; determining an optimal detection section with the maximum total cross-sectional area passing through the key components as the goal; scanning the chip to be tested along the optimal detection section using a penetrating ray imaging device to generate a ray image; grayscale normalizing the ray image; generating a defect probability image corresponding to the grayscale normalized ray image through sparse reconstruction; and segmenting the defect area of ​​the chip to be tested through threshold segmentation according to the defect probability image. The present invention can scan the chip to be tested along the optimal detection section, reduce the number of scans, eliminate the need for cumbersome layer-by-layer scanning, reduce scanning time, and improve chip detection efficiency.

Description

Technical Field

[0001] The present invention relates to the field of image processing technology, and in particular to a chip non-contact scanning detection method and system. Background Art

[0002] Non-contact detection does not touch the chip surface, avoiding physical damage that may be caused by contact, especially for tiny and delicate chip structures. At the same time, non-contact detection can achieve rapid scanning and analysis, greatly improving detection efficiency, and is suitable for rapid detection needs in large-scale chip production. Therefore, in the field of chip detection, non-contact detection methods based on penetrating rays have developed rapidly.

[0003] The current penetrating ray detection method often scans the inside of the chip layer by layer and images and analyzes each layer, which is usually a very time-consuming process, especially when the chip structure is complex or the number of layers is large, resulting in low chip detection efficiency. At the same time, layer-by-layer scanning generates a large amount of image data, and storing and processing this data requires a lot of computing resources and storage space, resulting in high chip detection costs. Summary of the invention

[0004] In order to solve the current penetrating ray detection method, the inside of the chip is often scanned layer by layer, and each layer is imaged and analyzed. This is usually a very time-consuming process, especially when the chip structure is complex or the number of layers is large, resulting in low chip detection efficiency. At the same time, layer-by-layer scanning generates a large amount of image data. Storing and processing this data requires a lot of computing resources and storage space, resulting in a high chip detection cost. The technical problem. The present invention provides a chip non-contact scanning detection method and system.

[0005] The technical solution provided by the embodiment of the present invention is as follows:

[0006] First aspect:

[0007] A chip non-contact scanning detection method provided by an embodiment of the present invention is applied to a memory, comprising:

[0008] S1: Obtain a three-dimensional model of the chip to be tested;

[0009] S2: Obtaining the location information of key components of the chip to be tested;

[0010] S3: Determine the best inspection section with the goal of maximizing the total cross-sectional area passing through key components;

[0011] S4: Scanning the chip to be tested along the optimal detection section using a penetrating radiographic imaging device to generate a radiographic image;

[0012] S5: performing grayscale normalization on the radiographic image;

[0013] S6: Generate a defect probability image corresponding to the grayscale normalized radiographic image through sparse reconstruction;

[0014] S7: Segment the defect area of ​​the chip to be tested by threshold segmentation according to the defect probability image.

[0015] Second aspect:

[0016] An embodiment of the present invention provides a chip non-contact scanning detection system, comprising:

[0017] processor;

[0018] A memory having computer-readable instructions stored thereon, wherein when the computer-readable instructions are executed by the processor, the chip non-contact scanning detection method as described in the first aspect is implemented.

[0019] The third aspect:

[0020] An embodiment of the present invention provides a computer-readable storage medium, on which a computer program is stored. When the program is executed by a processor, the chip non-contact scanning detection method as described in the first aspect is implemented.

[0021] The beneficial effects brought about by the technical solution provided by the embodiment of the present invention include at least:

[0022] (1) In the present invention, the optimal detection section is determined with the goal of maximizing the total cross-sectional area passing through the key components, and then scanning is performed along the optimal detection section, thereby reducing the number of scans, eliminating the need for cumbersome layer-by-layer scanning, reducing scanning time, and improving chip detection efficiency. The amount of image data generated is relatively small, reducing the burden of data processing and storage, and reducing the cost of chip detection.

[0023] (2) In the present invention, a defect probability image is generated by sparse reconstruction. The generated defect probability image can accurately reflect the probability distribution of defects, making the defect area easier to identify and locate. Then, the defect area of ​​the chip to be tested is segmented through threshold segmentation, thereby improving the accuracy of chip detection. BRIEF DESCRIPTION OF THE DRAWINGS

[0024] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the following briefly introduces the drawings required for use in the description of the embodiments. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0025] Figure 1A schematic diagram of a chip non-contact scanning detection method provided by an embodiment of the present invention;

[0026] Figure 2 A schematic structural diagram of a chip non-contact scanning and detection system provided by an embodiment of the present invention. DETAILED DESCRIPTION

[0027] The technical solution of the present invention is described below in conjunction with the accompanying drawings.

[0028] In the embodiments of the present invention, words such as "exemplarily" and "for example" are used to indicate examples, illustrations or explanations. Any embodiment or design described as "example" in the present invention should not be interpreted as being more preferred or more advantageous than other embodiments or designs. Specifically, the use of the word "example" is intended to present the concept in a specific way. In addition, in the embodiments of the present invention, the meaning expressed by "and / or" can be both, or it can be either of the two.

[0029] In the embodiments of the present invention, "image" and "picture" can sometimes be used interchangeably. It should be noted that when the difference between them is not emphasized, the meanings they intend to express are the same. "of", "corresponding, relevant" and "corresponding" can sometimes be used interchangeably. It should be noted that when the difference between them is not emphasized, the meanings they intend to express are the same.

[0030] In the embodiments of the present invention, sometimes a subscript such as W1 may be mistakenly written as a non-subscript such as W1. When the difference is not emphasized, the meanings to be expressed are consistent.

[0031] In order to make the technical problems, technical solutions and advantages to be solved by the present invention more clear, a detailed description will be given below with reference to the accompanying drawings and specific embodiments.

[0032] Reference Manual Attached Figure 1 , showing a schematic flow chart of a chip non-contact scanning detection method provided by an embodiment of the present invention.

[0033] The embodiment of the present invention provides a chip non-contact scanning detection method, which is applied to a memory and can be implemented on the memory itself without the help of an external server. By performing data anomaly self-detection on the memory, the memory has an independent monitoring function, and can realize real-time monitoring and management of stored data without relying on an external server, without being limited by network conditions, and can improve the real-time performance of data anomaly detection, can detect storage data anomalies in a timely and accurate manner, can improve the reliability of a system equipped with a memory, and reduce system risks caused by single point failures.

[0034] The processing flow of the chip non-contact scanning detection method may include the following steps:

[0035] S1: Obtain a three-dimensional model of the chip to be tested.

[0036] S2: Obtain the location information of key components of the chip to be tested.

[0037] Among them, key components may refer to metal interconnect layers, transistor regions, solder joints, pads, memory cells, etc.

[0038] Among them, those skilled in the art can set key components according to actual conditions, and the present invention is not limited thereto.

[0039] S3: Determine the optimal inspection section with the goal of maximizing the total cross-sectional area passing through key components.

[0040] Optionally, after determining the optimal detection section, if there are still some key components that have not been passed by the optimal detection section, the key components that have been passed by the optimal detection section can be excluded, and then the detection sections for the remaining key components can be further determined, ultimately ensuring that all key components can be scanned.

[0041] In a possible implementation, S3 specifically includes sub-steps S301 and S302:

[0042] S301: Constructing a fitness function of the harmony search algorithm with the goal of maximizing the total cross-sectional area passing through the key components.

[0043] Optionally, the fitness function is specifically:

[0044] ,

[0045] in, f represents the fitness function, X represents the detection cross section, S Indicates the total cross-sectional area passing through key components, S ( X ) indicates the detection cross section X The total cross-sectional area of ​​key components passed through.

[0046] The total cross-sectional area passing through key components is as follows:

[0047] ,

[0048] in, s k ( X ) Using the detection section X After the k The cross-sectional area of ​​key components, K Indicates the total number of key components.

[0049] S302: Determine the best detection cross section through the harmony search algorithm.

[0050] ,

[0051] in, f represents the fitness function, X represents the detection cross section, S Indicates the total cross-sectional area passing through key components, S ( X ) indicates the detection cross section X The total cross-sectional area of ​​key components passed through.

[0052] The total cross-sectional area passing through key components is as follows:

[0053] ,

[0054] in, s k ( X ) Using the detection section X After the k The cross-sectional area of ​​key components, K Indicates the total number of key components.

[0055] S302: Determine the best detection cross section through the harmony search algorithm.

[0056] ,

[0057] in, HM Indicates the harmony memory bank, D represents the harmonic dimension, X i Indicates i A harmony, , HMS Indicates the size of the harmony memory library. x ij Indicates i The first in harmony j Quantity, , D Represents the harmonic dimension.

[0058] Generate random numbers r 1. Determine the random number r Is 1 less than the probability of taking the value from the harmony memory? If so, randomly generate a new harmony from the harmony memory. Otherwise, generate a new harmony by random selection.

[0059] Optionally, randomly generating new harmonies through a harmony memory library is specifically as follows:

[0060] ,

[0061] ,

[0062] in, X new Indicates a new harmony, x new,j Indicates the first j Quantity, , D represents the harmonic dimension, rand represents random selection, x ij Indicates i The first in harmony j Quantity, , HMS Indicates the size of the harmony memory library.

[0063] In the present invention, new harmonies are generated by randomly selecting from a harmony memory library, thereby ensuring that the new solution has certain excellent properties, thereby increasing the probability of generating an excellent solution.

[0064] Optionally, generating new harmony by random selection is as follows:

[0065] ,

[0066] in, upper j Indicates j The upper boundary of the component, lower j Indicates j The lower boundary of the component.

[0067] In the present invention, randomly selecting and generating new harmonies can cover the entire definition domain. By adjusting the upper and lower boundaries, exploration can be performed in the entire search space, which has a strong global search capability. Randomly generating new harmonies can effectively avoid the algorithm from falling into a local optimal solution and enhance the possibility of finding a global optimal solution.

[0068] Optionally, the upper boundary and the lower boundary are specifically:

[0069] ,

[0070] ,

[0071] in, Indicates j The quantity in t The upper bound at the iteration, Indicates j The quantity in t-The upper bound at 1 iteration, HM (: j ) indicates the first j Quantity, Indicates the first j The maximum value of the components, Indicates j The quantity in t The lower bound at the iteration, Indicates j The quantity in t -The lower bound at 1 iteration, Indicates the first j The minimum value of the components, T Indicates the total number of iterations.

[0072] In the present invention, in the early stage of iteration, the search range is large, which is conducive to global exploration; in the later stage of iteration, the search range is gradually reduced, which is conducive to local development and fine search for the optimal solution. By dynamically adjusting the boundary, as the number of iterations increases, the search range is gradually reduced, which helps to quickly converge to the optimal solution.

[0073] Generate random numbers when randomly generating new harmonies from the harmony memory r 2. Determine the random number r 2 is less than the pitch fine-tuning probability. If so, generate a new harmony through pitch fine-tuning. Otherwise, keep the harmony unchanged.

[0074] Optionally, generating a new harmony by fine-tuning the pitch is specifically as follows:

[0075] ,

[0076] in, Indicates the first chord in the new chord after the new chord is fine-tuned. j Quantity, x new,j Indicates the first j Quantity, BW Indicates fine-tuning bandwidth, r 3 represents a random number between -1 and 1, x best,j Indicates the harmony with the highest current fitness value. j Quantity, x worst,j Indicates the harmony with the lowest current fitness value. j A quantity.

[0077] In the present invention, pitch fine-tuning can fine-tune the new harmony, which helps to perform local development in the high fitness area and improve the quality of the solution. By fine-tuning the bandwidth and the difference between the harmony components with the highest and lowest fitness, the optimal solution can be more accurately approached.

[0078] The generated new harmony is compared with the harmony with the lowest fitness value in the harmony memory library to determine whether the fitness value of the new harmony is greater than the fitness value of the harmony with the lowest fitness value in the harmony memory library. If so, the harmony with the lowest fitness value in the harmony memory library is replaced with the new harmony to update the harmony memory library. Otherwise, the harmony memory library remains unchanged.

[0079] Determine whether the current number of iterations has reached the maximum number of iterations. If so, output the detection cross section of the harmony representative with the highest fitness. Otherwise, return to continue iteration.

[0080] In the present invention, the harmony search algorithm is a global optimization algorithm that can effectively avoid local optimal solutions, find global optimal solutions, and ensure that the total cross-sectional area of ​​the detection section passing through key components is maximized.

[0081] S4: Along the optimal detection section, use the penetrating radiographic imaging device to scan the chip to be tested and generate a radiographic image.

[0082] S5: Normalize the grayscale of the radiographic image.

[0083] In a possible implementation, S5 specifically includes: performing grayscale normalization on the radiographic image according to the following formula:

[0084] ,

[0085] in, I b represents the grayscale normalized ray image, I a represents a radiographic image, σ a represents the grayscale variance of the radiographic image, μ a represents the grayscale mean of the radiographic image, σ ref represents the grayscale variance of the reference image, μ ref Represents the grayscale mean of the reference image.

[0086] In the present invention, the grayscale normalization process standardizes the grayscale of the radiographic image to the grayscale distribution of the reference image, so that different images can be directly compared at the same grayscale scale, which is beneficial to subsequent image analysis and processing.

[0087] S6: Generate a defect probability image corresponding to the grayscale normalized radiographic image through sparse reconstruction.

[0088] Among them, sparse reconstruction is a technology based on signal sparsity, which is used to reconstruct the original signal from a small amount of observation data. It is widely used in image processing, compressed sensing, medical imaging and other fields.

[0089] In a possible implementation, S6 specifically includes sub-steps S601 and S602:

[0090] S601: Generate a reconstructed image corresponding to the grayscale normalized X-ray image to be detected by sparse reconstruction using the best dictionary:

[0091] ,

[0092] in, I c represents the reconstructed image, Z best represents the best dictionary, β b Represents the sparse coding of the to-be-detected radiographic image after grayscale normalization.

[0093] Optionally, the best dictionary is determined as follows:

[0094] S6011: Obtain a sample data set, where the sample data set includes multiple normal samples.

[0095] S6012: Using normal samples in the sample data set, with the goal of maximizing the inner product of the dictionary atoms and the residual, determine the dictionary atoms and add the dictionary atoms to the dictionary:

[0096] ,

[0097] ,

[0098] Among them, max means maximization, z represents a dictionary atom, z j Indicates j dictionary atoms, r t Indicates t The residual at the iteration, Z t Indicates t The dictionary for the iteration.

[0099] It should be noted that by maximizing the inner product of the dictionary atom and the residual, it is ensured that each dictionary atom can effectively represent the important features in the normal sample.

[0100] S6013: Using the learned dictionary, determine the sparse coding of normal samples with the goal of minimizing the reconstruction error:

[0101] ,

[0102] ,

[0103] Among them, min means minimization, β represents sparse coding, β t Indicates t Sparse coding of normal samples at iterations, y represents the image to be processed, Z t Indicates t The dictionary at the iteration, represents L1 norm calculation, represents L2 norm calculation, λ represents the sparsity regularization parameter.

[0104] It should be noted that by minimizing the reconstruction error, it is ensured that the dictionary can accurately reconstruct the normal samples, so that the reconstruction error of the normal samples is very small and the abnormal (defective) parts are highlighted.

[0105] It should be noted that the sparsity of sparse coding is guaranteed by L1 norm regularization, so that the representation of each sample in the dictionary is as simple and accurate as possible.

[0106] S6014: Update residuals:

[0107] ,

[0108] in, r t+1 Indicates t +The residual at 1 iteration.

[0109] S6015: Repeat the above S6012 and S6014 until the maximum number of iterations is reached, and output the optimal dictionary.

[0110] In the present invention, by continuously updating the residual and dictionary, dynamically adjusting the optimization direction, and ensuring that each step is moving in the direction of reducing errors, a high-quality optimal dictionary can be effectively constructed, which can not only accurately reconstruct normal samples, but also highlight abnormal (defective) areas, thereby improving the accuracy and efficiency of defect detection. The combination of step-by-step iterative optimization and sparse coding enables the dictionary learning process to be steadily improved, and ultimately the optimal dictionary is obtained, which performs well in practical applications.

[0111] S602: construct a defect probability image based on the difference between the grayscale normalized X-ray image to be detected and the reconstructed image:

[0112] ,

[0113] in, I d represents the defect probability image, I c represents the reconstructed image, I b Represents the grayscale normalized radiographic image.

[0114] It should be noted that the reconstructed image is generated by sparse reconstruction I c , and the image normalized with the actual grayscale I b By comparing, the abnormal parts (i.e. defects) in the image can be effectively highlighted. The normal parts can be well reconstructed through the dictionary and have small differences, while the defects are difficult to reconstruct and have large differences, making them easier to detect.

[0115] In the present invention, sparse reconstruction technology can be effectively used to process the radiographic image in combination with the optimal dictionary to generate an image reflecting the defect location and probability. This not only improves the accuracy and robustness of defect detection, reduces noise interference, but also simplifies the detection process, achieving efficient and automated defect detection.

[0116] S7: Segment the defect area of ​​the chip to be tested by threshold segmentation according to the defect probability image.

[0117] In a possible implementation, S7 is specifically: when the defect probability value of the target pixel in the defect probability image is greater than the preset probability value, the target pixel is placed in the defect area. The judgment of all pixels is repeated to segment the defect area of ​​the chip to be tested.

[0118] Among them, those skilled in the art can set the size of the preset probability value according to actual conditions, and the present invention does not limit it.

[0119] In the present invention, the defect area is automatically determined by presetting the probability value, so that the automation of the segmentation process is realized, no manual intervention is required, and the detection efficiency is improved.

[0120] In a possible implementation, S7 is specifically as follows: when the defect probability value of the target pixel in the defect probability image is greater than a preset probability value and the local variance is less than a preset variance value, the target pixel is placed in the defect area. The judgment of all pixels is repeated to segment the defect area of ​​the chip to be tested.

[0121] Among them, those skilled in the art can set the size of the preset probability value and the preset variance value according to actual conditions, and the present invention does not limit this.

[0122] Optionally, the local variance is specified as:

[0123] ,

[0124] in, Var i Indicates i The local variance at the pixel point is x j Indicates the first j The position coordinates of the pixel points, I d ( x j ) indicates the j The defect probability value at each pixel, Ω i Indicates the i The local window centered at the pixel point, Indicates the i The average value of the defect probability in the local window centered at the pixel point.

[0125] It should be noted that local variance calculation can reflect the grayscale consistency of the local area and help distinguish uniform areas from non-uniform areas. Local variance calculation helps to capture detailed features in the image and improve the accuracy and reliability of detection.

[0126] In the present invention, not only the defect probability value but also the local variance is considered, so as to more accurately judge whether a pixel point belongs to a defective area and reduce misjudgment and missed judgment.

[0127] The beneficial effects brought about by the technical solution provided by the embodiment of the present invention include at least:

[0128] (1) In the present invention, the optimal detection section is determined with the goal of maximizing the total cross-sectional area passing through the key components, and then scanning is performed along the optimal detection section, thereby reducing the number of scans, eliminating the need for cumbersome layer-by-layer scanning, reducing scanning time, and improving chip detection efficiency. The amount of image data generated is relatively small, reducing the burden of data processing and storage, and reducing the cost of chip detection.

[0129] (2) In the present invention, a defect probability image is generated by sparse reconstruction. The generated defect probability image can accurately reflect the probability distribution of defects, making the defect area easier to identify and locate. Then, the defect area of ​​the chip to be tested is segmented through threshold segmentation, thereby improving the accuracy of chip detection.

[0130] Reference Manual Attached Figure 2 , showing a schematic structural diagram of a chip non-contact scanning detection system provided by the present invention.

[0131] The present invention further provides a chip non-contact scanning detection system 20, which is applied to the above-mentioned chip non-contact scanning detection method, comprising:

[0132] Processor 201;

[0133] The memory 202 stores computer-readable instructions, and when the computer-readable instructions are executed by the processor 201, the chip non-contact scanning detection method described in the method embodiment is implemented.

[0134] The chip non-contact scanning and detection system 20 provided by the present invention can execute the above-mentioned chip non-contact scanning and detection method and achieve the same or similar technical effects. To avoid repetition, the present invention will not elaborate on them.

[0135] The beneficial effects brought about by the technical solution provided by the embodiment of the present invention include at least:

[0136] (1) In the present invention, the optimal detection section is determined with the goal of maximizing the total cross-sectional area passing through the key components, and then scanning is performed along the optimal detection section, thereby reducing the number of scans, eliminating the need for cumbersome layer-by-layer scanning, reducing scanning time, and improving chip detection efficiency. The amount of image data generated is relatively small, reducing the burden of data processing and storage, and reducing the cost of chip detection.

[0137] (2) In the present invention, a defect probability image is generated by sparse reconstruction. The generated defect probability image can accurately reflect the probability distribution of defects, making the defect area easier to identify and locate. Then, the defect area of ​​the chip to be tested is segmented through threshold segmentation, thereby improving the accuracy of chip detection.

[0138] It should be understood that the processor in the embodiment of the present invention may be a central processing unit (CPU), and the processor may also be other general-purpose processors, digital signal processors (DSP), application specific integrated circuits (ASIC), field programmable gate arrays (FPGA) or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc. The general-purpose processor may be a microprocessor or the processor may also be any conventional processor, etc.

[0139] It should also be understood that the memory in the embodiments of the present invention may be a volatile memory or a non-volatile memory, or may include both volatile and non-volatile memories. Among them, the non-volatile memory may be a read-only memory (ROM), a programmable read-only memory (PROM), an erasable programmable read-only memory (EPROM), an electrically erasable programmable read-only memory (EEPROM), or a flash memory. The volatile memory may be a random access memory (RAM), which is used as an external cache. By way of example and not limitation, many forms of random access memory (RAM) are available, such as static RAM (SRAM), dynamic random access memory (DRAM), synchronous DRAM (SDRAM), double data rate SDRAM (DDR SDRAM), enhanced SDRAM (ESDRAM), synchronous link DRAM (SLDRAM), and direct rambus RAM (DR RAM).

[0140] The above embodiments can be implemented in whole or in part by software, hardware (such as circuits), firmware or any other combination. When implemented by software, the above embodiments can be implemented in whole or in part in the form of a computer program product. The computer program product includes one or more computer instructions or computer programs. When the computer instructions or computer programs are loaded or executed on a computer, the process or function described in the embodiment of the present invention is generated in whole or in part. The computer can be a general-purpose computer, a special-purpose computer, a computer network, or other programmable device. The computer instructions can be stored in a computer-readable storage medium, or transmitted from one computer-readable storage medium to another computer-readable storage medium. For example, the computer instructions can be transmitted from one website, computer, server or data center to another website, computer, server or data center by wired (such as infrared, wireless, microwave, etc.). The computer-readable storage medium can be any available medium that can be accessed by a computer or a data storage device such as a server or data center that contains one or more available media sets. The available medium can be a magnetic medium (for example, a floppy disk, a hard disk, a tape), an optical medium (for example, a DVD), or a semiconductor medium. The semiconductor medium can be a solid-state hard disk.

[0141] It should be understood that the term "and / or" in this article is only a description of the association relationship of associated objects, indicating that there can be three relationships. For example, A and / or B can represent: A exists alone, A and B exist at the same time, and B exists alone. A and B can be singular or plural. In addition, the character " / " in this article generally indicates that the associated objects before and after are in an "or" relationship, but it may also indicate an "and / or" relationship. Please refer to the context for specific understanding.

[0142] In the present invention, "at least one" means one or more, and "plurality" means two or more. "At least one of the following" or similar expressions refers to any combination of these items, including any combination of single items or plural items. For example, at least one of a, b, or c can mean: a, b, c, ab, ac, bc, or abc, where a, b, and c can be single or multiple.

[0143] It should be understood that in various embodiments of the present invention, the size of the serial numbers of the above-mentioned processes does not mean the order of execution. The execution order of each process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiments of the present invention.

[0144] Those skilled in the art will appreciate that the units and algorithm steps of each example described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are performed in hardware or software depends on the specific application and design constraints of the technical solution. Professional and technical personnel can use different methods to implement the described functions for each specific application, but such implementation should not be considered to be beyond the scope of the present invention.

[0145] Those skilled in the art can clearly understand that, for the convenience and brevity of description, the specific working processes of the above-described equipment, devices and units can refer to the corresponding processes in the aforementioned method embodiments and will not be repeated here.

[0146] In the several embodiments provided by the present invention, it should be understood that the disclosed devices, apparatuses and methods can be implemented in other ways. For example, the device embodiments described above are only schematic. For example, the division of the units is only a logical function division. There may be other division methods in actual implementation, such as multiple units or components can be combined or integrated into another device, or some features can be ignored or not executed. Another point is that the mutual coupling or direct coupling or communication connection shown or discussed can be through some interfaces, indirect coupling or communication connection of devices or units, which can be electrical, mechanical or other forms.

[0147] The units described as separate components may or may not be physically separated, and the components shown as units may or may not be physical units, that is, they may be located in one place or distributed on multiple network units. Some or all of the units may be selected according to actual needs to achieve the purpose of the solution of this embodiment.

[0148] In addition, each functional unit in each embodiment of the present invention may be integrated into one processing unit, or each unit may exist physically separately, or two or more units may be integrated into one unit.

[0149] If the functions are implemented in the form of software functional units and sold or used as independent products, they can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present invention, or the part that contributes to the prior art, or the part of the technical solution, can be embodied in the form of a software product. The computer software product is stored in a storage medium, including several instructions for enabling a computer device (which can be a personal computer, server, or network device, etc.) to perform all or part of the steps of the methods described in various embodiments of the present invention. The aforementioned storage medium includes: U disk, mobile hard disk, read-only memory (ROM), random access memory (RAM), disk or optical disk, and other media that can store program codes.

[0150] An embodiment of the present invention provides a computer-readable storage medium having a computer program stored thereon, wherein when the program is executed by a processor, the chip non-contact scanning detection method as described in the method embodiment is implemented.

[0151] A computer-readable storage medium provided by the present invention can implement the steps and effects of the chip non-contact scanning detection method of the above method embodiment. To avoid repetition, the present invention will not go into details.

[0152] The beneficial effects brought about by the technical solution provided by the embodiment of the present invention include at least:

[0153] (1) In the present invention, the optimal detection section is determined with the goal of maximizing the total cross-sectional area passing through the key components, and then scanning is performed along the optimal detection section, thereby reducing the number of scans, eliminating the need for cumbersome layer-by-layer scanning, reducing scanning time, and improving chip detection efficiency. The amount of image data generated is relatively small, reducing the burden of data processing and storage, and reducing the cost of chip detection.

[0154] (2) In the present invention, a defect probability image is generated by sparse reconstruction. The generated defect probability image can accurately reflect the probability distribution of defects, making the defect area easier to identify and locate. Then, the defect area of ​​the chip to be tested is segmented through threshold segmentation, thereby improving the accuracy of chip detection.

[0155] The above is only a specific embodiment of the present invention, but the protection scope of the present invention is not limited thereto. Any person skilled in the art can easily think of changes or substitutions within the technical scope disclosed by the present invention, which should be included in the protection scope of the present invention. Therefore, the protection scope of the present invention should be based on the protection scope of the claims.

[0156] There are a few points to note:

[0157] (1) The drawings of the embodiments of the present invention only involve structures related to the embodiments of the present invention. Other structures may refer to conventional designs.

[0158] (2) For the sake of clarity, in the drawings used to describe the embodiments of the present invention, the thickness of layers or regions is exaggerated or reduced, that is, these drawings are not drawn according to the actual scale. It is understood that when an element such as a layer, film, region or substrate is referred to as being "on" or "under" another element, the element may be "directly" "on" or "under" the other element or there may be intermediate elements.

[0159] (3) In the absence of conflict, the embodiments of the present invention and the features therein may be combined with each other to obtain new embodiments.

[0160] The above are only specific embodiments of the present invention, but the protection scope of the present invention is not limited thereto. The protection scope of the present invention shall be based on the protection scope of the claims.

Claims

1. A chip non-contact scanning detection method, characterized in that: Applied to memory, including: S1: Obtain a three-dimensional model of the chip to be tested; S2: Obtaining the location information of key components of the chip to be tested; S3: Determine the best inspection section with the goal of maximizing the total cross-sectional area passing through key components; S4: Scanning the chip to be tested along the optimal detection section using a penetrating radiographic imaging device to generate a radiographic image; S5: performing grayscale normalization on the radiographic image; S6: Generate a defect probability image corresponding to the grayscale normalized radiographic image through sparse reconstruction; S7: Segmenting the defect area of ​​the chip to be tested by threshold segmentation according to the defect probability image; Wherein, the S3 specifically includes: S301: constructing a fitness function of the harmony search algorithm with the goal of maximizing the total cross-sectional area passing through the key components; S302: Determine the best detection cross section through a harmony search algorithm; Wherein, the search parameters of the harmony search algorithm include a detection starting point and a detection angle, and the detection cross section is determined by the detection starting point and the detection angle; Wherein, the fitness function is specifically: ， in, f represents the fitness function, X represents the detection cross section, S Indicates the total cross-sectional area passing through key components, S ( X ) indicates the detection cross section X The total cross-sectional area of ​​key components passed by the The total cross-sectional area passing through key components is as follows: ， in, s k ( X ) Using the detection section X After the k The cross-sectional area of ​​key components, K Indicates the total number of key components.

2. The chip non-contact scanning detection method according to claim 1, characterized in that: The S5 is specifically: The grayscale of the radiographic image is normalized according to the following formula: ， in, I b represents the grayscale normalized ray image, I a represents a radiographic image, σ a represents the grayscale variance of the radiographic image, μ a represents the grayscale mean of the radiographic image, σ ref represents the grayscale variance of the reference image, μ ref Represents the grayscale mean of the reference image.

3. The chip non-contact scanning detection method according to claim 1, characterized in that: The S6 specifically includes: S601: Generate a reconstructed image corresponding to the grayscale normalized X-ray image to be detected by sparse reconstruction using the best dictionary: ， in, I c represents the reconstructed image, Z best represents the best dictionary, β b Represents the sparse coding of the to-be-detected radiographic image after grayscale normalization; S602: construct a defect probability image based on the difference between the grayscale normalized radiographic image to be detected and the reconstructed image: ， in, I d represents the defect probability image, I c represents the reconstructed image, I b Represents the grayscale normalized radiographic image.

4. The chip non-contact scanning detection method according to claim 3, characterized in that: The optimal dictionary is determined in the following manner: S6011: Acquire a sample data set, where the sample data set includes a plurality of normal samples; S6012: Using normal samples in the sample data set, with the goal of maximizing the inner product of the dictionary atom and the residual, determine the dictionary atom and add the dictionary atom to the dictionary: ， ， Among them, max means maximization, z represents a dictionary atom, z j Indicates j dictionary atoms, r t Indicates t The residual at the iteration, Z t Indicates t The dictionary at the iteration; S6013: Using the learned dictionary, determine the sparse coding of normal samples with the goal of minimizing the reconstruction error: ， ， Among them, min means minimization, β represents sparse coding, β t Indicates t Sparse coding of normal samples at iterations, y represents the image to be processed, Z t Indicates t The dictionary at the iteration, represents L1 norm calculation, represents L2 norm calculation, λ represents the sparse regularization parameter; S6014: Update residuals: ， in, r t+1 Indicates t +Residual at 1 iteration; S6015: Repeat the above S6012 and S6014 until the maximum number of iterations is reached, and output the optimal dictionary.

5. The chip non-contact scanning detection method according to claim 1, characterized in that: The S7 specifically includes: When the defect probability value of a target pixel in the defect probability image is greater than a preset probability value, placing the target pixel into a defect area; The determination of all pixel points is repeated to segment the defective area of ​​the chip to be tested.

6. The chip non-contact scanning detection method according to claim 1, characterized in that: The S7 specifically includes: When the defect probability value of the target pixel point in the defect probability image is greater than a preset probability value and the local variance is less than a preset variance value, the target pixel point is placed in the defect area; The determination of all pixel points is repeated to segment the defective area of ​​the chip to be tested.

7. A chip non-contact scanning detection system, characterized in that: include: processor; A memory having computer-readable instructions stored thereon, wherein when the computer-readable instructions are executed by the processor, the chip non-contact scanning detection method according to any one of claims 1 to 6 is implemented.

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