Semiconductor power module, motor controller and vehicle

Abstract

The application discloses a semiconductor power module, a motor controller and a vehicle, and relates to the technical field of semiconductor power modules.The semiconductor power module comprises a first substrate, a second substrate, a first chip and a second chip.The first substrate is provided with a direct-current positive conductive area and a direct-current negative conductive area;the second substrate is provided with an alternating-current conductive area;the first chip is mounted on the direct-current positive conductive area and electrically connected with the direct-current positive conductive area and the alternating-current conductive area; and the second chip is mounted on the alternating-current conductive area and electrically connected with the direct-current negative conductive area and the alternating-current conductive area.The semiconductor power module has the advantages of small volume, high heat dissipation efficiency and the like.

Description

Technical Field

[0001] This invention relates to the field of semiconductor technology, and in particular to a semiconductor power module, a motor controller, and a vehicle. Background Technology

[0002] In related technologies, semiconductor power modules have a substrate and a chip mounted on the substrate, and the substrate has a DC positive conductive area, a DC negative conductive area and an AC conductive area, so that the semiconductor power module can realize the AC-DC conversion function. However, the semiconductor power module has a large size and low heat dissipation efficiency. Summary of the Invention

[0003] The present invention aims to at least solve one of the technical problems existing in the prior art. Therefore, one object of the present invention is to provide a semiconductor power module that has the advantages of small size and high heat dissipation efficiency.

[0004] The present invention also proposes a motor controller having the above-mentioned semiconductor power module.

[0005] The present invention also proposes a vehicle having the above-mentioned motor controller.

[0006] To achieve the above objectives, a semiconductor power module is provided according to a first aspect of the present invention, comprising: a first substrate having a DC positive conductive region and a DC negative conductive region; a second substrate having an AC conductive region; a first chip mounted on the DC positive conductive region and electrically connected to the DC positive conductive region and the AC conductive region; and a second chip mounted on the AC conductive region and electrically connected to the DC negative conductive region and the AC conductive region.

[0007] The semiconductor power module of this invention has advantages such as small size and high heat dissipation efficiency.

[0008] According to some embodiments of the present invention, the first substrate and the second substrate are stacked, the DC positive conductive region and the DC negative conductive region are disposed on the side of the first substrate facing the second substrate, and the AC conductive region is disposed on the side of the second substrate facing the first substrate.

[0009] According to some embodiments of the present invention, the first chip is located between the DC positive conductive region and the AC conductive region, and the second chip is located between the DC negative conductive region and the AC conductive region.

[0010] According to some embodiments of the present invention, the DC positive conductive region comprises a plurality of regions, including at least a first DC positive conductive region and a second DC positive conductive region arranged at intervals; the DC negative conductive region comprises a plurality of regions, including at least a first DC negative conductive region and a second DC negative conductive region arranged at intervals; the AC conductive region comprises a plurality of regions, including at least a first AC conductive region, a second AC conductive region, and a third AC conductive region arranged at intervals; wherein, the first DC positive conductive region is electrically connected to the first AC conductive region through the first chip, the second DC positive conductive region is electrically connected to the second AC conductive region and the third AC conductive region through the first chip respectively; the first AC conductive region is electrically connected to the first DC negative conductive region through the second chip, the second AC conductive region is electrically connected to the first DC negative conductive region through the second chip, and the third AC conductive region is electrically connected to the second DC negative conductive region through the second chip.

[0011] According to some embodiments of the present invention, the number of second chips connected to the first AC conductive region, the number of second chips connected to the second AC conductive region, the number of second chips connected to the third AC conductive region, the number of first chips connected to the first AC conductive region, the number of first chips connected to the second AC conductive region, and the number of first chips connected to the third AC conductive region are the same.

[0012] According to some embodiments of the present invention, the semiconductor power module has a first direction and a second direction orthogonal to each other; the first DC positive conductive region, the first DC negative conductive region, the second DC positive conductive region and the second DC negative conductive region are arranged alternately and at intervals along the first direction, and the first DC positive conductive region, the first DC negative conductive region, the second DC positive conductive region and the second DC negative conductive region all extend along the second direction; the first AC conductive region, the second AC conductive region and the third AC conductive region are arranged alternately and at intervals along the first direction, and the first AC conductive region, the second AC conductive region and the third AC conductive region all extend along the second direction.

[0013] According to some embodiments of the present invention, the plurality of DC positive conductive regions include a first DC positive conductive region and a second DC positive conductive region, and the plurality of DC negative conductive regions include a first DC negative conductive region and a second DC negative conductive region; the plurality of AC conductive regions include a first AC conductive region, a second AC conductive region, and a third AC conductive region; wherein, the first DC positive conductive region is connected to the first AC conductive region through the first chip, the second DC positive conductive region is connected to the second AC conductive region and the third AC conductive region through the first chip respectively; the first AC conductive region is connected to the first DC negative conductive region through the second chip, the second AC conductive region is connected to the first DC negative conductive region through the second chip, and the third AC conductive region is connected to the second DC negative conductive region through the second chip.

[0014] According to some embodiments of the present invention, the number of second chips connected to the first AC conductive region, the number of second chips connected to the second AC conductive region, the number of second chips connected to the third AC conductive region, the number of first chips connected to the first AC conductive region, the number of first chips connected to the second AC conductive region, and the number of first chips connected to the third AC conductive region are the same.

[0015] According to some embodiments of the present invention, a plurality of the first chips are arranged in a first row, a second row, and a third row spaced apart along the first direction, each of the first row, the second row, and the third row including a plurality of first chips spaced apart along the second direction; wherein, the first row is mounted on the first DC positive conductive region and connected to the first AC conductive region, the second row is mounted on the second DC positive conductive region and connected to the second AC conductive region, and the third row is mounted on the second DC positive conductive region and connected to the third AC conductive region.

[0016] According to some embodiments of the present invention, a plurality of second chips are arranged in a fourth, fifth, and sixth row spaced apart along the first direction, each of the fourth, fifth, and sixth rows including a plurality of second chips spaced apart along the second direction; wherein, the fourth row is mounted in the first AC conductive region and connected to the first DC negative conductive region, the fifth row is mounted in the second AC conductive region and connected to the first DC negative conductive region, and the sixth row is mounted in the third AC conductive region and connected to the second DC negative conductive region.

[0017] According to some embodiments of the present invention, the first row, the fourth row, the fifth row, the second row, the third row, and the sixth row are arranged at intervals along the first direction.

[0018] According to some embodiments of the present invention, the semiconductor power module further includes: a first positive terminal and a second positive terminal, wherein the first positive terminal is connected to the first DC positive conductive region and the second positive terminal is connected to the second DC positive conductive region; a first negative terminal and a second negative terminal, wherein the first negative terminal is connected to the first DC negative conductive region and the second negative terminal is connected to the second DC negative conductive region; a first AC terminal, a second AC terminal and a third AC terminal, wherein the first AC terminal is connected to the first AC conductive region, the second AC terminal is connected to the second AC conductive region, and the third AC terminal is connected to the third AC conductive region.

[0019] According to some embodiments of the present invention, the first positive terminal, the second positive terminal, the first negative terminal and the second negative terminal extend out of one side of the first substrate and the second substrate along the second direction; the first AC terminal, the second AC terminal and the third AC terminal extend out of the other side of the first substrate and the second substrate along the second direction.

[0020] According to some embodiments of the present invention, the semiconductor power module further includes: a first heat sink connected to the side of the first substrate facing away from the second substrate; and a second heat sink connected to the side of the second substrate facing away from the first substrate.

[0021] According to some embodiments of the present invention, both the first heat sink and the second heat sink are provided with liquid channels, which are configured to allow the flow of heat exchange medium to remove the heat generated by the first chip and the second chip.

[0022] According to some embodiments of the present invention, the first heat sink is provided with at least one of a first heat sink pin and a first heat sink fin on the side of the first heat sink facing away from the first substrate; the second heat sink is provided with at least one of a second heat sink pin and a second heat sink fin on the side of the second heat sink facing away from the second substrate.

[0023] According to some embodiments of the present invention, the semiconductor power module further includes: a molding compound, wherein the first substrate, the second substrate, the first chip and the second chip are encapsulated by the molding compound, and at least a portion of the first heat sink and at least a portion of the second heat sink are exposed from the molding compound.

[0024] According to some embodiments of the present invention, the semiconductor power module further includes: a first conductive buffer block disposed between the first chip and the AC conductive region, the first conductive buffer block being mounted on the first chip and connected to the AC conductive region; and a second conductive buffer block disposed between the second chip and the DC negative conductive region, the second conductive buffer block being mounted on the second chip and connected to the DC negative conductive region.

[0025] According to some embodiments of the present invention, the first substrate is provided with a DC sampling conductive area and a DC control conductive area, and the first chip is connected to at least one of the DC sampling conductive area and the DC control conductive area via a DC wire; the second substrate is provided with an AC sampling conductive area and an AC control conductive area, and the second chip is connected to at least one of the AC sampling conductive area and the AC control conductive area via an AC wire; wherein, the height of the DC wire relative to the first substrate is less than the height of the first conductive buffer block relative to the first substrate, and the height of the AC wire relative to the second substrate is less than the height of the second conductive buffer block relative to the second substrate.

[0026] According to some embodiments of the present invention, the first substrate includes a first metal layer, a first insulating layer, and a second metal layer stacked together. The first metal layer is located on the side of the first insulating layer opposite to the second substrate, and the second metal layer is located on the side of the first insulating layer facing the second substrate. The DC positive conductive region and the DC negative conductive region are disposed on the second metal layer. The second substrate includes a third metal layer, a second insulating layer, and a fourth metal layer stacked together. The third metal layer is located on the side of the second insulating layer opposite to the first substrate, and the fourth metal layer is located on the side of the second insulating layer facing the first substrate. The AC conductive region is disposed on the fourth metal layer.

[0027] A second aspect of the present invention provides a motor controller including a semiconductor power module according to a first aspect of the present invention.

[0028] The motor controller of the second aspect embodiment of the present invention, by utilizing the semiconductor power module according to the first aspect embodiment of the present invention, has the advantages of small size and high heat dissipation efficiency.

[0029] A third aspect of the present invention provides a vehicle including a semiconductor power module according to a second aspect of the present invention.

[0030] The vehicle according to the third aspect of the present invention, by utilizing the motor controller according to the second aspect of the present invention, has the advantages of small size and high heat dissipation efficiency.

[0031] Additional aspects and advantages of the invention will be set forth in part in the description which follows, and in part will be obvious from the description, or may be learned by practice of the invention. Attached Figure Description

[0032] The above and / or additional aspects and advantages of the present invention will become apparent and readily understood from the description of the embodiments taken in conjunction with the following drawings, in which:

[0033] Figure 1 This is a schematic diagram of the structure of a semiconductor power module according to an embodiment of the present invention.

[0034] Figure 2 This is a schematic diagram of the structure of a semiconductor power module according to another embodiment of the present invention.

[0035] Figure 3 This is a schematic diagram of the semiconductor power module from another perspective according to an embodiment of the present invention.

[0036] Figure 4 This is a schematic diagram of the semiconductor power module from another perspective according to an embodiment of the present invention.

[0037] Figure 5 This is a schematic diagram of the structure of a semiconductor power module without encapsulation according to an embodiment of the present invention.

[0038] Figure 6 This is a schematic diagram showing the connection of a first substrate, a first chip, a first positive terminal, a second positive terminal, a first negative terminal, and a second negative terminal of a semiconductor power module according to an embodiment of the present invention.

[0039] Figure 7 This is a schematic diagram showing the connection of the second substrate, second chip, first AC terminal, second AC terminal, and third AC terminal of a semiconductor power module according to an embodiment of the present invention.

[0040] Figure 8 This is a schematic diagram showing the connection of the first substrate, the first chip, the first heat sink, and the first conductive buffer block of a semiconductor power module according to an embodiment of the present invention.

[0041] Figure 9 This is a schematic diagram showing the connection of the second substrate, second chip, second heat sink, and second conductive buffer block of a semiconductor power module according to an embodiment of the present invention.

[0042] Figure 10 This is a schematic diagram showing the connection between the second chip and the second conductive buffer block of the semiconductor power module according to an embodiment of the present invention.

[0043] Figure 11 This is a circuit diagram of a semiconductor power module according to an embodiment of the present invention.

[0044] Figure 12 This is a schematic diagram of the fabrication process of a semiconductor power module according to an embodiment of the present invention.

[0045] Figure label:

[0046] Semiconductor power module 1

[0047] First substrate 100, first metal layer 101, first insulating layer 102, second metal layer 103, DC positive conductive region 110, first DC positive conductive region 111, second DC positive conductive region 112, DC negative conductive region 120, first DC negative conductive region 121, second DC negative conductive region 122, DC sampling conductive region 130, DC control conductive region 140.

[0048] Second substrate 200, third metal layer 201, second insulating layer 202, fourth metal layer 203, AC conductive region 210, first AC conductive region 211, second AC conductive region 212, third AC conductive region 213, AC sampling conductive region 220, AC control conductive region 230.

[0049] First chip 300, first row 310, second row 320, third row 330, DC wire 340.

[0050] Second chip 400, fourth row 410, fifth row 420, sixth row 430, AC wire 440,

[0051] First positive terminal 510, second positive terminal 520, first negative terminal 530, second negative terminal 540, first AC terminal 550, second AC terminal 560, third AC terminal 570.

[0052] First heat sink 610, first heat sink fins 611, second heat sink pin 612, second heat sink 620, second heat sink pin 622.

[0053] Plastic encapsulation component 700, first conductive buffer block 810, second conductive buffer block 820

[0054] Three-phase motor 900, DC power supply 910. Detailed Implementation

[0055] The embodiments of the present invention are described in detail below. The embodiments described with reference to the accompanying drawings are exemplary. The embodiments of the present invention are described in detail below.

[0056] In the description of this invention, it should be understood that the terms "center," "longitudinal," "lateral," "length," "width," "thickness," "upper," "lower," "front," "rear," "left," "right," "vertical," "horizontal," "top," "bottom," "inner," "outer," "clockwise," "counterclockwise," "axial," "radial," and "circumferential" indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are used only for the convenience of describing this invention and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on this invention.

[0057] In the description of this invention, "a plurality of" means two or more.

[0058] The semiconductor power module 1 according to an embodiment of the present invention is described below with reference to the accompanying drawings.

[0059] like Figure 1-11 As shown, the semiconductor power module 1 according to an embodiment of the present invention includes a first substrate 100, a second substrate 200, a first chip 300, and a second chip 400.

[0060] The first substrate 100 has a DC positive conductive region 110 and a DC negative conductive region 120, and the second substrate 200 has an AC conductive region 210. The first chip 300 is mounted on the DC positive conductive region 110 and electrically connected to the DC positive conductive region 110 and the AC conductive region 210. The second chip 400 is mounted on the AC conductive region 120 and electrically connected to the DC negative conductive region 120 and the AC conductive region 210.

[0061] According to an embodiment of the present invention, the semiconductor power module 1 has a DC positive conductive region 110 and a DC negative conductive region 120 formed on a first substrate 100, an AC conductive region 210 formed on a second substrate 200, and a first chip 300 connected to the DC positive conductive region 110 and the AC conductive region 210 respectively, and a second chip 400 connected to the DC negative conductive region 120 and the AC conductive region 210 respectively.

[0062] In this way, the semiconductor power module 1 can realize the conversion between AC and DC. Since the circuit of the semiconductor power module 1 is set on the first substrate 100 and the second substrate 200, the manufacturing difficulty of the circuit on each substrate can be reduced and the circuit structure is simpler. Furthermore, since the DC circuit (DC positive electrode conductive area 110 and DC negative electrode conductive area 120) and the AC conductive area 210 are set on different substrates, the types of circuits on each substrate are more uniform.

[0063] In addition, since the first chip 300 is connected to the first substrate 100 and the second substrate 200 respectively, and the second chip 400 is connected to the first substrate 100 and the second substrate 200 respectively, the structure of the semiconductor power module 1 can be simplified, thereby reducing the volume of the semiconductor power module 1. Furthermore, the heat of the semiconductor power module 1 can be dissipated from the two objects, the first substrate 100 and the second substrate 200, thereby improving the heat dissipation efficiency of the semiconductor power module 1 and making the heat dissipation more uniform.

[0064] Thus, the semiconductor power module 1 according to the embodiments of the present invention has advantages such as small size and high heat dissipation efficiency.

[0065] According to some specific embodiments of the present invention, such as Figure 5 As shown, a first substrate 100 and a second substrate 200 are stacked together. A DC positive conductive region 110 and a DC negative conductive region 120 are constructed on the side of the first substrate 100 facing the second substrate 200, and an AC conductive region 210 is constructed on the side of the second substrate 200 facing the first substrate 100.

[0066] In this way, the semiconductor power module 1 has a smaller dimension in the thickness direction of the first substrate 100 (the thickness direction of the second substrate 200), thereby reducing the arrangement volume of the semiconductor power module 1. Since the DC positive conductive region 110 and the DC negative conductive region 120 are arranged opposite to the AC conductive region 210, it is convenient for the first chip 300 to be connected to the DC positive conductive region 110 and the AC conductive region 210 respectively, and it is convenient for the second chip 400 to be connected to the DC negative conductive region 120 and the AC conductive region 210 respectively.

[0067] According to some specific embodiments of the present invention, such as Figure 5 As shown, the first chip 300 is located between the DC positive conductive region 110 and the AC conductive region 210 and is installed in the DC positive conductive region 110, and the second chip 400 is located between the DC negative conductive region 120 and the AC conductive region 210 and is installed in the AC conductive region 210.

[0068] For example, the first chip 300 can be soldered to the DC positive conductive region 110 by reflow soldering or silver sintering, and the second chip 400 can be soldered to the AC conductive region 210 by reflow soldering or silver sintering. Furthermore, firstly, the first chip 300 and the first substrate 100 can be mounted as one unit, and the second chip 400 and the second substrate 200 can be mounted as one unit; then, the first chip 300 and the second substrate 200 are connected, and the second chip 400 is connected to the first substrate 100. In this way, the fabrication of the semiconductor power module 1 is simplified, and the dimensions of the semiconductor power module 1 in the thickness direction of the first substrate 100 (and the thickness direction of the second substrate 200) are further reduced, thereby further reducing the arrangement volume of the semiconductor power module 1.

[0069] According to some specific embodiments of the present invention, such as Figure 6 and Figure 7 As shown, there are multiple DC positive conductive regions 110, and at least a first DC positive conductive region 111 and a second DC positive conductive region 112 are guaranteed. There are multiple DC negative conductive regions 120, and at least a first DC negative conductive region 121 and a second DC negative conductive region 122 are guaranteed. The first DC positive conductive region 111, the second DC positive conductive region 112, the first DC negative conductive region 121 and the second DC negative conductive region 122 are arranged at intervals on the first substrate 100. There are multiple AC conductive regions 210, and at least a first AC conductive region 211, a second AC conductive region 212 and a third AC conductive region 213 are arranged at intervals on the second substrate 200.

[0070] The first DC positive conductive region 111 is connected to the first AC conductive region 211 through the first chip 300. The second DC positive conductive region 112 is connected to the second AC conductive region 212 and the third AC conductive region 213 through the first chip 300. The first AC conductive region 211 is connected to the first DC negative conductive region 121 through the second chip 400. The second AC conductive region 212 is connected to the first DC negative conductive region 121 through the second chip 400. The third AC conductive region 213 is connected to the second DC negative conductive region 122 through the second chip 400.

[0071] In this way, by simply setting a first DC positive conductive region 111, a second DC positive conductive region 112, a first DC negative conductive region 121, and a second DC negative conductive region 122, the semiconductor power module 1 can integrate six half-bridges. That is, the semiconductor power module 1 only needs two DC positive conductive regions 110 and two DC negative conductive regions 120. While realizing AC-DC conversion, the semiconductor power module 1 can reduce its size.

[0072] According to some specific embodiments of the present invention, such as Figure 6 and Figure 7 As shown, the number of second chips 400 connected to the first AC conductive region 211, the number of second chips 400 connected to the second AC conductive region 212, the number of second chips 400 connected to the third AC conductive region 213, the number of first chips 300 connected to the first AC conductive region 211, the number of first chips 300 connected to the second AC conductive region 212, and the number of first chips 300 connected to the third AC conductive region 213 are all the same. This ensures stable operation of the semiconductor power module 1 and facilitates AC / DC conversion.

[0073] According to some specific embodiments of the present invention, such as Figure 6 and Figure 7 As shown, the semiconductor power module 1 has a first direction and a second direction that are orthogonal to each other. The first DC positive conductive region 111, the first DC negative conductive region 121, the second DC positive conductive region 112 and the second DC negative conductive region 122 are arranged alternately and at intervals along the first direction. The first DC positive conductive region 111, the first DC negative conductive region 121, the second DC positive conductive region 112 and the second DC negative conductive region 122 all extend along the second direction. The first AC conductive region 211, the second AC conductive region 212 and the third AC conductive region 213 are arranged at intervals along the first direction. The first AC conductive region 211, the second AC conductive region 212 and the third AC conductive region 213 extend along the second direction.

[0074] For example, the size of the semiconductor power module 1 in the first direction can be 5mm to 500mm, the size of the semiconductor power module 1 in the second direction can be 5mm to 500mm, and the output power of the semiconductor power module 1 can be 0kW to 5000kW.

[0075] This improves the space utilization of the semiconductor power module 1, allowing for the arrangement of larger areas of the DC positive conductive region 110 and the DC negative conductive region 120 within the semiconductor power module 1. Furthermore, since the thickness directions of the AC conductive region 210, the DC positive conductive region 110, and the DC negative conductive region 120 are the same, it facilitates the connection of the first chip 300 to the AC conductive region 210 and the DC positive conductive region 110, respectively, and also facilitates the connection of the second chip 400 to the AC conductive region 210 and the DC negative conductive region 120, respectively.

[0076] According to some specific embodiments of the present invention, such as Figure 6 As shown, a plurality of first chips 300 are arranged in a first row 310, a second row 320, and a third row 330 spaced apart along a first direction. Each of the first row 310, the second row 320, and the third row 330 includes a plurality of first chips 300 spaced apart along a second direction. Specifically, the first row 310 is mounted on a first DC positive conductive region 111 and connected to a first AC conductive region 211, the second row 320 is mounted on a second DC positive conductive region 112 and connected to a second AC conductive region 212, and the third row 330 is mounted on a second DC positive conductive region 112 and connected to a third AC conductive region 213.

[0077] In this way, the second row 320 and the third row 330 are connected to the second DC positive conductive area 112, that is, the second row 320 and the third row 330 share the second DC positive conductive area 112, and the first row 310, the second row 320 and the third row 330 can be connected one-to-one with the three AC conductive areas 210, thereby ensuring that the semiconductor power module 1 can realize AC-DC conversion while reducing the size of the semiconductor power module 1.

[0078] According to some specific embodiments of the present invention, such as Figure 7 As shown, a plurality of second chips 400 are arranged in a fourth row 410, a fifth row 420, and a sixth row 430 spaced apart along a first direction. Each of the fourth row 410, the fifth row 420, and the sixth row 430 includes a plurality of second chips 400 spaced apart along a second direction. Specifically, the fourth row 410 is mounted in the first AC conductive area 211 and connected to the first DC negative conductive area 121, the fifth row 420 is mounted in the second AC conductive area 212 and connected to the first DC negative conductive area 121, and the sixth row 430 is mounted in the third AC conductive area 213 and connected to the second DC negative conductive area 122.

[0079] In this way, the fourth row 410 and the fifth row 420 are connected to the first DC negative conductive area 121. The fourth row 410 and the fifth row 420 share the first DC negative conductive area 121. Furthermore, the fourth row 410, the fifth row 420 and the sixth row 430 can be connected one-to-one with the three AC conductive areas 210 mentioned above. This ensures that the semiconductor power module 1 can achieve AC-DC conversion while reducing the size of the semiconductor power module 1.

[0080] According to some specific embodiments of the present invention, such as Figure 5 As shown, the first row 310, the fourth row 410, the fifth row 420, the second row 320, the third row 330, and the sixth row 430 are arranged at intervals along the first direction. This not only fully utilizes the space of the semiconductor power module 1 in the first direction, but also ensures that the first row 310, the fourth row 410, the fifth row 420, the second row 320, the third row 330, and the sixth row 430 do not interfere with each other, guaranteeing the reliability of the electrical connection of the semiconductor power module 1.

[0081] According to some specific embodiments of the present invention, such as Figure 6 and Figure 7 As shown, the semiconductor power module 1 also includes a first positive terminal 510, a second positive terminal 520, a first negative terminal 530, a second negative terminal 540, a first AC terminal 550, a second AC terminal 560, and a third AC terminal 570.

[0082] The first positive terminal 510 is connected to the first DC positive conductive area 111, the second positive terminal 520 is connected to the second DC positive conductive area 112, the first negative terminal 530 is connected to the first DC negative conductive area 121, the second negative terminal 540 is connected to the second DC negative conductive area 122, the first AC terminal 550 is connected to the first AC conductive area 211, the second AC terminal 560 is connected to the second AC conductive area 212, and the third AC terminal 570 is connected to the third AC conductive area 213.

[0083] For example, the first AC terminal 550, the second AC terminal 560 and the third AC terminal 570 can be connected to the three-phase terminals of the three-phase motor 900, the first positive terminal 510 and the second positive terminal 520 can be connected to the high-voltage positive terminal of the DC power supply 910, and the first negative terminal 530 and the second negative terminal 540 can be connected to the high-voltage negative terminal of the DC power supply 910.

[0084] The working process of semiconductor power module 1 is described below with reference to the accompanying drawings:

[0085] The DC current first flows through the first positive terminal 510 and the second positive terminal 520, then flows into the first DC positive conductive region 111 and the second DC positive conductive region 112, flows into the first chip 300 from the drain and flows out of the first chip 300 from the source, then flows through the first conductive buffer block 810 and the AC conductive region 210 (first AC conductive region 211, second AC conductive region 212 and third AC conductive region 213), and finally flows to the AC terminals (first AC terminal 550, second AC terminal 560 and third AC terminal 570).

[0086] The alternating current first flows through the AC terminals (first AC terminal 550, second AC terminal 560 and third AC terminal 570), into the AC conductive region 210 (first AC conductive region 211, second AC conductive region 212 and third AC conductive region 213), into the second chip 400 from the drain and out of the second chip 400 from the source, then flows through the second conductive buffer block 820 and the DC negative conductive region 120 (first DC negative conductive region 121 and second DC negative conductive region 122), and finally flows to the first negative terminal 530 and the second negative terminal 540.

[0087] Thus, compared to the first DC negative conductive area 121 of the three-phase full bridge that requires six DC terminals in the related technology, the semiconductor power module 1 in this embodiment of the invention only requires four DC terminals to form a three-phase full bridge, which reduces the number of parts, lowers the cost and reduces the size.

[0088] According to some specific embodiments of the present invention, such as Figure 1 and Figure 2 As shown, the first positive terminal 510, the second positive terminal 520, the first negative terminal 530 and the second negative terminal 540 extend out of one side of the first substrate 100 and the second substrate 200 along the second direction, and the first AC terminal 550, the second AC terminal 560 and the third AC terminal 570 extend out of the other side of the first substrate 100 and the second substrate 200 along the second direction.

[0089] Thus, as Figure 1 and Figure 2 As shown, the four DC terminals (first positive terminal 510, second positive terminal 520, first negative terminal 530 and second negative terminal 540) will not interfere with the three AC terminals (first AC terminal 550, second AC terminal 560 and third AC terminal 570), ensuring the reliability of the electrical connection. It is also convenient to connect the DC terminals to the positive and negative terminals of the DC power supply 910, and the AC terminals to the three-phase terminals of the three-phase motor 900, so as to realize the three-phase control of the three-phase motor 900.

[0090] According to some specific embodiments of the present invention, such as Figures 1-4 As shown, the semiconductor power module 1 also includes a first heat sink 610 and a second heat sink 620. The first heat sink 610 is connected to the side of the first substrate 100 facing away from the second substrate 200, and the second heat sink 620 is connected to the side of the second substrate 200 facing away from the first substrate 100.

[0091] For example, the first heat sink 610 and the second heat sink 620 can be directly installed in the water channel. The coolant flows through the first heat sink 610 and the second heat sink 620 to perform convective heat dissipation on the semiconductor power module 1. The semiconductor power module 1 can achieve double-sided heat dissipation, which can effectively reduce the heat dissipation thermal resistance of the first chip 300 and the second chip 400, improve the heat dissipation uniformity of the first chip 300 and the second chip 400, and solve the problem of excessive junction temperature that may occur when the semiconductor power module 1 is applied to pure electric vehicles.

[0092] Furthermore, both the first heat sink 610 and the second heat sink 620 are provided with liquid channels, which are configured to allow the heat exchange medium to flow and carry away the heat generated by the first chip 300 and the second chip 400.

[0093] According to some specific embodiments of the present invention, such as Figures 1-4As shown, the first heat sink 610 has at least one of a first heat dissipation pin 611 and a first heat dissipation fin 612 on the side facing away from the first substrate 100, and the second heat sink 620 has at least one of a second heat dissipation pin 622 and a second heat dissipation fin on the side facing away from the second substrate 200. Those skilled in the art will understand that the method of dissipating heat for the first substrate 100 and the first heat sink 610 is not limited to the first heat dissipation pin 611 and the first heat dissipation fin 612; other heat dissipation structures can also be used. Similarly, the method of dissipating heat for the second substrate 200 and the second heat sink 620 is not limited to the second heat dissipation pin 622 and the second heat dissipation fin; other heat dissipation structures can also be used.

[0094] This increases the heat dissipation area of ​​the first heat sink 610 and the second heat sink 620, further reduces the thermal resistance of the first chip 300 and the second chip 400, thereby further improving the heat dissipation uniformity of the first chip 300 and the second chip 400, and making the heat dissipation efficiency of the semiconductor power module 1 higher.

[0095] According to some specific embodiments of the present invention, such as Figures 1-4 As shown, the semiconductor power module 1 also includes a molding compound 700. The first substrate 100, the second substrate 200, the first chip 300 and the second chip 400 are covered by the molding compound 700, and at least a portion of the first heat sink 610 and at least a portion of the second heat sink 620 are exposed from the molding compound 700.

[0096] For example, the molding compound 700 can be made of molding compound material such as epoxy resin. By using the molding compound 700 to encapsulate the semiconductor power module 1, the semiconductor power module 1 can be integrated into a single package, thereby reducing process complexity, reducing the number of steps, improving production efficiency, and giving the semiconductor power module 1 advantages such as high temperature resistance and high reliability, thus reducing thermal resistance.

[0097] According to some specific embodiments of the present invention, such as Figure 5 , Figures 8-10 As shown, the semiconductor power module 1 also includes a first conductive buffer block 810 and a second conductive buffer block 820.

[0098] The first conductive buffer block 810 is disposed between the first chip 300 and the AC conductive area 210. The first conductive buffer block 810 is mounted on the first chip 300 and connected to the AC conductive area 210. The second conductive buffer block 820 is disposed between the second chip 400 and the DC negative conductive area 120. The second conductive buffer block 820 is mounted on the second chip 400 and connected to the DC negative conductive area 120.

[0099] For example, the coefficient of thermal expansion of the first conductive buffer block 810 is between that of the first chip 300 and the AC conductive region 210, and the coefficient of thermal expansion of the second conductive buffer block 820 is between that of the second chip 400 and the DC negative conductive region 120. The first and second conductive buffer blocks 810 and 820 can be made of molybdenum, the first chip 300 can be SiC (silicon carbide) or IGBT (Insulated Gate Bipolar Transistor), and the AC conductive region 210 and DC negative conductive region 120 can be made of copper. Furthermore, the first conductive buffer block 810 and the first chip 300 can be connected using solder paste or metal sintering, and the second conductive buffer block 820 and the second chip 400 can be connected using solder paste or metal sintering.

[0100] In this way, the first conductive buffer block 810 can realize the electrical connection between the first chip 300 and the AC conductive area 210. The first conductive buffer block 810 replaces the leads of the semiconductor power module in the related technology. While improving the reliability of the semiconductor power module 1, it can reduce the stray inductance of the semiconductor power module 1. In addition, the first conductive buffer block 810 can reduce the welding stress between the first chip 300 and the AC conductive area 210, thereby reducing the thermal deformation of the semiconductor power module 1.

[0101] The second conductive buffer block 820 enables electrical connection between the second chip 400 and the DC negative conductive area 120. The second conductive buffer block 820 replaces the leads of the semiconductor power module in the related technology, which improves the reliability of the semiconductor power module 1 and reduces the stray inductance of the semiconductor power module 1. The first conductive buffer block 810 can reduce the welding stress between the second chip 400 and the DC negative conductive area 120, thereby reducing the thermal deformation of the semiconductor power module 1.

[0102] According to some specific embodiments of the present invention, such as Figure 6 and Figure 7 As shown, the first substrate 100 is configured with a DC sampling conductive region 130 and a DC control conductive region 140. The first chip 300 is connected to at least one of the DC sampling conductive region 130 and the DC control conductive region 140 via a DC wire 340, thereby enabling control and voltage sampling of the first chip 300. The second substrate 200 is configured with an AC sampling conductive region 220 and an AC control conductive region 230. The second chip 400 is connected to at least one of the AC sampling conductive region 220 and the AC control conductive region 230 via an AC wire 440, thereby enabling control and voltage sampling of the second chip 400.

[0103] The height of the DC conductor 340 relative to the first substrate 100 is less than the height of the first conductive buffer block 810 relative to the first substrate 100, and the height of the AC conductor 440 relative to the second substrate 200 is less than the height of the second conductive buffer block 820 relative to the second substrate 200. Because the first conductive buffer block 810 and the second conductive buffer block 820 have a certain height, sufficient space can be provided for the DC conductor 340 and the AC conductor 440, increasing the ease of manufacturing the semiconductor power module 1.

[0104] According to some specific embodiments of the present invention, such as Figure 8 and Figure 9 As shown, the first substrate 100 includes a first metal layer 101, a first insulating layer 102 and a second metal layer 103 stacked together. The first metal layer 101 is located on the side of the first insulating layer 102 facing away from the second substrate 200, and the second metal layer 103 is located on the side of the first insulating layer 102 facing the second substrate 200. A DC positive conductive region 110 and a DC negative conductive region 120 are formed on the second metal layer 103.

[0105] The second metal layer 103 can be fabricated using etching and other processes to form a DC positive conductive region 110 and a DC negative conductive region 120. The second metal layer 103 is made of a metallic material, such as copper. Its high conductivity facilitates electrical conduction between the second metal layer 103 and the first chip 300. Furthermore, heat from the second metal layer 103 can be transferred to the first metal layer 101 via the first insulating layer 102. For example, the first metal layer 101 can be made of copper, resulting in good heat dissipation performance of the first substrate 100 and improved heat dissipation efficiency in the semiconductor power module 1 manufacturing process. Additionally, the first insulating layer 102 can be made of materials such as silicon nitride, aluminum oxide, or aluminum nitride. This provides electrical isolation between the first metal layer 101 and the second metal layer 103, ensuring that the first metal layer 101 does not conduct electricity to the outside while dissipating heat, thus improving safety. It also serves as a substrate for the first chip 300, reducing thermal deformation of the first chip 300, the first metal layer 101, and the second metal layer 103.

[0106] The second substrate 200 includes a third metal layer 201, a second insulating layer 202 and a fourth metal layer 203 stacked together. The third metal layer 201 is located on the side of the second insulating layer 202 facing away from the first substrate 100, and the fourth metal layer 203 is located on the side of the second insulating layer 202 facing the first substrate 100. The AC conductive region 210 is formed on the fourth metal layer 203.

[0107] The fourth metal layer 203 can be etched to create an AC conductive region 210. The fourth metal layer 203 is made of a metallic material, such as copper. Its high conductivity facilitates electrical conduction between the fourth metal layer 203 and the second chip 400. Heat from the fourth metal layer 203 can be transferred to the third metal layer 201 via the second insulating layer 202. The third metal layer 201 can also be made of copper, resulting in good heat dissipation performance of the second substrate 200 and improved heat dissipation efficiency in the semiconductor power module 1 manufacturing process. Furthermore, the second insulating layer 202 can be made of materials such as silicon nitride, aluminum oxide, or aluminum nitride. This provides electrical isolation between the third metal layer 201 and the fourth metal layer 203, ensuring that the third metal layer 201 does not conduct electricity to the outside while dissipating heat, thus improving safety. It also serves as a substrate for the second chip 400, reducing thermal deformation of the second chip 400, the third metal layer 201, and the fourth metal layer 203.

[0108] The following is combined with Figure 12 An example is given to describe the fabrication method of semiconductor power module 1:

[0109] First, the first chip 300 is soldered to the first metal layer 101 of the first substrate 100 through a solder layer by means of reflow soldering or silver sintering, and the second chip 400 is soldered to the third metal layer 201 of the second substrate 200 through a solder layer by means of reflow soldering or silver sintering.

[0110] Next, the first conductive buffer block 810 is soldered to the first chip 300 through a solder layer, and the second conductive buffer block 820 is soldered to the second chip 400 through a solder layer.

[0111] Next, the DC wires 340 of the source and gate of the first chip 300 are bonded to the first substrate 100, and the AC wires 440 of the source and gate of the second chip 400 are bonded to the second substrate 200. The height of the DC wires 340 cannot be higher than the first conductive buffer block 810, and the height of the AC wires 440 cannot be higher than the second conductive buffer block 820. The design of the DC wires 340 and AC wires 440 must not have any cross interference to avoid short circuits and other situations.

[0112] Next, the first heat sink 610 is welded to the second metal layer 103 of the first substrate 100, and the second heat sink 620 is welded to the fourth metal layer 203 of the second substrate 200.

[0113] Next, the first positive terminal 510, the second positive terminal 520, the first negative terminal 530, and the second negative terminal 540 are soldered to the first metal layer 101 of the first substrate 100, and the first AC terminal 550, the second AC terminal 560, and the third AC terminal 570 are soldered to the third metal layer 201 of the second substrate 200.

[0114] Next, the second substrate 200 is flipped over, and solder layers are applied to the surfaces of the first conductive buffer block 810 and the second conductive buffer block 820. The surface of the first conductive buffer block 810 is soldered to the second substrate 200, and the surface of the second conductive buffer block 820 is soldered to the first substrate 100. The first substrate 100 and the second substrate 200 are positioned and assembled using a positioning fixture. The assembled first substrate 100 and the second substrate 200 are then placed in a vacuum reflow oven for reflow soldering.

[0115] Finally, the first substrate 100 and the second substrate 200 after welding are injection molded with module encapsulation material, which encapsulates the entire semiconductor power module 1 except for the first heat sink 610 and the second heat sink 620.

[0116] The following description, with reference to the accompanying drawings, describes a motor controller according to an embodiment of the present invention, which includes a semiconductor power module 1 according to the above embodiment of the present invention.

[0117] The motor controller according to the embodiments of the present invention has the advantages of small size and high heat dissipation efficiency by utilizing the semiconductor power module 1 according to the above embodiments of the present invention.

[0118] The vehicle according to an embodiment of the present invention is described below with reference to the accompanying drawings. The motor controller includes a semiconductor power module 1 according to the above embodiment of the present invention.

[0119] The vehicle according to the embodiments of the present invention has advantages such as small size and high heat dissipation efficiency by utilizing the motor controller according to the above embodiments of the present invention.

[0120] The semiconductor power module 1, the motor controller, and other components and operations of the vehicle according to embodiments of the present invention are known to those skilled in the art and will not be described in detail here.

[0121] In the description of this specification, references to terms such as "one embodiment," "some embodiments," "illustrative embodiment," "example," "specific example," or "some examples," etc., refer to specific features, structures, materials, or characteristics described in connection with that embodiment or example, which are included in at least one embodiment or example of the present invention. In this specification, the illustrative expressions of the above terms do not necessarily refer to the same embodiment or example.

[0122] Although embodiments of the invention have been shown and described, those skilled in the art will understand that various changes, modifications, substitutions and alterations can be made to these embodiments without departing from the principles and spirit of the invention, the scope of which is defined by the claims and their equivalents.

Claims

1. A semiconductor power module, characterized in that, include: A first substrate, wherein the first substrate is provided with a DC positive conductive region and a DC negative conductive region; The second substrate has an AC conductive region. A first chip is mounted in the DC positive conductive area and electrically connected to the DC positive conductive area and the AC conductive area; The second chip is mounted in the AC conductive area and is electrically connected to the DC negative conductive area and the AC conductive area; The first substrate and the second substrate are stacked together. The DC positive conductive region and the DC negative conductive region are located on the side of the first substrate facing the second substrate, and the AC conductive region is located on the side of the second substrate facing the first substrate.

2. The semiconductor power module according to claim 1, characterized in that, The first chip is located between the DC positive conductive region and the AC conductive region, and the second chip is located between the DC negative conductive region and the AC conductive region.

3. The semiconductor power module according to claim 1, characterized in that, The DC positive conductive region is a plurality of regions, including at least a first DC positive conductive region and a second DC positive conductive region arranged at intervals; the DC negative conductive region is a plurality of regions, including at least a first DC negative conductive region and a second DC negative conductive region arranged at intervals. The AC conductive region is multiple and includes at least a first AC conductive region, a second AC conductive region and a third AC conductive region arranged at intervals; Wherein, the first DC positive conductive region is electrically connected to the first AC conductive region through the first chip, and the second DC positive conductive region is electrically connected to the second AC conductive region and the third AC conductive region through the first chip respectively; The first AC conductive area is electrically connected to the first DC negative conductive area through the second chip, the second AC conductive area is electrically connected to the first DC negative conductive area through the second chip, and the third AC conductive area is electrically connected to the second DC negative conductive area through the second chip.

4. The semiconductor power module according to claim 3, characterized in that, The number of second chips connected to the first AC conductive area, the number of second chips connected to the second AC conductive area, the number of second chips connected to the third AC conductive area, the number of first chips connected to the first AC conductive area, the number of first chips connected to the second AC conductive area, and the number of first chips connected to the third AC conductive area are all the same.

5. The semiconductor power module according to claim 3, characterized in that, The semiconductor power module has a first direction and a second direction that are orthogonal to each other; The first DC positive conductive region, the first DC negative conductive region, the second DC positive conductive region, and the second DC negative conductive region are arranged alternately and at intervals along the first direction, and the first DC positive conductive region, the first DC negative conductive region, the second DC positive conductive region, and the second DC negative conductive region all extend along the second direction; The first AC conductive region, the second AC conductive region, and the third AC conductive region are arranged sequentially at intervals along the first direction, and the first AC conductive region, the second AC conductive region, and the third AC conductive region all extend along the second direction.

6. The semiconductor power module according to claim 5, characterized in that, The plurality of the first chips are arranged in a first row, a second row and a third row spaced apart along the first direction, and each of the first row, the second row and the third row includes a plurality of first chips spaced apart along the second direction; The first row is installed in the first DC positive conductive area and connected to the first AC conductive area; the second row is installed in the second DC positive conductive area and connected to the second AC conductive area; and the third row is installed in the second DC positive conductive area and connected to the third AC conductive area.

7. The semiconductor power module according to claim 6, characterized in that, The plurality of second chips are arranged in a fourth, fifth and sixth row spaced apart along the first direction, each of the fourth, fifth and sixth rows including a plurality of second chips spaced apart along the second direction; The fourth row is installed in the first AC conductive area and connected to the first DC negative conductive area; the fifth row is installed in the second AC conductive area and connected to the first DC negative conductive area; and the sixth row is installed in the third AC conductive area and connected to the second DC negative conductive area.

8. The semiconductor power module according to claim 7, characterized in that, The first row, the fourth row, the fifth row, the second row, the third row, and the sixth row are arranged at intervals along the first direction.

9. The semiconductor power module according to any one of claims 5-8, characterized in that, Also includes: A first positive terminal and a second positive terminal, wherein the first positive terminal is connected to the first DC positive conductive region, and the second positive terminal is connected to the second DC positive conductive region; The first negative terminal and the second negative terminal are connected to the first DC negative conductive area and the second negative terminal is connected to the second DC negative conductive area. The system comprises a first AC terminal, a second AC terminal, and a third AC terminal, wherein the first AC terminal is connected to the first AC conductive area, the second AC terminal is connected to the second AC conductive area, and the third AC terminal is connected to the third AC conductive area.

10. The semiconductor power module according to claim 9, characterized in that, The first positive terminal, the second positive terminal, the first negative terminal, and the second negative terminal extend out of one side of the first substrate and the second substrate along the second direction; The first AC terminal, the second AC terminal, and the third AC terminal extend out along the second direction to the other side of the first substrate and the second substrate.

11. The semiconductor power module according to claim 1, characterized in that, Also includes: A first heat sink is connected to the side of the first substrate facing away from the second substrate. The second heat sink is connected to the side of the second substrate facing away from the first substrate.

12. The semiconductor power module according to claim 11, characterized in that, Both the first heat sink and the second heat sink have liquid channels, which are configured to allow the flow of heat exchange medium to remove the heat generated by the first chip and the second chip.

13. The semiconductor power module according to claim 11, characterized in that, The first heat sink is provided with at least one of a first heat sink pin and a first heat sink fin on the side of the first heat sink facing away from the first substrate. The second heat sink has at least one of a second heat sink pin and a second heat sink fin on the side facing away from the second substrate.

14. The semiconductor power module according to claim 11, characterized in that, Also includes: A molding compound in which the first substrate, the second substrate, the first chip, and the second chip are encapsulated, and at least a portion of the first heat sink and at least a portion of the second heat sink are exposed from the molding compound.

15. The semiconductor power module according to claim 1, characterized in that, Also includes: A first conductive buffer block is disposed between the first chip and the AC conductive area. The first conductive buffer block is mounted on the first chip and connected to the AC conductive area. The second conductive buffer block is disposed between the second chip and the DC negative conductive area. The second conductive buffer block is mounted on the second chip and the DC negative conductive area is connected.

16. The semiconductor power module according to claim 15, characterized in that, The first substrate is provided with a DC sampling conductive area and a DC control conductive area, and the first chip is connected to at least one of the DC sampling conductive area and the DC control conductive area through a DC wire; The second substrate is provided with an AC sampling conductive area and an AC control conductive area, and the second chip is connected to at least one of the AC sampling conductive area and the AC control conductive area through an AC wire; Wherein, the height of the DC conductor relative to the first substrate is less than the height of the first conductive buffer block relative to the first substrate, and the height of the AC conductor relative to the second substrate is less than the height of the second conductive buffer block relative to the second substrate.

17. The semiconductor power module according to claim 1, characterized in that, The first substrate includes a first metal layer, a first insulating layer and a second metal layer stacked together. The first metal layer is located on the side of the first insulating layer facing away from the second substrate, and the second metal layer is located on the side of the first insulating layer facing the second substrate. The DC positive conductive region and the DC negative conductive region are disposed on the second metal layer. The second substrate includes a third metal layer, a second insulating layer and a fourth metal layer stacked together. The third metal layer is located on the side of the second insulating layer facing away from the first substrate, and the fourth metal layer is located on the side of the second insulating layer facing the first substrate. The AC conductive region is disposed on the fourth metal layer.

18. A motor controller, characterized in that, Includes a semiconductor power module according to any one of claims 1-17.

19. A vehicle, characterized in that, Includes the semiconductor power module according to claim 18.

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