A defect detection method, device, equipment and medium

Abstract

The present disclosure provides a defect detection method, apparatus, device, and medium, belonging to the field of semiconductor manufacturing technology. The method may include: detecting defects on the surface of a wafer based on a transmissive optical inspection method; generating a shielding mask according to defect feature data of non-pinhole defects among all detected defects; removing defects covered by the shielding mask from all detected defects to obtain defects to be reviewed; and reviewing the defects to be reviewed to determine whether pinhole defects are present among the defects to be reviewed. The technical solution of the present disclosure shortens the time required for transmissive optical inspection, reduces the waste of production capacity in detecting pinhole defects using the transmissive optical inspection method, and improves equipment utilization.

Description

Technical Field

[0001] The present disclosure relates to the field of semiconductor manufacturing technology, and in particular to a defect detection method, apparatus, device, and medium. Background Art

[0002] The production process of wafers used to manufacture semiconductor devices typically includes crystal pulling, dicing, grinding, polishing, and cleaning. After the cleaning process, the wafer surface is inspected for defects such as pinholes, scratches, particles, and voids.

[0003] Among the most common defect detection solutions currently available, transmissive optical inspection is often used to detect pinhole defects. During this process, all detected defects are reviewed one by one to determine whether any pinhole defects exist.

[0004] In the above detection process, since it takes a long time to review all defects, the current pinhole defect detection process has a low productivity. Summary of the Invention

[0005] The present disclosure provides a defect detection method, apparatus, device, and medium; after defects are detected by transmissive optical inspection, a mask is set according to the defect information so that the defects indicated by the mask are not reviewed, thereby reducing the time spent on pinhole defect detection during wafer production and improving the utilization rate of pinhole defect detection.

[0006] The technical solution of the present disclosure is achieved as follows:

[0007] In a first aspect, the present disclosure provides a defect detection method, the method comprising:

[0008] Detect defects on the wafer surface based on transmissive optical inspection;

[0009] Among all the defects detected, a shielding mask is generated according to the defect feature data of non-pinhole defects;

[0010] After removing the defects covered by the shielding mask from all the detected defects, defects to be reviewed are obtained;

[0011] The defects to be reviewed are reviewed to determine whether there are pinhole defects in the defects to be reviewed.

[0012] In a second aspect, the present disclosure provides a defect detection device, the defect detection device comprising: a detection part, a generation part, a removal part and a review part; wherein,

[0013] The detection part is configured to detect defects on the wafer surface based on a transmission optical detection method;

[0014] The generating section is configured to generate a shielding mask according to defect feature data of non-pinhole defects among all detected defects;

[0015] The removing portion is configured to remove the defects covered by the shielding mask from all the detected defects to obtain defects to be reviewed;

[0016] The review part is configured to review the defects to be reviewed and determine whether there is a pinhole defect among the defects to be reviewed.

[0017] In a third aspect, the present disclosure provides a computing device, comprising: a processor and a memory; the processor is configured to execute instructions stored in the memory to implement the defect detection method as described in the first aspect.

[0018] In a fourth aspect, the present disclosure provides a computer storage medium, wherein the storage medium stores at least one instruction, and the at least one instruction is used to be executed by a processor to implement the defect detection method as described in the first aspect.

[0019] The present disclosure provides a defect detection method, apparatus, equipment, and medium. During the wafer production process, after defects on the wafer surface are detected by transmissive optical inspection, a shielding mask is formed using the defect characteristics of non-pinhole defects to reduce the number of non-pinhole defects during the review process, shorten the time of transmissive optical inspection, reduce the waste of production capacity in detecting pinhole defects using the transmissive optical inspection method, and improve equipment utilization. BRIEF DESCRIPTION OF THE DRAWINGS

[0020] Figure 1 A schematic diagram of a transmissive optical detection architecture provided by the present disclosure.

[0021] Figure 2 A schematic diagram of a scanning image of a pinhole defect provided by the present disclosure.

[0022] Figure 3 A schematic diagram of the morphological image of a pinhole defect provided in the present disclosure.

[0023] Figure 4 A schematic diagram of a scanning image of a scratch defect provided by the present disclosure.

[0024] Figure 5 A schematic diagram of the topographic image of the scratch defect provided in the present disclosure.

[0025] Figure 6 A schematic flow chart of a defect detection method provided by the present disclosure.

[0026] Figure 7 A flowchart of another defect detection method provided by the present disclosure.

[0027] Figure 8 Schematic diagram of a scratch defect provided in the present disclosure.

[0028] Figure 9 Schematic diagram of a shielding mask provided in the present disclosure.

[0029] Figure 10 A schematic diagram of the defect detection device provided by the present invention.

[0030] Figure 11 A schematic diagram of another defect detection device provided by the present invention.

[0031] Figure 12 A schematic diagram of the structure of a computing device provided by the present disclosure. DETAILED DESCRIPTION

[0032] The technical solutions in the present disclosure will be described clearly and completely below with reference to the accompanying drawings in the present disclosure.

[0033] In the current wafer production process, after the cleaning process is completed, the defects on the wafer surface will be detected. For pinhole defects, transmission optical detection is usually used for detection. Taking infrared light as an example, see Figure 1In the exemplary inspection architecture 10 shown, an infrared light source 11 emits infrared light (IR light), as indicated by the straight arrows in the figure, toward the back side of wafer W and scans the back side of wafer W in a predetermined sequence. The infrared light passes through wafer W from the back side and is transmitted out of the front side of wafer W. The transmitted light, as indicated by the dashed arrows in the figure, is captured by a scanning device 12, such as a high-resolution camera, CCD sensor, or infrared sensor, located on the front side of wafer W. A processing device 13 analyzes changes in the transmitted light collected by scanning device 12 compared to the emitted light, such as light intensity attenuation, scattering, or changes in refraction angle, to detect defects on the front side of wafer W. In some examples, the transmitted light can not only detect the coordinates of the defect on the front side of wafer W, but also obtain defect description information, which can be used to characterize the defect's morphological characteristics, such as its size and shape. The defect coordinates and related description information can be displayed in a data table obtained through inspection or in a mapping image obtained through scanning. If represented by a mapping diagram, each defect appears as a dot pattern in the wafer image. In some examples, the wafer W being inspected typically has a V-shaped notch. By establishing a coordinate system based on this notch, any location on the surface of the wafer W can be represented by coordinates in this coordinate system.

[0034] In the present disclosure, the front side of the wafer W refers to the surface of the wafer W used to form circuit patterns during the semiconductor device manufacturing process. The surface of the wafer W opposite to the surface used to form circuit patterns is the back side of the wafer W.

[0035] To detect pinhole defects, in related solutions, processing device 13 reviews each detected defect to determine whether it is a pinhole defect. For example, processing device 13 controls review camera 14 based on the coordinates of each defect to capture a topographic image of the defect. Processing device 13 then classifies the defect through manual inspection or image analysis to determine whether it is a pinhole defect. Processing device 13 does not perform further verification for defects other than pinholes.

[0036] by Figure 2 As shown in the figure, the mapping image obtained by scanning the scanning device 12 is taken as an example. The defect selected by the solid circle is photographed by the camera 14 and the image is obtained. Figure 3 The topography image shown in the figure is used for review through manual inspection or image analysis, and it can be confirmed that the defect is a pinhole defect.

[0037] by Figure 4 Taking the mapping image obtained by scanning the scanning device 12 as an example, the defect on the surface of the wafer W in the area selected by the solid circle is a scratch defect. The defect selected by the solid circle is continuous, that is, it appears as a continuously arranged defect point pattern. The camera 14 will take pictures of the continuous defects at a set interval and obtain Figure 5 The topographic image shown in the figure is rechecked through manual inspection or image analysis, confirming that the defect is not a pinhole defect.

[0038] However, in general, the number of pinhole defects accounts for a very small proportion of all defects detected by the inspection architecture 10. For example, the number of pinhole defects on the front side of a single wafer is only 1 to 2, and at most no more than 10. In addition, in the wafer manufacturing process, other types of defects besides pinhole defects, such as Figure 4 or Figure 5 The scratch defects shown in the figure are mostly confirmed by edge, back, and front inspection systems at the front end of the transmission optical inspection method and particle counters at the back end of the transmission optical inspection method.

[0039] Based on the above situation, it can be seen that: currently in the wafer production process, most of the review time of the transmission optical inspection method is wasted on the review of non-pinhole defects, resulting in a long transmission optical inspection time, resulting in a large amount of waste in the production capacity of the transmission optical inspection method for detecting pinhole defects, and a low equipment utilization rate of the inspection architecture 10.

[0040] In order to reduce the time spent on pinhole defect detection during wafer production, avoid waste of production capacity and improve the utilization rate of pinhole defect detection. Figure 6 , which shows a defect detection method provided by the present disclosure, which can be applied to Figure 1 The detection architecture 10 of the transmissive optical detection method shown in FIG can be executed by the processing device 13 in the aforementioned detection architecture 10. The method can include steps S601 to S604.

[0041] In step S601 , defects on the wafer surface are detected based on a transmission optical inspection method.

[0042] In this disclosure, Figure 1Taking the detection architecture 10 shown in FIG. 1 as an example, after collecting the transmitted light, the scanning device 12 transmits the collected light information to the processing device 13. The processing device 13 can determine the coordinates of the defect on the front side of the wafer W based on the transmitted light information transmitted by the scanning device 12, as well as the relevant description information of the defect, such as the size and geometric morphology of the defect. For specific implementation details, please refer to the aforementioned Figure 1 The description of the schematic diagram is omitted here.

[0043] In step S602 , a shielding mask is generated according to defect feature data of non-pinhole defects among all detected defects.

[0044] As mentioned above, among all the defects detected in step S601, the number of pinhole defects accounts for an extremely low proportion, while the number of other non-pinhole defects accounts for a higher proportion. In addition, in the actual wafer production process, the transmission optical inspection method only confirms non-pinhole defects through review, but cannot accurately identify the specific defect type.

[0045] Based on the above explanation, in this disclosure, for all defects detected by the inspection architecture 10, the detected defect coordinates and description information are used to indicate the defect characteristics of non-pinhole defects. A shielding mask is then set based on the defect characteristics. Defects covered by this shielding mask are not involved in the subsequent review process. This reduces the number of other non-pinhole defects that require subsequent review, avoiding a large amount of review time wasted on non-pinhole defects, thereby shortening the duration of transmissive optical inspection. Furthermore, reducing the number of other non-pinhole defects that require subsequent review can also reduce the production capacity waste of pinhole defects detected by transmissive optical inspection, thereby improving the equipment utilization rate of the inspection architecture 10.

[0046] For example, among common defect types, scratches typically appear as long, thin linear defects. This morphology is detected by transmission optical inspection as a continuous, short-interval, and long dot pattern. When reviewing scratch defects, each defect corresponding to the dot pattern in the arrangement needs to be reviewed at intervals. For example, reviewing a 30mm long scratch defect at 20μm intervals would take nearly an hour. This time increases with the number of scratch defects.

[0047] For scratch defects, the review result only confirms that they are not pinhole defects, but cannot accurately confirm that they are scratch defects. In the actual wafer production process, scratch defects are confirmed by edge, back, and front inspection systems at the front end of the transmission optical inspection method, and particle counters at the back end of the transmission optical inspection method.

[0048] In summary, it can be seen that in the process of transmission optical inspection, it takes a long time to review scratch defects, and no definitive conclusion can be reviewed. The morphological characteristics of scratch defects can be described by the detected defect coordinates and description information. Based on this understanding, taking scratch defects as an example, the present disclosure forms a shielding mask for all detected defects based on the defect characteristics of scratch defects using the detected defect coordinates and description information, so that during the review process, the defects covered by the shielding mask are not reviewed, that is, the scratch defects are not reviewed, thereby reducing the time of transmission optical inspection, reducing the waste of production capacity in detecting pinhole defects by transmission optical inspection, and improving equipment utilization rate.

[0049] In step S603, defects covered by the shielding mask are removed from all detected defects to obtain defects to be reviewed.

[0050] In this disclosure, continuing with the aforementioned scratch defect as an example, after forming a shielding mask for all detected defects using the detected defect coordinates and description information based on the scratch defect's defect characteristics, the remaining defects will no longer include scratch defects after the defects covered by the shielding mask are removed. Reviewing these remaining defects can reduce the time spent on the aforementioned scratch defect review.

[0051] In step S604, the defects to be reviewed are reviewed to determine whether there is a pinhole defect among the defects to be reviewed.

[0052] In the present disclosure, after removing the defects covered by the shielding mask from all detected defects according to step S603, the processing device 13 can control the camera 14 to capture the morphology image of the defect to be reviewed according to the coordinate positioning of each defect to be reviewed, and determine whether each defect to be reviewed is a pinhole defect through manual inspection or image analysis of the morphology image.

[0053] pass Figure 6The technical solution shown in the figure, after detecting defects on the wafer surface by transmissive optical inspection during the wafer production process, uses the defect characteristics of non-pinhole defects to form a shielding mask to reduce the number of non-pinhole defects in the review process, shortens the time of transmissive optical inspection, reduces the waste of production capacity of pinhole defects detected by transmissive optical inspection, and improves equipment utilization rate. In addition, Figure 6 The technical solution shown can shield the point-shaped and sharp defects at the beginning and end of the scratch defect from being re-inspected by using a shielding mask, thereby reducing the risk of the point-shaped defects at the beginning and end of the scratch being misjudged as other types of defects.

[0054] based on Figure 6 The same invention concept as the technical solution shown in FIG. Figure 7 , which shows another defect detection method provided by the present disclosure, which can also be applied to Figure 1 The detection architecture 10 of the transmissive optical detection method shown in FIG can be executed by the processing device 13 in the aforementioned detection architecture 10. The method can include steps S701 to S706.

[0055] In step S701, according to the defect characteristics of non-pinhole defects, a card control strategy is set based on the coordinates and description information of the defect.

[0056] In this disclosure, the purpose of the shielding mask is to control non-pinhole defects during review, thereby reducing the number of non-pinhole defects during the review process. In specific implementations, a corresponding control strategy for non-pinhole defects can be set before inspection, and then a shielding mask can be generated for all detected defects based on this control strategy.

[0057] Compared with the above Figure 2 and Figure 3 The pinhole defect shown, and Figure 4 and Figure 5As shown in the scratch defect, the scratch defect on the wafer surface needs to review the continuous dot pattern during the review, while the pinhole defect only needs to review the individual dot pattern. Therefore, in the actual production process of wafers, most of the review time of transmissive optical inspection is consumed in the review process of scratch defects. The present disclosure takes the scratch defect as an exemplary non-pinhole defect, and characterizes the defect characteristics according to its morphological characteristics, that is, a slender linear defect, using the coordinates and description information of the defect obtained by transmissive optical inspection to form a card control strategy. Specifically, the slender linear defect is reflected in the defects detected by transmissive optical inspection, and will present a continuous, short-interval and long-length dot pattern arrangement. Therefore, in some examples, according to the defect characteristics of non-pinhole defects, a card control strategy based on the coordinates and description information of the defect is set, including:

[0058] The control strategy corresponding to the scratch defect is determined based on the morphological characteristics of the scratch defect; wherein the control strategy corresponding to the scratch defect includes: the number of defects that appear continuously is greater than a number threshold, the spacing between adjacent defects is less than a distance threshold, and the aspect ratio of the area occupied by the consecutive defects is greater than an aspect ratio threshold.

[0059] For the above example, Figure 8 Taking the scratch defect shown in the defect diagram obtained by transmissive optical inspection as an example, the scratch defect appears as 11 consecutive dot patterns, as indicated by the circles in the figure, with the spacing between adjacent dot patterns being d. The size and spacing of all the consecutive dot patterns form the area occupied by the scratch defect, as shown by the box in the figure. The length of this area is x, and the width of this area, as shown in the figure, is determined by the size of the individual dot patterns.

[0060] Specifically, for scratch defects, dot patterns usually appear continuously, that is, multiple (for example, n) dot patterns appear to be arranged continuously. Therefore, the number of defects that appear continuously can be used as a criterion for judging the card control strategy.

[0061] Secondly, for scratch defects, in a continuously arranged dot pattern, the spacing between adjacent dot patterns is usually less than 8.5 microns, and in some cases less than 4 microns. Therefore, when the previous condition is met, the spacing between adjacent defects is also another criterion for judging the card control strategy.

[0062] Finally, for scratch defects, their elongated linear features can be characterized by the aspect ratio of the area occupied by these continuously arranged dot patterns. Figure 8As shown in the example, the length of a region can be determined by the size of each dot pattern and the spacing between adjacent dot patterns, while the width of a region can be determined by the size of a single dot pattern. In this disclosure, to characterize the defect characteristics of a thin, linear scratch defect, the aspect ratio of the region occupied by consecutive defects can be used as another criterion in the control strategy.

[0063] For the three criteria mentioned above, the present disclosure sets corresponding thresholds respectively, thereby forming a card control strategy corresponding to scratch defects based on the three criteria. Specifically, the card control strategy should include the three criteria mentioned above at the same time, and in some examples, the three criteria can be specifically set as follows: the number threshold corresponding to the number of consecutive defects is set to 10, the distance threshold corresponding to the spacing between adjacent defects is set to 8.5μm, and the aspect ratio threshold corresponding to the aspect ratio of the area occupied by consecutive defects is set to 5. In other words, among the detected defects, if there are consecutive defects that meet the above card control strategy, then the consecutive defects need to be card controlled during the review to avoid re-inspection of the consecutive defects.

[0064] In step S702 , defects on the wafer surface are detected based on a transmission optical inspection method.

[0065] It is understandable that the specific implementation details of step S702 can be found in the aforementioned Figure 6 The present disclosure will not elaborate on step S601 in the technical solution shown.

[0066] In step S703 , based on the card control strategy, a shielding mask corresponding to the non-pinhole defect is obtained according to the coordinates and description information of all detected defects.

[0067] In this solution, based on the card control strategy set in the above step S701, this step can be considered as the above Figure 6 This is an exemplary implementation of step S602 in the technical solution shown. Specifically, the shielding mask is generated based on a control strategy, which uses the coordinates and description information of the defect as the basis for judgment. Taking a scratch defect as an exemplary non-pinhole defect, based on the control strategy corresponding to the scratch defect set in S701 above, in some examples, this step S703 may include:

[0068] Determine the number of consecutive defects and the spacing between adjacent defects based on the coordinates of all defects;

[0069] Determining the aspect ratio of the area occupied by the continuously occurring defects according to the size and number of the continuously occurring defects;

[0070] When the number of the continuously occurring defects is greater than the number threshold and the spacing between adjacent defects is less than the distance threshold, and the aspect ratio of the area occupied by the continuously occurring defects is greater than the aspect ratio threshold, a shielding mask corresponding to the scratch defect is formed based on the coordinates of the continuously occurring defects.

[0071] For the above example, after the defects on the wafer surface are detected based on the transmission optical detection method, the coordinates of each defect and the size as descriptive information can be obtained. In some examples, the size can be determined by the long axis and short axis lengths of the detected defect.

[0072] by Figure 4 Taking the scratch defect detected by the transmissive optical inspection method and enclosed by a solid circle as an example, the coordinates (X-axis and Y-axis coordinates) and size data (LONG and SHORT lengths) of some of the defects are shown in Table 1. In Table 1, each defect corresponds to an index.

[0073] Table 1

[0074]

[0075] In the above Table 1, although the order of the indexes is inconsistent with the order of arrangement, it can be determined based on the coordinates of these defects that the defects with indices from 1 to 13 are arranged continuously, that is, the number of defects that appear continuously is 13, which is greater than the number threshold of 10. Moreover, the coordinates of these defects can be used to determine that in the continuous arrangement, the spacing between adjacent defects is less than 8μm. In addition, based on the size and number of these continuously appearing defects, it can be confirmed that the aspect ratio of the area they occupy is greater than 5. According to the above judgment conclusion based on the card control strategy, it can be determined that the defects with indices from 1 to 13 are scratch defects. The present disclosure is based on the defects with indices from 1 to 13. Figure 4 The shielding mask shown in the box is formed in the mapping diagram shown in FIG. Figure 9 As shown in the box.

[0076] In step S704 , the coordinates of the defects covered by the shielding mask are removed from the coordinates of all detected defects to obtain the coordinates of the defects to be reviewed.

[0077] In this solution, this step can be considered as the aforementioned Figure 6 An exemplary implementation of step S603 in the technical solution shown in FIG. Figure 9After the shielding mask is used as an example, the coordinates of the defects covered by the shielding mask can be removed from the coordinates of all defects detected. The coordinates of the remaining defects after the removal can be considered as the coordinates of the defects after the scratch defects are removed, that is, the coordinates of the defects to be reviewed in step S704. After obtaining the coordinates of the defects to be reviewed, the review process can be carried out through the subsequent steps S705 and S706. That is, the subsequent steps S705 and S706 can be considered as the aforementioned Figure 6 An exemplary implementation of step S604 in the technical solution shown.

[0078] In step S705 , a topographic image of the defect to be reviewed is acquired according to the coordinates of the defect to be reviewed.

[0079] During the transmissive optical inspection process, the review process specifically involves the following steps: processing device 13 controls camera 14 to move to the position corresponding to the defect coordinates, and then controls camera 14 to take a picture to obtain a morphological image of the defect. In the present disclosure, after obtaining the coordinates of the defect to be reviewed based on the aforementioned steps, processing device 13 controls camera 14 to move to the position corresponding to each defect coordinate to be reviewed, and controls camera 14 to take a picture to obtain a morphological image of each defect to be reviewed.

[0080] In step S706 , it is determined whether the defect to be reviewed is a pinhole defect based on the topography image of the defect to be reviewed.

[0081] In the present disclosure, since scratch defects have been removed from the defects to be reviewed, there is no need to use a topographic image of the scratch defect to determine whether it is a pinhole defect, thereby reducing the time spent on pinhole defect detection during wafer production, avoiding waste of production capacity and improving the utilization rate of pinhole defect detection.

[0082] Based on the same inventive concept as the above technical solution, see Figure 10 , which shows a defect detection device 100 provided by the present disclosure, comprising: a detection part 1001, a generation part 1002, a removal part 1003 and a review part 1004; wherein,

[0083] The detection part 1001 is configured to detect defects on the wafer surface based on a transmission optical detection method;

[0084] The generating part 1002 is configured to generate a shielding mask according to defect feature data of non-pinhole defects among all detected defects;

[0085] The removing part 1003 is configured to remove the defects covered by the shielding mask from all the detected defects to obtain defects to be reviewed;

[0086] The review part 1004 is configured to review the defects to be reviewed and determine whether there is a pinhole defect among the defects to be reviewed.

[0087] For some examples, see Figure 11 , the defect detection device 100 further includes: a setting part 1005, configured to set a card control strategy based on the coordinates and description information of the defect according to the defect characteristics of the non-pinhole defect;

[0088] Accordingly, the generating portion 1002 is configured to:

[0089] Based on the card control strategy, shielding masks corresponding to non-pinhole defects are obtained according to the coordinates and description information of all detected defects.

[0090] In some examples, the setting portion 1005 is configured to:

[0091] The control strategy corresponding to the scratch defect is determined based on the morphological characteristics of the scratch defect; wherein the control strategy corresponding to the scratch defect includes: the number of defects that appear continuously is greater than a number threshold, the spacing between adjacent defects is less than a distance threshold, and the aspect ratio of the area occupied by the consecutive defects is greater than an aspect ratio threshold.

[0092] In some examples, the generating portion 1002 is configured to:

[0093] Determine the number of consecutive defects and the spacing between adjacent defects based on the coordinates of all defects;

[0094] Determine the aspect ratio of the area occupied by the consecutive defects according to the sizes of all defects and the number of the consecutive defects;

[0095] When the number of the continuously occurring defects is greater than the number threshold and the spacing between adjacent defects is less than the distance threshold, and the aspect ratio of the area occupied by the continuously occurring defects is greater than the aspect ratio threshold, a shielding mask corresponding to the scratch defect is formed based on the coordinates of the continuously occurring defects.

[0096] In some examples, the number threshold is 10, the distance threshold is 8.5 μm, and the aspect ratio threshold is 5.

[0097] In some examples, the removed portion 1003 is configured to:

[0098] The coordinates of the defects to be reviewed are obtained by removing the coordinates of the defects covered by the shielding mask from the coordinates of all the defects detected.

[0099] In some examples, the review portion 1004 is configured to:

[0100] Acquiring a topographic image of the defect to be reviewed according to the coordinates of the defect to be reviewed;

[0101] Determine whether the defect to be reviewed is a pinhole defect based on the topography image.

[0102] Please refer to Figure 12 , which shows a block diagram of a computing device provided by an exemplary embodiment of the present disclosure. In the present disclosure, the computing device 120 may be the aforementioned Figure 1 An example of a processing device 13 in the illustrated architecture. In some examples, the computing device 120 may be at least one of a smartphone, a smartwatch, a desktop computer, a laptop computer, a virtual reality terminal, an augmented reality terminal, a wireless terminal, and a portable laptop computer. The computing device 120 has a communication function and can access a wired network or a wireless network. The computing device 120 may generally refer to one of a plurality of terminals, and those skilled in the art will appreciate that the number of the aforementioned terminals may be more or less. In some examples, the computing device 120 may receive data based on the wired network or wireless network to which it is connected. It is understandable that the computing device 120 undertakes the calculation and processing work of the technical solution of the present disclosure, and the present disclosure does not limit this.

[0103] like Figure 12 As shown, the computing device in the present disclosure may include one or more of the following components: a processor 1210 and a memory 1220 .

[0104] Optionally, the processor 1210 utilizes various interfaces and circuits to connect various components within the computing device. It executes instructions, programs, code sets, or instruction sets stored in the memory 1220, as well as accesses data stored in the memory 1220, to perform various functions of the computing device and process data. Optionally, the processor 1210 can be implemented in at least one hardware form: a digital signal processing (DSP), a field-programmable gate array (FPGA), or a programmable logic array (PLA). The processor 1210 can integrate one or a combination of a central processing unit (CPU), a graphics processing unit (GPU), a neural network processing unit (NPU), and a baseband chip. The CPU primarily handles the operating system, user interface, and application programs; the GPU is responsible for rendering and drawing content displayed on the touchscreen; the NPU implements artificial intelligence (AI) functions; and the baseband chip handles wireless communications. It is understandable that the above-mentioned baseband chip may not be integrated into the processor 1210, but may be implemented by a separate chip.

[0105] Memory 1220 may include random access memory (RAM) or read-only memory (ROM). Optionally, memory 1220 includes non-transitory computer-readable storage medium. Memory 1220 may be used to store instructions, programs, code, code sets, or instruction sets. Memory 1220 may include a program storage area and a data storage area. The program storage area may store instructions for implementing an operating system, instructions for at least one function (such as a touch function, a sound playback function, an image playback function, etc.), and instructions for implementing each of the above method embodiments. The data storage area may store data created based on the use of the computing device.

[0106] In addition, those skilled in the art will understand that the structures of the computing devices shown in the above figures do not constitute limitations on the computing devices. The computing devices may include more or fewer components than shown, or may combine certain components or arrange the components differently. For example, the computing devices may also include a display screen, a camera assembly, a microphone, a speaker, a radio frequency circuit, an input unit, sensors (such as an accelerometer, an angular velocity sensor, a light sensor, etc.), an audio circuit, a WiFi module, a power supply, a Bluetooth module, and other components, which will not be described in detail here.

[0107] The present disclosure also provides a computer-readable storage medium storing at least one instruction, wherein the at least one instruction is configured to be executed by a processor to implement the defect detection method described in the above embodiments.

[0108] The present disclosure also provides a computer program product, which includes computer instructions stored in a computer-readable storage medium; a processor of a computing device reads the computer instructions from the computer-readable storage medium, and the processor executes the computer instructions, so that the computing device executes to implement the defect detection method described in each of the above embodiments.

[0109] Those skilled in the art will appreciate that in one or more of the above examples, the functions described in this disclosure can be implemented using hardware, software, firmware, or any combination thereof. When implemented using software, these functions can be stored in a computer-readable medium or transmitted as one or more instructions or codes on a computer-readable medium. Computer-readable media include computer storage media and communication media, wherein communication media include any media that facilitates the transmission of computer programs from one place to another. The storage medium can be any available medium that can be accessed by a general-purpose or special-purpose computer.

[0110] It should be noted that the technical solutions described in this disclosure can be combined arbitrarily without conflict.

[0111] The above description is merely a specific embodiment of the present invention, but the scope of protection of the present invention is not limited thereto. Any modifications or substitutions that can be easily conceived by a person skilled in the art within the technical scope disclosed in the present invention should be included in the scope of protection of the present invention. Therefore, the scope of protection of the present invention should be based on the scope of protection of the claims.

Claims

1. A defect detection method, characterized in that: The method comprises: Detect defects on the wafer surface based on transmissive optical inspection; Among all the defects detected, a shielding mask is generated according to the defect morphology feature data of the scratch defect; After removing the defects covered by the shielding mask from the coordinates of all detected defects, defects to be reviewed are obtained; Reviewing the defects to be reviewed to determine whether there are pinhole defects in the defects to be reviewed; The step of generating a shielding mask according to the defect morphology feature data of the scratch defect includes: Based on the card control strategy corresponding to the scratch defect, the defect characteristics of the scratch defect are obtained according to the coordinates and description information of all detected defects, and the shielding mask corresponding to the scratch defect is set according to the defect characteristics; wherein the card control strategy corresponding to the scratch defect includes: the number of continuously occurring defects determined according to the coordinates of all defects is greater than the number threshold, and the spacing between adjacent defects determined according to the coordinates of the defects is less than the distance threshold, and the aspect ratio of the area occupied by the continuously occurring defects determined according to the sizes of all defects and the number of continuously occurring defects is greater than the aspect ratio threshold; the shielding mask of the scratch defect is formed based on the coordinates of the continuously occurring defects.

2. The defect detection method according to claim 1, characterized in that: The method further comprises: According to the defect characteristics of the scratch defect, a card control strategy is set based on the coordinates and description information of the defect.

3. The defect detection method according to claim 1, characterized in that: The quantity threshold is 10, the distance threshold is 8.5 μm, and the aspect ratio threshold is 5.

4. The defect detection method according to claim 1, characterized in that: After removing the defects covered by the shielding mask from all the detected defects, defects to be reviewed are obtained, including: The coordinates of the defects to be reviewed are obtained by removing the coordinates of the defects covered by the shielding mask from the coordinates of all the defects detected.

5. The defect detection method according to claim 4, characterized in that: The step of reviewing the defects to be reviewed to determine whether there are pinhole defects in the defects to be reviewed includes: Acquiring a topographic image of the defect to be reviewed according to the coordinates of the defect to be reviewed; Determine whether the defect to be reviewed is a pinhole defect based on the topography image.

6. A defect detection device, characterized in that: The defect detection device includes: a detection part, a generation part, a removal part and a review part; wherein, The detection part is configured to detect defects on the wafer surface based on a transmission optical detection method; The generating part is configured to generate a shielding mask according to defect morphology feature data of scratch defects among all detected defects; The removing portion is configured to remove the defects covered by the shielding mask from the coordinates of all detected defects to obtain defects to be reviewed; The review part is configured to review the defects to be reviewed and determine whether there is a pinhole defect among the defects to be reviewed; Wherein, the generating part is configured to: Based on the card control strategy corresponding to the scratch defect, the defect characteristics of the scratch defect are obtained according to the coordinates and description information of all detected defects, and the shielding mask corresponding to the scratch defect is set according to the defect characteristics; wherein the card control strategy corresponding to the scratch defect includes: the number of continuously occurring defects determined according to the coordinates of all defects is greater than the number threshold, and the spacing between adjacent defects determined according to the coordinates of the defects is less than the distance threshold, and the aspect ratio of the area occupied by the continuously occurring defects determined according to the sizes of all defects and the number of continuously occurring defects is greater than the aspect ratio threshold; the shielding mask of the scratch defect is formed based on the coordinates of the continuously occurring defects.

7. A computing device, characterized in that The computing device includes: a processor and a memory; the processor is configured to execute instructions stored in the memory to implement the defect detection method according to any one of claims 1 to 5.

8. A computer storage medium, characterized in that The storage medium stores at least one instruction, and the at least one instruction is used to be executed by a processor to implement the defect detection method according to any one of claims 1 to 5.

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