Method and System for Detecting the Flatness of Wafer Surface Glue Based on the Number of Reflected Photons

Abstract

The present invention provides a method for detecting the flatness of wafer surface adhesive based on the number of reflected photons, comprising the following steps: the detector optical path is vertically calibrated; the detector scans a wafer standard sample point by point, captures the reflected photons at each point and counts the number, and obtains a judgment threshold parameter; the detector scans a wafer to be tested point by point, captures the reflected photons at each point and counts the number, and obtains a qualified judgment parameter; abnormal areas are judged and the number of abnormal areas is counted, and an abnormal area allowable value, a qualified tolerance and a qualified judgment algorithm are set for the wafer to be tested; based on the judgment threshold parameter, the qualified judgment parameter, the number of abnormal areas, the abnormal area allowable value, the qualified tolerance and the qualified judgment algorithm, it is judged whether the flatness of the wafer surface adhesive is qualified. The method solves the technical problem in the prior art that the detection accuracy cannot meet the detection standard and the obtained photos cannot be used to judge whether the photoresist on the wafer surface is flat due to the detection of the wafer surface adhesive flatness by taking pictures and image processing technology.

Description

Technical Field

[0001] The present invention relates to the field of chip detection technology, and in particular to a method and system for detecting wafer surface adhesive flatness based on the number of reflected photons. Background Art

[0002] With the advent of the information society, the development of the chip industry is closely linked to national development. During chip production, photoresist must be applied to the surface of the wafer. Due to the inherent properties of the colloid and the coating process, uneven photoresist coating is inevitable. This can include bubbles, missing colloids, and uneven colloid thickness, resulting in uneven photoresist on the wafer surface. To ensure the smooth progress of subsequent photolithography processes and avoid product failures caused by uneven wafer surface photoresist, photoresist flatness testing is necessary.

[0003] Currently, the method for detecting the flatness of photoresist on the wafer surface is to take a picture of the wafer surface and determine whether the thickness of the photoresist on the wafer surface is uniform based on image processing technology. However, this method can only detect the overall thickness of the photoresist on the wafer surface and cannot take into account the thickness of the photoresist at a specific point. As a result, the detection accuracy of the photoresist flatness on the wafer surface cannot meet the detection standard. At the same time, since the photography is affected by the light intensity of the working environment and the mirror reflection generated by the photoresist surface, the obtained photos cannot be used to determine whether the photoresist on the wafer surface is flat.

[0004] Therefore, the existing technology has defects and needs to be improved and developed. Summary of the Invention

[0005] The purpose of the embodiments of the present application is to provide a method and system for detecting the flatness of the wafer surface glue based on the number of reflected photons, which is used to solve the technical problems in the prior art that the photographic detection can only detect the overall thickness of the photoresist on the wafer surface, and cannot take into account the thickness of the photoresist at a certain point, resulting in the detection accuracy of the photoresist flatness on the wafer surface failing to meet the detection standard, and the photographic detection is affected by the light intensity of the working environment and the mirror reflection of the photoresist surface, resulting in the acquired photos being unable to be used to determine whether the photoresist on the wafer surface is flat.

[0006] To achieve the above objectives, the embodiments of the present application adopt the following technical solutions:

[0007] In a first aspect of an embodiment of the present application, a method for detecting wafer surface adhesive flatness based on the number of reflected photons is provided, the method comprising the following steps:

[0008] Perform vertical optical path calibration on the detector;

[0009] Controlling the detector to scan a wafer standard sample having the same photoresist process as the wafer to be tested point by point using a first device parameter, and capturing a first reflected photon at each point on the wafer standard sample, and obtaining a judgment threshold parameter based on the number of the first reflected photons at each point on the wafer standard sample;

[0010] Controlling the detector to scan the wafer to be tested point by point using the first device parameter, and capturing the second reflected photons at each point on the wafer to be tested, and obtaining a qualified judgment parameter based on the number of the second reflected photons at each point on the wafer to be tested;

[0011] Determining an abnormal area of the wafer to be tested according to the judgment threshold parameter and the number of the second reflected photons at each point of the wafer to be tested, and counting the number of the abnormal areas;

[0012] Setting an abnormal area allowable value, a qualified tolerance, and a qualified judgment algorithm for the wafer to be tested; wherein the abnormal area allowable value represents the maximum number of abnormal areas allowed to exist on the wafer to be tested;

[0013] Based on the judgment threshold parameter, the qualified judgment parameter, the number of abnormal areas, the abnormal area allowable value, the qualified allowable deviation and the qualified judgment algorithm, it is judged whether the surface glue flatness of the wafer to be tested is qualified.

[0014] In the wafer surface adhesive flatness detection method based on the number of reflected photons described in an embodiment of the present application, the optical path vertical calibration of the detector includes the following steps:

[0015] Controlling the detector to irradiate the calibration wafer, wherein the calibration wafer is placed on a carrier base, and the calibration wafer is a standard sample of any wafer coated with photoresist;

[0016] capturing the third reflected photons of the calibration wafer, obtaining a vertical calibration base number based on the number of the third reflected photons, and adjusting the installation angle of the detector so that the vertical calibration base number obtained by the detector at the current position is stabilized at a maximum value;

[0017] The relative positions of the detector and the object-carrying base in the horizontal direction are adjusted, and when the vertical calibration base obtained by the detector at multiple positions is stabilized at a maximum value, the vertical calibration of the optical path is completed.

[0018] In the wafer surface adhesive flatness detection method based on the number of reflected photons described in an embodiment of the present application, the first device parameters include the comparator threshold of the detector, the light intensity of the detection light source of the detector, the gain voltage of the photomultiplier tube of the detector, and the acquisition step size of the detector.

[0019] In the wafer surface adhesive flatness detection method based on the number of reflected photons described in an embodiment of the present application, the judgment threshold parameters include the maximum value of the first reflected photon number, the minimum value of the first reflected photon number, the average value of the first reflected photon number, and the standard deviation of the first reflected photon number; the qualified judgment parameters include the maximum value of the second reflected photon number, the minimum value of the second reflected photon number, the average value of the second reflected photon number, and the standard deviation of the second reflected photon number.

[0020] In the wafer surface adhesive flatness detection method based on the number of reflected photons described in the embodiment of the present application, the qualification judgment algorithm includes:

[0021] When the maximum value of the second reflected photon number is less than the maximum value of the first reflected photon number, the minimum value of the second reflected photon number is greater than the minimum value of the first reflected photon number, and the absolute value of the difference between the standard deviation of the second reflected photon number and the standard deviation of the first reflected photon number is less than the qualified tolerance, the surface glue flatness of the wafer to be tested is qualified; and

[0022] When the maximum value of the second number of reflected photons is greater than the maximum value of the first number of reflected photons or / and the minimum value of the second number of reflected photons is less than the minimum value of the first number of reflected photons, and when the absolute value of the difference between the standard deviation of the second number of reflected photons and the standard deviation of the first number of reflected photons is less than the qualified allowable deviation, the absolute value of the difference between the average value of the second number of reflected photons and the average value of the first number of reflected photons is less than the qualified allowable deviation, and the number of abnormal areas is less than the allowable value of abnormal areas, the surface glue flatness of the wafer to be tested is qualified.

[0023] Another aspect of the embodiments of the present application provides a wafer surface adhesive flatness detection system based on the number of reflected photons, comprising a carrier base, a detector, a pan / tilt table, a lateral movement device, and a host computer;

[0024] The carrier base is used to carry and rotate the wafer;

[0025] The lateral moving device is mounted above the wafer;

[0026] One end of the pan / tilt platform is connected to the lateral moving device, and the other end is connected to the detector, and the lateral moving device is used to drive the detector to move in a horizontal direction above the wafer;

[0027] The detector includes an optical path, a detection light source, a photomultiplier tube, an optical fiber head, a filter and a processing circuit;

[0028] The optical path includes a PMT incident optical fiber, a detection optical fiber, an optical fiber connector, and a trunk optical fiber, one end of the PMT incident optical fiber is connected to the first fiber core of the trunk optical fiber through the optical fiber connector, and the other end is connected to one end of the photomultiplier tube through the filter, one end of the detection optical fiber is connected to several second fiber cores of the trunk optical fiber through the optical fiber connector, and the other end is connected to the detection light source, the other end of each of the first fiber core and several second fiber cores is connected to the optical fiber head, and the other end of the photomultiplier tube is connected to the processing circuit, wherein the several second fiber cores are uniformly distributed on the outer periphery of the first fiber core with the central axis of the first fiber core as the center;

[0029] The processing circuit includes a PMT signal shaping and counting module, an LED driving module, a single-chip control module and a power supply module. The PMT signal shaping and counting module is electrically connected to the power supply module, the photomultiplier tube and the single-chip control module. The LED driving module is electrically connected to the power supply module, the detection light source and the single-chip control module. The single-chip control module is electrically connected to the photomultiplier tube, the host computer, the object carrier and the pan / tilt platform.

[0030] The host computer includes a memory, a processor, and a computer program stored in the memory and executable on the processor. When the processor executes the computer program, the host computer implements the above method.

[0031] In the wafer surface glue flatness detection system based on the number of reflected photons described in an embodiment of the present application, the detector also includes a tracking light source and a tracking optical fiber, one end of the tracking optical fiber is connected to the tracking light source, and the other end is connected to one end of several third fiber cores of the trunk optical fiber through the optical fiber connector, the other ends of several third fiber cores are connected to the optical fiber head, and the tracking light source is electrically connected to the LED driving module, wherein several third fiber cores are evenly distributed on the outer peripheral side of several second fiber cores with the central axis of the first fiber core as the center.

[0032] In the wafer surface adhesive flatness detection system based on the number of reflected photons described in the embodiment of the present application, the PMT signal shaping and counting module includes a pre-amplifier circuit, a main amplifier circuit and a shaping circuit;

[0033] The input end of the pre-amplifier circuit is electrically connected to the photomultiplier tube, and is used to convert the current signal output by the photomultiplier tube into a voltage signal and perform a primary amplification on the voltage signal;

[0034] The input end of the main amplifier circuit is electrically connected to the output end of the pre-amplifier circuit, and is used to perform secondary amplification on the voltage signal after the primary amplification;

[0035] The input and output ends of the shaping circuit are electrically connected to the output end of the main amplifier circuit and the single-chip control module respectively, and are used to shape the voltage signal after secondary amplification and convert it into a TTL signal and output it to the single-chip control module.

[0036] In the wafer surface glue flatness detection system based on the number of reflected photons described in an embodiment of the present application, the single-chip control module is also electrically connected to the shaping circuit through a first 16-bit dual-channel DAC chip, the single-chip control module is electrically connected to the photomultiplier tube through a 12-bit four-channel DAC chip, and the single-chip control module is electrically connected to the LED driver module through a second 16-bit dual-channel DAC chip.

[0037] In the wafer surface adhesive flatness detection system based on the number of reflected photons described in an embodiment of the present application, the power supply module includes a USB interface, a filter circuit, a switching power supply circuit, a first positive linear voltage regulator circuit, a first negative linear voltage regulator circuit, and a second linear voltage regulator circuit;

[0038] The input end of the USB interface is used to receive an external power supply, and the output end thereof is electrically connected to the input end of the filter circuit;

[0039] The input end of the switching power supply circuit is electrically connected to the output end of the filter circuit, and the output end thereof is electrically connected to the first positive linear voltage regulator circuit and the first negative linear voltage regulator circuit, and the first positive linear voltage regulator circuit and the first negative linear voltage regulator circuit are used to provide low-ripple positive and negative output voltages to the PMT signal shaping and counting module;

[0040] The input end of the second linear voltage stabilizing circuit is electrically connected to the output end of the USB interface, and the output end thereof is electrically connected to the PMT signal shaping and counting module, the LED driving module and the single chip control module.

[0041] Compared with the prior art, the embodiments of the present application have the following beneficial effects:

[0042] It can be seen from the above technical solution that the embodiment of the present application provides a method and system for detecting the flatness of the wafer surface glue based on the number of reflected photons, by vertically calibrating the optical path of the detection light of the detector to ensure that the optical path of the detection light source of the detector is perpendicular to the wafer surface, and by controlling the detector to perform point-by-point scanning and detection on the wafer standard sample with the same photoresist process as the wafer to be tested with the first device parameter, the threshold parameter for judging whether the flatness of the wafer surface glue is qualified is obtained, and while keeping the first device parameter unchanged, the qualified judgment parameter of the wafer to be tested is obtained by performing point-by-point scanning and detection on the wafer to be tested, and the qualified judgment parameter of the wafer to be tested is obtained according to the judgment threshold parameter and the second reflected photon of each point of the wafer to be tested. The method can judge the number of abnormal areas of the wafer to be tested, and count the number of abnormal areas. Based on the obtained judgment threshold parameters, qualified judgment parameters, the number of abnormal areas and the preset abnormal area allowable value, qualified allowable deviation and qualified judgment algorithm, it can judge whether the flatness of the wafer to be tested is qualified. This solves the technical problems in the prior art that the photographic detection can only detect the overall thickness of the photoresist on the wafer surface and cannot take into account the thickness of the photoresist at a certain point, resulting in the detection accuracy of the photoresist flatness on the wafer surface failing to meet the detection standard, and the photographic detection is affected by the light intensity of the working environment and the mirror reflection of the photoresist surface, resulting in the acquired photos being unable to be used to judge whether the photoresist on the wafer surface is flat. BRIEF DESCRIPTION OF THE DRAWINGS

[0043] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the following is a brief introduction to the drawings required for the description of the embodiments. The drawings are not intended to be drawn to scale, and for the sake of clarity, not every component will be labeled in each figure. The drawings described below are only some embodiments of the present application. For those skilled in the art, other drawings can be obtained based on these drawings without inventive work. Among them:

[0044] Figure 1 This is a flow chart of a method for detecting wafer surface adhesive flatness based on the number of reflected photons according to an embodiment of the present application.

[0045] Figure 2 This is a structural diagram of a wafer surface adhesive flatness detection system based on the number of reflected photons according to an embodiment of the present application.

[0046] Figure 3 This is an electrical connection diagram of a wafer surface adhesive flatness detection system based on the number of reflected photons according to an embodiment of the present application.

[0047] Figure 4 Schematic diagram of the structure of the detector in the embodiment of the present application.

[0048] Figure 5 This is a cross-sectional view of the trunk optical fiber in an embodiment of the present application.

[0049] Figure 6 This is a circuit diagram of the PMT signal shaping and counting module in an embodiment of the present application.

[0050] Figure 7 This is a circuit diagram of the power module in an embodiment of the present application.

[0051] Figure 8 This is a diagram of the first device parameter setting function interface on the host computer in an embodiment of the present application.

[0052] Figure 9 This is a diagram of the calibration function interface on the host computer in the embodiment of this application.

[0053] Figure 10 This is a diagram of the detection function interface on the host computer in the embodiment of this application.

[0054] Description of reference numerals:

[0055] 10-carrying base, 11-base, 12-vertical pole, 13-turntable, 14-storage slot, 20-detector, 21-optical path, 211-PMT incident optical fiber, 212-detection optical fiber, 213-tracking optical fiber, 214-optical fiber connector, 215-trunk optical fiber, 2151-first fiber core, 2152-second fiber core, 2153-third fiber core, 22-detection light source, 23-tracking light source, 24-optical fiber head, 25-filter, 26-processing circuit, 261-PMT signal shaping and counting module, 262-LED drive circuit, 263-single-chip microcomputer control module, 264-power supply module, 30-pan / tilt head, 40-lateral movement device, 50-host computer. DETAILED DESCRIPTION

[0056] The embodiments of the present application provide a method and system for detecting the flatness of the wafer surface glue based on the number of reflected photons, so as to solve the technical problems in the prior art that the photographic detection can only detect the overall thickness of the photoresist on the wafer surface and cannot take into account the thickness of the photoresist at a certain point, resulting in the detection accuracy of the photoresist flatness on the wafer surface failing to meet the detection standard, and the photographic detection is affected by the light intensity of the working environment and the mirror reflection of the photoresist surface, resulting in the acquired photos being unable to be used to determine whether the photoresist on the wafer surface is flat.

[0057] In view of this, the concept of the embodiment of the present application is to vertically calibrate the optical path of the detection light of the detector to ensure that the optical path of the detection light source of the detector is perpendicular to the wafer surface, and obtain the judgment threshold parameters for the qualified flatness of the wafer surface glue by performing point-by-point scanning and detection on the wafer standard sample with the same photoresist process as the wafer to be tested, and obtain the qualified judgment parameters of the wafer to be tested by performing point-by-point scanning and detection on the wafer to be tested while keeping the equipment parameters of the detector unchanged, and judge whether the flatness of the wafer to be tested is qualified based on the obtained judgment threshold parameters, qualified judgment parameters and the maximum value of the preset abnormal area, qualified allowable deviation and qualified judgment algorithm, thereby solving the technical problems in the prior art that the detection accuracy of the photoresist flatness of the wafer surface cannot meet the detection standard due to the fact that the photo detection is affected by the light intensity of the working environment and the mirror reflection of the photoresist surface, resulting in the acquired photos cannot be used to judge whether the photoresist on the wafer surface is flat.

[0058] The following will be combined with the drawings in the embodiments of the present application to clearly and completely describe the technical solutions in the embodiments of the present application. Obviously, the embodiments described are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without making creative efforts are within the scope of protection of this application.

[0059] In the description of the present application, it should be understood that the terms "center", "longitudinal", "lateral", "length", "width", "thickness", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inside", "outside", "clockwise", "counterclockwise" and the like indicate orientations or positional relationships based on the orientations or positional relationships shown in the accompanying drawings, and are only for the convenience of describing the present application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as limiting the present application. In addition, the terms "first" and "second" are used for descriptive purposes only and cannot be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Therefore, the features defined as "first" and "second" may explicitly or implicitly include one or more of the said features. In the description of the present application, "multiple" means two or more, unless otherwise clearly and specifically defined.

[0060] In the description of this application, it should be noted that, unless otherwise expressly specified or limited, the terms "installed," "connected," and "connected" should be understood in a broad sense. For example, they can refer to fixed connections, detachable connections, or integral connections; they can refer to mechanical connections, electrical connections, or mutual communication; they can refer to direct connections or indirect connections through an intermediate medium; they can refer to internal communication between two components or the interaction between two components. Those skilled in the art will understand the specific meanings of the above terms in this application based on specific circumstances.

[0061] In this application, unless otherwise expressly specified or limited, a first feature being "above" or "below" a second feature may include the first and second features being in direct contact, or may include the first and second features being in contact not directly but through another feature between them. Moreover, a first feature being "above," "above," and "above" a second feature may include the first feature being directly above or obliquely above the second feature, or may simply mean that the first feature is higher in level than the second feature. A first feature being "below," "below," and "below" a second feature may include the first feature being directly below or obliquely below the second feature, or may simply mean that the first feature is lower in level than the second feature.

[0062] The disclosure below provides many different embodiments or examples for realizing different structures of the present application. In order to simplify the disclosure of the present application, the components and settings of specific examples are described below. Of course, they are merely examples and are not intended to limit the present application. In addition, the present application may repeat reference numbers and / or reference letters in different examples, and such repetition is for the purpose of simplicity and clarity, and does not itself indicate the relationship between the various embodiments and / or settings discussed. In addition, the present application provides examples of various specific processes and materials, but those of ordinary skill in the art will appreciate the application of other processes and / or the use of other materials.

[0063] The embodiment of the present application provides a method for detecting the flatness of wafer surface adhesive based on the number of reflected photons, such as Figure 1 、 Figures 8-10 As shown, a method for detecting wafer surface adhesive flatness based on the number of reflected photons includes the following steps:

[0064] Step S100: perform vertical optical path calibration on the detector.

[0065] In some embodiments, the optical path vertical calibration of the detector includes the following steps:

[0066] Step S101: controlling the detector to irradiate the calibration wafer.

[0067] The calibration wafer is placed on a carrier base, and the calibration wafer is a standard sample of any wafer coated with photoresist.

[0068] Step S102: Capture the third reflected photon of the calibration wafer, obtain a vertical calibration base based on the number of the third reflected photons, and adjust the installation angle of the detector so that the vertical calibration base obtained by the detector at the current position is stabilized at a maximum value.

[0069] Among them, the third reflected photon is a photon reflected from a certain point on the calibration wafer and is captured by the detector. The vertical calibration base is proportional to the number of the third reflected photons. The vertical calibration base at the current position is stable at the maximum value, indicating that the detection light emitted by the detector at the current position is perpendicular to a certain point on the calibration wafer.

[0070] Step S103: adjusting the relative positions of the detector and the object-carrying base in the horizontal direction, and completing the optical path vertical calibration when the vertical calibration base obtained by the detector at multiple positions stabilizes at a maximum value.

[0071] Among them, when the vertical calibration base obtained by the detector at multiple positions is stable at the maximum value, according to the principle of multiple points determining a plane, at this time, the detection light emitted by the detector is perpendicular to the calibration wafer as a whole, that is, it is equivalent to being perpendicular to the loading plane of the loading base.

[0072] Step S200: Control the detector to scan a wafer standard sample having the same photoresist process as the wafer to be tested point by point with a first device parameter, and capture the first reflected photon of each point on the wafer standard sample, and obtain a judgment threshold parameter based on the number of the first reflected photons at each point on the wafer standard sample.

[0073] The first reflected photon is a photon reflected from a certain point on the standard wafer, and the process of obtaining the judgment threshold parameter is calibration.

[0074] In some embodiments, the first device parameters include a comparator threshold of the detector, a light intensity of a detection light source of the detector, a gain voltage of a photomultiplier tube of the detector, and an acquisition step size of the detector.

[0075] By setting the comparator threshold of the detector, a relatively stable signal shaping effect can be obtained, and by setting the gain voltage of the photomultiplier tube of the detector, a relatively stable current pulse can be obtained.

[0076] In some embodiments, the judgment threshold parameters include a maximum value of the first reflected photon number, a minimum value of the first reflected photon number, an average value of the first reflected photon number, and a standard deviation of the first reflected photon number.

[0077] Step S300: Control the detector to scan the wafer to be tested point by point with the first equipment parameters, and capture the second reflected photons at each point on the wafer to be tested, and obtain the qualified judgment parameter based on the number of the second reflected photons at each point on the wafer to be tested.

[0078] Among them, the second reflected photon is a photon reflected from a certain point on the wafer to be tested, and the process of obtaining the qualified judgment parameter is detection. By keeping the first device parameters unchanged, that is, keeping the comparator threshold of the detector unchanged, keeping the light intensity of the detection light source of the detector unchanged, keeping the gain voltage of the photomultiplier tube of the detector unchanged, and keeping the acquisition step length of the detector unchanged, the external parameters of the detection process and the calibration process are guaranteed to remain unchanged, thereby increasing the accuracy and reliability of the wafer surface glue flatness detection.

[0079] In some embodiments, the qualification judgment parameters include a maximum value of the second reflected photon number, a minimum value of the second reflected photon number, an average value of the second reflected photon number, and a standard deviation of the second reflected photon number.

[0080] Step S400: determining abnormal areas of the wafer to be tested according to the judgment threshold parameter and the number of the second reflected photons at each point of the wafer to be tested, and counting the number of the abnormal areas.

[0081] Among them, the abnormal area refers to when the number of the second reflected photons at consecutive points of the wafer to be tested is continuously greater than the maximum number of the first reflected photons or the number of the second reflected photons at consecutive points of the wafer to be tested is continuously less than the minimum number of the first reflected photons, it is determined to be an abnormal area.

[0082] Step S500: setting the abnormal area allowable value, qualified tolerance and qualified judgment algorithm of the wafer to be tested.

[0083] Among them, the abnormal area allowable value and the qualified allowable deviation are fixed constants. The abnormal area allowable value refers to the maximum number of abnormal areas allowed to exist on the wafer to be tested. If the abnormal area allowable value is 10, the number of abnormal areas existing on the wafer to be tested cannot be greater than 10.

[0084] Step S600: Based on the judgment threshold parameter, the qualified judgment parameter, the number of abnormal areas, the abnormal area allowable value, the qualified allowable deviation and the qualified judgment algorithm, determine whether the surface glue flatness of the wafer to be tested is qualified.

[0085] In some embodiments, the qualification determination algorithm includes:

[0086] Article 1: When the maximum value of the second reflected photon number is less than the maximum value of the first reflected photon number, the minimum value of the second reflected photon number is greater than the minimum value of the first reflected photon number, and the absolute value of the difference between the standard deviation of the second reflected photon number and the standard deviation of the first reflected photon number is less than the qualified tolerance, the surface adhesive flatness of the wafer to be tested is qualified;

[0087] and

[0088] Article 2: When the maximum value of the second number of reflected photons is greater than the maximum value of the first number of reflected photons or / and the minimum value of the second number of reflected photons is less than the minimum value of the first number of reflected photons, and when the absolute value of the difference between the standard deviation of the second number of reflected photons and the standard deviation of the first number of reflected photons is less than the qualified allowable deviation, the absolute value of the difference between the average value of the second number of reflected photons and the average value of the first number of reflected photons is less than the qualified allowable deviation, and the number of abnormal areas is less than the allowable value of abnormal areas, the surface glue flatness of the wafer to be tested is qualified.

[0089] Among them, as long as one of the two qualified judgment algorithms mentioned above is met, the film flatness of the surface of the wafer to be tested is qualified.

[0090] The above embodiment provides a wafer surface glue flatness detection method based on the number of reflected photons, which ensures that the optical path of the detection light source of the detector is perpendicular to the wafer surface by vertically calibrating the optical path of the detection light of the detector, and controls the detector to perform point-by-point scanning and detection on a wafer standard sample having the same photoresist process as the wafer to be tested with a first device parameter, and obtains a threshold parameter for judging whether the wafer surface glue flatness is qualified. While keeping the first device parameter unchanged, the wafer to be tested is scanned point by point to obtain a qualified judgment parameter for the wafer to be tested, and the qualification of the wafer to be tested is judged according to the judgment threshold parameter and the number of second reflected photons at each point of the wafer to be tested. Abnormal areas, and counting the number of abnormal areas, based on the obtained judgment threshold parameters, qualified judgment parameters, the number of abnormal areas and the preset abnormal area allowable value, qualified allowable deviation and qualified judgment algorithm, judge whether the flatness of the wafer to be tested is qualified, which solves the technical problems in the existing technology that the photographic detection can only detect the overall thickness of the photoresist on the wafer surface, and cannot take into account the thickness of the photoresist at a certain point, resulting in the detection accuracy of the photoresist flatness on the wafer surface failing to meet the detection standard, and the photographic detection is affected by the light intensity of the working environment and the mirror reflection of the photoresist surface, resulting in the acquired photos being unable to be used to judge whether the photoresist on the wafer surface is flat.

[0091] On the other hand, Figure 2-Figure 7 As shown, an embodiment of the present application also provides a wafer surface adhesive flatness detection system based on the number of reflected photons, including a carrier base 10, a detector 20, a pan-tilt platform 30, a lateral movement device 40 and a host computer 50.

[0092] The carrier base 10 is used to carry and rotate the wafer;

[0093] Specifically, the loading base 10 includes a base 11, a vertical rod 12, a turntable 13, a driving device, and a storage slot 14. The vertical rod 12 is vertically connected to one side of the base 11. The driving device is arranged inside the base 11 and is transmission-connected to the turntable 13 for driving the turntable 13 to rotate. The turntable 13 is located at the end of the base 11 facing the detector 20. The storage slot 14 is opened at the end of the turntable 13 facing the detector 20, and its size is adapted to the size of the wafer.

[0094] The driving device may directly drive the turntable 13 to rotate through a driving motor, or drive the turntable 13 to rotate through a driving motor and a gear rack, or drive the turntable 13 to rotate through a driving motor and a coupling.

[0095] The lateral moving device 40 is mounted above the wafer.

[0096] Specifically, the lateral moving device 40 is connected to an end of the vertical rod 12 away from the base 11 and is laterally arranged above the wafer.

[0097] The lateral moving device 40 can be a single-track ball screw slide module purchased on the market, or a telescopic cylinder. The lateral moving device 40 is used to adjust the relative position of the detector 20 and the loading base 10 in the horizontal direction.

[0098] One end of the platform 30 is connected to the lateral moving device 40 , and the other end of the platform 30 is connected to the detector 20 . The lateral moving device 40 is used to drive the detector 20 to move in a horizontal direction above the wafer.

[0099] The pan-tilt platform 30 may be a dual-axis pan-tilt platform available on the market, and is used to adjust the installation angle of the detector 20 .

[0100] The detector 20 includes an optical path 21, a detection light source 22, a tracking light source 23, a photomultiplier tube PMT, an optical fiber head 24, a filter 25 and a processing circuit 26. The optical path 21 includes a PMT incident optical fiber 211, a detection optical fiber 212, a tracking optical fiber 213, an optical fiber connector 214 and a trunk optical fiber 215. One end of the PMT incident optical fiber 211 is connected to the first fiber core 2151 of the trunk optical fiber 215 through the optical fiber connector 214, and the other end is connected to one end of the photomultiplier tube PMT through the filter 25. One end is connected to the several second fiber cores 2152 of the trunk optical fiber 215 through the optical fiber connector 214, and the other end is connected to the detection light source 22. One end of the tracking optical fiber 213 is connected to one end of the several third fiber cores 2153 of the trunk optical fiber 215 through the optical fiber connector 214, and the other end is connected to the tracking light source 23. The other end of each of the first fiber core 2151, the several second fiber cores 2152 and the several third fiber cores 2153 is connected to the optical fiber head 24, and the other end of the photomultiplier tube PMT is connected to the processing circuit.

[0101] Among them, a plurality of second fiber cores 2152 are evenly distributed on the outer periphery of the first fiber core 2151 with the central axis of the first fiber core 2151 as the center, and a plurality of third fiber cores 2153 are evenly distributed on the outer periphery of the plurality of second fiber cores 2152 with the central axis of the first fiber core 2151 as the center. Specifically, in this embodiment, the number of the first fiber core 2151 is 1, the number of the second fiber cores 2152 is 6, and the number of the third fiber cores 2153 is 3. The first fiber core 2151 is located in the middle, and the 6 second fiber cores 2152 are evenly surrounded by the first fiber core The outer peripheral side of 2151 is hexagonal as a whole, and the three third fiber cores 2153 are evenly surrounded by the outer peripheral side of the six second fiber cores 2152. The overall interface of the first fiber core 2151, the second fiber core 2152, and the third fiber core 2153 is triangular. The first fiber core 2151, the second fiber core 2152, and the third fiber core 2153 are all wrapped in the trunk optical fiber 215. The detection light source 22 is a 365nm or 375nm ultraviolet DC LED light source. The detection light emitted by the detection light source 22 passes through the detection optical fiber 212 and the second fiber core 2152 vertically. Directly irradiate the wafer, the tracking light source 23 transmits the tracking light through the tracking optical fiber 213 and the third fiber core 2153 to observe the current detection position of the wafer in real time. The tracking light source 23 is a 650nm red laser source. The first fiber core 2151 and the PMT incident optical fiber transmit the captured reflected photons to the photomultiplier tube PMT. The photomultiplier tube PMT generates a current pulse. The number of current pulses is proportional to the number of reflected photons of the wafer. The photomultiplier tube PMT outputs the current pulse to the processing circuit 26. The current pulse is obtained after the processing circuit 26 and shaped. , amplified pulse voltage signal, and converted into a TTL signal output to the single-chip control module 263 for counting, so as to obtain the number of reflected photons of the wafer. In this embodiment, the optical fiber connector 214 is a three-in-one optical fiber connector, which is made of metal. The optical fiber head 24 is a standard 6.5nm optical fiber head, which is made of metal. The filter 25 is an 8mm*8mm square structure with a thickness of 1mm. Its central wavelength is 365±5nm, the half bandwidth is 20nm, the peak transmittance is greater than 90%, the spectral test range is 200-1000nm, and it is mirror glass.

[0102] The processing circuit 26 includes a PMT signal shaping and counting module 261, an LED driving module 262, a single-chip control module 263 and a power supply module 264. The PMT signal shaping and counting module 261 is electrically connected to the power supply module 264, the photomultiplier tube PMT and the single-chip control module 263. The LED driving module 262 is electrically connected to the power supply module 264, the detection light source 22, the tracking light source 23 and the single-chip control module 263. The single-chip control module 263 is electrically connected to the photomultiplier tube PMT, the host computer 50, the carrier base 10, the pan-tilt platform 30 and the lateral movement device 40. The host computer 50 includes a memory, a processor and a computer program stored in the memory and capable of running on the processor. When the processor executes the computer program, the host computer implements the wafer surface glue flatness detection method based on the number of reflected photons described in the above embodiment.

[0103] Among them, the single-chip control module 263 is electrically connected to the host computer 50 through a communication module integrated with a high-speed communication chip, and can efficiently transmit data to the host computer 50, and the host computer 50 can efficiently adjust parameters and perform process control. The single-chip control module 263 is used for high-speed processing and storage of data by integrating a high-speed cache chip, meeting the system's needs for large-scale data processing, ensuring the smoothness of operation and the timeliness of data. The single-chip control module 263 stores the configuration information and parameters required by the system through a parameter module integrated with a storage chip, ensuring that key configuration information and parameters will not be lost in the event of a power outage, ensuring that the configuration information and parameters are The single chip control module 263 is electrically connected to the carrier base 10, specifically to the drive device, so as to control the rotation speed and rotation angle of the turntable 13. The memory is preferably but not limited to a high-speed random access memory. The processor can be a CPU. The staff can control the detector 20, the drive device, the pan-tilt head 30 and the lateral movement device 40 through the computer program stored in the memory for operating the detection system to realize the wafer surface glue flatness detection method based on the number of reflected photons described in the above embodiment. The drive device, the pan-tilt head 30 and the lateral movement device 40 are powered by another power supply.

[0104] In some embodiments, the PMT signal shaping and counting module 261 includes a pre-stage amplifier circuit, a main amplifier circuit, and a shaping circuit. The input end of the pre-stage amplifier circuit is electrically connected to the photomultiplier tube PMT, and is used to convert the current signal output by the photomultiplier tube PMT into a voltage signal and perform a primary amplification on the voltage signal. The input end of the main amplifier circuit is electrically connected to the output end of the pre-stage amplifier circuit, and is used to perform a secondary amplification on the voltage signal that has undergone the primary amplification. The input end and output end of the shaping circuit are electrically connected to the output end of the main amplifier circuit and the single-chip control module 263, respectively, and are used to shape the voltage signal that has undergone the secondary amplification, and convert it into a TTL signal and output it to the single-chip control module.

[0105] In this embodiment, the pre-stage amplifier circuit includes a transimpedance amplifier U1, resistors R1, R2, R3, R4 and R5, capacitors C1, C2, C3, C4 and C5, the transimpedance amplifier U1 is of model OPA657, the IN- pin of the transimpedance amplifier U1 is connected to the photomultiplier tube PMT through the resistor R1, the IN+ pin of the transimpedance amplifier U1 is grounded, the V- pin of the transimpedance amplifier U1 is connected to the capacitor C1, the capacitor C2 and one end of the resistor R2, the other end of the capacitor C1 and the capacitor C2 is connected to the V- pin of the transimpedance amplifier U1. The other end of the resistor R2 is connected to the power module 264, the V+ pin of the transimpedance amplifier U1 is connected to the capacitor C3, the capacitor C4 and one end of the resistor R3, the other ends of the capacitor C3 and the capacitor C4 are grounded, the other end of the resistor R3 is connected to the power module 264, the OUT pin of the transimpedance amplifier U1 is connected to the resistor R4, the resistor R5 and one end of the capacitor C5, the other end of the resistor R4 is connected to the main amplifier circuit, and the other ends of the resistor R5 and the capacitor C5 are connected to the IN- pin of the transimpedance amplifier U1. The main amplifier circuit includes an operational amplifier U2, resistors R6, R7, R8, R9 and R10, capacitors C6, C7, C8, C9 and C10, the model of the operational amplifier U2 is AD8065, the IN+ pin of the operational amplifier U2 is connected to the resistor R4 of the pre-amplifier circuit through the resistor R6, the V- pin of the operational amplifier U2 is connected to the capacitor C6, the capacitor C7 and one end of the resistor R7, the other end of the capacitor C6 and the capacitor C7 is grounded, and the other end of the resistor R7 is connected to the power module 264 , the V+ pin of the operational amplifier U2 is connected to one end of the capacitor C8, the capacitor C9 and the resistor R8, the other ends of the capacitor C8 and the capacitor C9 are grounded, the other end of the resistor R8 is connected to the power supply module 264, the OUT pin of the operational amplifier U2 is connected to one end of the capacitor C10 and the resistor R9, the other ends of the capacitor C10 and the resistor R9 are connected to the IN- pin of the operational amplifier U2, the IN- pin of the operational amplifier U2 is also grounded through the resistor R10, and the OUT pin of the operational amplifier U2 is also connected to the shaping circuit;The shaping circuit includes a high-speed comparator U3, resistors R11, R12, R13, R14, R15 and R16, capacitors C11, C12, C13, C14, C15 and C16, and a potentiometer R17. The IN- pin of the high-speed comparator U3 is connected to one end of the resistor R16 and the active end of the potentiometer R17, the other end of the capacitor C16 is grounded, and the other end of the resistor R16 is connected to the single-chip microcomputer control module 263 to receive the comparator threshold adjustment signal of the single-chip microcomputer control module 263. One fixed end of the potentiometer R17 is grounded, and the other fixed end is connected to the resistor R15 and one end of the capacitor C15. The other end of the resistor R15 is connected to the power supply module 264, and the other end of the capacitor C15 is grounded. The IN+ pin of the high-speed comparator U3 is connected to the OUT pin of the operational amplifier U2 through the resistor R11. The V- pin of the high-speed comparator U3 is connected to one end of capacitors C11, C12, and resistor R12. The other ends of capacitors C11 and C12 are grounded, and the other end of resistor R12 is connected to the power module 264. The V+ pin of the high-speed comparator U3 is connected to one end of capacitors C13, C14, and resistor R14. The other ends of capacitors C13 and C14 are grounded, and the other end of resistor R14 is connected to the power module 264. The high-speed comparator U3 is connected to the serial port via resistors R13 and R18 connected in series. The serial port is connected to the single-chip microcomputer control module 263 to output a TTL signal to the single-chip microcomputer control module 263. Through the above configuration, the PMT signal shaping and counting module optimizes the high-bandwidth pulse signal (above 200 MHz) transmitted by the photomultiplier tube (PMT).

[0106] In some embodiments, the single-chip control module 263 is also electrically connected to the shaping circuit through a first 16-bit dual-channel DAC chip, the single-chip control module 263 is electrically connected to the photomultiplier tube PMT through a 12-bit four-channel DAC chip, and the single-chip control module 263 is electrically connected to the LED driving module 262 through a second 16-bit dual-channel DAC chip.

[0107] Among them, the single-chip control module 263 is electrically connected to the high-speed comparator U3 in the shaping circuit through a first 16-bit dual-channel DAC chip to provide a fine electrical signal to the high-speed comparator U3. The single-chip control module 263 is electrically connected to the photomultiplier tube PMT through a 12-bit four-channel DAC chip to finely adjust the gain voltage of the photomultiplier tube PMT. The single-chip control module 263 is electrically connected to the LED driver module 262 through a second 16-bit dual-channel DAC chip to provide a fine laser voltage to the LED driver module 262, so as to more accurately control the detection light source 22.

[0108] In some embodiments, the power supply module 264 includes a USB interface, a filter circuit, a switching power supply circuit, a first positive linear voltage regulator circuit, a first negative linear voltage regulator circuit and a second linear voltage regulator circuit. The input end of the USB interface is used to receive an external power supply, and its output end is electrically connected to the input end of the filter circuit. The input end of the switching power supply circuit is electrically connected to the output end of the filter circuit, and its output end is electrically connected to the first positive linear voltage regulator circuit and the first negative linear voltage regulator circuit. The first positive linear voltage regulator circuit and the first negative linear voltage regulator circuit are used to provide low ripple positive and negative output voltages to the PMT signal shaping and counting module 261. The input end of the second linear voltage regulator circuit is electrically connected to the output end of the USB interface, and its output end is electrically connected to the PMT signal shaping and counting module 261, the LED driver module 262 and the single-chip microcomputer control module 263.

[0109] In this embodiment, the USB interface receives a 5V input voltage from the outside world, providing a stable power supply for the system. The switching power supply circuit is used to convert the 5V input voltage into a ±5.5V output voltage, providing sufficient power and an appropriate voltage range for subsequent circuits. The switching power supply circuit is based on the ADP5071ACPZ switching power supply chip. The first positive linear voltage regulator circuit is used to convert the +5.5V output voltage output by the switching power supply circuit into a low-ripple +5V output voltage. The first positive linear voltage regulator circuit is based on the TPS7A4901 linear voltage regulator chip. Its output end is connected to the resistors R3, R8 and R15. The other end of the first negative linear voltage regulator circuit is connected, and the first negative linear voltage regulator circuit is used to convert the -5.5V output voltage output by the switching power supply circuit into a low ripple -5V output voltage. The first negative linear voltage regulator circuit is a circuit based on the TPS7A3001 linear voltage regulator chip, and its output end is connected to the other end of the resistors R2, R7 and R12. The second linear voltage regulator circuit is a circuit based on the SOT-23 linear voltage regulator chip, and its output end is electrically connected to the resistor R14, the LED driver module 262 and the single-chip control module 263, and is used to provide a +3.3V input voltage to the resistor R14, the LED driver module 262 and the single-chip control module 263.

[0110] The wafer surface glue flatness detection system based on the number of reflected photons provided in the above embodiment supports and rotates the wafer through a carrier base, drives the detector to move through a lateral movement device, and adjusts the installation angle of the detector in combination with a pan / tilt stage. The detection light is emitted by a detection light source and transmitted through a detection optical fiber, a trunk optical fiber, and an optical fiber head to illuminate the wafer surface point by point. The optical fiber head, trunk optical fiber, PMT incident optical fiber, and filter are used to transmit the captured reflected photons at each point on the wafer, and the photomultiplier tube and processing circuit are used to efficiently and accurately count the captured reflected photons at each point on the wafer. Finally, the data is sent to a host computer for analysis and the analysis results are output. By performing point-by-point detection on the wafer, the technical problems in the prior art that the detection accuracy of the photoresist flatness on the wafer surface cannot meet the detection standard due to the fact that the photo detection is affected by the light intensity of the working environment and the mirror reflection of the photoresist surface, resulting in the acquired photos being unable to be used to determine whether the photoresist on the wafer surface is flat are solved.

[0111] The above is a detailed introduction to the wafer surface glue flatness detection method and system based on the number of reflected photons provided in the embodiments of the present application. Specific examples are used in this article to illustrate the principles and implementation methods of the present application. The description of the above embodiments is only used to help understand the technical solutions and core ideas of the present application; ordinary technicians in this field should understand that they can still modify the technical solutions recorded in the aforementioned embodiments, or make equivalent replacements for some of the technical features therein; and these modifications or replacements do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of the present application.

Claims

1. A method for detecting wafer surface adhesive flatness based on the number of reflected photons, characterized in that: The method comprises the following steps: Performing vertical optical path calibration on the detector to ensure that the optical path of the detection light source of the detector is perpendicular to the wafer placement plane; Controlling the detector to scan a wafer standard sample having the same photoresist process as the wafer to be tested point by point using a first device parameter, and capturing a first reflected photon at each point on the wafer standard sample, and obtaining a judgment threshold parameter based on the number of the first reflected photons at each point on the wafer standard sample, wherein the judgment threshold parameter includes a maximum value of the first reflected photon number, a minimum value of the first reflected photon number, an average value of the first reflected photon number, and a standard deviation of the first reflected photon number; Controlling the detector to scan the wafer to be tested point by point using the first device parameter, and capturing the second reflected photons at each point on the wafer to be tested, and obtaining a qualified judgment parameter based on the number of the second reflected photons at each point on the wafer to be tested, wherein the qualified judgment parameter includes a maximum number of the second reflected photons, a minimum number of the second reflected photons, an average number of the second reflected photons, and a standard deviation of the second reflected photons; Determining an abnormal area of the wafer to be tested according to the judgment threshold parameter and the number of the second reflected photons at each point of the wafer to be tested, and counting the number of the abnormal areas; Setting an abnormal area allowable value, a qualified tolerance, and a qualified judgment algorithm for the wafer to be tested; wherein the abnormal area allowable value represents the maximum number of abnormal areas allowed to exist on the wafer to be tested; Based on the judgment threshold parameter, the qualified judgment parameter, the number of abnormal areas, the abnormal area allowable value, the qualified allowable deviation and the qualified judgment algorithm, it is judged whether the surface glue flatness of the wafer to be tested is qualified, wherein the qualified judgment algorithm includes: When the maximum value of the second reflected photon number is less than the maximum value of the first reflected photon number, the minimum value of the second reflected photon number is greater than the minimum value of the first reflected photon number, and the absolute value of the difference between the standard deviation of the second reflected photon number and the standard deviation of the first reflected photon number is less than the qualified tolerance, the surface glue flatness of the wafer to be tested is qualified; and When the maximum value of the second number of reflected photons is greater than the maximum value of the first number of reflected photons or / and the minimum value of the second number of reflected photons is less than the minimum value of the first number of reflected photons, and when the absolute value of the difference between the standard deviation of the second number of reflected photons and the standard deviation of the first number of reflected photons is less than the qualified allowable deviation, the absolute value of the difference between the average value of the second number of reflected photons and the average value of the first number of reflected photons is less than the qualified allowable deviation, and the number of abnormal areas is less than the allowable value of abnormal areas, the surface glue flatness of the wafer to be tested is qualified.

2. The wafer surface adhesive flatness detection method based on the number of reflected photons according to claim 1, characterized in that: The optical path vertical calibration of the detector comprises the following steps: Controlling the detector to irradiate the calibration wafer, wherein the calibration wafer is placed on a carrier base, and the calibration wafer is a standard sample of any wafer coated with photoresist; capturing the third reflected photons of the calibration wafer, obtaining a vertical calibration base number based on the number of the third reflected photons, and adjusting the installation angle of the detector so that the vertical calibration base number obtained by the detector at the current position is stabilized at a maximum value; The relative positions of the detector and the object-carrying base in the horizontal direction are adjusted, and when the vertical calibration base obtained by the detector at multiple positions is stabilized at a maximum value, the vertical calibration of the optical path is completed.

3. The wafer surface adhesive flatness detection method based on the number of reflected photons according to claim 1, characterized in that: The first device parameters include a comparator threshold of the detector, a light intensity of a detection light source of the detector, a gain voltage of a photomultiplier tube of the detector, and an acquisition step length of the detector.

4. A wafer surface adhesive flatness detection system based on the number of reflected photons, characterized in that: It includes a loading base, a detector, a pan / tilt platform, a lateral moving device and a host computer; The carrier base is used to carry and rotate the wafer; The lateral moving device is mounted above the wafer; One end of the pan / tilt platform is connected to the lateral moving device, and the other end is connected to the detector, and the lateral moving device is used to drive the detector to move in a horizontal direction above the wafer; The detector includes an optical path, a detection light source, a photomultiplier tube, an optical fiber head, a filter and a processing circuit; The optical path includes a PMT incident optical fiber, a detection optical fiber, a tracking optical fiber, a tracking light source, an optical fiber connector and a trunk optical fiber. One end of the PMT incident optical fiber is connected to the first fiber core of the trunk optical fiber through the optical fiber connector, and the other end is connected to one end of the photomultiplier tube through the filter. One end of the detection optical fiber is connected to several second fiber cores of the trunk optical fiber through the optical fiber connector, and the other end is connected to the detection light source. The other end of each of the first fiber core and several second fiber cores is connected to the optical fiber head. The other end of the photomultiplier tube is connected to the processing circuit. One end of the optical fiber is connected to the tracking light source, and the other end is connected to one end of several third fiber cores of the trunk optical fiber through the optical fiber connector, and the other ends of several third fiber cores are connected to the optical fiber head, wherein several second fiber cores are evenly distributed on the outer periphery of the first fiber core with the central axis of the first fiber core as the center, and several third fiber cores are evenly distributed on the outer periphery of several second fiber cores with the central axis of the first fiber core as the center, the detection light source is a 365nm or 375nm ultraviolet DC LED light source, the central wavelength of the filter is 365±5nm, the half bandwidth is 20nm, and it is made of mirror glass; The processing circuit includes a PMT signal shaping and counting module, an LED driving module, a single-chip control module and a power supply module. The PMT signal shaping and counting module is electrically connected to the power supply module, the photomultiplier tube and the single-chip control module. The LED driving module is electrically connected to the power supply module, the detection light source, the tracking light source and the single-chip control module. The single-chip control module is electrically connected to the photomultiplier tube, the host computer, the object carrier and the pan / tilt platform. The host computer includes a memory, a processor, and a computer program stored in the memory and executable on the processor. When the processor executes the computer program, the host computer implements the method according to any one of claims 1 to 3.

5. The wafer surface adhesive flatness detection system based on the number of reflected photons as claimed in claim 4, characterized in that: The PMT signal shaping and counting module includes a pre-stage amplifier circuit, a main amplifier circuit and a shaping circuit; The input end of the pre-amplifier circuit is electrically connected to the photomultiplier tube, and is used to convert the current signal output by the photomultiplier tube into a voltage signal and perform a primary amplification on the voltage signal; The input end of the main amplifier circuit is electrically connected to the output end of the pre-amplifier circuit, and is used to perform secondary amplification on the voltage signal after the primary amplification; The input and output ends of the shaping circuit are electrically connected to the output end of the main amplifier circuit and the single-chip control module respectively, and are used to shape the voltage signal after secondary amplification and convert it into a TTL signal and output it to the single-chip control module.

6. The wafer surface adhesive flatness detection system based on the number of reflected photons according to claim 5, characterized in that: The single-chip control module is also electrically connected to the shaping circuit through a first 16-bit dual-channel DAC chip, the single-chip control module is electrically connected to the photomultiplier tube through a 12-bit four-channel DAC chip, and the single-chip control module is electrically connected to the LED driving module through a second 16-bit dual-channel DAC chip.

7. The wafer surface adhesive flatness detection system based on the number of reflected photons according to claim 4, characterized in that: The power supply module includes a USB interface, a filter circuit, a switching power supply circuit, a first positive linear voltage regulator circuit, a first negative linear voltage regulator circuit and a second linear voltage regulator circuit; The input end of the USB interface is used to receive an external power supply, and the output end thereof is electrically connected to the input end of the filter circuit; The input end of the switching power supply circuit is electrically connected to the output end of the filter circuit, and the output end thereof is electrically connected to the first positive linear voltage regulator circuit and the first negative linear voltage regulator circuit, and the first positive linear voltage regulator circuit and the first negative linear voltage regulator circuit are used to provide low-ripple positive and negative output voltages to the PMT signal shaping and counting module; The input end of the second linear voltage stabilizing circuit is electrically connected to the output end of the USB interface, and the output end thereof is electrically connected to the PMT signal shaping and counting module, the LED driving module and the single chip control module.

Images