LED control circuit and control method with high-precision average current sampling

Abstract

The present invention relates to the field of LED drive technology, and in particular to a high-precision average current sampling LED control circuit and control method. The high-precision average current sampling LED control circuit comprises: a sampling timing controller, an integrator, a comparator, a sampling amplifier, a logic controller, an off-time control module and a drive circuit; V CS The resistor R is used to collect the output current flowing through the LED CS The sample voltage generated, V ref is the reference voltage; V CS and V ref After sampling, the timing controller generates a signal V in , V in The input is fed to the inverting terminal of the integrator through the resistor R. The output terminal of the integrator is connected to the inverting terminal through the capacitor C. in and V ref After passing through the integrator, the signal V ea , V CS The sampling amplifier generates a signal V CS2 , V ea and V CS2 The comparator obtains the signal RST, which is sent to the logic controller and the drive circuit to obtain the signal DRV. DRV controls the MOS tube. This control is suitable for the scenario where the LED current operates in continuous conduction mode.

Description

Technical Field

[0001] The present invention relates to the technical field of LED driving, and in particular to an LED control circuit and a control method for high-precision average current sampling. Background Art

[0002] The development of LED drivers has gone through constant voltage drive mode, linear constant current drive mode, switching power supply constant current drive mode, etc. Among them, the switching power supply constant current drive mode is the most popular in the market. It has a simple structure, good constant current characteristics and reliability.

[0003] LED switching power supply constant current drive can be divided into two modes: high-end sampling and low-end sampling according to the position of the resistor. Figure 1 This is a common low-end sampling LED driver circuit schematic. The input voltage range of the low-end sampling controller is very wide because its control logic is not affected by the input voltage V in It is not affected by the influence of the sampling structure, and usually only requires a low-pressure process to produce. Therefore, compared with high-end sampling structures, it has the characteristics of lower production cost and higher applicability.

[0004] In low-end constant current drive controller, usually first detect R CS The voltage value V CS , V CS The average value V is obtained by the average sampling module in Then the internally generated reference voltage V ref Compared with the average value V in With V ref When the DRV is equal, the peripheral power MOS tube is turned off by the control module, thereby achieving the purpose of constant current control of the LED average current. It should be noted that when DRV is at a low level, the peripheral MOS tube is turned off, R cs There is no voltage value on the in Assigned to V ref , which will not affect the average current sampling of the entire cycle. It should be noted that due to the characteristics of the circuit structure, the peripheral components and parasitic capacitance C par It will affect the sampling accuracy. Figure 2 As shown, when the LED starts to turn on, DRV becomes high and the LED current flows through R CS The sampled voltage V CS , in actual measurement, it can be found that V CS The waveform is not an ideal trapezoidal sawtooth wave. Figure 2 T shown leb During this period, V CSThe waveform will have a significant upward overshoot, which is not synchronized with the LED current waveform and will affect the sampling accuracy. In order to eliminate this factor, the common practice of the average current sampling LED controller on the market is to set T leb This period of time is blocked and no sampling is performed. Although sampling is completed, the sampling accuracy is greatly affected. Summary of the Invention

[0005] In response to the shortcomings of the existing technology, the present invention provides an LED control circuit and control method with high-precision average current sampling, which is suitable for scenarios where the LED current operates in continuous conduction mode. It aims to solve the problem that the accuracy of LED constant current drive is affected due to the fact that the VCS waveform overshoot and the LED current waveform are out of sync, which can be ignored.

[0006] To achieve the above object, the present invention adopts the following technical solutions:

[0007] In a first aspect, the present invention provides a high-precision average current sampling LED control circuit, comprising: a sampling timing controller, an integrator, a comparator, a sampling amplifier, a logic controller, an off-time control module, and a drive circuit;

[0008] V CS The resistor R is used to collect the output current flowing through the LED CS The sample voltage generated, V ref is the reference voltage; V CS and V ref After sampling, the timing controller generates a signal V in , V in The input is fed to the inverting terminal of the integrator through the resistor R. The output terminal of the integrator is connected to the inverting terminal through the capacitor C. in and V ref After passing through the integrator, the signal V ea , V CS The sampling amplifier generates a signal V CS2 , V ea and V CS2 The comparator gets the signal RST, which is sent to the logic controller and the drive circuit to get the signal DRV, which controls the MOS tube.

[0009] DRV is a periodic signal, each period includes T on Time period and T off time period, and the LED current is in continuous conduction mode;

[0010] T on At the beginning of the time period, DRV is high and the MOS tube is turned on, and the LED current I led will begin to rise, and the current flowing through R CSGet V CS , V ref and V CS Perform subtraction integration to get V ea , at this time RST is high level; as the conduction time increases, I led The value of V CS will rise. After a period of time, V CS Rising to V CS Average value and V ref Equal, or I led Average value and V ref / R CS When they are equal, RST will turn to low level, and after passing through the logic controller and drive circuit, DRV will turn to low level, T on The time period ends;

[0011] T off At the beginning of the time period, DRV is low and the MOS tube is turned off, and the LED current I led will drop, because MOS is turned off, at this time V CS =0, V in Place at V ref , then the off time control module will provide a fixed T off value, ensure I led In continuous conduction mode, after a fixed T off After the time period, DRV re-enters T on Time period, becomes high level, and repeats the above cycle;

[0012] Among them, T on The time periods include T leb1 Time period, T leb2 Time period and T on1 Time period, T leb1 The time period is equal to T leb2 The duration of the time period is equal to time T leb , T leb must be greater than the overshoot time, at T leb1 Time period is blocked, in T leb2 The time period is doubled to compensate for T leb1 The loss of the segment, at T on1 Normal sampling is performed in the segment.

[0013] In one embodiment, the sampling timing controller includes: a resistor R1, a resistor R2, a capacitor C, a signal control switch ck1, a signal control switch ck2, a signal control switch ck3, a T leb Generation module and sequential logic module;

[0014] DRV passes T lebThe generating module obtains the signal T leb , T leb The DRV control timing logic module is electrically connected to the switch control terminals of the signal control switch ck1, the signal control switch ck2 and the signal control switch ck3. ref Input to the positive terminal of the integrator, V CS The output terminal of the signal control switch ck1 is electrically connected to the output terminal of the signal control switch ck2 to generate a signal V in , V in The input terminal of the signal control switch ck3 is electrically connected to the first terminal of the resistor R1, the output terminal of the signal control switch ck3 is electrically connected to the second terminal of the resistor R1, the first terminal of the resistor R2 is electrically connected to the first terminal of the resistor R1, the second terminal of the resistor R2 is electrically connected to the first terminal of the capacitor C and the inverting terminal of the integrator, the second terminal of the capacitor C is electrically connected to the output terminal of the integrator, and the output terminal of the integrator generates a signal V ea ;

[0015] DRV is a periodic signal, each period includes T on Time period and T off Time period, ensure I led In continuous conduction mode, T on The time periods include T leb1 Time period, T leb2 Time period and T on1 Time period, where T leb1 The time period is equal to T leb2 The duration of the time period is equal to T leb , T leb It must be greater than the overshoot time, resistance R1 = resistance R2 = R / 2;

[0016] Signal control switch ck1 at T leb1 Time period and T off The time period is on, at T leb2 Time period and T on1 The signal controls the switch ck2 to be turned off during the T leb1 Time period, T leb2 Time period and T off Time period is off, at T on1 The signal controls the switch ck3 to be turned on during the T leb1 Time period, T on1 Time period and T off Time period is off, at T leb2 The time period is on.

[0017] In one embodiment, the sampling timing controller includes: a resistor R, a capacitor C, a signal control switch ck1, a signal control switch ck2, a signal control switch ck3, a signal control switch ck4, a doubling circuit, a T leb Generation module and sequential logic module;

[0018] DRV passes T leb The generating module obtains the signal T leb , T leb The DRV controls the sequential logic module, which is electrically connected to the switch control terminals of the signal control switch ck1, signal control switch ck2, signal control switch ck3, and signal control switch ck4. Vref is input to the positive phase terminal of the integrator, and V SS Input to the input terminal of the signal control switch ck2, the input terminal of the signal control switch ck1 is electrically connected to the positive phase terminal of the integrator, V CS Input to the doubling circuit module and the input end of the signal control switch ck4, V CS After the doubling circuit module, V is doubled. CS , twice V CS The input terminal of the signal control switch ck3 is input, and the output terminals of the signal control switch ck1, the signal control switch ck2, the signal control switch ck3 and the signal control switch ck4 are electrically connected to generate a signal V in , V in The input is electrically connected to the first end of the resistor R, the second end of the resistor R2 is electrically connected to the first end of the capacitor C and the inverting end of the integrator, the second end of the capacitor C is electrically connected to the output end of the integrator, and the output end of the integrator generates a signal V ea ;

[0019] DRV is a periodic signal, and each period includes the Ton period and T off Time period, ensure I led In continuous conduction mode, T on The time periods include T leb1 Time period, T leb2 Time period and T on1 Time period, where T leb1 The time period is equal to T leb2 The duration of the time period is equal to T leb , T leb Must be greater than the overshoot time;

[0020] Signal control switch ck1 at T leb1 Time period, T leb2 Time period and T on1 Time period is off, at T off The signal controls the switch ck2 to be turned on during the T leb1The time period is on, at T leb2 Time period, T on1 Time period and T off The signal controls the switch ck3 to be turned off during the T leb1 Time period, T on1 Time period and T off Time period is off, at T leb2 The signal control switch ck4 is turned on in T leb1 Time period, T leb2 Time period and T off Time period is off, at T on1 The time period is on.

[0021] In a second aspect, the present invention further provides a high-precision average current sampling LED control method, comprising the following steps:

[0022] DRV is a periodic signal, each period includes T on Time period and T off Time period, ensure I led In continuous conduction mode;

[0023] T on At the beginning of the time period, DRV is high and the MOS tube is turned on, and the LED current I led will begin to rise, and the current flowing through R CS Get V CS , V ref and V CS Perform subtraction integration to get V ea , at this time RST is high level; as the conduction time increases, I led The value of V CS will rise. After a period of time, V CS Rising to V CS Average value and V ref Equal, or I led Average value and V ref / R CS When they are equal, RST will turn to low level, and after passing through the logic controller and drive circuit, DRV will turn to low level, T on The time period ends;

[0024] T off At the beginning of the time period, DRV is low and the MOS tube is turned off, and the LED current I led will drop, because the MOS tube is turned off, at this time V CS =0, V in Place at V ref , then the off time control module will provide a fixed T off value, after a fixed Toff After the time period, DRV re-enters T on time period, becomes high level, and repeats the above cycle.

[0025] As one example, the following steps are included:

[0026] In T off Time period, MOS tube is turned off, V CS =0, set V in (t) = V ref ;

[0027] T on The time period is divided into 3 periods of time for integration, and the final sum is obtained, that is, T on =T leb1 +T leb2 +T on1 , and T leb1 =T leb2 =T leb , the integrals for each time period are as follows:

[0028] T leb1 Time period: T leb1 The time period is the shielding period, and the negative input terminal of the integrator is set to V in (t) = V ref , according to the transient voltage formula of the integrator output Vea It turns out that the integral during this period is 0;

[0029] T leb2 Time period: T leb2 The time period is the doubling compensation period, set V in (t) = V LEB , where V LEB T leb1 At the end of V CS The value of the integrator output V ea The transient voltage formula It can be seen that the integral area S22 during this period is set to (V ref -V LEB )*T leb , double the integral during this period to get 2*(V ref -V LEB )*T leb2 ; Therefore, the integral area during this period S2=2*S22, because T leb1 =T leb2 , we can know that the compensation T leb1 The loss area not integrated during the time period is S21 = S22;

[0030] Therefore, in T leb1+T leb2 In the time period of T, the total integral S2=0+2*S22=S21+S22=S1, where S1 is the theoretical integral leb1 +T leb2 The corresponding V in the time period ref -V CS (t) the integrated area;

[0031] T on1 Time period: T on1 The time period is the normal period, V in (t) = V CS (t), the integral value during this period is fixed, because T leb1 +T leb2 The total integral over the time period remains unchanged, so T on The total integral over time remains unchanged.

[0032] As one example, the following steps are included:

[0033] In T off Time period, MOS tube is turned off, V CS =0, set V in (t) = V ref ;

[0034] T on The time period is divided into 3 periods of time for integration, and the final sum is obtained, that is, T on =T leb1 +T leb2 +T on1 , and T leb1 =T leb2 =T leb , the integrals for each time period are as follows:

[0035] T leb1 Time period: T leb1 The time period is the shielding period, and the negative input terminal of the integrator is set to V in (t)=0, the integrator output terminal V ea The transient voltage formula It turns out that the integral during this period is V ref *T leb ;

[0036] T leb2 Time period: T leb2 The time period is the doubling compensation period, set V in (t)=2*V LEB , where V LEB T leb1 At the end of V CS The value of the integrator output V ea The transient voltage formula It can be seen that the integral result during this period is (V ref -2V LEB )*T leb ;

[0037] Therefore, in T leb1 +T leb2 During the time period, the total integral is S3=V ref *T leb +(V ref -2V LEB )*T leb =2*(V ref -V LEB )*T leb =S1, where S1 is the theoretical value at T leb1 +T leb2 The corresponding V in the time period ref -V CS (t) the integrated area;

[0038] T on1 Time period: T on1 The time period is the normal period, V in (t) = V CS (t), the integral value during this period is fixed, because T leb1 +T leb2 The total integral over the time period remains unchanged, so T on The total integral over time remains unchanged.

[0039] The present invention provides a high-precision average current sampling LED control circuit and control method, which have the following beneficial effects:

[0040] The off time control module must ensure that the LED current operates in continuous conduction mode, and the sampling timing controller sets T on =T leb1 +T leb2 +T on1 , T leb1 =T leb2 =T leb , when performing integral sampling, at T leb1 Time period is blocked, in T leb2 Double the integral sampling in the time period to compensate for T leb1 The loss of the segment, at T on1 Normal integral sampling is performed in the first stage. The above integral sampling control method can avoid sampling errors caused by overshoot and achieve high-precision sampling and control. The circuit structure is simple to implement, the voltage input range is wide, and the adaptability is strong. The control part can be implemented through low-voltage technology, and the cost is low. BRIEF DESCRIPTION OF THE DRAWINGS

[0041] Figure 1 It is an existing low-end sampling LED circuit system;

[0042] Figure 2 The DRV waveform of the existing low-end sampling LED circuit system, V CS Comparison chart of the sampled measured waveform and LED current waveform;

[0043] Figure 3 is a schematic diagram of an average current mode controller of the present invention;

[0044] Figure 4 is a circuit structure diagram of the sampling timing controller of Example 1;

[0045] Figure 5 is a circuit structure diagram of a sampling timing controller of Example 2;

[0046] Figure 6 This is a schematic diagram of the sampling timing principle of Example 1;

[0047] Figure 7 This is a schematic diagram of the sampling timing principle of Example 2. DETAILED DESCRIPTION

[0048] The present invention will be further described below with reference to the accompanying drawings and specific embodiments.

[0049] like Figure 3 As shown, the present invention provides a high-precision average current sampling LED control circuit, including: a sampling timing controller, an integrator, a comparator, a sampling amplifier, a logic controller, an off-time control module and a driving circuit;

[0050] V CS The resistor R is used to collect the output current flowing through the LED CS The sample voltage generated, V ref is the reference voltage; V CS and V ref After sampling, the timing controller generates a signal V in , V in The input is fed to the inverting terminal of the integrator through the resistor R. The output terminal of the integrator is connected to the inverting terminal through the capacitor C. in and V ref After passing through the integrator, the signal V ea , V CS The sampling amplifier generates a signal V CS2 , V ea and V CS2 The comparator gets the signal RST, which is sent to the logic controller and the drive circuit to get the signal DRV, which controls the MOS tube.

[0051] DRV is a periodic signal, each period includes T on Time period and T off time period, and the LED current is in continuous conduction mode;

[0052] T on At the beginning of the time period, DRV is high and the MOS tube is turned on, and the LED current I led will begin to rise, and the current flowing through R CS Get V CS , V ref and V CS Perform subtraction integration to get V ea , at this time RST is high level; as the conduction time increases, I led The value of V CS will rise. After a period of time, V CS Rising to V CS Average value and V ref Equal, or I led Average value and V ref / R CS When they are equal, RST will turn to low level, and after passing through the logic controller and drive circuit, DRV will turn to low level, T on The time period ends;

[0053] T off At the beginning of the time period, DRV is low and the MOS tube is turned off, and the LED current I led will drop, because MOS is turned off, at this time V CS =0, V in Place at V ref , then the off time control module will provide a fixed T off value, ensure I led In continuous conduction mode, after a fixed T off After the time period, DRV re-enters T on Time period, becomes high level, and repeats the above cycle;

[0054] Among them, T on The time periods include T leb1 Time period, T leb2 Time period and T on1 Time period, T leb1 The time period is equal to T leb2 The duration of the time period is equal to T leb , T leb must be greater than the overshoot time, at T leb1 Time period is blocked, in T leb2 The time period is doubled to compensate for T leb1 The loss of the segment, at Ton1 Normal sampling is performed in the segment.

[0055] The LED control method of the present invention with high-precision average current sampling comprises the following steps:

[0056] DRV is a periodic signal, each period includes T on Time period and T off Time period, ensure I led In continuous conduction mode;

[0057] T on At the beginning of the time period, DRV is high and the MOS tube is turned on, and the LED current I led will begin to rise, and the current flowing through R CS Get V CS , V ref and V CS Perform subtraction integration to get V ea , at this time RST is high level; as the conduction time increases, I led The value of V CS will rise. After a period of time, V CS Rising to V CS Average value and V ref Equal, or I led Average value and V ref / R CS When they are equal, RST will turn to low level, and after passing through the logic controller and drive circuit, DRV will turn to low level, T on The time period ends;

[0058] T off At the beginning of the time period, DRV is low and the MOS tube is turned off, and the LED current I led will drop, because the MOS tube is turned off, at this time V CS =0, V in Place at V ref , then the off time control module will provide a fixed T off value, after a fixed T off After the time period, DRV re-enters T on time period, becomes high level, and repeats the above cycle.

[0059] V ref It is a fixed value. It can be a fixed reference voltage value generated by the chip or a value after dimming operation. As long as the appropriate T off The value, peripheral inductance L and the number of LEDs are controlled by the off time control module to ensure I led The waveform in continuous conduction mode can ensure that I led In Ton Average value of time period and I led During the entire period T on +T off The average value of the time period is equal, and the off time control module can be realized by the RC charge and discharge circuit. Therefore, as long as the T on During the time period V cs The average value can achieve constant current control of the entire LED controller.

[0060] The off time control module must ensure that the LED current operates in continuous conduction mode, and the sampling timing controller sets T on =T leb1 +T leb2 +T on1 , T leb1 =T leb2 =T leb , when performing integral sampling, at T leb1 Time period is blocked, in T leb2 Double the integral sampling in the time period to compensate for T leb1 The loss of the segment, at T on1 Normal integral sampling is performed in the first stage. The above integral sampling control method can avoid sampling errors caused by overshoot and achieve high-precision sampling and control. The circuit structure is simple to implement, the voltage input range is wide, and the adaptability is strong. The control part can be implemented through low-voltage technology, and the cost is low.

[0061] Make specific analysis through the following examples:

[0062] like Figure 4 and Figure 6 As shown, the sampling timing controller of embodiment 1 includes: a resistor R1, a resistor R2, a capacitor C, a signal control switch ck1, a signal control switch ck2, a signal control switch ck3, and a T leb Generation module and sequential logic module;

[0063] DRV passes T leb The generating module obtains the signal T leb , T leb The DRV control timing logic module is electrically connected to the switch control terminals of the signal control switch ck1, the signal control switch ck2 and the signal control switch ck3. ref Input to the positive terminal of the integrator, V CS The output terminal of the signal control switch ck1 is electrically connected to the output terminal of the signal control switch ck2 to generate a signal V in , V inThe input terminal of the signal control switch ck3 is electrically connected to the first terminal of the resistor R1, the output terminal of the signal control switch ck3 is electrically connected to the second terminal of the resistor R1, the first terminal of the resistor R2 is electrically connected to the first terminal of the resistor R1, the second terminal of the resistor R2 is electrically connected to the first terminal of the capacitor C and the inverting terminal of the integrator, the second terminal of the capacitor C is electrically connected to the output terminal of the integrator, and the output terminal of the integrator generates a signal V ea ;

[0064] DRV is a periodic signal, each period includes T on Time period and T off Time period, ensure I led In continuous conduction mode, T on The time periods include T leb1 Time period, T leb2 Time period and T on1 Time period, where Tl eb1 The time period is equal to T leb2 The duration of the time period is equal to T leb , T leb It must be greater than the overshoot time, resistance R1 = resistance R2 = R / 2;

[0065] Signal control switch ck1 at T leb1 Time period and T off The time period is on, at T leb2 Time period and T on1 The signal controls the switch ck2 to be turned off during the T leb1 Time period, T leb2 Time period and T off Time period is off, at T on1 The signal controls the switch ck3 to be turned on during the T leb1 Time period, T on1 Time period and T off Time period is off, at T leb2 The time period is on, as shown in the switch truth table of the sampling timing controller in Table 1.

[0066] Table 1

[0067]

[0068] The LED control method with high-precision average current sampling of this embodiment includes the following steps:

[0069] In T off Time period, MOS tube is turned off, V CS =0, set V in (t) = V ref ;

[0070] T onThe time period is divided into 3 periods of time for integration, and the final sum is obtained, that is, T on =T leb1 +T leb2 +T on1 , and T leb1 =T leb2 =T leb , the integrals for each time period are as follows:

[0071] T leb1 Time period: T leb1 The time period is the shielding period, and the negative input terminal of the integrator is set to V in (t) = V ref , according to the transient voltage formula of the integrator output Vea It turns out that the integral during this period is 0;

[0072] T leb2 Time period: T leb2 The time period is the doubling compensation period, set V in (t) = V LEB , where V LEB T leb1 At the end of V CS The value of the integrator output V ea The transient voltage formula It can be seen that the integral area S22 during this period is set to (V ref -V LEB )*T leb , double the integral during this period to get 2*(V ref -V LEB )*T leb2 ; Therefore, the integral area during this period S2=2*S22, because T leb1 =T leb2 , we can know that the compensation T leb1 The loss area not integrated during the time period is S21 = S22;

[0073] Therefore, in T leb1 +T leb2 In the time period of T, the total integral S2=0+2*S22=S21+S22=S1, where S1 is the theoretical integral leb1 +T leb2 The corresponding V in the time period ref -V CS (t) the integrated area;

[0074] T on1 Time period: T on1 The time period is the normal period, V in (t) = V CS(t), the integral value during this period is fixed, because T leb1 +T leb2 The total integral over the time period remains unchanged, so T on The total integral over time remains unchanged.

[0075] The DRV waveform just begins to enter T on When V CS The waveform will have obvious overshoot, and the present invention sets a shielding time T leb1 , in T leb1 Time, the integrator will shield V CS The waveform, T leb1 It must be ensured to be greater than the actual overshoot time. leb1 At the end, V CS The waveform must leave the overshoot segment and enter the normal segment without sampling errors.

[0076] According to the operational amplifier's virtual short and open circuit and capacitor charge and discharge formulas, the integrator output V ea The transient voltage formula is:

[0077] In the V CS When sampling, first shield the overshoot time period T leb1 The value of leb2 During the time period, not for (V ref -V CS (t)) integral, but (V ref -V CS (t)) is double integrated to compensate for T leb1 Losses not accumulated during the time period. Figure 6 The third sub-graph "Integral Area" clearly shows that S1 is the theoretically corresponding V ref -V CS (t) is the integral sampling area, S2 is the integral sampling area corresponding to the algorithm of this embodiment, since T leb1 =T leb2 , it can be clearly concluded that S1=S2. Therefore, the present invention guarantees in principle that leb1 +T leb2 In the time period of T, the sampling integral is error-free, which ensures that on During this time period, V CS The sampling is error-free.

[0078] It can be seen from the switch truth table in Table 1 that in most of the time, the signal controls the switch ck3 to be turned off, ensuring that the overall sampling resistance value is R; leb2 During this time, the signal controls the switch ck3 to be turned on, and the sampling resistance is R / 2. According to the integrator output V eaFrom the transient voltage formula, we know that T leb2 The points value for the time period will be doubled.

[0079] It should be noted that, in this embodiment, the signal control switch ck1 , the signal control switch ck2 and the signal control switch ck3 may be MOS transistors, wherein the switch control terminal is the gate, the input terminal is the drain, and the output terminal is the source.

[0080] like Figure 5 and Figure 7 As shown, the sampling timing controller of embodiment 2 includes: a resistor R, a capacitor C, a signal control switch ck1, a signal control switch ck2, a signal control switch ck3, a signal control switch ck4, a doubling circuit, a T leb Generation module and sequential logic module;

[0081] DRV passes T leb The generating module obtains the signal T leb , T leb The DRV controls the sequential logic module, which is electrically connected to the switch control terminals of the signal control switch ck1, signal control switch ck2, signal control switch ck3, and signal control switch ck4. Vref is input to the positive phase terminal of the integrator, and V SS Input to the input terminal of the signal control switch ck2, the input terminal of the signal control switch ck1 is electrically connected to the positive phase terminal of the integrator, V CS Input to the doubling circuit module and the input end of the signal control switch ck4, V CS After the doubling circuit module, V is doubled. CS , twice V CS The input terminal of the signal control switch ck3 is input, and the output terminals of the signal control switch ck1, the signal control switch ck2, the signal control switch ck3 and the signal control switch ck4 are electrically connected to generate a signal V in , V in The input is electrically connected to the first end of the resistor R, the second end of the resistor R2 is electrically connected to the first end of the capacitor C and the inverting end of the integrator, the second end of the capacitor C is electrically connected to the output end of the integrator, and the output end of the integrator generates a signal V ea The function of the doubling circuit is to convert the signal V cs The transient value is multiplied by 2, which can be achieved by an operational amplifier or other means;

[0082] DRV is a periodic signal, and each period includes the Ton period and T off Time period, ensure I led In continuous conduction mode, T on The time periods include T leb1 Time period, Tleb2 Time period and T on1 Time period, where T leb1 The time period is equal to T leb2 The duration of the time period is equal to time T leb , T leb Must be greater than the overshoot time;

[0083] Signal control switch ck1 at T leb1 Time period, T leb2 Time period and T on1 Time period is off, at T off The signal controls the switch ck2 to be turned on during the T leb1 The time period is on, at T leb2 Time period, T on1 Time period and T off The signal controls the switch ck3 to be turned off during the T leb1 Time period, T on1 Time period and T off Time period is off, at T leb2 The signal control switch ck4 is turned on in T leb1 Time period, T leb2 Time period and T off Time period is off, at T on1 The time period is on, as shown in the switch truth table of the sampling timing controller in Table 2.

[0084] Table 2

[0085]

[0086] The LED control method with high-precision average current sampling of this embodiment includes the following steps:

[0087] In T off Time period, MOS tube is turned off, V CS =0, set V in (t) = V ref ;

[0088] T on The time period is divided into 3 periods of time for integration, and the final sum is obtained, that is, T on =T leb1 +T leb2 +T on1 , and T leb1 =T leb2 =T leb , the integrals for each time period are as follows:

[0089] T leb1 Time period: T leb1 The time period is the shielding period, and the negative input terminal of the integrator is set to Vin (t)=0, the integrator output terminal V ea The transient voltage formula It is concluded that the integral area S31 during this period is V ref *T leb ;

[0090] T leb2 Time period: T leb2 The time period is the doubling compensation period, set V in (t)=2*V LEB , where V LEB T leb1 At the end of V CS The value of the integrator output V ea The transient voltage formula It can be seen that the integral area S32 during this period is (V ref -2V LEB )*T leb ;

[0091] Therefore, in T leb1 +T leb2 During the time period, the total integral is S3=S31+S32=V ref *T leb +(V ref -2V LEB )*T leb =2*(V ref -V LEB )*T leb =S2=S1, where S1 is the theoretical value at T leb1 +T leb2 The corresponding V in the time period ref -V CS (t) the integrated area;

[0092] In the V CS When sampling, first shield the overshoot time period T leb1 The value of the integrator negative input terminal V in (t)=0,for (V ref -0) integral; then at T leb2 During the time period, set V in (t) is 2 times V LEB , for (V ref -2V LEB ) to integrate. Figure 7 The third sub-graph "Integral Area" clearly shows that S1 is the theoretically corresponding V ref -V CS (t), S3 is the integral sampling area corresponding to the algorithm of this embodiment, since Tleb1 =T leb2 , it can be clearly concluded that S1=S3. Therefore, the present invention guarantees in principle that leb1 +T leb2 In the time period of T, the sampling integral is error-free, which ensures that on During this time period, V CS The sampling is error-free.

[0093] T on1 Time period: T on1 The time period is the normal period, V in (t) = V CS (t), the integral value during this period is fixed, because T leb1 +T leb2 The total integral over the time period remains unchanged, so T on The total integral over time remains unchanged.

[0094] It should be noted that, in this embodiment, the signal control switches ck1 , ck2 , ck3 and ck4 may be MOS transistors, wherein the switch control terminal is the gate, the input terminal is the drain, and the output terminal is the source.

[0095] The above description is merely a preferred embodiment of the present invention and does not limit the technical scope of the present invention. Therefore, any minor modifications, equivalent changes and modifications made to the above embodiments based on the technical essence of the present invention are still within the scope of the technical solution of the present invention.

Claims

1. A high-precision average current sampling LED control circuit, characterized in that: include: Sampling timing controller, integrator, comparator, sampling amplifier, logic controller, off-time control module and driving circuit; V CS The resistor R is used to collect the output current flowing through the LED CS The sample voltage generated, V ref is the reference voltage; V CS and V ref After sampling, the timing controller generates a signal V in , V in The input is fed to the inverting terminal of the integrator through the resistor R. The output terminal of the integrator is connected to the inverting terminal through the capacitor C. in and V ref After passing through the integrator, the signal V ea , V CS The sampling amplifier generates a signal V CS2 , V ea and V CS2 The comparator gets the signal RST, which is sent to the logic controller and the drive circuit to get the signal DRV, which controls the MOS tube. DRV is a periodic signal, each period includes T on Time period and T off time period, and the LED current is in continuous conduction mode; T on At the beginning of the time period, DRV is high and the MOS tube is turned on, and the LED current I led will begin to rise, and the current flowing through R CS Get V CS , V ref and V CS Perform subtraction integration to get V ea , at this time RST is high level; as the conduction time increases, I led The value of V CS will rise. After a period of time, V CS Rising to V CS Average value and V ref Equal, or I led Average value and V ref / R CS When they are equal, RST will turn to low level, and after passing through the logic controller and drive circuit, DRV will turn to low level, T on The time period ends; T off At the beginning of the time period, DRV is low and the MOS tube is turned off, and the LED current I led will drop, because MOS is turned off, at this time V CS =0, V in Place at V ref , then the off time control module will provide a fixed T off value, ensure I led In continuous conduction mode, after a fixed T off After the time period, DRV re-enters T on Time period, becomes high level, and repeats the above cycle; Among them, T on The time periods include T leb1 Time period, T leb2 Time period and T on1 Time period, T leb1 The time period is equal to T leb2 The duration of the time period is equal to T leb , T leb must be greater than the overshoot time, at T leb1 Time period is blocked, in T leb2 The time period is doubled to compensate for T leb1 The loss of the segment, at T on1 Normal sampling is performed in the segment.

2. The high-precision average current sampling LED control circuit according to claim 1, characterized in that: The sampling timing controller includes: resistor R1, resistor R2, capacitor C, signal control switch ck1, signal control switch ck2, signal control switch ck3, T leb Generation module and sequential logic module; DRV passes T leb The generating module obtains the signal T leb , T leb The DRV control timing logic module is electrically connected to the switch control terminals of the signal control switch ck1, the signal control switch ck2 and the signal control switch ck3. ref Input to the positive terminal of the integrator, V CS The output terminal of the signal control switch ck1 is electrically connected to the output terminal of the signal control switch ck2 to generate a signal V in , V in The input terminal of the signal control switch ck3 is electrically connected to the first terminal of the resistor R1, the output terminal of the signal control switch ck3 is electrically connected to the second terminal of the resistor R1, the first terminal of the resistor R2 is electrically connected to the first terminal of the resistor R1, the second terminal of the resistor R2 is electrically connected to the first terminal of the capacitor C and the inverting terminal of the integrator, the second terminal of the capacitor C is electrically connected to the output terminal of the integrator, and the output terminal of the integrator generates a signal V ea ; DRV is a periodic signal, each period includes T on Time period and T off Time period, ensure I led In continuous conduction mode, T on The time periods include T leb1 Time period, T leb2 Time period and T on1 Time period, where T leb1 The time period is equal to T leb2 The duration of the time period is equal to T leb , T leb It must be greater than the overshoot time, resistance R1 = resistance R2 = R / 2; Signal control switch ck1 at T leb1 Time period and T off The time period is on, at T leb2 Time period and T on1 The signal controls the switch ck2 to be turned off during the T leb1 Time period, T leb2 Time period and T off Time period is off, at T on1 The signal controls the switch ck3 to be turned on during the T leb1 Time period, T on1 Time period and T off Time period is off, at T leb2 The time period is on.

3. The LED control circuit with high-precision average current sampling according to claim 1, characterized in that: The sampling timing controller includes: a resistor R, a capacitor C, a signal control switch ck1, a signal control switch ck2, a signal control switch ck3, a signal control switch ck4, a doubling circuit, a T leb Generation module and sequential logic module; DRV passes T leb The generating module obtains the signal T leb , T leb The DRV control timing logic module is electrically connected to the switch control terminals of the signal control switch ck1, the signal control switch ck2, the signal control switch ck3 and the signal control switch ck4. ref Input to the positive terminal of the integrator, V SS Input to the input terminal of the signal control switch ck2, the input terminal of the signal control switch ck1 is electrically connected to the positive phase terminal of the integrator, V CS Input to the doubling circuit module and the input end of the signal control switch ck4, V CS After the doubling circuit module, V is doubled. CS , twice V CS The input terminal of the signal control switch ck3 is input, and the output terminals of the signal control switch ck1, the signal control switch ck2, the signal control switch ck3 and the signal control switch ck4 are electrically connected to generate a signal V in , V in The input is electrically connected to the first end of the resistor R, the second end of the resistor R2 is electrically connected to the first end of the capacitor C and the inverting end of the integrator, the second end of the capacitor C is electrically connected to the output end of the integrator, and the output end of the integrator generates a signal V ea ; DRV is a periodic signal, each period includes T on Time period and T off Time period, ensure I led In continuous conduction mode, T on The time periods include T leb1 Time period, T leb2 Time period and T on1 Time period, where T leb1 The time period is equal to T leb2 The duration of the time period is equal to T leb , T leb Must be greater than the overshoot time; Signal control switch ck1 at T leb1 Time period, T leb2 Time period and T on1 Time period is off, at T off The signal controls the switch ck2 to be turned on during the T leb1 The time period is on, at T leb2 Time period, T on1 Time period and T off The signal controls the switch ck3 to be turned off during the T leb1 Time period, T on1 Time period and T off Time period is off, at T leb2 The signal control switch ck4 is turned on in T leb1 Time period, T leb2 Time period and T off Time period is off, at T on1 The time period is on.

4. A high-precision average current sampling LED control method, characterized in that: The following steps are involved: The resistor R that collects the output current flowing through the LED CS The generated sampling voltage V CS , V ref is the reference voltage; V CS and V ref After sampling, the timing controller generates a signal V in , V in The input is fed to the inverting terminal of the integrator through the resistor R. The output terminal of the integrator is connected to the inverting terminal through the capacitor C. in and V ref After passing through the integrator, the signal V ea , V CS The sampling amplifier generates a signal V CS2 , V ea and V CS2 The comparator gets the signal RST, which is sent to the logic controller and the drive circuit to get the signal DRV, which controls the MOS tube. DRV is a periodic signal, each period includes T on Time period and T off Time period; T on At the beginning of the time period, DRV is high and the MOS tube is turned on, and the LED current I led will begin to rise, and the current flowing through R CS Get V CS , V ref and V CS Perform subtraction integration to get V ea , at this time RST is high level; as the conduction time increases, I led The value of V CS will rise. After a period of time, V CS Rising to V CS Average value and V ref Equal, or I led Average value and V ref / R CS When they are equal, RST will turn to low level, and after passing through the logic controller and drive circuit, DRV will turn to low level, T on The time period ends; T off At the beginning of the time period, DRV is low and the MOS tube is turned off, and the LED current I led will drop, because the MOS tube is turned off, at this time V CS =0, V in Place at V ref , then the off time control module will provide a fixed T off value, after a fixed T off After the time period, DRV re-enters T on Time period, becomes high level, and repeats the above cycle; Among them, T on The time periods include T leb1 Time period, T leb2 Time period and T on1 Time period, T leb1 The time period is equal to T leb2 The duration of the time period is equal to T leb , T leb must be greater than the overshoot time, at T leb1 Time period is blocked, in T leb2 The time period is doubled to compensate for T leb1 The loss of the segment, at T on1 Normal sampling is performed in the segment.

5. The LED control method with high-precision average current sampling according to claim 4, characterized in that: The following steps are involved: In T off Time period, MOS tube is turned off, V CS =0, set V in (t) = V ref ; T on The time period is divided into 3 periods of time for integration, and the final sum is obtained, that is, T on =T leb1 +T leb2 +T on1 , and T leb1 =T leb2 =T leb , the integrals for each time period are as follows: T leb1 Time period: T leb1 The time period is the shielding period, and the negative input terminal of the integrator is set to V in (t) = V ref , by the integrator output V ea The transient voltage formula It turns out that the integral during this period is 0; T leb2 Time period: T leb2 The time period is the doubling compensation period, set V in (t) = V LEB , where V LEB T leb1 At the end of V CS The value of the integrator output V ea The transient voltage formula It can be seen that the integral area S22 during this period is set to (V ref -V LEB )*T leb , double the integral during this period to get 2*(V ref -V LEB )*T leb2 ; Therefore, the integral area during this period S2=2*S22, because T leb1 =T leb2 , we can know that the compensation T leb1 The loss area not integrated during the time period is S21 = S22; Therefore, in T leb1 +T leb2 In the time period of T, the total integral S2=0+2*S22=S21+S22=S1, where S1 is the theoretical integral leb1 +T leb2 The corresponding V in the time period ref -V CS (t) the integrated area; T on1 Time period: T on1 The time period is the normal period, V in (t) = V CS (t), the integral value during this period is fixed, because T leb1 +T leb2 The total integral over the time period remains unchanged, so T on The total integral over time remains unchanged.

6. The LED control method with high-precision average current sampling according to claim 4, characterized in that: The following steps are involved: In T off Time period, MOS tube is turned off, V CS =0, set V in (t) = V ref ; T on The time period is divided into 3 periods of time for integration, and the final sum is obtained, that is, T on =T leb1 +T leb2 +T on1 , and T leb1 =T leb2 =T leb , the integrals for each time period are as follows: T leb1 Time period: T leb1 The time period is the shielding period, and the negative input terminal of the integrator is set to V in (t)=0, the integrator output terminal V ea The transient voltage formula It turns out that the integral during this period is V ref *T leb ; T leb2 Time period: T leb2 The time period is the doubling compensation period, set V in (t)=2*V LEB , where V LEB T leb1 At the end of V CS The value of the integrator output V ea The transient voltage formula It can be seen that the integral result during this period is (V ref -2V LEB )*T leb ; Therefore, in T leb1 +T leb2 During the time period, the total integral is S3=V ref *T leb +(V ref -2V LEB )*T leb =2*(V ref -V LEB )*T leb =S1, where S1 is the theoretical value at T leb1 +T leb2 The corresponding V in the time period ref -V CS (t) the integrated area; T on1 Time period: T on1 The time period is the normal period, V in (t) = V CS (t), the integral value during this period is fixed, because T leb1 +T leb2 The total integral over the time period remains unchanged, so T on The total integral over time remains unchanged.

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