Design task execution system, method, storage medium, and electronic device

By deploying the design task execution system of the center nodes and multiple edge computing nodes during the design of the quantum chip design, the resource management problem is solved during the design of the quantum chip, and the efficient utilization of resources and the smooth completion of the design task are achieved.

CN118690712BActive Publication Date: 2025-01-24SHANDONG YUNHAI GUOCHUANG CLOUD COMPUTING EQUIP IND INNOVATION CENT CO LTD
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Patent Information

Application Number
CN202411199512.5
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2024-08-29
Publication Date
2025-01-24
Estimated Expiration
2044-08-29

AI Technical Summary

Technical Problem

The prior art is difficult to effectively manage the design resources required in the quantum chip design process, making it difficult to complete the design tasks of quantum chips.

Method used

A design task execution system is designed, including central nodes and multiple edge computing nodes. The central node obtains design tasks and sends it to the target edge calculation node based on the type of task to perform specific design steps. Each edge computing node focuses on performing tasks such as landscape design, verification simulation or performance analysis.

Benefits of technology

Through reasonable management of the design resources on multiple edge computing nodes, the system can effectively complete the design tasks of quantum chips and improve the efficiency of design resources.

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Abstract

The embodiment of the present application provides a system, method, storage medium, and electronic device for executing a design task, wherein the system includes: a central node; multiple edge computing nodes communicating with the central node; the central node is used to obtain the design task of the quantum chip, and send the design task to a target node among the multiple edge computing nodes according to the task type of the design task, so as to execute the design task through the design resources on the target node; the task type is used to indicate the design steps of the design quantum chip, and the multiple edge computing nodes include at least: a first edge computing node for executing layout design, a second edge computing node for executing verification simulation, and a third edge computing node for executing performance analysis. Therefore, the problem of how to effectively manage design resources in the process of quantum chip design to complete the design task of the quantum chip can be solved. The technical effect of rationally managing design resources is achieved.
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Description

Technical Field

[0001] The embodiments of the present application relate to the field of resource scheduling, and more specifically, to a system, method, storage medium, and electronic device for executing a design task. Background Art

[0002] Quantum chip design is a complex design process that includes multiple design steps. Each of the multiple design steps requires different resource computing power, and each design step also needs to be executed through different design software. How to effectively manage design resources in quantum chip design and use design resources accurately and reasonably to complete chip design is a new problem.

[0003] With regard to the existing technology, the problem of how to effectively manage design resources in the quantum chip design process to complete the design task of the quantum chip has not yet been effectively solved. Summary of the invention

[0004] The embodiments of the present application provide a design task execution system, method, storage medium, and electronic device to at least solve the problem of how to effectively manage design resources in the quantum chip design process in the prior art to complete the design task of the quantum chip.

[0005] According to one embodiment of the present application, a system for executing a design task is provided, comprising: a central node; a plurality of edge computing nodes communicating with the central node; wherein the central node is used to obtain a design task of a quantum chip, and send the design task to a target node among the plurality of edge computing nodes according to a task type of the design task, so as to execute the design task through design resources on the target node; wherein the task type is used to indicate the design steps for designing the quantum chip, and the design steps include at least: layout design, verification simulation, and performance analysis, and the plurality of edge computing nodes include at least: a first edge computing node for executing layout design, a second edge computing node for executing verification simulation, and a third edge computing node for executing performance analysis.

[0006] In an exemplary embodiment, the multiple edge computing nodes respectively include: a first resource pool for providing the design resources, and a first proxy computing node corresponding to the first resource pool, wherein the first resource pool communicates with the central node through the first proxy computing node.

[0007] In an exemplary embodiment, any one of the first edge computing node, the second edge computing node, and the third edge computing node includes: a second resource pool for executing a target design step, and a second proxy computing node corresponding to the second resource pool; wherein the target design step is a design step that needs to be executed by any one of the edge computing nodes, and the first resource pool includes: the second resource pool; the first proxy computing node includes: the second proxy computing node.

[0008] In an exemplary embodiment, the second resource pool includes a plurality of first servers; and the first software for executing the target design step is respectively deployed in the plurality of first servers in a preset manner.

[0009] In an exemplary embodiment, the second resource pool of the first edge computing node includes: the multiple first servers each deployed with a central processing unit; the second resource pool of the second edge computing node includes: the multiple first servers each deployed with a graphics processing unit; the second resource pool of the third edge computing node includes: the multiple first servers each deployed with the central processing unit.

[0010] In an exemplary embodiment, the multiple edge computing nodes further include: a fourth edge computing node; the fourth edge computing node includes: a third resource pool and a third proxy computing node; wherein the first resource pool includes the third resource pool, and the first proxy computing node includes the third proxy computing node; the third resource pool includes: multiple second servers; the multiple second servers are respectively deployed with second software, and the second software includes at least one of the following: software for executing layout design, software for executing verification simulation, and software for executing performance analysis; wherein the second software includes the first software.

[0011] In an exemplary embodiment, the fourth edge computing node is used as a backup node for the fifth edge computing node when the fifth edge computing node has no idle design resources, wherein the fifth edge computing node includes: the first edge computing node, the second edge computing node, and the third edge computing node.

[0012] In an exemplary embodiment, the first resource pool is used to publish resource information to the first proxy computing node upon receiving a subscription request from the first proxy computing node, wherein the resource information includes: service information of each third server included in the first resource pool, and the service information includes at least: the address of each third server, the service interface of each third server, the input parameters required by each third server, the expected output results corresponding to the input parameters, and the service status of each third server.

[0013] In an exemplary embodiment, the first proxy computing node is further configured to, upon receiving the resource information, store the resource information in an embedded database in the first proxy computing node and send the resource information to the central node.

[0014] In an exemplary embodiment, the first resource pool is also used to register with the central node through the first proxy computing node before communicating with the central node through the first proxy computing node; the central node is used to review the first resource pool upon receiving a registration request from the first resource pool; the central node is also used to issue a digital certificate to the first proxy computing node if the first resource pool passes the review; the first proxy computing node is used to communicate securely with the central node through the digital certificate.

[0015] In an exemplary embodiment, the central node includes: a resource pool audit module, a resource management module, and a resource scheduling module; the resource pool audit module is used to audit the first resource pool that sends a registration request to the central node; the resource management module is used to manage the resource information of the first resource pool that sends a registration request to the central node; the resource scheduling module is used to determine the target node according to the task type of the design task and the resource information, and schedule the design task to the target node to execute the design task through the design resources on the target node; wherein the resource information includes: service information of each third server included in the first resource pool, the service information includes at least: the address of each third server, the service interface of each third server, the input parameters required by each third server, the expected output results corresponding to the input parameters, and the service status of each third server.

[0016] In an exemplary embodiment, the resource scheduling module includes: an automated scheduling unit; wherein the automated scheduling unit is used to determine a fourth resource pool corresponding to the task type, and determine the resource status of the fourth resource pool from the resource information stored in the resource management module; wherein the first resource pool includes: the fourth resource pool; the resource status is determined by the service status.

[0017] In an exemplary embodiment, the automated scheduling unit is also used to determine the edge computing node where the fourth resource pool is located as the target node when the resource status indicates that there are idle design resources in the fourth resource pool, and schedule the design task to the fourth resource pool, so as to execute the design task through the idle design resources.

[0018] In an exemplary embodiment, the resource scheduling module also includes: an intelligent scheduling unit; the intelligent scheduling unit includes: an intelligent scheduling model, wherein the intelligent scheduling model is a model obtained by training the artificial intelligence model by using the historical task type and the resource information of the resource pool that executes the historical task type as training parameters.

[0019] In an exemplary embodiment, the intelligent scheduling unit is used to input the task type into the intelligent scheduling model, and schedule the design task according to the output result of the intelligent scheduling model, wherein the output result is used to indicate the target node.

[0020] According to another embodiment of the present application, a method for executing a design task is provided, which is applied to the execution system of the design task described in any of the above items, including: acquiring a design task of a quantum chip, and sending the design task to a target node among multiple edge computing nodes that are communicatively connected to a central node according to the task type of the design task, so as to execute the design task through the design resources on the target node; wherein the task type is used to indicate the design steps of designing the quantum chip, and the design steps include at least: layout design, verification simulation, and performance analysis, and the multiple edge computing nodes include at least: a first edge computing node for executing layout design, a second edge computing node for executing verification simulation, and a third edge computing node for executing performance analysis.

[0021] In an exemplary embodiment, upon receiving a registration request for a first resource pool, the first resource pool is audited; if the first resource pool passes the audit, a digital certificate is issued to a first agent computing node; wherein the multiple edge computing nodes respectively include: the first resource pool for providing the design resources, and the first agent computing node corresponding to the first resource pool, wherein the first resource pool communicates with the central node through the first agent computing node.

[0022] According to another embodiment of the present application, a computer-readable storage medium is provided, in which a computer program is stored, wherein the computer program is configured to execute the steps of any of the above method embodiments when run.

[0023] According to another embodiment of the present application, an electronic device is provided, including a memory and a processor, wherein the memory stores a computer program, and the processor is configured to run the computer program to execute the steps in any one of the above method embodiments.

[0024] According to another embodiment of the present application, a computer program product is provided, including a computer program, and when the computer program is executed by a processor, the steps in any of the above method embodiments are implemented.

[0025] Through the present application, a design task execution system is provided, including: a central node; a plurality of edge computing nodes communicating with the central node; wherein the central node is used to obtain the design task of the quantum chip, and sends the design task to the target node among the plurality of edge computing nodes according to the task type of the design task, so as to execute the design task through the design resources on the target node; wherein the task type is used to indicate the design steps of designing the quantum chip, and the design steps at least include: layout design, verification simulation, performance analysis, and the plurality of edge computing nodes at least include: a first edge computing node for executing layout design, a second edge computing node for executing verification simulation, and a third edge computing node for executing performance analysis. That is to say, by deploying a central node and a plurality of edge computing nodes that communicate with each other, the central node can send the design task to the target node according to the task type of the design task, and then reasonably manage the design resources on the plurality of edge computing nodes. Therefore, the problem of how to effectively manage the design resources in the process of quantum chip design in the prior art to complete the design task of the quantum chip can be solved. The technical effect of reasonably managing the design resources is achieved. BRIEF DESCRIPTION OF THE DRAWINGS

[0026] Figure 1 is an architectural diagram of a system for executing a design task according to an embodiment of the present application;

[0027] Figure 2 is a flowchart of a method for executing a design task according to an embodiment of the present application;

[0028] Figure 3 is a schematic diagram of the architecture of a system for executing a design task according to an embodiment of the present application;

[0029] Figure 4 is a flowchart of a method for executing a design task according to an optional embodiment of the present application (I);

[0030] Figure 5 is a flowchart (II) of a method for executing a design task according to an optional embodiment of the present application;

[0031] Figure 6 This is a flowchart of a method for executing a design task according to an optional embodiment of the present application (III). DETAILED DESCRIPTION

[0032] The embodiments of the present application will be described in detail below with reference to the accompanying drawings and in combination with the embodiments.

[0033] It should be noted that the terms "first", "second", etc. in the specification and claims of this application and the above-mentioned drawings are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence.

[0034] Unless otherwise defined, all technical and scientific terms used in this application have the same meaning as those commonly understood by those skilled in the art to which this application belongs. The terms used in the specification of this application are only for the purpose of describing specific embodiments and are not intended to limit this application.

[0035] To solve the above problems, the present application provides a system for executing a design task. Figure 1 : is an architecture diagram of a system for executing a design task according to an embodiment of the present application, and the system for executing the design task includes the following:

[0036] A central node 11; a plurality of edge computing nodes 12 communicating with the central node; wherein,

[0037] The central node 11 is used to obtain a design task of the quantum chip, and send the design task to a target node among the multiple edge computing nodes according to a task type of the design task, so as to execute the design task through the design resources on the target node;

[0038] It is understandable that the execution system of the design task in the embodiment of the present application deploys a central node and multiple edge computing nodes in a cloud-edge combination manner. Optionally, the central node can be deployed in the cloud.

[0039] Among them, the task type is used to indicate the design steps of designing the quantum chip, and the design steps include at least: layout design, verification simulation, and performance analysis. The multiple edge computing nodes include at least: a first edge computing node for performing layout design, a second edge computing node for performing verification simulation, and a third edge computing node for performing performance analysis.

[0040] It should be noted that this design step is determined by the design timing of the quantum chip.

[0041] It should also be noted that a quantum chip is a tiny chip designed and manufactured using the principles of quantum mechanics for quantum computing. The working principle of a quantum chip is to use quantum bits to replace binary bits in traditional computers, so that more data can be processed in a shorter time. Quantum chips are a key component of quantum computing and have higher computing speeds and processing capabilities than traditional computers. At present, quantum chips are gradually becoming a research hotspot for scientific research institutions and high-tech companies, and are considered to be an important development direction for future computer technology.

[0042] The execution system of the above-mentioned design task includes: a central node; a plurality of edge computing nodes communicating with the central node; wherein the central node is used to obtain the design task of the quantum chip, and sends the design task to the target node among the plurality of edge computing nodes according to the task type of the design task, so as to execute the design task through the design resources on the target node; wherein the task type is used to indicate the design steps of designing the quantum chip, and the design steps at least include: layout design, verification simulation, performance analysis, and the plurality of edge computing nodes at least include: a first edge computing node for executing layout design, a second edge computing node for executing verification simulation, and a third edge computing node for executing performance analysis. That is to say, by deploying a central node and a plurality of edge computing nodes that communicate with each other, the central node can send the design task to the target node according to the task type of the design task, and then reasonably manage the design resources on the plurality of edge computing nodes. Therefore, the problem of how to effectively manage the design resources in the process of quantum chip design in the prior art to complete the design task of the quantum chip can be solved. The technical effect of reasonably managing the design resources is achieved.

[0043] In an exemplary embodiment, the multiple edge computing nodes respectively include: a first resource pool for providing the design resources, and a first proxy computing node corresponding to the first resource pool, wherein the first resource pool communicates with the central node through the first proxy computing node.

[0044] In an exemplary embodiment, any one of the first edge computing node, the second edge computing node, and the third edge computing node includes: a second resource pool for executing a target design step, and a second proxy computing node corresponding to the second resource pool; wherein the target design step is a design step that needs to be executed by any one of the edge computing nodes, and the first resource pool includes: the second resource pool; the first proxy computing node includes: the second proxy computing node.

[0045] That is to say, the first edge computing node includes: a second resource pool for executing layout design, and a second proxy computing node corresponding to the second resource pool; the second edge computing node includes: a second resource pool for executing verification simulation, and a second proxy computing node corresponding to the second resource pool; the third edge computing node includes: a second resource pool for executing performance analysis, and a second proxy computing node corresponding to the second resource pool.

[0046] Therefore, the embodiment of the present application achieves the technical effect of completing the design of a quantum chip through the collaboration of multiple edge computing nodes by deploying edge computing nodes dedicated to executing the target design step for the quantum chip. In addition, the resource pool can provide a large number of design resources, and to a certain extent, the parallel design of multiple quantum chips can be realized.

[0047] In an exemplary embodiment, the second resource pool includes a plurality of first servers; and the first software for executing the target design step is respectively deployed in the plurality of first servers in a preset manner.

[0048] Specifically, the first software includes one of the following: software for performing layout design, software for performing verification simulation, and software for performing performance analysis. In other words, it includes layout design software, verification simulation software, and performance analysis software.

[0049] Then, the multiple first servers in the first edge computing node are respectively deployed with layout design software, the multiple first servers in the second edge computing node are respectively deployed with verification simulation software, and the multiple first servers in the third edge computing node are respectively deployed with performance analysis software.

[0050] Thus, any of the multiple first servers can perform layout design, verification simulation, or performance analysis, and can simultaneously provide design resources sufficient to design multiple quantum chips. And multiple edge computing nodes can simultaneously execute the design steps of different quantum chips at different stages.

[0051] In an exemplary embodiment, the second resource pool of the first edge computing node includes: the multiple first servers each deployed with a central processing unit; the second resource pool of the second edge computing node includes: the multiple first servers each deployed with a graphics processing unit; the second resource pool of the third edge computing node includes: the multiple first servers each deployed with the central processing unit.

[0052] That is, the multiple servers included in the first edge computing node and the third edge computing node are all central processing unit (CPU) servers, and the multiple servers included in the second edge computing node are all graphics processing unit (GPU) servers.

[0053] In an exemplary embodiment, the multiple edge computing nodes further include: a fourth edge computing node; the fourth edge computing node includes: a third resource pool and a third proxy computing node; wherein the first resource pool includes the third resource pool, and the first proxy computing node includes the third proxy computing node; the third resource pool includes: multiple second servers; the multiple second servers are respectively deployed with second software, and the second software includes at least one of the following: software for executing layout design, software for executing verification simulation, and software for executing performance analysis; wherein the second software includes the first software.

[0054] In an exemplary embodiment, the fourth edge computing node is used as a backup node for the fifth edge computing node when the fifth edge computing node has no idle design resources, wherein the fifth edge computing node includes: the first edge computing node, the second edge computing node, and the third edge computing node.

[0055] It is understandable that the third resource pool also included in the fourth edge computing node has multiple second servers deployed therein, and the multiple second servers may be GPU servers or CPU servers, or may be processors having both GPU and CPU functions. Each second server may be deployed with at least one of software for executing layout design, software for executing verification simulation, and software for executing performance analysis.

[0056] The fourth edge computing node is used as a backup node to undertake the design tasks that the first edge computing node, the second edge computing node, and the third edge computing node cannot undertake when there are no idle design resources in the dedicated computing nodes such as the first edge computing node, the second edge computing node, and the third edge computing node. Exemplarily, a second server that is deployed with software for performing layout design, software for performing verification simulation, and software for performing performance analysis at the same time as the fourth edge computing node can simultaneously perform design tasks at different design stages of different quantum chips. For example, the second server can simultaneously perform the layout design of quantum chip A, the verification simulation of quantum chip B, and the performance analysis of quantum chip C. It should be noted that the above A, B, and C are not used to limit the design order of quantum chips, but are only used to distinguish different quantum chips.

[0057] Therefore, the embodiment of the present application provides a backup node for dedicated computing nodes such as the first edge computing node by setting the fourth edge computing node, thereby greatly improving the flexibility and practicality of the execution system of the design task.

[0058] Optionally, the fourth backup node in the embodiment of the present application can be replaced with multiple backup nodes, for example, split into: a first backup node as a first edge computing node, a second backup node as a second edge computing node, and a third backup node as a third edge computing node. The architecture of each backup node is the same or similar to the edge computing node corresponding to each backup node. For example: the architecture of the first edge computing node is the same as that of the first backup node. In the case of allocating design resources for the design task of the quantum chip, the design resources in the edge computing node corresponding to each backup node are preferentially allocated.

[0059] More specifically, in the case of similar architectures, the subtle differences between each backup node and the edge computing node corresponding to each backup node are reflected in: the number of servers is different; the first way for each backup node to achieve secure communication with the central node, and the second way for the edge computing node corresponding to each backup node to achieve secure communication with the central node (i.e., through digital certificates) can be different. For example, each backup node can achieve secure communication through methods such as symmetric encryption, asymmetric encryption, secure transmission protocol, virtual private network (VPN), etc.

[0060] It should be noted that symmetric encryption means that two devices use the same key to encrypt and decrypt communication content, ensuring that the content cannot be stolen by a third party. Asymmetric encryption means using public and private keys to encrypt and decrypt communication content, ensuring that the communication content can only be decrypted by trusted devices. VPN means establishing an encrypted channel on a public network to ensure the secure transmission of communication content. Secure transmission protocol means using secure transmission protocols such as Secure Shell (SSH) and Secure File Transfer Protocol (SFTP) to ensure the confidentiality and integrity of communication content.

[0061] Therefore, the embodiment of the present application provides another backup node setting scheme by setting multiple backup nodes, providing a resource buffer for the situation where all the designed resources on the fifth edge computing node are "occupied".

[0062] In an exemplary embodiment, the first resource pool is used to publish resource information to the first proxy computing node upon receiving a subscription request from the first proxy computing node, wherein the resource information includes: service information of each third server included in the first resource pool, and the service information includes at least: the address of each third server, the service interface of each third server, the input parameters required by each third server, the expected output results corresponding to the input parameters, and the service status of each third server.

[0063] In the embodiment of the present application, the subscription and publishing mechanism is used to transmit the resource information of the first resource pool between the first proxy computing node and the first resource pool, and between the first proxy computing node and the central node. Specifically, when the first resource pool is registered with the first proxy computing node, the first proxy computing node sends a subscription request to the first resource pool, and the first resource pool publishes resource information to the first proxy computing node according to the subscription request of the first proxy computing node. When the first proxy computing node is registered with the central node, the central node publishes a subscription request to the first proxy computing node, and the first proxy computing node publishes the resource information of the first resource pool to the central node according to the subscription request published by the central node.

[0064] It should be noted that the subscription and publication mechanism is an information transmission mode in which the publisher sends messages or events to the subscriber. Subscribers can choose to subscribe to specific topics or events of interest. When the publisher sends a relevant message, the subscriber will receive a notification. This mechanism is often used to implement an event-driven architecture, so that the various components in the system can be decoupled and respond to events flexibly. Common subscription and publication mechanisms include message queues, observer patterns, etc. In an embodiment of the present application, the subscriber is, for example, a first proxy computing node, and the publisher is, for example, a first resource pool.

[0065] Optionally, in the service information, the address of each third server may be the Internet Protocol (IP) of each third server, and the service status of each third server includes: "idle" and "occupied", where "idle" is used to indicate that the design resources in the third server are in an idle state, that is, no design task is being executed; "occupied" indicates that the design resources in the third server are executing a design task.

[0066] It should be noted that the third server in the fourth edge computing node needs to provide a more fine-grained service status. For example, in the case where software for executing layout design, software for executing verification simulation, and software for executing performance analysis are deployed on the third server in the fourth edge computing node at the same time, the software for executing layout design can be used as the first sub-resource, the software for executing verification simulation can be used as the second sub-resource, and the software for executing performance analysis can be used as the third sub-resource. The service status in the published service information should include the service sub-status of the first sub-resource, the service sub-status of the second sub-resource, and the service sub-status of the third sub-resource. The service sub-status also includes two states: "idle" and "occupied".

[0067] In an exemplary embodiment, the first proxy computing node is further configured to, upon receiving the resource information, store the resource information in an embedded database in the first proxy computing node and send the resource information to the central node.

[0068] Optionally, in an embodiment of the present application, the resource information published by the first resource pool to the first proxy computing node will be stored in an embedded database in the first proxy computing node. For example, the embedded database in the second proxy computing node included in the first edge computing node stores the resource information of the second resource pool included in the first edge computing node.

[0069] In an exemplary embodiment, the first resource pool is also used to register with the central node through the first proxy computing node before communicating with the central node through the first proxy computing node; the central node is used to review the first resource pool upon receiving a registration request from the first resource pool; the central node is also used to issue a digital certificate to the first proxy computing node if the first resource pool passes the review; the first proxy computing node is used to communicate securely with the central node through the digital certificate.

[0070] It should be noted that a digital certificate is a digital file used to verify the identities of both parties in communication and ensure the security of the communication content. A digital certificate contains the public key, the holder's information, and the digital signature of the issuing agency. It can be used to encrypt communication content, verify the identities of both parties in communication, and prevent data tampering. Digital certificates are issued by digital signature agencies to ensure the security and reliability of communications.

[0071] Therefore, in the embodiment of the present application, the central node audits the first resource pool, and if the first resource pool passes the audit, the digital certificate is sent to the first proxy computing node corresponding to the first resource pool, so that the first proxy computing node can communicate securely with the central node through the digital certificate. Thus, the technical effect of secure communication between multiple edge computing nodes and the central node is achieved through digital certificates.

[0072] In an exemplary embodiment, the central node includes: a resource pool audit module, a resource management module, and a resource scheduling module; the resource pool audit module is used to audit the first resource pool that sends a registration request to the central node; the resource management module is used to manage the resource information of the first resource pool that sends a registration request to the central node; the resource scheduling module is used to determine the target node according to the task type of the design task and the resource information, and schedule the design task to the target node to execute the design task through the design resources on the target node; wherein the resource information includes: service information of each third server included in the first resource pool, the service information includes at least: the address of each third server, the service interface of each third server, the input parameters required by each third server, the expected output results corresponding to the input parameters, and the service status of each third server.

[0073] It is understandable that the central node audits the first resource pool through the resource pool audit module; manages the resource information of the audited resource pool through the resource management module, and determines the target node from the resource information stored in the resource management module according to the task type of the design task through the resource scheduling module. It should be noted that although the resource information of the first resource pool that has not passed the audit is also stored in the resource management module, the design resources in the first resource pool that has not passed the audit cannot execute the design task, that is, cannot be scheduled.

[0074] In an exemplary embodiment, the resource scheduling module includes: an automated scheduling unit; wherein the automated scheduling unit is used to determine a fourth resource pool corresponding to the task type, and determine the resource status of the fourth resource pool from the resource information stored in the resource management module; wherein the first resource pool includes: the fourth resource pool; the resource status is determined by the service status.

[0075] Furthermore, the automated scheduling unit is also used to determine the edge computing node where the fourth resource pool is located as the target node and schedule the design task to the fourth resource pool when the resource status indicates that there are idle design resources in the fourth resource pool, so as to execute the design task through the idle design resources.

[0076] Optionally, the process of the automatic scheduling unit executing the scheduling of design resources may be: after the central node analyzes the task type of the design task, the automatic scheduling unit retrieves the fourth resource pool that can execute the task type from the resource information of the resource management module, and determines all idle design resources in the fourth resource pool, and presents them to the target object in the form of a first list. The first list may include the IP address of the server to which the idle design resources belong, the fourth resource pool index, the index of the proxy computing node corresponding to the fourth resource pool, etc. The automatic scheduling unit receives the target object's selection operation on the first list to determine the idle design resources, and executes the scheduling of the design task.

[0077] Optionally, the automated scheduling unit may also directly select a design resource from the first list after generating the first list. The selection method includes but is not limited to: selecting the first design resource in the first list, selecting any design resource in the first list. The first list may also record the update frequency of the service status of the design resource, so that the automated scheduling unit can select the design resource with the lowest update frequency as the resource for executing the design task.

[0078] In an exemplary embodiment, the resource scheduling module also includes: an intelligent scheduling unit; the intelligent scheduling unit includes: an intelligent scheduling model, wherein the intelligent scheduling model is a model obtained by training the artificial intelligence model by using the historical task type and the resource information of the resource pool that executes the historical task type as training parameters.

[0079] Furthermore, the intelligent scheduling unit is used to input the task type into the intelligent scheduling model, and schedule the design task according to the output result of the intelligent scheduling model, wherein the output result is used to indicate the target node.

[0080] It is understandable that after inputting the task type, the intelligent scheduling unit will directly output the target node to which the design task should be scheduled. More specifically, the intelligent scheduling model can also indicate which idle design resource in the target node the design task should be scheduled to execute.

[0081] An embodiment of the present application also provides a method for executing a design task, which is applied to the system for executing a design task described in any of the above embodiments. Figure 2 is a flowchart of a method for executing a design task according to an embodiment of the present application, such as Figure 2 As shown, the method includes:

[0082] Step S202: Obtain a design task for a quantum chip, and send the design task to a target node among a plurality of edge computing nodes that are communicatively connected to a central node according to a task type of the design task, so as to execute the design task through design resources on the target node; wherein the task type is used to indicate design steps for designing the quantum chip, and the design steps include at least: layout design, verification simulation, and performance analysis, and the plurality of edge computing nodes include at least: a first edge computing node for executing layout design, a second edge computing node for executing verification simulation, and a third edge computing node for executing performance analysis.

[0083] Through the above steps, it includes: obtaining the design task of the quantum chip, and sending the design task to the target node among the multiple edge computing nodes that are connected to the central node in communication according to the task type of the design task, so as to perform the design task through the design resources on the target node; wherein the task type is used to indicate the design steps of designing the quantum chip, and the design steps include at least: layout design, verification simulation, performance analysis, and the multiple edge computing nodes include at least: a first edge computing node for performing layout design, a second edge computing node for performing verification simulation, and a third edge computing node for performing performance analysis. That is to say, in the case of deploying a central node and multiple edge computing nodes that communicate with each other, the central node can send the design task to the target node according to the task type of the design task, and then reasonably manage the design resources on multiple edge computing nodes. Therefore, the problem of how to effectively manage design resources in the quantum chip design process in the prior art to complete the design task of the quantum chip can be solved. The technical effect of reasonable management of design resources is achieved.

[0084] In an exemplary embodiment, upon receiving a registration request for a first resource pool, the first resource pool is audited; if the first resource pool passes the audit, a digital certificate is issued to a first agent computing node; wherein the multiple edge computing nodes respectively include: the first resource pool for providing the design resources, and the first agent computing node corresponding to the first resource pool, wherein the first resource pool communicates with the central node through the first agent computing node.

[0085] Optionally, any one of the first edge computing node, the second edge computing node, and the third edge computing node includes: a second resource pool for executing a target design step, and a second proxy computing node corresponding to the second resource pool; wherein the target design step is a design step that needs to be executed by any one of the edge computing nodes, and the first resource pool includes: the second resource pool; the first proxy computing node includes: the second proxy computing node.

[0086] Optionally, the second resource pool includes multiple first servers; the first software for executing the target design step is deployed in the multiple first servers respectively in a preset manner.

[0087] Optionally, the second resource pool of the first edge computing node includes: the multiple first servers each deployed with a central processing unit; the second resource pool of the second edge computing node includes: the multiple first servers each deployed with a graphics processing unit; the second resource pool of the third edge computing node includes: the multiple first servers each deployed with the central processing unit.

[0088] Optionally, the multiple edge computing nodes further include: a fourth edge computing node; the fourth edge computing node includes: a third resource pool and a third proxy computing node; wherein the first resource pool includes the third resource pool, and the first proxy computing node includes the third proxy computing node; the third resource pool includes: multiple second servers; the multiple second servers are respectively deployed with second software, and the second software includes at least one of the following: software for executing layout design, software for executing verification simulation, and software for executing performance analysis; wherein the second software includes the first software.

[0089] Optionally, the fourth edge computing node is used to serve as a backup node for the fifth edge computing node when the fifth edge computing node has no idle design resources, wherein the fifth edge computing node includes: the first edge computing node, the second edge computing node, and the third edge computing node.

[0090] Optionally, the first resource pool is used to publish resource information to the first proxy computing node upon receiving a subscription request from the first proxy computing node, wherein the resource information includes: service information of each third server included in the first resource pool, and the service information includes at least: the address of each third server, the service interface of each third server, the input parameters required by each third server, the expected output results corresponding to the input parameters, and the service status of each third server.

[0091] In an exemplary embodiment, before sending the design task to a target node among a plurality of edge computing nodes that are communicatively connected to a central node according to the task type of the design task, the method further includes: receiving resource information of a first resource pool from a first proxy computing node. The resource information is information received by the first proxy computing node from the first resource pool, and the resource information is stored in an embedded database in the first proxy computing node.

[0092] In an exemplary embodiment, before sending the design task to a target node among multiple edge computing nodes that are communicatively connected to a central node according to the task type of the design task, the method also includes: before communicating with the first resource pool through the first proxy computing node and upon receiving a registration request for the first resource pool, auditing the first resource pool; if the first resource pool passes the audit, issuing a digital certificate to the first proxy computing node; and the first proxy computing node is used to communicate securely with the central node through the digital certificate.

[0093] Optionally, the central node includes: a resource pool audit module, a resource management module, and a resource scheduling module; the resource pool audit module is used to audit the first resource pool that sends a registration request to the central node; the resource management module is used to manage the resource information of the first resource pool that sends a registration request to the central node; the resource scheduling module is used to determine the target node according to the task type of the design task and the resource information, and schedule the design task to the target node to execute the design task through the design resources on the target node; wherein the resource information includes: service information of each third server included in the first resource pool, the service information includes at least: the address of each third server, the service interface of each third server, the input parameters required by each third server, the expected output results corresponding to the input parameters, and the service status of each third server.

[0094] In an exemplary embodiment, the design task is sent to a target node among multiple edge computing nodes that are communicatively connected to a central node according to the task type of the design task, so as to execute the design task through the design resources on the target node, including: determining a fourth resource pool corresponding to the task type, and determining the resource status of the fourth resource pool from the resource information stored in the resource management module; wherein the first resource pool includes: the fourth resource pool; the resource status is determined by the service status; when the resource status indicates that there are idle design resources in the fourth resource pool, the edge computing node where the fourth resource pool is located is determined as the target node, and the design task is scheduled to the fourth resource pool, so as to execute the design task through the idle design resources.

[0095] Optionally, the resource scheduling module also includes: an intelligent scheduling unit; the intelligent scheduling unit includes: an intelligent scheduling model, wherein the intelligent scheduling model is a model obtained by training the artificial intelligence model by using the historical task type and the resource information of the resource pool that executes the historical task type as training parameters.

[0096] In an exemplary embodiment, sending the design task to a target node among multiple edge computing nodes that are communicatively connected to a central node according to the task type of the design task includes: inputting the task type into the intelligent scheduling model, and scheduling the design task according to an output result of the intelligent scheduling model, wherein the output result is used to indicate the target node.

[0097] Through the description of the above implementation methods, those skilled in the art can clearly understand that the method according to the above embodiment can be implemented by means of software plus a necessary general hardware platform, and of course by hardware, but in many cases the former is a better implementation method. Based on this understanding, the technical solution of the present application, or the part that contributes to the prior art, can be embodied in the form of a software product, which is stored in a storage medium (such as ROM / RAM, magnetic disk, optical disk), and includes a number of instructions for a terminal device (which can be a mobile phone, computer, server, or network device, etc.) to execute the methods described in each embodiment of the present application.

[0098] In order to better understand the execution system of the above-mentioned design task, the execution system of the above-mentioned design task is described below in combination with an optional embodiment, but it is not used to limit the technical solution of the embodiment of the present application.

[0099] The optional embodiment of the present application proposes an execution system for design tasks that combines a central node with multiple edge computing nodes in accordance with the chip design sequence and function by combining cloud, edge, and end. A quantum chip design resource pool (equivalent to the first resource pool in the above embodiment) is constructed on multiple edge computing nodes, and multiple edge computing nodes are also deployed with quantum chip design proxy computing nodes (equivalent to the first proxy computing nodes) as a channel between the quantum chip design resource pool and the quantum chip design center (equivalent to the central node), and the communication security between the chip design center and the edge computing nodes is ensured by digital certificates. Finally, the two methods of automatic scheduling and intelligent scheduling are adopted, combined with the resource event engine and the publish-subscribe mechanism, to finally complete the precise management of quantum chip design business resources (equivalent to design resources), and to manage and call quantum business resources safely and efficiently.

[0100] Specifically, an optional embodiment of the present application provides a design task execution system, which includes: a quantum chip design cloud center (equivalent to a central node) and a quantum chip design edge computing node (i.e., multiple edge computing nodes). The quantum chip design edge computing node includes a quantum chip layout design edge computing node (equivalent to a first edge computing node), a quantum chip design verification simulation edge computing node (equivalent to a second edge computing node), and a quantum chip performance analysis edge computing node (equivalent to a third edge computing node).

[0101] Among them, quantum chip layout design edge computing nodes, such as Figure 3As shown, it includes: a corresponding layout design resource pool (equivalent to the second resource pool) and a resource pool proxy computing node (equivalent to the second proxy computing node). Multiple layout design software (equivalent to the first software) are deployed in the corresponding server and publish corresponding business interfaces, and dynamically registered in the layout design resource pool proxy computing node (equivalent to the second proxy computing node).

[0102] The quantum chip design verification simulation edge computing node includes: a corresponding verification simulation resource pool (equivalent to the second resource pool) and a corresponding resource pool proxy node (equivalent to the second proxy computing node). Multiple verification simulation software (equivalent to the first software) are deployed in the corresponding server and publish corresponding business interfaces, and dynamically registered in the verification simulation resource pool proxy computing node (equivalent to the second proxy computing node).

[0103] Among them, the quantum chip performance analysis edge computing node includes: the corresponding performance analysis resource pool (equivalent to the second resource pool) and the resource pool proxy computing node (equivalent to the second proxy computing node). Multiple performance analysis software (equivalent to the first software) are deployed in the corresponding server and publish the corresponding business interface, and dynamically register to the verification performance analysis resource pool proxy computing node (equivalent to the second proxy computing node).

[0104] Among them, the business fusion edge computing node (equivalent to the fourth edge computing node) includes: the corresponding fusion resource pool (equivalent to the third resource pool) and the corresponding fusion resource pool proxy computing node (equivalent to the third proxy computing node). Multiple layout design, verification, and simulation software (equivalent to the second software) are deployed in the corresponding service, where the corresponding business interface is published and dynamically registered in the fusion resource pool proxy computing node.

[0105] It should be noted that the business fusion edge computing node is a resource buffer setting to solve the problem of saturation of the quantum chip design resource pool, and a resource backup strategy to prevent the resources of a certain business resource pool from being in an "occupied" state.

[0106] The resource pool in the optional embodiment of the present application interacts with the central node through the proxy computing node. After starting the proxy computing node, the corresponding proxy computing node is automatically registered in the chip design cloud center (the same as the quantum chip design cloud center). The administrator of the chip design cloud center reviews the registration of the resource pool (equivalent to the registration request). If the review is passed, the chip design cloud center issues a digital certificate to the registered resource pool to its proxy computing node. The edge computing node communicates legally and securely with the platform through the digital certificate on the proxy computing node. The edge computing node collects resource information from the resource pool and publishes it to the chip design cloud center through the proxy computing node. The resource information of the chip design includes: resource pool function information, function interface information, resource usage status, etc. The quantum chip design cloud center receives the chip design task, directly selects the corresponding edge computing node according to the task function type, and then finds the corresponding resource usage, or intelligently selects the resource pool to complete the quantum chip design resource scheduling.

[0107] It should be noted that the edge computing nodes in the optional embodiments of the present application include: a first edge computing node, a second edge computing node, a third edge computing node, and a fourth edge computing node; the resource pools in the optional embodiments of the present application include: a first resource pool, a second resource pool, and a third resource pool; the proxy computing nodes in the optional embodiments of the present application include: a first proxy computing node, a second proxy computing node, and a third proxy computing node.

[0108] Furthermore, the layout design resource pool is deployed in multiple CPU servers by the layout design software in the form of Docker images, and provides service information to the outside, including: layout design service Internet Protocol IP (equivalent to address), layout design service interface, layout design service input parameters and output results (equivalent to expected output results), layout design service status, etc. The verification simulation resource pool is deployed in multiple GPU servers by the verification simulation software in the form of Docker images, and provides service information to the outside, including verification simulation service IP, verification simulation service interface, verification simulation service input parameters and output results, verification simulation service status, etc. The performance analysis resource pool is distributed and deployed in multiple CPU servers by the performance analysis software in the form of Docker images, and provides service information to the outside, including service performance analysis service IP, performance analysis service interface, performance analysis service input parameters and output results, performance analysis service status, etc. The fusion resource pool is distributed and deployed in multiple CPU and GPU servers by business software such as layout design, verification simulation, and performance analysis in the form of Docker images, and provides corresponding service information to the outside, including the fusion of more than three service resources, service IP, service interface, input parameters and output results, service status, etc.

[0109] Optionally, the proxy computing node corresponding to the resource pool uses Field-Programmable Gate Array (FPGA) acceleration technology to implement various computing and acceleration functions. The proxy computing node is the link between the cloud resource management center (equivalent to the central node) and the resource pool. The proxy computing node subscribes to and receives resource information from each resource pool and publishes it to the cloud resource management center; at the same time, it receives resource demand instructions from the cloud resource management center and executes resource demand instructions to schedule idle design resources in the corresponding resource pool.

[0110] Optionally, the proxy computing node corresponding to the resource pool has a built-in embedded database, and each embedded database stores the resource information of the resource pool in the corresponding edge computing node. The resource information specifically includes: service IP, service interface, input parameters and output results, service status, etc. The correspondence between the proxy computing node and the resource pool is a one-to-one relationship. The proxy computing node receives the digital certificate issued by the cloud resource management center for the approved resource pool, and communicates securely with the cloud resource management center through the digital certificate. Specifically, the embedded database of the layout design resource pool proxy computing node stores the resource information of the layout design resource pool; the embedded database of the verification simulation resource pool proxy computing node stores the resource information of the verification simulation resource pool; the embedded database of the performance analysis resource pool proxy computing node stores the resource information of the performance analysis resource pool; the embedded database of the fusion resource pool proxy computing node stores the resource information of the fusion resource pool.

[0111] The cloud-edge-end combination in the optional embodiment of the present application includes the above-mentioned multiple edge computing nodes, and also includes a central node, which can be optionally set in the cloud. The central node includes: chip design resource pool review (equivalent to the resource pool review module), chip design business resource management (equivalent to the resource management module), and chip design business resource scheduling (equivalent to the resource scheduling module).

[0112] The process of establishing a communication channel between multiple edge computing nodes and the central node includes:

[0113] 1) Deploy chip design business software (i.e., the first software or the second software) in multiple servers included in the resource pool included in multiple edge computing nodes, and start running in the form of mirrors. And deploy resource pool proxy computing nodes respectively. After the resource pool proxy computing nodes are started and run, they will dynamically register with the chip design resource management center (equivalent to the central node). At the same time, the proxy computing nodes collect resource information and resource usage of the resource pool in real time to its embedded database. That is, the resource pool is dynamically registered in the embedded database of the corresponding resource pool proxy node, thereby forming a layout design resource pool, a simulation verification resource pool, a performance analysis resource pool, and a fusion resource pool.

[0114] 2) The resource pool sends a registration request to the chip design resource management center through the proxy computing node, and the administrator of the chip design resource management center reviews the resource pool. The chip design resource management allocates the digital certificate of the resource pool to the proxy computing node for the resource pool that has passed the review. The resource pool proxy computing node connects with the chip design resource management center through the digital certificate to establish a command security channel. The resource information of the resource pool of the edge computing node is published to the chip design resource management center through the proxy computing node. It should be noted that the resource information can be carried in the registration request to be published to the chip design resource management center, and can also be published to the chip design resource management center through the proxy computing node after the proxy computing node connects with the chip design resource management center through the digital certificate to establish a command security channel.

[0115] 3) The chip design resource management center can view the resource pool and the corresponding quantum business resource information. The chip design resource management platform views the approved resource pool and all resource information, including service interface, service parameters, service status, service results, etc. The resource pool that has not passed the review does not meet the requirements, cannot be assigned a security certificate, cannot communicate, and the resources cannot be used.

[0116] More specifically, the process of establishing a communication channel between multiple edge computing nodes and the central node can be briefly described as follows: Figure 4 The process shown includes:

[0117] S41: Deploy chip design business software and form different business software resource pools according to types.

[0118] S42: Deploy the corresponding proxy computing node and dynamically register it to the chip design center.

[0119] S43: The chip design center reviews the resource pool.

[0120] S44: The resource pool that has passed the review allocates a digital certificate to the proxy computing node.

[0121] S45: The resource pool proxy computing node establishes a secure communication channel with the platform through a digital certificate.

[0122] S46: The chip design center views the resource pool and the corresponding quantum business resource details.

[0123] S47: The resource pool that has not passed the review does not meet the requirements, cannot be assigned a security certificate, and cannot communicate.

[0124] Optionally, the chip design center (equivalent to the central node) includes automatic selection of chip design resource pools (i.e., automatic scheduling unit) and intelligent selection of chip design resource pools (i.e., intelligent scheduling unit), which are used to complete automatic resource scheduling for the resource pool.

[0125] Among them, the automatic selection of chip design resource pool means that the chip design center receives chip design tasks (i.e. design tasks), queries the resource status of the relevant functional resource pool (i.e. the fourth resource pool) according to the functional type (i.e. task type), and directly and accurately selects the idle resources of the idle resource pool for scheduling. Specifically, the layout design task selects the layout design business resources (equivalent to idle design resources) of the layout resource pool for scheduling, the simulation verification task selects the simulation verification business resources (equivalent to idle design resources) of the simulation verification resource pool for scheduling, and the performance analysis task selects the performance analysis business resources (equivalent to idle design resources) of the performance analysis resource pool for scheduling.

[0126] Among them, the intelligent selection of chip design resource pool includes: training the artificial intelligence learning model to obtain the intelligent scheduling model of the resource pool. During the training process, the input parameters are task type, resource pool type, quantum business resource related information, etc.

[0127] It should be noted that the automatic selection of chip design resource pools and the intelligent selection of chip design resource pools both require the scheduling and communication of quantum chip design business resources through the event engine, data management, and channel authentication of the chip design center. The event engine of the chip design center subscribes to chip design tasks and resource information of the edge computing node resource pool to manage specific quantum chip design business resources; through automatic or intelligent determination of the quantum chip design business resource information to which the design task can be scheduled, the event engine issues the corresponding quantum business resource command, combines data management parameters, and a secure authentication channel to pass the command to the quantum chip design edge computing node, and calls the corresponding quantum chip design business resource to complete the scheduling of quantum chip design business resources.

[0128] The resource pool scheduling process of the chip design center for edge computing nodes includes:

[0129] 1) The chip design center receives the task and determines whether to use automatic selection or intelligent selection. If automatic selection is used, the chip design center automatically selects the specific quantum chip design business resource information under the approved resource pool in the resource management interface; if intelligent selection is used, the task type of the design task is input into the intelligent selection model to realize the call of the chip design task. In this way, idle design resources are selected for the chip design task, completing part of the automatic scheduling operation.

[0130] 2) The edge computing node receives the chip design resource call instruction, finds the specific business resource from the corresponding business resource pool (equivalent to the fourth resource pool) for call, and updates the resource status of the business resource in the edge computing node (for example, updates the service status of the business resource from "idle" to "occupied"). Thus, the resource call is executed, the result is returned in the order of the call, and the proxy computing node status information is updated.

[0131] For automated selection, the chip design center schedules the resource pool of edge computing nodes, such as Figure 5 As shown, it may also include:

[0132] S51: The chip design platform receives the task.

[0133] S52: The chip design center assigns a digital certificate to the proxy computing node of the resource pool that has passed the review.

[0134] S53: The resource pool proxy computing node establishes a secure communication (ie, communication) channel with the platform through a digital certificate.

[0135] S54: Automatically select the resource information that has passed the review in the resource management interface.

[0136] S55: The event engine subscribes to the edge computing node resource information and publishes the resource call information command to the proxy computing node.

[0137] S56: The edge computing node receives the resource call information, finds the specific business resource call from the business resource pool, and updates the sub-chip design business resource status of the edge computing node.

[0138] For intelligent selection, the chip design center schedules the resource pool of edge computing nodes, such as Figure 6 As shown, it may also include:

[0139] S61: The chip design platform receives the task.

[0140] S62: The chip design center assigns a digital certificate to the proxy computing node of the resource pool that has passed the review.

[0141] S63: The resource pool proxy computing node establishes a secure communication channel with the platform through a digital certificate.

[0142] S64: Intelligent training model, selecting resource information.

[0143] S65: The event engine subscribes to the edge computing node resource information and publishes the resource call information command to the proxy computing node.

[0144] S66: The edge computing node receives the resource call information, finds the specific business resource call from the business resource pool, and updates the sub-chip design business resource status of the edge computing node.

[0145] To summarize, the optional embodiments of the present application use a cloud-edge-end combination approach to build a quantum business resource pool at the edge computing node, add quantum proxy computing nodes to establish a resource pool and a chip design center channel, and use digital certificates to ensure the communication security between the chip design center and the edge computing end; combined with the quantum chip design platform event engine and publish-subscribe mechanism, it ultimately completes the precise management of quantum business resources.

[0146] An embodiment of the present application further provides a computer-readable storage medium, in which a computer program is stored, wherein the computer program is configured to execute the steps of any of the above method embodiments when running.

[0147] In an exemplary embodiment, the computer-readable storage medium may include, but is not limited to, various media that can store computer programs, such as a USB flash drive, a read-only memory (ROM), a random access memory (RAM), a mobile hard disk, a magnetic disk or an optical disk.

[0148] An embodiment of the present application further provides an electronic device, including a memory and a processor, wherein a computer program is stored in the memory, and the processor is configured to run the computer program to execute the steps in any one of the above method embodiments.

[0149] In an exemplary embodiment, the electronic device may further include a transmission device and an input / output device, wherein the transmission device is connected to the processor, and the input / output device is connected to the processor.

[0150] An embodiment of the present application further provides a computer program product, which includes a computer program. When the computer program is executed by a processor, the steps in any one of the above method embodiments are implemented.

[0151] An embodiment of the present application further provides another computer program product, including a non-volatile computer-readable storage medium, wherein the non-volatile computer-readable storage medium stores a computer program, and when the computer program is executed by a processor, the steps in any of the above method embodiments are implemented.

[0152] An embodiment of the present application also provides a computer program, which includes computer instructions stored in a computer-readable storage medium; a processor of a computer device reads the computer instructions from the computer-readable storage medium, and the processor executes the computer instructions, so that the computer device performs the steps in any one of the above method embodiments.

[0153] For specific examples in this embodiment, reference may be made to the examples described in the above embodiments and exemplary implementation modes, and this embodiment will not be described in detail herein.

[0154] Obviously, those skilled in the art should understand that the above modules or steps of the present application can be implemented by a general computing device, they can be concentrated on a single computing device, or distributed on a network composed of multiple computing devices, they can be implemented by a program code executable by a computing device, so that they can be stored in a storage device and executed by the computing device, and in some cases, the steps shown or described can be executed in a different order from that herein, or they can be made into individual integrated circuit modules, or multiple modules or steps therein can be made into a single integrated circuit module for implementation. Thus, the present application is not limited to any specific combination of hardware and software.

[0155] The above description is only the preferred embodiment of the present application and is not intended to limit the present application. For those skilled in the art, the present application may have various modifications and variations. Any modification, equivalent replacement, improvement, etc. made within the principles of the present application shall be included in the protection scope of the present application.

Claims

1. A design task execution system, characterized in that: include: Central node; A plurality of edge computing nodes communicating with the central node; wherein, The central node is used to obtain a design task of the quantum chip, and send the design task to a target node among the multiple edge computing nodes according to a task type of the design task, so as to execute the design task through a design resource on the target node; The task type is used to indicate the design steps of designing the quantum chip, and the design steps include at least: layout design, verification simulation, and performance analysis. The multiple edge computing nodes include at least: a first edge computing node for performing layout design, a second edge computing node for performing verification simulation, and a third edge computing node for performing performance analysis. Each of the plurality of edge computing nodes includes: a first resource pool for providing the design resources, and a first proxy computing node corresponding to the first resource pool, wherein the first resource pool communicates with the central node through the first proxy computing node, wherein: The central node includes: a resource pool audit module, a resource management module, and a resource scheduling module; The resource pool audit module is used to audit the first resource pool that sends a registration request to the central node; the resource management module is used to manage the resource information of the first resource pool that sends a registration request to the central node; the resource scheduling module is used to determine the target node according to the task type of the design task and the resource information, and schedule the design task to the target node, so as to execute the design task through the design resources on the target node; Among them, the resource information includes: service information of each third server included in the first resource pool, and the service information at least includes: the address of each third server, the service interface of each third server, the input parameters required by each third server, the expected output results corresponding to the input parameters, and the service status of each third server.

2. The design task execution system according to claim 1, characterized in that: Any edge computing node among the first edge computing node, the second edge computing node, and the third edge computing node includes: a second resource pool for executing a target design step, and a second proxy computing node corresponding to the second resource pool; Among them, the target design steps are design steps that need to be executed by any edge computing node, and the first resource pool includes: the second resource pool; the first proxy computing node includes: the second proxy computing node.

3. The design task execution system according to claim 2, characterized in that: The second resource pool includes a plurality of first servers; The first software for executing the target design step is respectively deployed in the plurality of first servers in a preset manner.

4. The design task execution system according to claim 3, characterized in that: The second resource pool of the first edge computing node includes: the plurality of first servers each of which is deployed with a central processor; The second resource pool of the second edge computing node includes: the plurality of first servers respectively deployed with graphics processors; The second resource pool of the third edge computing node includes: the multiple first servers on which the central processors are respectively deployed.

5. The design task execution system according to claim 1, characterized in that: The plurality of edge computing nodes further include: a fourth edge computing node; The fourth edge computing node includes: a third resource pool and a third proxy computing node; wherein the first resource pool includes the third resource pool, and the first proxy computing node includes the third proxy computing node; The third resource pool includes: multiple second servers; the multiple second servers are respectively deployed with second software, and the second software includes at least one of the following: software for performing layout design, software for performing verification simulation, and software for performing performance analysis; wherein the second software includes the first software.

6. The design task execution system according to claim 5, characterized in that: The fourth edge computing node is used to serve as a backup node for the fifth edge computing node when the fifth edge computing node has no idle design resources, wherein the fifth edge computing node includes: the first edge computing node, the second edge computing node, and the third edge computing node.

7. The design task execution system according to claim 1, characterized in that: The first resource pool is used to publish resource information to the first proxy computing node upon receiving a subscription request from the first proxy computing node, wherein the resource information includes: service information of each third server included in the first resource pool, and the service information includes at least: the address of each third server, the service interface of each third server, the input parameters required by each third server, the expected output results corresponding to the input parameters, and the service status of each third server.

8. The design task execution system according to claim 7, characterized in that: The first proxy computing node is further configured to, upon receiving the resource information, store the resource information in an embedded database in the first proxy computing node and send the resource information to the central node.

9. The design task execution system according to claim 1, characterized in that: The first resource pool is also used to register with the central node through the first proxy computing node before communicating with the central node through the first proxy computing node; The central node is used for reviewing the first resource pool when receiving the registration request of the first resource pool; The central node is also used to issue a digital certificate to the first proxy computing node if the first resource pool passes the review; The first proxy computing node is used to perform secure communication with the central node through the digital certificate.

10. The design task execution system according to claim 1, characterized in that: The resource scheduling module includes: an automated scheduling unit; Among them, the automated scheduling unit is used to determine the fourth resource pool corresponding to the task type, and determine the resource status of the fourth resource pool from the resource information stored in the resource management module; wherein, the first resource pool includes: the fourth resource pool; the resource status is determined by the service status.

11. The design task execution system according to claim 10, characterized in that: The automated scheduling unit is also used to determine the edge computing node where the fourth resource pool is located as the target node when the resource status indicates that there are idle design resources in the fourth resource pool, and schedule the design task to the fourth resource pool, so as to execute the design task through the idle design resources.

12. The design task execution system according to claim 1, characterized in that: The resource scheduling module also includes: an intelligent scheduling unit; The intelligent scheduling unit includes: an intelligent scheduling model, wherein the intelligent scheduling model is a model obtained by training an artificial intelligence model by using historical task types and resource information of a resource pool that executes the historical task types as training parameters.

13. The design task execution system according to claim 12, characterized in that: The intelligent scheduling unit is used to input the task type into the intelligent scheduling model, and schedule the design task according to the output result of the intelligent scheduling model, wherein the output result is used to indicate the target node.

14. A method for executing a design task, characterized in that: A system for executing a design task according to any one of claims 1 to 13, comprising: Acquire a design task for a quantum chip, and send the design task to a target node among a plurality of edge computing nodes that are communicatively connected to a central node according to a task type of the design task, so as to execute the design task through a design resource on the target node; Among them, the task type is used to indicate the design steps of designing the quantum chip, and the design steps include at least: layout design, verification simulation, and performance analysis. The multiple edge computing nodes include at least: a first edge computing node for performing layout design, a second edge computing node for performing verification simulation, and a third edge computing node for performing performance analysis.

15. The method according to claim 14, characterized in that Before obtaining the design task of the quantum chip, the method further includes: Upon receiving a registration request from a first resource pool, reviewing the first resource pool; If the first resource pool passes the review, issuing a digital certificate to the first proxy computing node; The multiple edge computing nodes respectively include: the first resource pool for providing the design resources, and the first proxy computing node corresponding to the first resource pool, wherein the first resource pool communicates with the central node through the first proxy computing node.

16. A computer-readable storage medium, characterized in that: The computer-readable storage medium stores a computer program, wherein the computer program implements the steps of the method described in any one of claims 14 to 15 when executed by a processor.

17. An electronic device comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, characterized in that: When the processor executes the computer program, the steps of the method described in any one of claims 14 to 15 are implemented.

18. A computer program product, comprising a computer program, characterized in that When the computer program is executed by a processor, the steps of the method described in any one of claims 14 to 15 are implemented.

Citation Information

Patent Citations

  • Quantum chip design system and method, electronic equipment and storage medium

    CN116911393A