A method for preparing a deep trench isolation structure and a semiconductor device

By adjusting the deposition and etching conditions in the etching chamber and controlling the thickness difference between the top and bottom isolation parts of the deep trench structure, the problems of high cost and wafer cracking caused by increasing the deposition chamber pressure in the existing technology are solved, and efficient deep trench isolation structure preparation is achieved, which improves the isolation effect and safety of the device.

CN118800719BActive Publication Date: 2025-09-16GUANGZHOU CANSEMI TECH INC
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Patent Information

Application Number
CN202410937922.9
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2024-07-12
Publication Date
2025-09-16
Estimated Expiration
2044-07-12

AI Technical Summary

Technical Problem

In the prior art, increasing the top thickness of the deep trench isolation structure by increasing the deposition chamber pressure results in high costs, easily causes wafer cracking, and increases process complexity.

Method used

A deposition step is added to the etching chamber. By filling the etching chamber with deposition gas and increasing the etching chamber pressure and/or reducing the bias voltage, the preset etching conditions and cleaning conditions are adjusted to control the thickness difference between the top and bottom isolation parts of the deep trench structure, reduce the downward bombardment ability of ionized ions, and achieve a top thickness greater than the bottom thickness.

Benefits of technology

Without increasing costs, the top thickness of the deep trench isolation structure is increased, process complexity is reduced, leakage conditions are improved, and device safety and isolation effects are enhanced.

✦ Generated by Eureka AI based on patent content.

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Abstract

The present application provides a method for preparing a deep trench isolation structure and a semiconductor device, wherein the preparation method includes: obtaining a target substrate, the target substrate including a deep trench structure; after sequentially subjecting the target substrate to a furnace tube process and a chemical vapor deposition process to generate a first isolation structure, moving the target substrate to an etching chamber; depositing a second isolation structure on the first isolation structure according to preset deposition conditions; removing isolation portions corresponding to the bottom of the deep trench structure in the first isolation structure and the second isolation structure according to preset etching conditions to obtain a substrate to be cleaned; and cleaning the etching chamber and the substrate to be cleaned according to preset cleaning conditions to prepare the deep trench isolation structure.
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Description

Technical Field

[0001] The present application relates to the field of semiconductor manufacturing technology, and in particular to a method for manufacturing a deep trench isolation structure and a semiconductor device. Background Art

[0002] Deep trench isolation (DTI) technology is widely used in power devices due to its numerous advantages, including small footprint, bidirectional isolation, low leakage current, and excellent heat resistance. The DTI fabrication process typically involves etching the trench after nitride patterning. After etching, a thin silicon dioxide film is deposited on the trench sidewalls, acting as an isolation dielectric. The bottom oxide layer is then removed by etching, while retaining the sidewall oxide layer. Finally, the trench is filled with polysilicon.

[0003] Generally speaking, for deep trenches with high aspect ratios, it is necessary to ensure that the sidewall oxide layer is thick enough to withstand high voltage and achieve high-voltage isolation when the oxide layer at the bottom of the trench is removed. However, during the etching process, there is a deviation in the etching rate between the top and bottom of the deep trench, which will result in incomplete bottom etching or excessive loss of the top hard mask, thereby increasing leakage. In the prior art, in the pre-process stage of preparing an isolation oxide layer on the trench by chemical vapor deposition (CVD), it is necessary to increase the deposition chamber pressure to increase the top thickness of the deep trench. However, increasing the pressure in the deposition chamber can easily cause wafer rupture, thereby increasing the process complexity and process cost. Summary of the Invention

[0004] In view of this, the purpose of the present application is to provide at least a method for preparing a deep trench isolation structure and a semiconductor device. After a first isolation structure is generated on a target substrate through a furnace tube process and a chemical vapor deposition process, the method moves to an etching chamber. By adding a deposition step in the etching chamber, filling the etching chamber with deposition gas, increasing the etching chamber pressure, and / or reducing the bias voltage, the deep trench structure is deposited so that the thickness of the isolation portion corresponding to the top of the deep trench structure is greater than the thickness of the isolation portion corresponding to the bottom. On this basis, preset etching conditions and preset cleaning conditions are configured to process the deposited wafer to complete the preparation of the deep trench isolation structure. This solves the technical problem of low cost caused by increasing the top thickness of the deep trench isolation structure by increasing the deposition chamber pressure in the prior art, and achieves the technical effect of increasing the top thickness of the deep trench isolation structure and reducing costs.

[0005] This application mainly includes the following aspects:

[0006] In a first aspect, an embodiment of the present application provides a method for preparing a deep trench isolation structure, the preparation method comprising: obtaining a target substrate, the target substrate comprising a deep trench structure; after sequentially subjecting the target substrate to a furnace tube process and a chemical vapor deposition process to generate a first isolation structure, moving the target substrate to an etching chamber, wherein the first isolation structure covers the surface of the target substrate and the sidewalls and bottom of the deep trench structure; depositing a second isolation structure on the first isolation structure according to preset deposition conditions, wherein the preset deposition conditions reduce the downward bombardment ability of ions generated by ionizing the deposition gas by filling the deposition gas and increasing the etching chamber pressure and / or reducing the bias voltage, and the thickness of the isolation portion corresponding to the top of the deep trench structure of the second isolation structure is greater than the thickness of the isolation portion corresponding to the bottom; removing the isolation portion corresponding to the bottom of the deep trench structure in the first isolation structure and the second isolation structure according to preset etching conditions to obtain a substrate to be cleaned; cleaning the etching chamber and the substrate to be cleaned according to preset cleaning conditions to prepare a deep trench isolation structure.

[0007] Optionally, the preset etching conditions increase the downward bombardment capability of ions generated by ionizing the etching gas by filling the etching gas and reducing the etching chamber pressure and / or increasing the bias voltage, so that after the isolation portion corresponding to the bottom of the deep trench structure is removed, the thickness of the remaining isolation portion corresponding to the top of the deep trench structure meets the preset thickness requirement.

[0008] Optionally, the preset cleaning conditions increase the degree of ionization of the cleaning gas and the degree of contact between ions generated by ionizing the cleaning gas and the polymer by filling the cleaning gas and increasing the etching chamber pressure, increasing the RF power and / or reducing the bias voltage.

[0009] Optionally, the hydrogen content of the deposition gas is greater than the hydrogen content of the etching gas, and the fluorine content of the deposition gas is less than the fluorine content of the etching gas.

[0010] Optionally, the etching chamber pressure is changed in the following manner: the etching chamber pressure is changed by changing the gas flow rate in the etching chamber, wherein the etching chamber pressure is increased by reducing the gas flow rate in the etching chamber, and the etching chamber pressure is reduced by increasing the gas flow rate in the etching chamber.

[0011] Optionally, the deposition gas includes at least one of the following: fluoromethane, difluoromethane and trifluoromethane, and / or the etching gas includes at least one of the following: fluoromethane, difluoromethane, trifluoromethane and nitrogen trifluoride.

[0012] Optionally, the etching chamber includes a radio frequency generator, a bias power supply and an exhaust pump, wherein the preset deposition conditions include: filling the etching chamber with the deposition gas and controlling the pump speed of the exhaust pump so that the etching chamber pressure is within a first preset pressure range, the radio frequency power of the radio frequency generator is within a first radio frequency power range, and the bias voltage of the bias power supply is within a first bias voltage range; the preset etching conditions include: filling the etching chamber with the etching gas and controlling the pump speed of the exhaust pump so that the etching chamber pressure is within the first preset pressure range, the radio frequency power of the radio frequency generator is within the first radio frequency power range, and the bias voltage of the bias power supply is within a second bias voltage range, and the upper limit value of the second bias voltage range is greater than the upper limit value of the first bias voltage range.

[0013] Optionally, the first preset pressure range is 0 mtorr to 30 mtorr, the first RF power range is 500 watts to 1500 watts, the first bias voltage range is 40 volts to 400 volts, and the second bias voltage range is 40 volts to 2000 volts.

[0014] Optionally, the etching chamber includes a radio frequency generator, a bias power supply and an exhaust pump, wherein the preset cleaning conditions include: filling the etching chamber with the cleaning gas and controlling the pump speed of the exhaust pump so that the etching chamber pressure is within a second preset pressure range, the radio frequency power of the radio frequency generator is within a second radio frequency power range, and the bias voltage of the bias power supply is within a third bias voltage range, wherein the upper limit value of the second preset pressure range is greater than the upper limit value of the first preset pressure range, the upper limit value of the second radio frequency power range is greater than the upper limit value of the first radio frequency power range, the lower limit value of the third bias voltage range is less than the lower limit values ​​of the first bias voltage range and the second bias voltage range, and the upper limit value of the third bias voltage range is greater than the upper limit values ​​of the first bias voltage range and the second bias voltage range.

[0015] In a second aspect, an embodiment of the present application further provides a semiconductor device, comprising a deep trench isolation structure, wherein the deep trench isolation structure is manufactured by executing the preparation method described in the first aspect or any possible implementation manner of the first aspect.

[0016] The embodiment of the present application provides a method for preparing a deep trench isolation structure and a semiconductor device, right one. After the first isolation structure is generated on the target substrate through a furnace tube process and a chemical vapor deposition process in sequence, the present application moves to the etching chamber, and deposits the deep trench structure by adding a deposition step in the etching chamber, filling the etching chamber with deposition gas, increasing the etching chamber pressure and / or reducing the bias voltage, so that the thickness of the isolation part corresponding to the top of the deep trench structure is greater than the thickness of the isolation part corresponding to the bottom. On this basis, preset etching conditions and preset cleaning conditions are configured to process the wafer after deposition to complete the preparation of the deep trench isolation structure. The technical problem of low cost caused by increasing the top thickness of the deep trench isolation structure by increasing the deposition chamber pressure in the prior art is solved, and the technical effect of increasing the top thickness of the deep trench isolation structure and reducing the cost is achieved.

[0017] In order to make the above-mentioned objects, features and advantages of the present application more obvious and easy to understand, preferred embodiments are given below and described in detail with reference to the accompanying drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the following is a brief introduction to the drawings required for use in the embodiments. It should be understood that the following drawings only show certain embodiments of the present application and therefore should not be regarded as limiting the scope. For ordinary technicians in this field, other relevant drawings can be obtained based on these drawings without paying any creative work.

[0019] Figure 1 A schematic diagram shows the top remaining isolation portion of the deep trench isolation structure in the prior art after etching provided by an embodiment of the present application.

[0020] Figure 2 A schematic diagram shows the remaining isolation portion at the bottom of the deep trench isolation structure in the prior art after etching provided by an embodiment of the present application.

[0021] Figure 3 A flow chart of a method for preparing a deep trench isolation structure provided in an embodiment of the present application is shown.

[0022] Figure 4 A schematic structural diagram of a target substrate provided in an embodiment of the present application is shown.

[0023] Figure 5 A schematic diagram of a first isolation structure provided in an embodiment of the present application is shown.

[0024] Figure 6 A schematic diagram shows the remaining isolation portion on the top of the deep trench isolation structure provided by an embodiment of the present application after etching.

[0025] Figure 7 A schematic diagram shows the remaining isolation portion at the bottom of the deep trench isolation structure provided by an embodiment of the present application after etching. DETAILED DESCRIPTION

[0026] In order to make the purpose, technical solutions and advantages of the embodiments of the present application clearer, the technical solutions in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. It should be understood that the drawings in the present application only serve the purpose of illustration and description and are not used to limit the scope of protection of the present application. In addition, it should be understood that the schematic drawings are not drawn to scale. The flowcharts used in this application illustrate the operations implemented according to some embodiments of the present application. It should be understood that the operations of the flowcharts can be implemented out of sequence, and steps without logical context can be reversed or implemented simultaneously. In addition, those skilled in the art, under the guidance of the contents of this application, can add one or more other operations to the flowchart, or remove one or more operations from the flowchart.

[0027] In addition, the described embodiments are only a part of the embodiments of the present application, rather than all of the embodiments. The components of the embodiments of the present application generally described and shown in the drawings here can be arranged and designed in various configurations. Therefore, the following detailed description of the embodiments of the present application provided in the drawings is not intended to limit the scope of the claimed application, but merely represents selected embodiments of the present application. Based on the embodiments of the present application, all other embodiments obtained by those skilled in the art without making creative work are within the scope of protection of the present application.

[0028] Due to the high aspect ratio of the device structure, the plasma formed during the etching process is difficult to enter the bottom of the trench, so the etching rate at the top is much greater than the etching rate at the bottom, resulting in less isolation structure remaining at the top of the trench after etching. Figure 1 and Figure 2 , Figure 1 This is a schematic diagram of the remaining isolation portion at the top of the deep trench isolation structure after etching in the prior art provided by the embodiment of the present application. Figure 2 This is a schematic diagram of the remaining isolation portion at the bottom of the deep trench isolation structure after etching in the prior art provided by the embodiment of the present application. Figure 1 and Figure 2As shown, because the plasma moves from top to bottom, it preferentially etches the top of the deep trench isolation structure. This results in a significant difference in thickness between the remaining isolation portion at the top and the remaining isolation portion at the bottom of the deep trench isolation structure. This can easily lead to leakage at the top of the deep trench, affecting the safety of the semiconductor device. To prevent this from happening, the prior art increases the deposition chamber pressure during CVD deposition to deposit an oxide layer in the trench with a greater thickness at the top than at the bottom. However, increasing the deposition chamber pressure can cause wafer cracking, and pressure control is difficult. This change in the front-layer process increases process complexity and manufacturing cost.

[0029] Based on this, the embodiment of the present application provides a method for preparing a deep trench isolation structure and a semiconductor device. After the first isolation structure is generated on the target substrate through a furnace tube process and a chemical vapor deposition process in sequence, the present application moves to an etching chamber. By adding a deposition step in the etching chamber, filling the etching chamber with deposition gas, increasing the etching chamber pressure, and / or reducing the bias voltage, the deep trench structure is deposited so that the thickness of the isolation portion corresponding to the top of the deep trench structure is greater than the thickness of the isolation portion corresponding to the bottom. On this basis, preset etching conditions and preset cleaning conditions are configured to process the wafer after deposition to complete the preparation of the deep trench isolation structure. The method solves the technical problem of low cost caused by increasing the top thickness of the deep trench isolation structure by increasing the deposition chamber pressure in the prior art, and achieves the technical effect of increasing the top thickness of the deep trench isolation structure and reducing costs, as follows:

[0030] See also Figure 3 , Figure 3 This is a flow chart of a method for preparing a deep trench isolation structure provided in an embodiment of the present application. Figure 3 As shown, the method for preparing the deep trench isolation structure provided in the embodiment of the present application includes the following steps:

[0031] S101: Obtain a target substrate.

[0032] The target substrate includes a deep trench structure, wherein the target substrate is formed by sequentially manufacturing a silicon dioxide layer and a silicon nitride layer on a silicon substrate and then performing a DTI main etching to form a deep trench structure.

[0033] For example, see Figure 4 , Figure 4 This is a schematic diagram of the structure of the target substrate provided in the embodiment of the present application. Figure 4 As shown, a silicon dioxide layer is first grown on a silicon substrate, a silicon nitride layer is deposited on the basis of the silicon dioxide layer, and then a deep trench structure is formed by etching, and the bottom of the deep trench structure exposes the silicon substrate.

[0034] For example, the top width of the deep trench structure in the present application is 2 μm, the trench depth is 30 μm, and the aspect ratio is 15.

[0035] return Figure 3 S102: After the target substrate is subjected to a furnace process and a chemical vapor deposition process in sequence to generate a first isolation structure, the target substrate is moved to an etching chamber.

[0036] The first isolation structure covers the surface of the target substrate and the sidewalls and bottom of the deep trench structure. The first isolation structure is used to isolate the surface of the target substrate and the entire deep trench structure.

[0037] That is to say, after etching the deep trench structure, the target substrate is moved into the furnace tube to generate a first isolation oxide layer, and then the target substrate is moved into the CVD deposition chamber to deposit a second isolation oxide layer. The first isolation oxide layer and the second isolation oxide layer are used as the first isolation structure, thereby moving the target substrate with the first isolation structure into the etching chamber.

[0038] For example, see Figure 5 , Figure 5 This is a schematic diagram of the first isolation structure provided in the embodiment of the present application. Figure 5 As shown, a first isolation oxide layer is generated by a furnace tube process, and the first isolation oxide layer covers the bottom and part of the sidewall of the deep trench structure. A second isolation oxide layer is deposited by a chemical vapor deposition process, and the second isolation oxide layer covers the first isolation oxide layer, the surface of the target substrate, and the remaining sidewalls of the deep trench structure not covered by the first isolation oxide layer.

[0039] return Figure 3 , S103: depositing a second isolation structure on the first isolation structure according to preset deposition conditions.

[0040] The preset deposition conditions reduce the downward bombardment capability of ions generated by ionizing the deposition gas by filling the deposition gas and increasing the etching chamber pressure and / or reducing the bias voltage. The thickness of the isolation portion corresponding to the top of the second isolation structure is greater than the thickness of the isolation portion corresponding to the bottom.

[0041] That is, a second isolation structure is deposited in an etching chamber. The etching chamber includes a radio frequency generator, a bias power supply, and an exhaust pump, wherein the preset deposition conditions include: filling the etching chamber with the deposition gas and controlling the pumping speed of the exhaust pump so that the pressure in the etching chamber is within a first preset pressure range, the radio frequency power of the radio frequency generator is within a first radio frequency power range, and the bias voltage of the bias power supply is within a first bias voltage range.

[0042] The deposition gas includes at least one of fluoromethane, difluoromethane, and trifluoromethane, and the deposition gas further includes argon.

[0043] The etching chamber pressure is changed in the following manner: the etching chamber pressure is changed by changing the gas flow rate in the etching chamber, wherein the etching chamber pressure is increased by reducing the gas flow rate in the etching chamber, and the etching chamber pressure is reduced by increasing the gas flow rate in the etching chamber.

[0044] The first preset pressure range is 0 mtorr to 30 mtorr, the first radio frequency power range is 500 watts to 1500 watts, and the first bias voltage range is 40 volts to 400 volts.

[0045] Exemplarily, the etching chamber is filled with a deposition gas, which is at least one of 0 sccm-500 sccm (standard milliliters per minute) of CH3F (fluoromethane), 0 sccm-200 sccm CHF3 (trifluoromethane), and 0 sccm-300 sccm CH2F2 (difluoromethane). 0 sccm-100 sccm of argon Ar can also be filled into the deposition chamber. The pressure in the etching chamber is set to 0 mtorr to 30 mtorr by controlling the pump speed of the vacuum pump, and the RF power of the RF generator is set to 500 watts to 1500 watts, the bias voltage of the bias power supply is controlled to 40 volts to 400 volts, and the deposition time is limited to 2 seconds to 500 seconds.

[0046] In other words, theoretically, the chamber pressure can be increased by reducing the gas flow rate within the chamber. This reduction in gas flow rate causes the ionized deposition gas ions to move slowly downward, reducing their ability to bombard the chamber downward, resulting in more polymer deposition at the top of the deep trench. However, excessive chamber pressure can damage the wafer and affect process safety. Therefore, this application does not attempt to increase the thickness of the second isolation structure at the top of the deep trench by increasing the chamber pressure.

[0047] Furthermore, the embodiments of the present application reduce the pulling speed of the ionized deposition gas ions by reducing the bias voltage of the bias power supply, thereby reducing the ability of the deposition gas ions to bombard downward, and thus, the thickness of the isolation part corresponding to the top of the deep trench in the generated second isolation structure is greater than the thickness of the isolation part corresponding to the bottom.

[0048] S104: removing the isolation portion corresponding to the bottom of the deep trench structure in the first isolation structure and the second isolation structure according to preset etching conditions to obtain a substrate to be cleaned.

[0049] The preset etching conditions increase the downward bombardment capability of ions generated by ionizing the etching gas by filling the etching gas and reducing the etching chamber pressure and / or increasing the bias voltage, so that after the isolation portion corresponding to the bottom of the deep trench structure is removed, the thickness of the remaining isolation portion corresponding to the top of the deep trench structure meets the preset thickness requirement.

[0050] The preset etching conditions include: filling the etching chamber with the etching gas and controlling the pump speed of the vacuum pump so that the pressure of the etching chamber is within a first preset pressure range, the RF power of the RF generator is within a first RF power range, and the bias voltage of the bias power supply is within a second bias voltage range, and the upper limit value of the second bias voltage range is greater than the upper limit value of the first bias voltage range.

[0051] The second bias voltage ranges from 40 V to 2000 V. The etching gas includes at least one of the following: fluoromethane, argon, difluoromethane, trifluoromethane, and nitrogen trifluoride, and the etching gas also includes argon.

[0052] Exemplarily, after depositing the second isolation structure, an etching gas is filled into the etching chamber. The etching gas is at least one of 0 sccm-500 sccm CH3F (fluoromethane), 0 sccm-200 sccm CHF3 (trifluoromethane), 0 sccm-300 sccm CH2F2 (difluoromethane), and 0 sccm-300 sccm NF3 (nitrogen trifluoride). 0 sccm-100 sccm argon Ar can also be filled into the deposition chamber. The pump speed of the vacuum pump is controlled to make the pressure in the etching chamber between 0 mtorr and 30 mtorr, and the RF power of the RF generator is set to 500 watts to 1500 watts, and the bias voltage of the bias power supply is controlled to 40 volts to 2000 volts, and the etching time is limited to 2 seconds to 1000 seconds.

[0053] In other words, by reducing the etching chamber pressure, the gas flow rate in the etching chamber can be increased, thereby increasing the movement speed of the ionized etching gas ions, thereby accelerating the etching speed and improving the etching efficiency. Increasing the bias voltage will increase the pull on the etching gas ions, which will also lead to an increase in the etching speed and improve the etching efficiency. In order to reduce the complexity of the process operation in the embodiment of the present application, the etching chamber pressure and RF power are not changed during the etching step. Only the bias voltage is increased to increase the ability of the etching gas ions to bombard downward, thereby increasing the etching efficiency.

[0054] Furthermore, the etching process aims to expose the silicon substrate at the bottom of the deep trench structure to facilitate contact with the subsequently filled polysilicon. To expose the silicon substrate at the bottom of the deep trench structure, the isolation structure at the top of the deep trench is inevitably etched away during the etching process. However, due to the deposition of the second isolation structure in the etching chamber, the thickness of the remaining isolation portion corresponding to the top of the deep trench structure in the substrate to be cleaned after etching meets the preset thickness requirement, resulting in a sufficiently thick dielectric layer at the top of the deep trench structure, thereby improving top leakage.

[0055] The hydrogen content of the deposition gas is greater than the hydrogen content of the etching gas, and the fluorine content of the deposition gas is less than the fluorine content of the etching gas. That is, a higher hydrogen content and lower fluorine content results in faster polymer deposition, thereby increasing deposition efficiency; a higher fluorine content and lower hydrogen content results in faster etching, thereby increasing etching efficiency. Furthermore, the operator can freely select from the various gas types included in the aforementioned deposition gas and etching gas, respectively, as long as the hydrogen content of the deposition gas is greater than the hydrogen content of the etching gas, and the fluorine content of the deposition gas is less than the fluorine content of the etching gas, to achieve deposition and etching.

[0056] S105: Cleaning the etching chamber and the substrate to be cleaned according to preset cleaning conditions to prepare a deep trench isolation structure.

[0057] The preset cleaning conditions increase the ionization degree of the cleaning gas and the contact degree between the ions generated by the ionization of the cleaning gas and the polymer by filling the cleaning gas and increasing the pressure of the etching chamber, increasing the RF power and / or reducing the bias voltage.

[0058] The ionization degree of the cleaning gas is increased by increasing the etching chamber pressure and / or increasing the radio frequency power, and the downward bombardment capability is reduced by reducing the bias voltage, thereby increasing the contact degree between the ions generated by the ionization of the cleaning gas and the polymer.

[0059] The preset cleaning conditions include: filling the etching chamber with the cleaning gas and controlling the pump speed of the vacuum pump so that the pressure of the etching chamber is within a second preset pressure range, the RF power of the RF generator is within a second RF power range, and the bias voltage of the bias power supply is within a third bias voltage range.

[0060] The second preset pressure range is 0 mtorr to 100 mtorr, the second RF power range is 500 watts to 3000 watts, and the third bias voltage range is 0 volts to 400 volts. The cleaning gas is an oxygen-containing gas, including 0 sccm to 2000 sccm O2 (oxygen). The cleaning gas may also include 0 sccm to 2000 sccm N2 (nitrogen).

[0061] Illustratively, after the etching operation is performed in the etching chamber, a cleaning gas is filled into the etching chamber, and the cleaning gas is 0 sccm-2000 sccm O2. 0 sccm-2000 sccm N2 can also be filled into the deposition chamber. The pressure in the etching chamber is set to 0 mtorr to 100 mtorr by controlling the pump speed of the exhaust pump, and the RF power of the RF generator is set to 500 watts to 3000 watts, and the bias voltage of the bias power supply is controlled to 0 volts to 400 volts, and the cleaning time is limited to 2 seconds to 200 seconds.

[0062] Among them, the upper limit value of the second preset pressure range is greater than the upper limit value of the first preset pressure range, the upper limit value of the second RF power range is greater than the upper limit value of the first RF power range, the lower limit value of the third bias voltage range is less than the lower limit values ​​of the first bias voltage range and the second bias voltage range, and the upper limit value of the third bias voltage range is greater than the upper limit values ​​of the first bias voltage range and the second bias voltage range.

[0063] That is to say, during the cleaning process, the etching chamber pressure is increased by reducing the gas flow rate in the etching chamber, and the RF power is increased to fully ionize the slow-moving cleaning gas ions, thereby facilitating the cleaning gas ions to fully contact the etching chamber and the polymer in the deep groove. Furthermore, by reducing the bias voltage, the traction on the cleaning gas ions is reduced, and the downward bombardment ability of the cleaning gas ions is reduced, thereby achieving sufficient cleaning to increase the cleaning efficiency.

[0064] For example, see Figure 6 and Figure 7 , Figure 6 This is a schematic diagram of the remaining isolation portion on the top of the deep trench isolation structure provided in an embodiment of the present application after etching. Figure 7 Schematic diagram of the remaining isolation portion at the top of the deep trench isolation structure provided in the embodiment of the present application after etching. Figure 6 and Figure 7 As shown, after the silicon substrate at the bottom of the deep trench structure is fully exposed, the top remaining isolation portion in the deep trench isolation structure is smaller than that in the Figure 1 The thickness of the top remaining isolation portion is increased.

[0065] Furthermore, the present application adds a dry deposition step during the etching process without changing the previous layer process to generate a polymer in the deep trench structure, and the thickness of the formed polymer at the corresponding part of the top of the deep trench is greater than the thickness of the corresponding part at the bottom, so that after etching, the deep trench still retains an oxide layer on the top and side walls of the deep trench that meets the requirements, thereby reducing the technical problems of process difficulty and cost increase caused by the previous process operation, achieving the technical effect of reducing process difficulty and saving process cost, and the thickness of the remaining oxide layer after etching is greater than the thickness of the remaining oxide layer in the prior art, thereby improving the isolation effect and improving the electrical properties of the device.

[0066] Based on the same application concept, a semiconductor device is further provided in an embodiment of the present application, wherein the semiconductor device includes a deep trench isolation structure, and the deep trench isolation structure is manufactured by the preparation method of the deep trench isolation structure as described in any of the above embodiments.

[0067] Those skilled in the art can clearly understand that, for the convenience and simplicity of description, the specific working process of the system and device described above can refer to the corresponding process in the aforementioned method embodiment, and will not be repeated here. In the several embodiments provided in this application, it should be understood that the disclosed system, device and method can be implemented in other ways. The device embodiments described above are merely schematic. For example, the division of the units is only a logical function division. There may be other division methods in actual implementation. For example, multiple units or components can be combined or integrated into another system, or some features can be ignored or not executed. Another point is that the mutual coupling or direct coupling or communication connection shown or discussed can be through some communication interfaces, indirect coupling or communication connection of devices or units, which can be electrical, mechanical or other forms.

[0068] The units described as separate components may or may not be physically separate, and the components shown as units may or may not be physical units, that is, they may be located in one place or distributed across multiple network units. Some or all of these units may be selected to achieve the purpose of this embodiment according to actual needs.

[0069] In addition, each functional unit in each embodiment of the present application may be integrated into one processing unit, or each unit may exist physically separately, or two or more units may be integrated into one unit.

[0070] If the functions are implemented in the form of software functional units and sold or used as independent products, they can be stored in a non-volatile computer-readable storage medium that is executable by a processor. Based on this understanding, the technical solution of the present application, or the part that contributes to the prior art, or the part of the technical solution, can be embodied in the form of a software product. The computer software product is stored in a storage medium and includes several instructions for enabling a computer device (which can be a personal computer, a server, or a network device, etc.) to execute all or part of the steps of the method described in each embodiment of the present application. The aforementioned storage medium includes various media that can store program codes, such as a USB flash drive, a mobile hard disk, a read-only memory (ROM), a random access memory (RAM), a magnetic disk, or an optical disk.

[0071] The above are only specific embodiments of the present application, but the scope of protection of this application is not limited thereto. Any changes or substitutions that can be easily conceived by a person skilled in the art within the technical scope disclosed in this application should be included in the scope of protection of this application. Therefore, the scope of protection of this application should be based on the scope of protection of the claims.

Claims

1. A method for preparing a deep trench isolation structure, characterized in that: The preparation method comprises: obtaining a target substrate, wherein the target substrate includes a deep trench structure; After sequentially performing a furnace process and a chemical vapor deposition process on the target substrate to form a first isolation structure, the target substrate is moved to an etching chamber, wherein the first isolation structure covers the surface of the target substrate and the sidewalls and bottom of the deep trench structure; Depositing a second isolation structure on the first isolation structure according to preset deposition conditions, wherein the preset deposition conditions reduce the downward bombardment capability of ions generated by ionizing the deposition gas by filling the deposition gas and increasing the etching chamber pressure and / or reducing the bias voltage, wherein the thickness of the second isolation structure at the isolation portion corresponding to the top of the deep trench structure is greater than the thickness of the isolation portion corresponding to the bottom; Removing the isolation portion corresponding to the bottom of the deep trench structure in the first isolation structure and the second isolation structure according to preset etching conditions to obtain a substrate to be cleaned. The preset etching conditions increase the downward bombardment capability of ions generated by ionizing the etching gas by filling the etching gas and reducing the etching chamber pressure and / or increasing the bias voltage, so that after the isolation portion corresponding to the bottom of the deep trench structure is removed, the thickness of the remaining isolation portion corresponding to the top of the deep trench structure meets a preset thickness requirement; The etching chamber and the substrate to be cleaned are cleaned according to preset cleaning conditions to prepare a deep trench isolation structure.

2. The preparation method according to claim 1, characterized in that The preset cleaning conditions increase the ionization degree of the cleaning gas and the contact degree between the ions generated by the ionization of the cleaning gas and the polymer by filling the cleaning gas and increasing the pressure of the etching chamber, increasing the RF power and / or reducing the bias voltage.

3. The preparation method according to claim 1, characterized in that The hydrogen content of the deposition gas is greater than the hydrogen content of the etching gas, and the fluorine content of the deposition gas is less than the fluorine content of the etching gas.

4. The preparation method according to any one of claims 1 to 2, characterized in that The pressure of the etching chamber is changed by changing the gas flow rate in the etching chamber to change the pressure of the etching chamber. The pressure of the etching chamber is increased by reducing the gas flow rate in the etching chamber, and the pressure of the etching chamber is reduced by increasing the gas flow rate in the etching chamber.

5. The preparation method according to claim 1, characterized in that The deposition gas comprises at least one of fluoromethane, difluoromethane and trifluoromethane, and / or, The etching gas includes at least one of the following: fluoromethane, difluoromethane, trifluoromethane and nitrogen trifluoride.

6. The preparation method according to claim 1, characterized in that The etching chamber includes a radio frequency generator, a bias power supply and an air pump. The preset deposition conditions include: filling the etching chamber with the deposition gas and controlling the pump speed of the vacuum pump so that the pressure of the etching chamber is within a first preset pressure range, the RF power of the RF generator is within a first RF power range, and the bias voltage of the bias power supply is within a first bias voltage range. The preset etching conditions include: filling the etching chamber with the etching gas and controlling the pump speed of the vacuum pump so that the pressure of the etching chamber is within a first preset pressure range, the RF power of the RF generator is within a first RF power range, and the bias voltage of the bias power supply is within a second bias voltage range, and the upper limit value of the second bias voltage range is greater than the upper limit value of the first bias voltage range.

7. The preparation method according to claim 6, characterized in that The first preset pressure range is 0 mtorr to 30 mtorr, the first RF power range is 500 watts to 1500 watts, the first bias voltage range is 40 volts to 400 volts, and the second bias voltage range is 40 volts to 2000 volts.

8. The preparation method according to claim 2, characterized in that The etching chamber includes a radio frequency generator, a bias power supply and an air pump. The preset cleaning conditions include: filling the etching chamber with the cleaning gas and controlling the pump speed of the vacuum pump so that the pressure of the etching chamber is within a second preset pressure range, the RF power of the RF generator is within a second RF power range, and the bias voltage of the bias power supply is within a third bias voltage range. Among them, the upper limit value of the second preset pressure range is greater than the upper limit value of the first preset pressure range, the upper limit value of the second RF power range is greater than the upper limit value of the first RF power range, the lower limit value of the third bias voltage range is less than the lower limit values ​​of the first bias voltage range and the second bias voltage range, and the upper limit value of the third bias voltage range is greater than the upper limit values ​​of the first bias voltage range and the second bias voltage range.

9. A semiconductor device, characterized in that: The semiconductor device includes a deep trench isolation structure, and the deep trench isolation structure is manufactured by the manufacturing method according to any one of claims 1 to 8.

Citation Information

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