Digital predistortion processing method, apparatus, equipment and computer-readable storage medium

Abstract

This application discloses a digital predistortion processing method, apparatus, device, and computer-readable storage medium. The digital predistortion processing method includes: determining the type of a distorted signal; the distorted signal representing a signal whose original signal is distorted when passing through a power amplifier; the type of the distorted signal including at least one of the following: a wideband signal; a narrowband signal; determining update parameters for a corresponding predistorter based on the type of the distorted signal; and updating the predistorter based on the determined update parameters to ensure that the linearity of the predistortion system composed of the predistorter and the power amplifier meets a preset requirement.

Description

Technical Field

[0001] This application relates to the field of wireless communication technology, and in particular to a digital predistortion processing method, apparatus, device, and computer-readable storage medium. Background Technology

[0002] Digital pre-distortion (DPD) is a commonly used method for processing power amplifier (PA) distortion. This method mainly involves pre-inputting a signal with nonlinear characteristics opposite to those of the PA in the digital domain, and then cascading the nonlinear signal to the PA to couple out a linearized signal.

[0003] However, the DPD technology in related technologies is not efficient when processing large bandwidth signals, and there is a problem that the coefficient iteration time is too long. Summary of the Invention

[0004] To address the technical problems existing in related technologies, embodiments of this application provide a digital predistortion processing method, apparatus, device, and computer-readable storage medium.

[0005] To achieve the above objectives, the technical solution of this application embodiment is implemented as follows:

[0006] In a first aspect, embodiments of this application provide a digital predistortion processing method, the method comprising:

[0007] Determine the type of the distorted signal; the distorted signal characterizes the original signal that has been distorted when passing through the power amplifier; the type of the distorted signal includes at least one of the following: wideband signal; narrowband signal;

[0008] Based on the type of the distorted signal, determine the corresponding update parameters of the predistorter;

[0009] Based on the determined update parameters of the predistorter, the predistorter is updated so that the linearity of the predistortion system composed of the predistorter and the power amplifier meets the preset requirements.

[0010] Secondly, embodiments of this application also provide a digital predistortion processing apparatus, comprising:

[0011] A first determining unit is configured to determine the type of the distorted signal; the distorted signal characterizes the original signal that has been distorted when passing through a power amplifier; the type of the distorted signal includes at least one of the following: a wideband signal; a narrowband signal;

[0012] The second determining unit is used to determine the update parameters of the corresponding predistorter based on the type of the distorted signal;

[0013] An update unit is used to update the predistorter based on the determined update parameters of the predistorter, so that the linearity of the predistorter and the power amplifier constitute the predistortion system meets a preset requirement.

[0014] Thirdly, embodiments of this application also provide a digital predistortion processing apparatus, including: a processor and a memory for storing a computer program capable of running on the processor;

[0015] When the processor runs the computer program, it executes the steps of the digital predistortion processing method described in the embodiments of this application.

[0016] Fourthly, embodiments of this application also provide a computer-readable storage medium having a computer program stored thereon, wherein the computer program, when executed by a processor, implements the steps of the digital predistortion processing method described in embodiments of this application.

[0017] The digital predistortion processing method, apparatus, device, and computer-readable storage medium provided in this application determine the type of a distorted signal, wherein the distorted signal represents a signal that has been distorted when the original signal passes through a power amplifier; the type of the distorted signal includes at least one of the following: a wideband signal; a narrowband signal; based on the type of the distorted signal, determine the corresponding update parameters of the predistorter; based on the determined update parameters of the predistorter, update the predistorter so that the linearity of the predistortion system composed of the predistorter and the power amplifier meets a preset requirement. By adopting the scheme of this application embodiment, the corresponding update parameters of the predistorter are determined for different types of distorted signals, thereby updating the predistorter only based on the determined update parameters; that is, this application embodiment performs digital predistortion processing in a matching manner according to the type of distorted signal, reducing the computational load of digital predistortion and thus accelerating the iteration time of predistorter updates. Attached Figure Description

[0018] Figure 1 This is a schematic diagram illustrating the principle of using DPD technology to process PA distortion in related technologies;

[0019] Figure 2 This is a flowchart illustrating the digital predistortion processing method according to an embodiment of this application. Figure 1 ;

[0020] Figure 3 This is a flowchart illustrating the digital predistortion processing method according to an embodiment of this application. Figure 2 ;

[0021] Figure 4 This is a schematic diagram of the framework of the digital predistortion processing method according to an embodiment of this application. Figure 1 ;

[0022] Figure 5 This is a schematic diagram of the framework of the digital predistortion processing method according to an embodiment of this application. Figure 2 ;

[0023] Figure 6 This is a schematic diagram of filters with various order selections according to embodiments of this application;

[0024] Figure 7 This is a schematic diagram of the composition structure of the digital predistortion processing device according to an embodiment of this application;

[0025] Figure 8 This is a schematic diagram of the hardware structure of the digital predistortion processing device according to an embodiment of this application. Detailed Implementation

[0026] The present application will now be described in further detail with reference to the accompanying drawings and embodiments.

[0027] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the application.

[0028] Typically, the power amplifier (PA) is a key component in a radio frequency transceiver (TRX) chip. When the PA operates in saturation, nonlinear issues such as spectral spread and in-band signal distortion can occur. These issues primarily stem from inherent problems such as variations in the input impedance of the transistors within the PA and electro-thermal coupling. PA distortion can be measured using metrics such as the adjacent channel power ratio (ACPR), error vector magnitude (EVM), and normalized mean square error (NMSE).

[0029] In related technologies, DPD technology is mainly used to handle PA distortion. Figure 1 This is a schematic diagram illustrating the principle of using DPD technology to process PA distortion in related technologies, such as... Figure 1 As shown, a signal with nonlinear characteristics opposite to those of the PA is first input to the predistorter. Then, this nonlinear signal is cascaded to the PA (also known as a power amplifier), so that the PA can couple out a linearized signal and output the linearized signal.

[0030] However, the DPD technology in related technologies is not efficient when processing large bandwidth signals, and there is a problem that the coefficient iteration time is too long.

[0031] Based on this, this application proposes a digital predistortion processing method. In various embodiments of this application, by determining the update parameters of the corresponding predistorter for different types of distortion signals, the predistorter is updated only based on the determined update parameters. In other words, this application performs digital predistortion processing in a matching manner according to the type of distortion signal, reducing the computational load of digital predistortion and thus accelerating the iteration time of predistorter update.

[0032] This application provides a digital predistortion processing method, which is applied to a digital predistortion processing device. Figure 2 This is a flowchart illustrating the digital predistortion processing method according to an embodiment of this application. Figure 1 ;like Figure 2 As shown, the method includes:

[0033] Step 201: Determine the type of distorted signal.

[0034] In this embodiment of the application, the distortion signal represents the original signal that has been distorted when it passes through the power amplifier; the type of the distortion signal includes at least one of the following: wideband signal; narrowband signal.

[0035] In practical applications, a digital predistortion processing device can first determine the signal bandwidth of the distorted signal, and then determine the type of distorted signal based on the signal bandwidth of the distorted signal.

[0036] Accordingly, in one embodiment, before determining the type of the distorted signal, the method further includes: determining the signal bandwidth of the distorted signal.

[0037] Here, the digital predistortion processing device can use existing signal bandwidth measurement methods to measure the signal bandwidth of the distorted signal in order to determine the signal bandwidth of the current distorted signal. This application embodiment does not limit this.

[0038] In one embodiment, determining the type of the distorted signal includes:

[0039] The signal bandwidth of the distorted signal is compared with a set bandwidth threshold to obtain a comparison result;

[0040] If the comparison result indicates that the signal bandwidth of the distorted signal is greater than the bandwidth threshold, the type of the distorted signal is determined to be a wideband signal;

[0041] If the comparison result indicates that the signal bandwidth of the distorted signal is less than or equal to the bandwidth threshold, the type of the distorted signal is determined to be a narrowband signal.

[0042] Here, the bandwidth threshold can be set according to actual needs, and this embodiment of the application does not limit it.

[0043] Step 202: Determine the update parameters of the corresponding predistorter based on the type of the distorted signal.

[0044] In practical applications, the type of distortion caused by power changes varies for different types of distorted signals. Therefore, the digital predistortion processing device can determine the update parameters of the predistorter corresponding to different types of distorted signals.

[0045] Based on this, in one embodiment, determining the corresponding predistorter update parameters based on the type of the distorted signal includes one of the following:

[0046] When the type of the distorted signal includes a narrowband signal, the update parameter of the corresponding predistorter is determined to be the static distortion parameter;

[0047] When the type of the distorted signal includes a broadband signal, the update parameter of the corresponding predistorter is determined to be a dynamic distortion parameter; the dynamic distortion parameter includes one of the following: linear dynamic distortion parameter; nonlinear dynamic distortion parameter.

[0048] Here, when the digital predistortion processing device determines that the distorted signal is a narrowband signal, it can be determined based on the power influence factor that the power change mainly affects the static distortion, while having little impact on the dynamic distortion. In this case, the update parameter of the corresponding predistorter is the static distortion parameter. When the digital predistortion processing device determines that the distorted signal is a wideband signal, it can be determined based on the power influence factor that the power change mainly affects the dynamic distortion, and the dynamic distortion has a memory effect. In this case, the update parameter of the corresponding predistorter is the dynamic distortion parameter, where the dynamic distortion parameter includes one of the following: linear dynamic distortion parameter; nonlinear dynamic distortion parameter.

[0049] In practical applications, the digital predistortion processing device can test distortion parameters at different power levels and store the distortion parameters at different power levels.

[0050] Based on this, in one embodiment, the method further includes:

[0051] Determine the dynamic distortion parameters for each frequency point, and the static distortion parameters for different power levels corresponding to each frequency point;

[0052] The dynamic distortion parameters corresponding to each frequency point and the static distortion parameters corresponding to different power levels of each frequency point are cached.

[0053] Here, for all frequency points of the target narrowband signal, the digital predistortion processing device determines dynamic parameters based on the output of the power amplifier corresponding to the target narrowband signal, and determines the corresponding model output data under different power level inputs at each frequency point based on the dynamic parameters. Furthermore, it determines the static distortion parameters at the corresponding power level based on the determined model output data. It should be noted that the target narrowband signal is a signal that meets set conditions. For example, the target narrowband signal can be a signal with the minimum bandwidth supported by the chip at the target application frequency point; for instance, the bandwidth of the target narrowband signal is 20MHz.

[0054] It should be noted that the digital predistortion processing device can cache the dynamic distortion parameters corresponding to each frequency point and the static distortion parameters corresponding to different power levels of each frequency point in a pre-set storage module. In this embodiment, the storage module can be located in the DPD module and is used to cache the calculation data required by the DPD module, such as the raw input data and raw output data of the power amplifier. In addition, it can also be used to cache the distortion configuration items updated by the DPD module. The distortion configuration items updated by the DPD module include the dynamic distortion parameters of each frequency point and the static distortion parameters corresponding to different power levels of each frequency point, which constitute a set of configuration items corresponding to the distortion signal. Here, the above-mentioned distortion configuration items can be configured through option I. i The implementation of this application does not limit the scope of the call.

[0055] Step 203: Based on the determined update parameters of the predistorter, update the predistorter so that the linearity of the predistortion system composed of the predistorter and the power amplifier meets the preset requirements.

[0056] In practical applications, the digital predistortion processing device can update the parameters of the predistorter based on the NMSE of the distortion signal in each downlink channel.

[0057] Based on this, in one embodiment, updating the predistorter based on the determined update parameters of the predistorter includes:

[0058] Determine the first parameter of the distorted signal in each downlink channel; the first parameter includes at least NMSE;

[0059] When the NMSE exceeds the set parameter threshold, the predistorter is updated based on the determined update parameters of the predistorter until the NMSE reaches the parameter threshold and the update stops.

[0060] Here, the digital predistortion processing device can use existing calculation methods to calculate the NMSE of the distorted signal in each downlink channel to determine the first parameter of the current distorted signal in each downlink channel, i.e., NMSE. This application embodiment does not limit this.

[0061] It should be noted that the set parameter threshold can be set according to actual needs, and this application embodiment does not limit it.

[0062] In practical applications, when the bandwidth of the distorted signal to be processed is large, the computational complexity increases. In this case, off-chip computing power can be introduced to speed up the parameter iteration speed of the predistorter.

[0063] Based on this, in one embodiment, the method further includes:

[0064] Determine the signal bandwidth of the distorted signal;

[0065] Based on the signal bandwidth of the distorted signal, a corresponding module is allocated for determining the update parameters of the predistorter.

[0066] Here, the digital predistortion processing device can use existing signal bandwidth measurement methods to measure the signal bandwidth of the distorted signal in order to determine the current signal bandwidth size of the distorted signal. This application embodiment does not limit this.

[0067] In this embodiment, regarding the allocation of modules for determining the update parameters of the predistorter based on the signal bandwidth of the distorted signal, if the signal bandwidth of the distorted signal is less than or equal to a bandwidth threshold, the type of the distorted signal is determined to be a narrowband signal, and the module allocated for determining the update parameters of the predistorter is a DPD module; if the signal bandwidth of the distorted signal is greater than the bandwidth threshold, the type of the distorted signal is determined to be a wideband signal, and the module allocated for determining the update parameters of the predistorter is a host device. The host device is off-chip computing power. For example, the host device can be a Field-Programmable Gate Array (FPGA), a Microcontroller Unit (MCU), etc., which are not limited in this embodiment. That is, considering that the on-chip DPD module cannot quickly complete the calculation of wideband signals, this embodiment uses a host device instead of the DPD module to calculate the update parameters of the predistorter, thereby accelerating the parameter iteration speed of the predistorter.

[0068] In practical applications, in order to improve the efficiency of the host device (i.e., the off-chip host) in receiving and processing data, the digital predistortion processing device can use truncation bits as markers to transmit the predistorter's configuration options that have been stored, and retrieve the updated parameters of the predistorter by calling the configuration options.

[0069] Based on this, in one embodiment, the method further includes:

[0070] Determine the truncation bit; the truncation bit represents a marker parameter used to truncate at least two low-order bits of the baseband signal;

[0071] The configuration options of the predistorter are transmitted using the truncated bit; the configuration options are used to invoke the update parameters of the predistorter.

[0072] Here, when the host device transmits the baseband signal, it can use a truncation bit to truncate at least two low bits of the baseband signal, for example, truncate the lower two bits or more bits of the baseband signal.

[0073] In one embodiment, the configuration options for transmitting the predistorter using the truncated bit include:

[0074] The configuration options of the predistorter are cascaded onto the truncation bit for transmission.

[0075] In practical applications, the digital predistortion processing device can cascade the predistorter's configuration options to the truncation bit for transmission based on information such as signal bandwidth and power. Since the updated parameters of the predistorter, i.e., the distortion configuration items updated by the DPD module, can be transmitted via configuration option I... i Therefore, this embodiment of the application will use the configuration option I of the DPD module for invocation. i The transmission is cascaded to the truncated bit, thereby enabling rapid access to the predistorter's update parameters. In this way, the DPD module can directly adjust the predistorter according to the configuration options without waiting for feedback signals, thus improving the speed of predistorter adjustment.

[0076] This application also provides another digital predistortion processing method, which is applied to a digital predistortion processing device. Figure 3 This is a flowchart illustrating the digital predistortion processing method according to an embodiment of this application. Figure 2 ;like Figure 3 As shown, the method includes:

[0077] Step 301: Determine the type of distorted signal.

[0078] In this embodiment of the application, the distortion signal represents the original signal that has been distorted when it passes through the power amplifier; the type of the distortion signal includes at least one of the following: wideband signal; narrowband signal.

[0079] In one embodiment, determining the type of the distorted signal includes:

[0080] The signal bandwidth of the distorted signal is compared with a set bandwidth threshold to obtain a comparison result;

[0081] If the comparison result indicates that the signal bandwidth of the distorted signal is greater than the bandwidth threshold, the type of the distorted signal is determined to be a wideband signal;

[0082] If the comparison result indicates that the signal bandwidth of the distorted signal is less than or equal to the bandwidth threshold, the type of the distorted signal is determined to be a narrowband signal.

[0083] Step 302: Determine the signal bandwidth of the distorted signal.

[0084] Step 303: Based on the signal bandwidth of the distorted signal, allocate a corresponding module for determining the update parameters of the predistorter.

[0085] Step 304: Based on the type of the distorted signal, determine the corresponding update parameters of the predistorter using the allocated module for determining the update parameters of the predistorter.

[0086] In one embodiment, determining the corresponding predistorter update parameters based on the type of the distorted signal includes one of the following:

[0087] When the type of the distorted signal includes a narrowband signal, the update parameter of the corresponding predistorter is determined to be the static distortion parameter;

[0088] When the type of the distorted signal includes a broadband signal, the update parameter of the corresponding predistorter is determined to be a dynamic distortion parameter; the dynamic distortion parameter includes one of the following: linear dynamic distortion parameter; nonlinear dynamic distortion parameter.

[0089] Step 305: Determine the first parameter of the distorted signal in each downlink channel; the first parameter includes at least NMSE.

[0090] Step 306: When the NMSE exceeds the set parameter threshold, the predistorter is updated based on the update parameters of the predistorter until the NMSE reaches the parameter threshold, so that the linearity of the predistortion system composed of the predistorter and the power amplifier meets the preset requirements.

[0091] It should be noted that the specific processing steps of the digital predistortion processing device to perform digital predistortion processing have been detailed above and will not be repeated here.

[0092] The technical solution adopted in this application determines the update parameters of the predistorter for different types of distorted signals, and updates the predistorter only based on the determined update parameters. In other words, this application performs digital predistortion processing in a matching manner according to the type of distorted signal, reducing the computational load of digital predistortion and thus accelerating the iteration time of predistorter updates. Furthermore, considering that the on-chip DPD module cannot quickly complete the calculation of wideband signals, this application uses a host device to calculate the update parameters of the predistorter instead of the DPD module, thereby accelerating the parameter iteration speed of the predistorter.

[0093] The present application will be described below with reference to application examples.

[0094] This application proposes a DPD processing method for various broadband signals. This method is a dynamic DPD processing method, that is, when the DPD module needs to process large bandwidth signals (corresponding to the aforementioned broadband signals), the calculation can be offloaded to off-chip computing power such as FPGA or MCU, thereby accelerating the iteration speed of DPD.

[0095] Figure 4 This is a schematic diagram of the framework of the digital predistortion processing method according to an embodiment of this application. Figure 1 ,like Figure 4 As shown, based on the original framework of using DPD technology to process PA distortion, a host device, a narrowband processing module, and a post-feedback processing module have been added. Figure 5 This is a schematic diagram of the framework of the digital predistortion processing method according to an embodiment of this application. Figure 2 ,Depend on Figure 5 As can be seen, the update parameters of DPD include static distortion (memoryless polynomial), linear dynamic distortion (including low-order and high-order linear dynamic distortion), and nonlinear dynamic distortion (nonlinear dynamic distortion includes two types of delay: same delay and lag delay). The following will combine these with... Figure 4 and Figure 5 The process of the digital predistortion processing method according to the embodiments of this application will be described in detail.

[0096] When the distorted signal is a narrowband signal, power changes mainly affect static distortion, while having little impact on dynamic distortion. Therefore, this application utilizes a narrowband processing module to test static distortion under different power levels and obtain the static distortion parameters. The specific implementation steps are as follows:

[0097] (1) Select the application frequency as PIN. MAXA chip with a -2dB level supports the transmission of signals with the smallest bandwidth (e.g., a 20MHz broadband signal). Assuming the signal input to the power amplifier to the narrowband processing module is x0, the narrowband processing module obtains the output signal y0 from the power amplifier through a feedback path (i.e., the post-feedback processing module). Based on x0 and y0, the dynamic parameter α can be calculated (α is the coefficient of the low-order filter; at this time, only the low-order filter operates, and the other orders are disconnected, e.g., ...). Figure 6 (A schematic diagram of filters with various order selections is shown).

[0098] (2) Based on the dynamic parameter α, the power levels can be calculated, for example (PIN). MAX PIN MAX -2dB, PIN MAX -4dB) Input x i The output d of the dynamic model i Based on this, the static distortion coefficient β at this power level can be calculated. i .

[0099] (3) Store the dynamic parameter α and the static distortion coefficient β of the corresponding power at the corresponding frequency point. i To the storage module (the storage module is in) Figure 5 (as shown in the image).

[0100] (4) Repeat steps (1) to (3) above until all frequency points have been traversed.

[0101] (5) With the bandwidth constant, when the signal power P i When changes occur, simply adjust the static distortion coefficient β of the static response in the DPD module. i This reduces the computational load of the DPD module and speeds up the iteration time.

[0102] (6) When the power level is at level P before parameter identification, the parameter β can be determined based on the level before and after which parameter identification has been performed. i and β i-1 Linear interpolation is used to solve for the distortion parameter β.

[0103] Here, the storage module can be located within the DPD module to cache the computational data required by the DPD module, such as the raw input and output data of the power amplifier. It can also store updated distortion configuration items for the DPD, including the static and dynamic distortion parameters for different power levels provided by the aforementioned narrowband processing module, as well as the corresponding dynamic and nonlinear dynamic distortion parameters transmitted by the host device (described later). These distortion configuration items form a set of configuration items corresponding to the signal, and these configuration items can be configured via option I. i Make the call.

[0104] When the signal bandwidth of a distorted signal increases, the power change mainly affects the dynamic distortion with memory effect, and the gain fluctuation at the same frequency within the bandwidth is similar to that of a narrowband signal. In other words, the dynamic coefficient of a narrowband signal can be inherited into the distortion coefficient of a wideband signal. Considering that the on-chip DPD module cannot quickly complete the calculation of a large wideband signal (e.g., 200M, corresponding to the aforementioned wideband signal), the host device is used to replace the DPD module for parameter calculation.

[0105] (1) First, a broadband signal is sent through the link. At this time, the input of the newly added broadband data matrix of the power amplifier is x. B The output is y B , will y B Subtract the output y from the narrowband processing module N Then we can get y R .

[0106] (2) Assuming that 16 bits are currently used to transmit data, y R and x B The data is truncated (2 bits or more that do not affect the data precision), then a flag bit (which can be 2 bits or more) is concatenated and fed back to the host device via the 204B interface. The host device then calculates the higher-order filter coefficients γ and the nonlinear dynamic distortion coefficients δ based on this.

[0107] (3) The host device transmits the updated DPD coefficients to the DPD module through the serial peripheral interface (SPI), reuses the previous low-order dynamic coefficients α, and completes the update of the DPD operation.

[0108] (4) Repeat steps (1) to (3) above until all bandwidths have been traversed across all frequency points. Save the corresponding DPD coefficients. When the power changes, only the static distortion coefficient β needs to be adjusted. i When bandwidth increases, the filter order is increased; when bandwidth decreases, the corresponding filter order is turned off.

[0109] (5) When the host device transmits baseband signals, it can use truncation bits to truncate the lower two bits or more, and adjust the DPD configuration option I according to bandwidth and power information. i Concatenated to the lower two bits and sent out, the DPD module according to I i The predistorter can be adjusted directly without waiting for feedback signals.

[0110] (6) Calculate the NMSE of the transmitted signal through the feedback path. When the NMSE exceeds the preset threshold, iterate the distortion coefficient of the predistorter until the NMSE reaches the preset threshold.

[0111] Based on the power effect, the memory effect caused by in-band ripple effect, and the remaining nonlinear cross terms, this application classifies the distortion type into static distortion, linear dynamic distortion, and nonlinear dynamic distortion, and performs corrections for different types of distortion, and updates the distortion coefficients of the predistorter according to the NMSE of each downlink channel.

[0112] As can be seen, the DPD processing method for various broadband signals proposed in this application matches the type of distorted signal (broadband signal or narrowband signal) to perform DPD calculation and execution configuration. Compared with related technologies, this application can reduce circuit consumption when the signal bandwidth is reduced, and introduce off-chip computing power when the computational complexity increases, thereby accelerating the parameter iteration process.

[0113] To implement the digital predistortion processing method of this application, this application also provides a digital predistortion processing apparatus. Figure 7 This is a schematic diagram of the composition structure of the digital predistortion processing device according to an embodiment of this application, as shown below. Figure 7 As shown, the digital predistortion processing device includes:

[0114] The first determining unit 71 is used to determine the type of the distorted signal; the distorted signal characterizes the original signal that is distorted when it passes through the power amplifier; the type of the distorted signal includes at least one of the following: wideband signal; narrowband signal;

[0115] The second determining unit 72 is used to determine the update parameters of the corresponding predistorter based on the type of the distorted signal;

[0116] The updating unit 73 is used to update the predistorter based on the determined update parameters of the predistorter, so that the linearity of the predistortion system composed of the predistorter and the power amplifier meets the preset requirements.

[0117] In one embodiment, the first determining unit 71 is specifically used for:

[0118] The signal bandwidth of the distorted signal is compared with a set bandwidth threshold to obtain a comparison result;

[0119] If the comparison result indicates that the signal bandwidth of the distorted signal is greater than the bandwidth threshold, the type of the distorted signal is determined to be a wideband signal;

[0120] If the comparison result indicates that the signal bandwidth of the distorted signal is less than or equal to the bandwidth threshold, the type of the distorted signal is determined to be a narrowband signal.

[0121] In one embodiment, the second determining unit 72 is specifically used for one of the following:

[0122] When the type of the distorted signal includes a narrowband signal, the update parameter of the corresponding predistorter is determined to be the static distortion parameter;

[0123] When the type of the distorted signal includes a broadband signal, the update parameter of the corresponding predistorter is determined to be a dynamic distortion parameter; the dynamic distortion parameter includes one of the following: linear dynamic distortion parameter; nonlinear dynamic distortion parameter.

[0124] In one embodiment, the digital predistortion processing apparatus further includes: a third determining unit and a buffer unit; wherein,

[0125] The third determining unit is used to determine the dynamic distortion parameters corresponding to each frequency point, and the static distortion parameters corresponding to different power levels of each frequency point;

[0126] The buffer unit is used to buffer the dynamic distortion parameters corresponding to each frequency point and the static distortion parameters corresponding to different power levels of each frequency point.

[0127] In one embodiment, the update unit 73 is specifically used for:

[0128] Determine the first parameter of the distorted signal in each downlink channel; the first parameter includes at least NMSE;

[0129] When the NMSE exceeds the set parameter threshold, the predistorter is updated based on the determined update parameters of the predistorter until the NMSE reaches the parameter threshold and the update stops.

[0130] In one embodiment, the digital predistortion processing apparatus further includes: a fourth determining unit and an allocation unit; wherein,

[0131] The fourth determining unit is used to determine the signal bandwidth of the distorted signal;

[0132] The allocation unit is used to allocate a corresponding module for determining the update parameters of the predistorter based on the signal bandwidth of the distorted signal.

[0133] In one embodiment, the digital predistortion processing apparatus further includes: a fifth determining unit and a transmission unit; wherein,

[0134] The fifth determining unit is used to determine the truncation bit; the truncation bit represents a marker parameter used to truncate at least two low-bit bits of the baseband signal;

[0135] The transmission unit is used to transmit the configuration options of the predistorter using the truncated bit; the configuration options are used to invoke the update parameters of the predistorter.

[0136] In one embodiment, the transmission unit is specifically used for:

[0137] The configuration options of the predistorter are cascaded onto the truncation bit for transmission.

[0138] In practical applications, the first determining unit 71, the second determining unit 72, and the updating unit 73 can be implemented by the processor in the digital predistortion processing device.

[0139] It should be noted that the digital predistortion processing device provided in the above embodiments is only illustrated by the division of the above program modules when performing digital predistortion processing. In practical applications, the above processing can be assigned to different program modules as needed, that is, the internal structure of the device can be divided into different program modules to complete all or part of the processing described above. In addition, the digital predistortion processing device and the digital predistortion processing method embodiments provided in the above embodiments belong to the same concept, and their specific implementation process can be found in the digital predistortion processing method embodiments, which will not be repeated here.

[0140] Based on the hardware implementation of the above program modules, and in order to implement the digital predistortion processing method of this application embodiment, this application embodiment also provides a digital predistortion processing device. Figure 8 This is a schematic diagram of the hardware structure of the digital predistortion processing device according to an embodiment of this application, as shown below. Figure 8 As shown, the digital predistortion processing device 80 includes:

[0141] The communication interface 81 enables information exchange with other devices;

[0142] The processor 82 is connected to the communication interface 81 to enable information interaction with other devices. When running a computer program, it executes the digital predistortion processing method provided above, and the computer program is stored in the memory 83.

[0143] Specifically, the processor 82 is configured to determine the type of the distorted signal; the distorted signal characterizes the original signal that has been distorted when passing through the power amplifier; the type of the distorted signal includes at least one of the following: a wideband signal; a narrowband signal;

[0144] Based on the type of the distorted signal, determine the corresponding update parameters of the predistorter;

[0145] Based on the determined update parameters of the predistorter, the predistorter is updated so that the linearity of the predistortion system composed of the predistorter and the power amplifier meets the preset requirements.

[0146] In one embodiment, the processor 82 is specifically used for:

[0147] The signal bandwidth of the distorted signal is compared with a set bandwidth threshold to obtain a comparison result;

[0148] If the comparison result indicates that the signal bandwidth of the distorted signal is greater than the bandwidth threshold, the type of the distorted signal is determined to be a wideband signal;

[0149] If the comparison result indicates that the signal bandwidth of the distorted signal is less than or equal to the bandwidth threshold, the type of the distorted signal is determined to be a narrowband signal.

[0150] In one embodiment, the processor 82 is specifically used for one of the following:

[0151] When the type of the distorted signal includes a narrowband signal, the update parameter of the corresponding predistorter is determined to be the static distortion parameter;

[0152] When the type of the distorted signal includes a broadband signal, the update parameter of the corresponding predistorter is determined to be a dynamic distortion parameter; the dynamic distortion parameter includes one of the following: linear dynamic distortion parameter; nonlinear dynamic distortion parameter.

[0153] In one embodiment, the processor 82 is further configured to:

[0154] Determine the dynamic distortion parameters for each frequency point, and the static distortion parameters for different power levels corresponding to each frequency point;

[0155] The dynamic distortion parameters corresponding to each frequency point and the static distortion parameters corresponding to different power levels of each frequency point are cached.

[0156] In one embodiment, the processor 82 is specifically used for:

[0157] Determine the first parameter of the distorted signal in each downlink channel; the first parameter includes at least NMSE;

[0158] When the NMSE exceeds the set parameter threshold, the predistorter is updated based on the determined update parameters of the predistorter until the NMSE reaches the parameter threshold and the update stops.

[0159] In one embodiment, the processor 82 is further configured to:

[0160] Determine the signal bandwidth of the distorted signal;

[0161] Based on the signal bandwidth of the distorted signal, a corresponding module is allocated for determining the update parameters of the predistorter.

[0162] In one embodiment, the processor 82 is further configured to: determine a truncation bit; the truncation bit characterizing a marker parameter for truncating at least two low-order bits of a baseband signal;

[0163] The communication interface 81 is used to transmit the configuration options of the predistorter using the truncated bit; the configuration options are used to invoke the update parameters of the predistorter.

[0164] In one embodiment, the communication interface 81 is specifically used for:

[0165] The configuration options of the predistorter are cascaded onto the truncation bit for transmission.

[0166] It should be noted that the specific processing procedures of communication interface 81 and processor 82 can be understood by referring to the above-mentioned digital predistortion processing method.

[0167] Of course, in practical applications, the various components in the digital predistortion processing device 80 are coupled together via a bus system 84. It is understood that the bus system 84 is used to implement communication between these components. In addition to a data bus, the bus system 84 also includes a power bus, a control bus, and a status signal bus. However, for clarity, in... Figure 8 The general labeled all buses as Bus System 84.

[0168] The memory 83 in this embodiment is used to store various types of data to support the operation of the digital predistortion processing device 80. Examples of such data include any computer program used to operate on the digital predistortion processing device 80.

[0169] The digital predistortion processing method disclosed in the above embodiments of this application can be applied to the processor 82, or implemented by the processor 82. The processor 82 may be an integrated circuit chip with signal processing capabilities. In the implementation process, each step of the above digital predistortion processing method can be completed by the integrated logic circuit of the hardware in the processor 82 or by instructions in the form of software. The processor 82 may be a general-purpose processor, a digital signal processor (DSP), or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc. The processor 82 can implement or execute the various digital predistortion processing methods, steps, and logic block diagrams disclosed in the embodiments of this application. The general-purpose processor may be a microprocessor or any conventional processor, etc. The steps of the digital predistortion processing method disclosed in the embodiments of this application can be directly reflected as being executed by a hardware decoding processor, or being executed by a combination of hardware and software modules in the decoding processor. The software modules may be located in a storage medium, which is located in the memory 83. The processor 82 reads the information in the memory 83 and combines its hardware to complete the steps of the aforementioned digital predistortion processing method.

[0170] In an exemplary embodiment, the digital predistortion processing device 80 may be implemented by one or more application-specific integrated circuits (ASICs), DSPs, programmable logic devices (PLDs), complex programmable logic devices (CPLDs), FPGAs, general-purpose processors, controllers, MCUs, microprocessors, or other electronic components to perform the aforementioned digital predistortion processing method.

[0171] It is understood that the memory 83 in the embodiments of this application can be volatile memory or non-volatile memory, or both. Non-volatile memory can be read-only memory (ROM), programmable read-only memory (PROM), erasable programmable read-only memory (EPROM), electrically erasable programmable read-only memory (EEPROM), ferromagnetic random access memory (FRAM), flash memory, magnetic surface memory, optical disc, or compact disc read-only memory (CD-ROM); magnetic surface memory can be disk storage or magnetic tape storage. Volatile memory can be random access memory (RAM), which is used as an external cache. By way of example, but not limitation, many forms of RAM are available, such as Static Random Access Memory (SRAM), Synchronous Static Random Access Memory (SSRAM), Dynamic Random Access Memory (DRAM), Synchronous Dynamic Random Access Memory (SDRAM), Double Data Rate Synchronous Dynamic Random Access Memory (DDRSDRAM), Enhanced Synchronous Dynamic Random Access Memory (ESDRAM), SyncLink Dynamic Random Access Memory (SLDRAM), and Direct Rambus Random Access Memory (DRRAM).The memory 83 described in the embodiments of this application is intended to include, but is not limited to, these and any other suitable types of memory.

[0172] In an exemplary embodiment, this application also provides a storage medium, namely a computer storage medium, specifically a computer-readable storage medium, such as a memory 83 storing a computer program. This computer program can be executed by a processor 82 in a digital predistortion processing device 80 to complete the steps of the digital predistortion processing method described in the aforementioned embodiment. The computer-readable storage medium can be a memory such as FRAM, ROM, PROM, EPROM, EEPROM, Flash Memory, magnetic surface memory, optical disc, or CD-ROM.

[0173] It should be noted that terms such as "first," "second," and "third" are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence.

[0174] Furthermore, the technical solutions described in the embodiments of this application can be combined arbitrarily without conflict.

[0175] The above description is merely a specific embodiment of this application, but the scope of protection of this application is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in this application should be included within the scope of protection of this application. Therefore, the scope of protection of this application should be determined by the scope of the claims.

Claims

1. A method of digital pre-distortion processing, characterized by, The method comprises: determining the type of the distortion signal; the distortion signal represents the signal of the original signal distorted by the power amplifier; the type of the distortion signal comprises at least one of the following: a wideband signal; a narrowband signal; determining the update parameters of the corresponding pre-distortion device based on the type of the distortion signal; updating the pre-distortion device based on the determined update parameters of the pre-distortion device, so that the linearity of the pre-distortion system composed of the pre-distortion device and the power amplifier meets the preset requirements; wherein, the determination of the update parameters of the corresponding pre-distortion device based on the type of the distortion signal comprises: in the case that the type of the distortion signal comprises a narrowband signal, using the assigned module for determining the update parameters of the pre-distortion device to determine the update parameters of the corresponding pre-distortion device as static distortion parameters; in the case that the type of the distortion signal comprises a wideband signal, using the assigned module for determining the update parameters of the pre-distortion device to determine the update parameters of the corresponding pre-distortion device as dynamic distortion parameters; the module for determining the update parameters of the pre-distortion device comprises a digital pre-distortion (DPD) module and a host device, the DPD module is an in-chip computing power, and the host device is an off-chip computing power; the dynamic distortion parameters comprise one of the following: linear dynamic distortion parameters; nonlinear dynamic distortion parameters; in the case that the signal bandwidth of the distortion signal increases, the filter order increases, and in the case that the signal bandwidth of the distortion signal is small, the corresponding filter order is closed; the method further comprises: determining the truncation bit; the truncation bit represents a marker parameter for truncating at least two low bits of the baseband signal; according to the signal bandwidth and the power, cascading the configuration options of the pre-distortion device to the truncation bit for transmission; the configuration options are used to call the update parameters of the pre-distortion device.

2. The method of claim 1, wherein, The determination of the type of the distortion signal comprises: comparing the signal bandwidth of the distortion signal with a set bandwidth threshold to obtain a comparison result; in the case that the comparison result represents that the signal bandwidth of the distortion signal is greater than the bandwidth threshold, determining that the type of the distortion signal is a wideband signal; in the case that the comparison result represents that the signal bandwidth of the distortion signal is less than or equal to the bandwidth threshold, determining that the type of the distortion signal is a narrowband signal.

3. The method of claim 1, wherein, The method further comprises: determining the dynamic distortion parameters corresponding to each frequency point and the static distortion parameters corresponding to different power levels of the frequency points; caching the dynamic distortion parameters corresponding to each frequency point and the static distortion parameters corresponding to different power levels of the frequency points.

4. The method of claim 1, wherein, The updating of the pre-distortion device based on the determined update parameters of the pre-distortion device comprises: determining the first parameters of the distortion signal in each downlink channel; the first parameters at least comprise a normalized mean square error (NMSE); when the NMSE exceeds a set parameter threshold, updating the pre-distortion device based on the determined update parameters of the pre-distortion device until the NMSE reaches the parameter threshold to stop updating.

5. The method of claim 1, wherein, The method further comprises: determining the signal bandwidth of the distortion signal; allocate a corresponding module for determining the update parameter of the pre-distorter according to the signal bandwidth of the distortion signal.

6. A digital pre-distortion processing apparatus characterized by comprising: comprising: a first determining unit configured to determine a type of the distortion signal; the distortion signal characterizes a signal of the original signal distorted when passing through the power amplifier; the type of the distortion signal comprises at least one of the following: a wideband signal; a narrowband signal; a second determining unit configured to determine a corresponding update parameter of the pre-distorter according to the type of the distortion signal; an updating unit configured to update the pre-distorter according to the determined update parameter of the pre-distorter, so that the linearity of a pre-distortion system composed of the pre-distorter and the power amplifier meets a preset requirement; wherein the second determining unit is specifically configured to: in a case where the type of the distortion signal comprises a narrowband signal, determine the corresponding update parameter of the pre-distorter as a static distortion parameter by using the allocated module for determining the update parameter of the pre-distorter; in a case where the type of the distortion signal comprises a wideband signal, determine the corresponding update parameter of the pre-distorter as a dynamic distortion parameter by using the allocated module for determining the update parameter of the pre-distorter; the module for determining the update parameter of the pre-distorter comprises a digital pre-distortion (DPD) module and a host device, the DPD module is an in-chip computing power, and the host device is an off-chip computing power; the dynamic distortion parameter comprises one of the following: a linear dynamic distortion parameter; a nonlinear dynamic distortion parameter; in a case where the signal bandwidth of the distortion signal increases, the filter order increases, and in a case where the signal bandwidth of the distortion signal is small, the corresponding filter order is closed; 7. A digital pre-distortion processing device, characterized by the apparatus further comprises: a fifth determining unit configured to determine a truncation bit; the truncation bit represents a marker parameter for truncating at least two low bits of a baseband signal; a transmission unit configured to cascade a configuration option of the pre-distorter to the truncation bit according to a signal bandwidth and power for transmission; the configuration option is used to call the update parameter of the pre-distorter.

8. A computer-readable storage medium having stored thereon a computer program, characterized in that, comprising: a processor and a memory for storing a computer program capable of running on the processor; wherein the processor is configured to execute the computer program, and perform the steps of the method in any one of claims 1 to 5. the computer program is executed by the processor to implement the steps of the method in any one of claims 1 to 5.

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