Cache data management method and device, storage medium and program product
By identifying categories of cached data and updating linked list nodes, the problem that cache management methods in the prior art cannot effectively manage random access workloads is solved, and the performance and service life of the solid state drive are improved.
Patent Information
- Application Number
- CN202411372936.7
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2024-09-29
- Publication Date
- 2025-01-24
- Estimated Expiration
- 2044-09-29
AI Technical Summary
In the prior art, cache management methods cannot effectively manage workloads dominated by random access, resulting in low performance of solid state drives (SSDs).
By identifying the category of cache data, and update the corresponding linked list nodes according to its category, including large request block linked lists and small request block linked lists to achieve more effective cache management.
The utilization rate of DRAM cache space has been improved, the performance of solid -state hard disks has been improved, the performance of low performance caused by cache management methods has been solved, and the read and writing performance and wear balance of SSD are improved, and the service life is prolonged.
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Figure CN118860298B_ABST
Abstract
Description
Technical Field
[0001] The embodiments of the present application relate to the field of data processing technology, and in particular, to a cache data management method and device, a storage medium, and a program product. Background Art
[0002] A dynamic random access memory (DRAM) is usually configured inside a solid state drive (SSD) based on NAND flash memory. DRAM can temporarily store frequently accessed data, reducing the number of direct accesses to the NAND flash memory, thereby improving performance.
[0003] When the DRAM is filled with cached data, a cache management solution needs to be executed to manage the data, such as selecting data to be replaced or writing selected data back to the flash array. In the related art, traditional cache management methods can manage data in DRAM based on temporal locality and spatial locality. However, in the face of workloads dominated by random access, access requests are disordered, and the cached data cannot be effectively managed, resulting in lower performance of the SSD. In other words, the cache management method in the related art leads to lower performance of the solid-state drive.
[0004] In the related technology, the current cache management method leads to the technical problem of low performance of solid-state drives, and no effective solution has been proposed yet. Summary of the invention
[0005] The embodiments of the present application provide a cache data management method and device, a storage medium, and a program product to at least solve the technical problem in the related art that the current cache management method leads to low performance of the solid-state hard disk.
[0006] According to an embodiment of the present application, a cache data management method is provided, including: when the first cache data corresponding to the received target access request already exists, identifying the category of the first cache data; when the first cache data is a large request block, updating the nodes of the first linked list using the address information corresponding to the first cache data; when the first cache data is a small request block, updating the nodes of the second linked list using the address information corresponding to the first cache data.
[0007] In an exemplary embodiment, the above-mentioned identification of the category of the first cache data includes: determining a preset data amount; when the data amount of the first cache data is greater than the preset data amount, determining that the first cache data is a large request block; when the data amount of the first cache data is less than the preset data amount, determining that the first cache data is a small request block.
[0008] In an exemplary embodiment, the above-mentioned determination of the preset data volume includes: obtaining the number of preset data pages, and obtaining the preset data volume by multiplying the number of preset data pages by the standard data volume.
[0009] In an exemplary embodiment, the above-mentioned obtaining of the preset number of data pages includes: obtaining at least one reference access request, wherein the at least one reference access request is a continuous access request before the target access request; determining the data volume and average hit rate of at least one reference cache data corresponding to the at least one reference access request; and determining the preset number of data pages as the ratio of the product of the average data volume of the reference cache data corresponding to the write requests in the reference access requests and the average data volume and average hit rate of the reference cache data corresponding to the read requests in the reference access requests and the standard data volume.
[0010] In an exemplary embodiment, after the above-mentioned identification of the category of the first cache data, it includes: obtaining at least one second cache data corresponding to the first time period; using the data category corresponding to the at least one second cache data to predict the category of at least one third cache data corresponding to the second time period, wherein the first time period and the second time period are continuous time periods with the same time interval.
[0011] In an exemplary embodiment, the above-mentioned prediction of the category of at least one third cache data corresponding to the second time period using the data category corresponding to at least one second cache data includes: determining a first proportion of second cache data whose data category is large request blocks in at least one second cache data in the second cache data; determining a second proportion of second cache data whose data category is small request blocks in at least one second cache data; when the first proportion is greater than the second proportion, predicting the category of the third cache data to be a large request block; when the second proportion is greater than the first proportion, predicting the category of the third cache data to be a small request block.
[0012] In an exemplary embodiment, the above-mentioned prediction of the category of at least one third cache data corresponding to the second time period using the data category corresponding to at least one second cache data includes: determining a first proportion of the second cache data whose data category is a large request block in at least one second cache data; determining a second proportion of the second cache data whose data category is a small request block in at least one second cache data; determining the larger value of the first proportion and the second proportion as a reference proportion; when the reference proportion is greater than the prediction parameter, predicting the category of the third cache data to be a small request block; when the reference proportion is less than the prediction parameter, predicting the category of the third cache data to be a large request block.
[0013] In an exemplary embodiment, determining the above-mentioned prediction parameters includes: setting a first prediction parameter and a second prediction parameter; updating the first prediction parameter and the second prediction parameter using the prediction result of the first time period and at least one second cache data; and determining the smaller one of the first prediction parameter and the second prediction parameter as the prediction parameter.
[0014] In an exemplary embodiment, the above-mentioned updating of the nodes of the first linked list using the address information corresponding to the first cache data includes: when the first cache data exists in the original cache data, splitting the original cache data to obtain the first cache data, and updating the nodes of the first linked list using the address information corresponding to the first cache data.
[0015] In an exemplary embodiment, the updating of the nodes of the second linked list by using the address information corresponding to the first cache data includes: moving the address information corresponding to the first cache data to the first position of the second linked list.
[0016] In an exemplary embodiment, the above method also includes: when replacing cached data, determining the first priority of the last node in the first linked list and the second priority of the last node in the second linked list; and eliminating the node corresponding to the smaller priority of the first priority and the second priority.
[0017] In an exemplary embodiment, the above determination of the priority of the nodes in the first linked list and the nodes in the second linked list includes: determining the priority of the node using the number of times the node is accessed, the amount of cached data corresponding to the node, the time point of the most recent access request matched by the node, and the current time point.
[0018] According to another embodiment of the present application, a cache data management device is provided, including: a category identification module, used to identify the category of the first cache data when the first cache data corresponding to the received target access request already exists; a first update module, used to update the nodes of the first linked list using the address information corresponding to the first cache data when the first cache data is a large request block; and a second update module, used to update the nodes of the second linked list using the address information corresponding to the first cache data when the first cache data is a small request block.
[0019] According to another embodiment of the present application, a computer-readable storage medium is provided, in which a computer program is stored, wherein the computer program is configured to execute the steps of any of the above method embodiments when running.
[0020] According to another embodiment of the present application, an electronic device is provided, including a memory and a processor, wherein a computer program is stored in the memory, and the processor is configured to run the computer program to execute the steps in any one of the above method embodiments.
[0021] According to another embodiment of the present application, a computer program product is provided, including a computer program, where the computer program is executed by a processor to perform the steps in any of the above method embodiments.
[0022] Through the present application, when the first cache data corresponding to the received target access request already exists, the category of the first cache data is identified; when the first cache data is a large request block, the node of the first linked list is updated using the address information corresponding to the first cache data; when the first cache data is a small request block, the node of the second linked list is updated using the address information corresponding to the first cache data. In the case of receiving an access request, the first cache data corresponding to the access request can be used as the cache management granularity. In the case where the first cache data is hit in the cache, different processing methods can be performed according to the category of the first cache data, such as inserting a large request block into the first linked list and inserting a small request block into the second linked list. In order to manage the cache data, and in the face of a workload dominated by random access, the cache data can also be effectively managed, thereby improving the utilization rate of the DRAM cache space, improving the performance of the solid-state hard disk, and solving the technical problem in the related art that the current cache management method leads to low performance of the solid-state hard disk. And improve the read and write performance of the SSD, achieve wear balance of the SSD, so as to increase the overall service life of the SSD. BRIEF DESCRIPTION OF THE DRAWINGS
[0023] Figure 1 This is a hardware structure block diagram of an optional cache data management method according to an embodiment of the present application.
[0024] Figure 2 This is a flowchart of an optional cache data management method according to an embodiment of the present application.
[0025] Figure 3 It is a schematic diagram of an optional cache data management method according to an embodiment of the present application.
[0026] Figure 4 It is a schematic diagram of another optional cache data management method according to an embodiment of the present application.
[0027] Figure 5 It is a schematic diagram of an optional second linked list management method according to an embodiment of the present application.
[0028] Figure 6It is a schematic diagram of another optional cache data management method according to an embodiment of the present application.
[0029] Figure 7 It is a structural block diagram of an optional cache data management device according to an embodiment of the present application. DETAILED DESCRIPTION
[0030] The embodiments of the present application will be described in detail below with reference to the accompanying drawings and in combination with the embodiments.
[0031] It should be noted that the terms "first", "second", etc. in the specification and claims of this application and the above-mentioned drawings are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence.
[0032] According to one aspect of an embodiment of the present application, a cache data management method is provided. As an optional implementation, the cache data management method can be but is not limited to being applied to: Figure 1 The cache data management architecture in the hardware environment shown in the figure. The cache data management architecture may include but is not limited to a host, a host interface layer, a flash memory translation layer, and a NAND flash memory layer.
[0033] Optionally, the host can be a personal computer, server, laptop or other type of computer system. The host usually refers to a computer system that exchanges data with a solid state drive (SSD). The host is the initiator of SSD data reading and writing. When a user performs file operations on a computer (such as opening, saving, and deleting files), these operations are communicated to the SSD through the host's operating system, which is responsible for initiating and managing all SSD-related operations.
[0034] Optionally, a solid state drive (SSD) includes the above-mentioned host interface layer, flash memory conversion layer, and NAND flash memory layer.
[0035] Optionally, the Host Interface Layer (HIL) is the communication interface between the SSD and the host system and is responsible for maintaining the device-level I / O queue. The HIL layer receives I / O requests from the host and passes them to the SSD controller for processing. Figure 1 As shown, the I / O request queue in the HIL layer includes specific requests (Req1, ..., ReqN) and the data pages involved (Page1, ..., PageN).
[0036] Optionally, the Flash Translation Layer (FTL) is responsible for managing the storage and retrieval of data in the NAND flash memory of the SSD, which may include a cache management module, an address translation module, a transaction scheduling module, and a dynamic random access memory (DRAM).
[0037] Optionally, the cache management module (Cache Management) can optimize data access efficiency and improve overall performance. The address translation module (Address Translation) can implement the mapping between logical block address (LBA) and physical block address (PBA). The transaction scheduling module (Transaction Scheduling) can schedule the internal operations of the SSD to optimize performance and life.
[0038] Optionally, the DRAM may include a data cache module and a mapping table module. The data cache module (DataCache) can cache data that has been recently accessed or is about to be accessed by a host (such as a computer). This can reduce the number of times the SSD reads and writes to the NAND flash memory, thereby improving performance and extending the service life of the SSD. The mapping table module (MappingTable) can record the correspondence between the logical address (LBA) and the physical address (PBA), so that data can be correctly stored and retrieved in the NAND flash memory of the SSD.
[0039] Optionally, the NAND flash memory layer may be composed of a plurality of physical storage units (Chip1, ..., ChipN) and may store data.
[0040] Optionally, when the SSD receives a target access request sent by the host, it determines whether the first cache data corresponding to the target access request sent by the host has been cached in the DRAM. When the first cache data is cached in the DRAM, the category of the first cache data can be identified in the flash conversion layer. When the first cache data is a large request block, the address information corresponding to the first cache data can be used to update the nodes of the first linked list. When the first cache data is a small request block, the address information corresponding to the first cache data can be used to update the nodes of the second linked list. The above is only an example, and this is not limited in any way in this embodiment.
[0041] Through the present application, when the first cache data corresponding to the received target access request already exists, the category of the first cache data is identified; when the first cache data is a large request block, the node of the first linked list is updated using the address information corresponding to the first cache data; when the first cache data is a small request block, the node of the second linked list is updated using the address information corresponding to the first cache data. In the case of receiving an access request, the first cache data corresponding to the access request can be used as the cache management granularity. In the case where the first cache data is hit in the cache, different processing methods can be performed according to the category of the first cache data, such as inserting a large request block into the first linked list and inserting a small request block into the second linked list. In order to manage the cache data, and in the face of a workload dominated by random access, the cache data can also be effectively managed, thereby improving the utilization rate of the DRAM cache space, improving the performance of the solid-state hard disk, and solving the technical problem in the related art that the current cache management method leads to low performance of the solid-state hard disk. And improve the read and write performance of the SSD, achieve wear balance of the SSD, so as to increase the overall service life of the SSD.
[0042] In this embodiment, a method for managing cache data is provided. Figure 2 is a flowchart of an optional cache data management method according to an embodiment of the present application, such as Figure 2 As shown, the cache data management method includes: step S202, in the case where the first cache data corresponding to the received target access request already exists, identifying the category of the first cache data.
[0043] It should be noted that the target access request may be an access request sent by the host to the solid state drive (SSD), and may include a read and write request. For example, when a user opens a file or an application needs to save data, a target access request is generated.
[0044] In an optional implementation, the main function of the DRAM cache is to store the FTL mapping table, which is a very critical data structure in the SSD that can record the mapping relationship between logical addresses and physical addresses. In addition to storing the mapping table to support address translation, the DRAM cache is also commonly used to buffer hot data of user applications, that is, frequently accessed data.
[0045] In an optional implementation, the first cache data may be an FTL mapping table stored in a DRAM, or may be cache data cached therein.
[0046] In an optional implementation, when the host sends a target access request to the SSD, if the first cache data corresponding to the target access request already exists in the DRAM cache, the SSD can quickly provide these data directly from the cache, i.e., a cache hit. In this case, the data is read faster. When the target access request is received and the first cache data is cache hit, the category of the first cache data can be identified. The first cache data can be divided into a large request block and a small request block according to its data size.
[0047] Step S204: when the first cache data is a large request block, the nodes of the first linked list are updated using the address information corresponding to the first cache data.
[0048] It should be noted that the first linked list may be a large request block linked list, and the first linked list may be used to manage cache data of the large request block category in the DRAM cache, and the cache management of the DRAM may be implemented using the first linked list.
[0049] In an optional implementation, the nodes of the first linked list may be the stored cache data itself or pointers to data stored in the SSD or host memory. The nodes in the first linked list may be sorted according to a preset rule.
[0050] Step S206: When the first cache data is a small request block, the nodes of the second linked list are updated using the address information corresponding to the first cache data.
[0051] It should be noted that the second linked list may be a small request block linked list, and the second linked list may be used to manage cache data of the small request block category in the DRAM cache, and the cache management of the DRAM may be implemented using the second linked list.
[0052] In an optional implementation, the nodes of the second linked list may be the stored cache data itself or pointers to data stored in the SSD or host memory. The nodes in the second linked list may be sorted according to a preset rule.
[0053] Through the present application, when the first cache data corresponding to the received target access request already exists, the category of the first cache data is identified; when the first cache data is a large request block, the node of the first linked list is updated using the address information corresponding to the first cache data; when the first cache data is a small request block, the node of the second linked list is updated using the address information corresponding to the first cache data. In the case of receiving an access request, the first cache data corresponding to the access request can be used as the cache management granularity. In the case where the first cache data is hit in the cache, different processing methods can be performed according to the category of the first cache data, such as inserting a large request block into the first linked list and inserting a small request block into the second linked list. In order to manage the cache data, and in the face of a workload dominated by random access, the cache data can also be effectively managed, thereby improving the utilization rate of the DRAM cache space, improving the performance of the solid-state hard disk, and solving the technical problem in the related art that the current cache management method leads to low performance of the solid-state hard disk. And improve the read and write performance of the SSD, achieve wear balance of the SSD, so as to increase the overall service life of the SSD.
[0054] In an optional embodiment, the above-mentioned identification of the category of the first cache data includes: determining a preset data amount; when the data amount of the first cache data is greater than the preset data amount, determining that the first cache data is a large request block; when the data amount of the first cache data is less than the preset data amount, determining that the first cache data is a small request block.
[0055] In an optional implementation, after determining the first cache data corresponding to the target access request, a preset data volume can be determined. The preset data volume can be a dynamically changing data volume threshold or a fixed data volume threshold. The preset data volume can be compared with the data size of the first cache data to determine the category of the first cache data. For example, when the data volume of the first cache data is greater than the preset data volume, the first cache data can be determined to be a large request block. When the first cache data is a small request block, the first cache data can be determined to be a small request block.
[0056] In an optional embodiment, large request blocks can be used for sequential write operations because they can reduce the overhead of write operations and improve throughput. During garbage collection, large request blocks can be processed more efficiently because they involve fewer data migration and erase operations. Small request blocks can be suitable for random write operations because they can locate specific data blocks more quickly and reduce addressing time. Small request blocks can provide greater flexibility and can manage the storage location of data more finely, helping to improve the utilization of storage space.
[0057] Through the above-mentioned implementation mode of the present application, the category of the first cache data can be determined according to the preset data amount and the data amount of the first cache data, and the category of the first cache data can be determined according to the data amount of the first cache data so as to be stored in a matching linked list, thereby realizing effective utilization of DRAM cache space, and when the subsequent cache space is insufficient, the linked list can be used to quickly realize data replacement.
[0058] In an optional implementation manner, the above-mentioned determination of the preset data volume includes: obtaining the number of preset data pages, and obtaining the preset data volume by multiplying the number of preset data pages by the standard data volume.
[0059] In an optional implementation, the size of the first cache data corresponding to the target access request may be determined according to the number of data pages. When the host sends read and write requests to the SSD, these requests are usually performed in units of pages.
[0060] In an optional implementation, the preset data page number can be determined, and the preset data volume can be obtained by multiplying the preset data page number with the standard data volume. The page size of the SSD is usually fixed, and its page size can be defined as a standard data volume, such as 4KB, 8KB, 16KB, etc.
[0061] In an optional implementation, a preset data page number may be obtained, and then the preset data amount is obtained by multiplying the preset data page number with the standard data amount, and then the preset data amount is compared with the data amount of the first cache data to determine the category of the first cache data.
[0062] In an optional implementation, after obtaining the preset number of data pages, the number of data pages corresponding to the first cache data can be directly compared with the preset number of data pages. During the operation of the DRAM, the first cache data can directly indicate its size using the number of data pages, and it can be cache data composed of data pages of positive integers. Therefore, the number of data pages it includes can be directly compared with the preset number of data pages to determine the category of the first cache data.
[0063] Through the above-mentioned implementation mode of the present application, the preset data amount can be determined by using the preset data page number to identify the category of the first cache data. For a large request block, it can be obtained by grouping data pages (such as merging consecutive request blocks into a larger request block). For a small request block, it can be directly determined by the indicated address. Determining the data amount by the preset data page number is more in line with the working principle of DRAM, which improves the efficiency of identifying the category of the first cache data and the effective use of resources.
[0064] In an optional embodiment, the above-mentioned obtaining of the preset number of data pages includes: obtaining at least one reference access request, wherein the at least one reference access request is a continuous access request before the target access request; determining the data volume and average hit rate of at least one reference cache data corresponding to the at least one reference access request; and determining the preset number of data pages as the ratio of the product of the average data volume of the reference cache data corresponding to the write requests in the reference access requests and the average data volume and average hit rate of the reference cache data corresponding to the read requests in the reference access requests and the standard data volume.
[0065] In an optional implementation, the preset number of data pages may be a dynamically changing threshold value, which may be determined using information of n reference access requests before the target access request. The preset number of data pages may be determined by the following formula:
[0066]
[0067] in, It is the average data size of the reference cache data corresponding to n write requests in the most recent reference access requests. It is the average amount of reference cache data corresponding to n read requests in the most recent reference access requests. Indicates the average hit rate of the most recent n reference access requests. For standard data volume, the default value can be set to 4kB.
[0068] Through the above implementation of the present application, the preset number of data pages can be determined using the information of the reference access requests n times before the target access request, and the number n can be adjusted over time, or can be kept at a preset number (such as being fixed at 1024). The preset number of data pages can be determined based on the average data volume, average hit rate, and standard data volume of the reference cache data, and the first cache data can be dynamically classified using the dynamically changing preset number of data pages to improve the utilization of the DRAM, thereby improving the performance of the SSD.
[0069] In an optional embodiment, after the above-mentioned identification of the category of the first cache data, it includes: obtaining at least one second cache data corresponding to the first time period; using the data category corresponding to the at least one second cache data to predict the category of at least one third cache data corresponding to the second time period, wherein the first time period and the second time period are continuous time periods with the same time interval.
[0070] In an optional implementation, a detection time window for cached data may be defined, and a time window within a preset time range may be used as a detection period. Multiple access requests may be received within a detection time window, the first time period may be a detection time window including the target access request, and the second time period may be the next detection time window of the first time period. There may be multiple second cached data within the first time period, and each access request may correspond to one second cached data.
[0071] In each detection time window, after receiving an access request, the access request will provide a logical address, and the SSD controller can map this logical address to a physical address, that is, the address on the flash chip where the data is actually stored.
[0072] In an optional embodiment, all access requests within a first time period can be obtained, and second cache data corresponding to each of the multiple access requests can be obtained, the category of the second cache data can be determined, and the category of the second cache data can be used to predict the category of the cache data in the next time period (the category of the third cache data in the second time period).
[0073] In an optional embodiment, the category of cached data corresponding to the access request in the next detection time window is predicted, which can be the respective proportions of large and small request blocks in the cached data in the second time period, or the overall category of the cached data in the second time period.
[0074] Through the above-mentioned implementation mode of the present application, the category of the cache data in the previous time period can be used to predict the category of the cache data in the next time period. After predicting the category of the cache data in the next time period, preparations can be made in advance to insert the cache data of the corresponding category into the first linked list and the second linked list to improve the reading and writing efficiency, thereby achieving better I / O performance.
[0075] In an optional embodiment, the above-mentioned prediction of the category of at least one third cache data corresponding to the second time period using the data category corresponding to at least one second cache data includes: determining a first proportion of second cache data with data category of large request blocks in at least one second cache data in the second cache data; determining a second proportion of second cache data with data category of small request blocks in at least one second cache data; when the first proportion is greater than the second proportion, predicting the category of the third cache data to be a large request block; when the second proportion is greater than the first proportion, predicting the category of the third cache data to be a small request block.
[0076] In an optional implementation, a first proportion of cache data of a data category of large request blocks among all second cache data in the first time period can be determined, and a second proportion of small request blocks can be determined. The first proportion and the second proportion can be compared to determine the cache data category that accounts for a larger proportion in the first time period. The cache data of the next time window (second time period) can be predicted as the cache data category that accounts for a larger proportion in the current time period (first time period). If the proportion of small request blocks in the first time period is 60%, it can be predicted that the category of the third cache data in the second time period is a small request block, and preparations can be made in advance to insert the small request block into the second linked list.
[0077] Through the above-mentioned implementation mode of the present application, the category of the second cache data in the first time period can be used to determine the proportion of large request blocks and small request blocks in the second cache data in the first time period, and the category with a higher proportion can be predicted as the category of the third cache data in the second time period. Before receiving the access request in the second time period, preparations can be made in advance to insert the cache data into the corresponding linked list. After receiving the access request, its category can be identified. If it is the same as the predicted category result, it can be inserted into the corresponding linked list at an accelerated speed. If it is different from the predicted category result, it can be inserted into the corresponding linked list normally. Thereby, the management efficiency of the cache data of the correctly predicted category can be improved, thereby improving the performance of the SSD.
[0078] In an optional embodiment, the above-mentioned prediction of the category of at least one third cache data corresponding to the second time period using the data category corresponding to at least one second cache data includes: determining a first proportion of the second cache data whose data category is a large request block in at least one second cache data; determining a second proportion of the second cache data whose data category is a small request block in at least one second cache data; determining the larger value of the first proportion and the second proportion as a reference proportion; when the reference proportion is greater than the prediction parameter, predicting the category of the third cache data to be a small request block; when the reference proportion is less than the prediction parameter, predicting the category of the third cache data to be a large request block.
[0079] In an optional implementation, the larger value between the first proportion and the second proportion may be determined as a reference proportion. A prediction parameter may be obtained, and the prediction parameter may be a preset threshold or a dynamically changing parameter.
[0080] In an optional embodiment, determining the above-mentioned prediction parameters includes: setting a first prediction parameter and a second prediction parameter; updating the first prediction parameter and the second prediction parameter using the prediction result of the first time period and at least one second cache data; and determining the smaller one of the first prediction parameter and the second prediction parameter as the prediction parameter.
[0081] In an optional embodiment, the first prediction parameter and the second prediction parameter may be pre-set, and the first prediction parameter and the second prediction parameter may be updated at different time points. For example, the first prediction parameter and the second prediction parameter may be updated after each detection time window ends, or the first prediction parameter and the second prediction parameter may be updated after a detection time window in which the prediction accuracy is lower than a certain threshold ends.
[0082] In an optional implementation, the first prediction parameter and the second prediction parameter may vary randomly, or may be determined based on the prediction result of a detection time window and the actual cache data category, such as by using the prediction accuracy of a detection time window to adjust them. For example, if the prediction category in the first time period is a large request block and the accuracy is low, the first prediction parameter and the second prediction parameter may be reduced. If the prediction category in the first time period is a small request block and the accuracy is low, the first prediction parameter and the second prediction parameter may be increased.
[0083] Through the above implementation of the present application, a first prediction parameter and a second prediction parameter that can be changed are pre-set, and the smaller parameter of the first prediction parameter and the second prediction parameter is determined as the prediction parameter, and the larger value of the first proportion and the second proportion is used as the reference proportion. The reference proportion is a parameter greater than or equal to 50%. When the reference proportion is greater than the prediction parameter, the category of the third cache data is predicted to be a small request block. Combining the above process, it is highly likely that the third cache data is predicted to be a small request block, and it is less likely that the third cache data is predicted to be a large request block. In fact, under a workload in which random access is mainly performed on the SSD, the cache data of the small request block is more likely to be re-accessed. Therefore, predicting the cache data category of the next time period based on the actual situation is more in line with the working condition of the SSD, effectively combines the specific working state, and improves the performance of the SSD.
[0084] In an optional embodiment, the above-mentioned updating of the nodes of the first linked list using the address information corresponding to the first cache data includes: when the first cache data exists in the original cache data, splitting the original cache data to obtain the first cache data, and updating the nodes of the first linked list using the address information corresponding to the first cache data.
[0085] In an optional embodiment, when the first cache data is hit, if it is a large request block and exists in the original cache data, some data in the original cache data is unlikely to be reaccessed in the future, then the original cache data can be split and the address information corresponding to the first cache data can be inserted into the node of the first linked list.
[0086] Figure 3 is a schematic diagram of an optional cache data management method according to an embodiment of the present application; Figure 3 As shown, when a target access request is received and the first cache data corresponding to the target access request is hit in DRAM, if the node in the first linked list does not exist in the node corresponding to the first cache data, a new node An+1 can be filled in to update the first linked list.
[0087] Figure 4 is a schematic diagram of another optional cache data management method according to an embodiment of the present application; Figure 4 As shown, after receiving the target access request, and in the case where the first cache data corresponding to the target access request is hit in the DRAM, if there is a node in the first linked list corresponding to the first cache data, the parameters of the corresponding node, such as the priority of the node, can be updated. After updating the node parameters, the position of the node in the first linked list can be changed to update the first linked list. For example, the position of the An node is moved to another node.
[0088] Through the above implementation of the present application, the first linked list can be updated according to the first cache data. If there is no node corresponding to the first cache data in the first linked list, a new node can be inserted. If there is a corresponding node, the position of the node can be updated. In this way, the cache data in the DRAM can be effectively managed, so as to improve the space utilization of the DRAM and thus improve the performance of the SSD.
[0089] In an optional implementation, the updating of the nodes of the second linked list using the address information corresponding to the first cache data includes: moving the address information corresponding to the first cache data to the first position of the second linked list.
[0090] In an optional implementation, when inserting the first cache data of the small request block into the second linked list, if there is a node corresponding to the first cache data in the second linked list, the address information corresponding to the first cache data can be moved to the first position of the second linked list.
[0091] Figure 5 is a schematic diagram of an optional second linked list management method according to an embodiment of the present application; Figure 5 As shown, when the node Bn corresponding to the first cache data exists in the second linked list, the node corresponding to the first cache data can be moved to the head of the second linked list.
[0092] Through the above implementation of the present application, when a target access request is received, the hit small request block can be moved to the head of the second linked list in the second linked list to use the first cache data, so that the DRAM space can be better used and the cache data management effect can be improved.
[0093] In an optional embodiment, the above method also includes: when replacing cached data, determining the first priority of the last node in the first linked list and the second priority of the last node in the second linked list; and eliminating the node corresponding to the smaller priority of the first priority and the second priority.
[0094] In an optional implementation, when the DRAM cache is full, it is necessary to decide which data should be replaced. During the cache replacement process, the tail nodes of the first linked list and the second linked list can be selected, and the priorities of the two tail nodes can be compared to eliminate the nodes with lower priorities.
[0095] In an optional embodiment, the above determination of the priority of the nodes in the first linked list and the nodes in the second linked list includes: determining the priority of the node using the number of times the node is accessed, the amount of cached data corresponding to the node, the time point of the most recent access request matched by the node, and the current time point.
[0096] In an optional implementation, the priority of a node may be determined by the following formula:
[0097]
[0098] in, It is the access count of the requested block after it is buffered in the cache, initialized to 1; is the number of pages in the request block, and are the current time point and the time point of the last hit request block, respectively. Set to the current time when this request block is inserted into or accessed from the cache.
[0099] Through the above implementation of the present application, a higher priority is assigned to small request blocks, and different data change priorities are supported for large request blocks and small request blocks. During the cache replacement process, cache data can be removed by considering factors such as the size of the request block and time discount. Therefore, hot small request blocks can be preferentially stored in the DRAM cache to achieve better I / O performance.
[0100] Figure 6 is a schematic diagram of another optional cache data management method according to an embodiment of the present application; Figure 6As shown, in a detection time window, after receiving a target access request, the logical address of the data can be mapped to the flash physical address, and the flash physical address can be marked. The characteristics and timestamps of the cached data in the current detection time window can be recorded. The machine learning algorithm (parameter comparison) can be used to determine the category of the cached data and calculate the proportion of the size type data. It can be determined whether the maximum proportion value (the larger of the two proportions) is greater than the limit threshold. If it is greater than the limit threshold, it can be predicted that the cached data of the next detection time window is a small request block, and the cached data is inserted into the second linked list. If it is less than the limit threshold, it can be predicted that the cached data of the next detection time window is a large request block, and the cached data is inserted into the first linked list. When the DRAM cache is full, the priority of the tail nodes of the first linked list and the second linked list can be calculated, and the nodes with lower priority can be eliminated. After the DRAM cache adjustment is completed, the above process can be repeated in the next detection time window.
[0101] In an optional implementation, the cache data management method can be executed by the SSD controller. The SSD (solid state drive) controller is a key component inside the SSD, which is responsible for managing tasks such as data reading and writing, error correction, wear leveling, garbage collection, and interface with the host system. The SSD controller is a physical integrated circuit (IC) that is usually integrated on the motherboard of the SSD. Together with the NAND flash memory chip, DRAM cache, and other electronic components, it forms the hardware foundation of the SSD.
[0102] Through the description of the above implementation methods, those skilled in the art can clearly understand that the method according to the above embodiment can be implemented by means of software plus a necessary general hardware platform, or by hardware, but in many cases the former is a better implementation method. Based on this understanding, the computer software product is stored in a storage medium (such as ROM / RAM, disk, CD), including several instructions for enabling a terminal device (which can be a computer, server, or network device, etc.) to execute the methods described in each embodiment of the present application.
[0103] In this embodiment, a cache data management device is also provided, which is used to implement the above-mentioned embodiments and preferred implementation modes, and the descriptions that have been made will not be repeated. As used below, the term "module" can be a combination of software and / or hardware that implements a predetermined function. Although the devices described in the following embodiments are preferably implemented in software, the implementation of hardware, or a combination of software and hardware, is also possible and conceivable.
[0104] Figure 7 is a structural block diagram of an optional cache data management device according to an embodiment of the present application, such as Figure 7As shown, the device includes: a category identification module 72, used to identify the category of the first cache data when the first cache data corresponding to the received target access request already exists; a first update module 74, used to update the nodes of the first linked list using the address information corresponding to the first cache data when the first cache data is a large request block; and a second update module 76, used to update the nodes of the second linked list using the address information corresponding to the first cache data when the first cache data is a small request block.
[0105] Through the present application, when the first cache data corresponding to the received target access request already exists, the category of the first cache data is identified; when the first cache data is a large request block, the node of the first linked list is updated using the address information corresponding to the first cache data; when the first cache data is a small request block, the node of the second linked list is updated using the address information corresponding to the first cache data. In the case of receiving an access request, the first cache data corresponding to the access request can be used as the cache management granularity. In the case where the first cache data is hit in the cache, different processing methods can be performed according to the category of the first cache data, such as inserting a large request block into the first linked list and inserting a small request block into the second linked list. In order to manage the cache data, and in the face of a workload dominated by random access, the cache data can also be effectively managed, thereby improving the utilization rate of the DRAM cache space, improving the performance of the solid-state hard disk, and solving the technical problem in the related art that the current cache management method leads to low performance of the solid-state hard disk. And improve the read and write performance of the SSD, achieve wear balance of the SSD, so as to increase the overall service life of the SSD.
[0106] Optionally, the above-mentioned category identification module 72 is also used to determine a preset data amount; when the data amount of the first cache data is greater than the preset data amount, the first cache data is determined to be a large request block; when the data amount of the first cache data is less than the preset data amount, the first cache data is determined to be a small request block.
[0107] Optionally, the above-mentioned determining the preset data volume includes: obtaining the number of preset data pages, and obtaining the preset data volume by multiplying the number of preset data pages by the standard data volume.
[0108] Optionally, the above-mentioned obtaining of the preset number of data pages includes: obtaining at least one reference access request, wherein the at least one reference access request is a continuous access request before the target access request; determining the data volume and average hit rate of at least one reference cache data corresponding to the at least one reference access request; and determining the preset number of data pages as the ratio of the product of the average data volume of the reference cache data corresponding to the write requests in the reference access requests and the average data volume and average hit rate of the reference cache data corresponding to the read requests in the reference access requests and the standard data volume.
[0109] Optionally, the cache data management device also includes: a prediction module for obtaining at least one second cache data corresponding to the first time period; and predicting the category of at least one third cache data corresponding to the second time period using the data category corresponding to the at least one second cache data, wherein the first time period and the second time period are continuous time periods with the same time interval.
[0110] Optionally, the above-mentioned prediction of the category of at least one third cache data corresponding to the second time period using the data category corresponding to at least one second cache data includes: determining a first proportion of second cache data whose data category is large request blocks in at least one second cache data in the second cache data; determining a second proportion of second cache data whose data category is small request blocks in at least one second cache data; when the first proportion is greater than the second proportion, predicting the category of the third cache data to be a large request block; when the second proportion is greater than the first proportion, predicting the category of the third cache data to be a small request block.
[0111] Optionally, the above-mentioned prediction of the category of at least one third cache data corresponding to the second time period using the data category corresponding to at least one second cache data includes: determining a first proportion of second cache data whose data category is large request blocks in at least one second cache data in the second cache data; determining a second proportion of second cache data whose data category is small request blocks in at least one second cache data; determining the larger value of the first proportion and the second proportion as a reference proportion; when the reference proportion is greater than the prediction parameter, predicting the category of the third cache data as small request blocks; when the reference proportion is less than the prediction parameter, predicting the category of the third cache data as large request blocks.
[0112] Optionally, the above-mentioned prediction module is also used to set a first prediction parameter and a second prediction parameter; update the first prediction parameter and the second prediction parameter using the prediction result of the first time period and at least one second cache data; and determine the smaller one of the first prediction parameter and the second prediction parameter as the prediction parameter.
[0113] Optionally, the first update module 74 is further configured to split the original cache data to obtain the first cache data when the first cache data exists in the original cache data, and update the nodes of the first linked list using the address information corresponding to the first cache data.
[0114] Optionally, the second updating module 76 is further configured to move the address information corresponding to the first cache data to the first position of the second linked list.
[0115] Optionally, the cache data management device mentioned above also includes: a cache replacement module, which is used to determine the first priority of the last node in the first linked list and the second priority of the last node in the second linked list when replacing the cache data; and eliminate the node corresponding to the smaller priority of the first priority and the second priority.
[0116] Optionally, the cache replacement module is further used to determine the priority of the node by using the number of accesses to the node, the amount of cached data corresponding to the node, the time point of the most recent access request matched by the node, and the current time point.
[0117] It should be noted that the above modules can be implemented by software or hardware. For the latter, it can be implemented in the following ways, but not limited to: the above modules are all located in the same processor; or the above modules are located in different processors in any combination.
[0118] An embodiment of the present application further provides a computer-readable storage medium, in which a computer program is stored, wherein the computer program is configured to execute the steps of any of the above method embodiments when running.
[0119] In an exemplary embodiment, the computer-readable storage medium may include, but is not limited to, various media that can store computer programs, such as a USB flash drive, a read-only memory (ROM), a random access memory (RAM), a mobile hard disk, a magnetic disk or an optical disk.
[0120] An embodiment of the present application further provides an electronic device, including a memory and a processor, wherein a computer program is stored in the memory, and the processor is configured to run the computer program to execute the steps in any one of the above method embodiments.
[0121] In an exemplary embodiment, the electronic device may further include a transmission device and an input / output device, wherein the transmission device is connected to the processor, and the input / output device is connected to the processor.
[0122] An embodiment of the present application further provides a computer program product, comprising a non-volatile computer-readable storage medium, wherein the non-volatile computer-readable storage medium stores a computer program product, and when the computer program is executed by a processor, the steps of the method described in each embodiment of the present application are implemented.
[0123] For specific examples in this embodiment, reference may be made to the examples described in the above embodiments and exemplary implementation modes, and this embodiment will not be described in detail herein.
[0124] Obviously, those skilled in the art should understand that the above modules or steps of the present application can be implemented by a general computing device, they can be concentrated on a single computing device, or distributed on a network composed of multiple computing devices, they can be implemented by a program code executable by a computing device, so that they can be stored in a storage device and executed by the computing device, and in some cases, the steps shown or described can be executed in a different order from that herein, or they can be made into individual integrated circuit modules, or multiple modules or steps therein can be made into a single integrated circuit module for implementation. Thus, the present application is not limited to any specific combination of hardware and software.
[0125] The above description is only the preferred embodiment of the present application and is not intended to limit the present application. For those skilled in the art, the present application may have various modifications and variations. Any modification, equivalent replacement, improvement, etc. made within the principles of the present application shall be included in the protection scope of the present application.
Claims
1. A method for managing cache data, characterized in that: The method comprises: In a case where the first cache data corresponding to the received target access request already exists, identifying a category of the first cache data; In the case where the first cache data is a large request block, updating the nodes of the first linked list using the address information corresponding to the first cache data; In the case where the first cache data is a small request block, updating the nodes of the second linked list using the address information corresponding to the first cache data; After identifying the category of the first cache data, the method further includes: Acquire at least one second cache data corresponding to the first time period; Predicting a category of at least one third cache data corresponding to a second time period by using the data category corresponding to the at least one second cache data, wherein the first time period and the second time period are continuous time periods with the same time interval; The predicting the category of at least one third cache data corresponding to the second time period by using the data category corresponding to the at least one second cache data includes: Determine a first proportion of the at least one second cache data whose data category is a large request block in the second cache data; Determine a second proportion of the second cache data in which the data category of the at least one second cache data is a small request block; Determine a larger value between the first proportion and the second proportion as a reference proportion; When the reference ratio is greater than the prediction parameter, predicting that the category of the third cache data is a small request block; When the reference ratio is smaller than the prediction parameter, the category of the third cache data is predicted to be a large request block.
2. The method according to claim 1, characterized in that The identifying the category of the first cache data includes: Determine the preset data volume; When the data amount of the first cache data is greater than the preset data amount, determining that the first cache data is a large request block; When the data amount of the first cache data is smaller than the preset data amount, it is determined that the first cache data is a small request block.
3. The method according to claim 2, characterized in that The step of determining the preset data volume includes: The preset data page quantity is obtained, and the preset data quantity is obtained by multiplying the preset data page quantity and the standard data quantity.
4. The method according to claim 3, characterized in that The obtaining of the preset number of data pages includes: Acquire at least one reference access request, wherein the at least one reference access request is a continuous access request before the target access request; Determining a data volume and an average hit rate of at least one reference cache data corresponding to the at least one reference access request; The preset data page quantity is determined as the ratio of the product of the average data volume of the reference cache data corresponding to the write request in the reference access request, the average data volume of the reference cache data corresponding to the read request in the reference access request and the average hit rate to the standard data volume.
5. The method according to claim 1, characterized in that The predicting the category of at least one third cache data corresponding to the second time period by using the data category corresponding to the at least one second cache data includes: Determine a first proportion of the at least one second cache data whose data category is a large request block in the second cache data; Determine a second proportion of the second cache data in which the data category of the at least one second cache data is a small request block; When the first proportion is greater than the second proportion, predicting that the category of the third cache data is a large request block; When the second proportion is greater than the first proportion, it is predicted that the category of the third cache data is a small request block.
6. The method according to claim 1, characterized in that Determining the prediction parameters includes: Setting a first prediction parameter and a second prediction parameter; updating the first prediction parameter and the second prediction parameter using the prediction result of the first time period and the at least one second cached data; A smaller parameter between the first prediction parameter and the second prediction parameter is determined as the prediction parameter.
7. The method according to claim 1, characterized in that The updating of the nodes of the first linked list by using the address information corresponding to the first cache data includes: In the case that the first cache data exists in the original cache data, the original cache data is split to obtain the first cache data, and the nodes of the first linked list are updated using the address information corresponding to the first cache data.
8. The method according to claim 1, characterized in that The updating of the nodes of the second linked list by using the address information corresponding to the first cache data includes: Move the address information corresponding to the first cache data to the first position of the second linked list.
9. The method according to claim 1, characterized in that: The method further comprises: In case of replacing cached data, determining a first priority of a node at the end of the first linked list and a second priority of a node at the end of the second linked list; Nodes corresponding to the smaller priority between the first priority and the second priority are eliminated.
10. The method according to claim 9, characterized in that The determining the priorities of the nodes in the first linked list and the nodes in the second linked list includes: The priority of the node is determined by using the number of accesses to the node, the amount of cached data corresponding to the node, the time point of the most recent access request matched by the node, and the current time point.
11. A cache data management device, characterized in that: The device comprises: a category identification module, configured to identify the category of the first cache data when the first cache data corresponding to the received target access request already exists; A first updating module, configured to update the nodes of the first linked list by using the address information corresponding to the first cache data when the first cache data is a large request block; A second updating module, configured to update the nodes of the second linked list using the address information corresponding to the first cache data when the first cache data is a small request block; The device further comprises: a prediction module, configured to obtain at least one second cache data corresponding to the first time period; Predicting a category of at least one third cache data corresponding to a second time period by using the data category corresponding to the at least one second cache data, wherein the first time period and the second time period are continuous time periods with the same time interval; The predicting the category of at least one third cache data corresponding to the second time period by using the data category corresponding to the at least one second cache data includes: Determine a first proportion of the at least one second cache data whose data category is a large request block in the second cache data; Determine a second proportion of the second cache data in which the data category of the at least one second cache data is a small request block; Determine a larger value between the first proportion and the second proportion as a reference proportion; When the reference ratio is greater than the prediction parameter, predicting that the category of the third cache data is a small request block; When the reference ratio is smaller than the prediction parameter, the category of the third cache data is predicted to be a large request block.
12. A computer-readable storage medium, characterized in that: The computer-readable storage medium stores a computer program, wherein the computer program implements the steps of the method according to any one of claims 1 to 10 when executed by a processor.
13. An electronic device comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, characterized in that: When the processor executes the computer program, the steps of the method according to any one of claims 1 to 10 are implemented.
14. A computer program product comprising a computer program, characterized in that When the computer program is executed by a processor, the steps of the method according to any one of claims 1 to 10 are implemented.