Method, device and medium for simulating wafer processing

Abstract

Embodiments of the present disclosure provide a method, device, and medium for simulating a wafer processing process. The method includes: determining a target processing of a target processing stage to be performed on the to-be-processed area at the current moment based at least on the value of a first process parameter of the to-be-processed area of ​​the wafer at the current moment; and simulating the target processing of the to-be-processed area based at least on the value of a second process parameter associated with the target processing stage to update the value of the first process parameter of the to-be-processed area at the next moment. In this way, the value of the process parameter at the next moment can be predicted based on the value of the process parameter at the current moment, thereby completing the simulation of wafer processing.

Description

Technical Field

[0001] Embodiments of the present disclosure generally relate to the field of integrated circuits, and more particularly, to methods, apparatuses, and media for simulating wafer processing. Background Art

[0002] Chemical-Mechanical Polishing (CMP) is a surface treatment technology used in semiconductor manufacturing and other precision engineering fields. The core of CMP technology is to achieve smoothness and uniformity of the material surface through a combination of chemical action and mechanical friction. During the CMP process, the object to be polished (e.g., a wafer) is pressed against a rotating polishing pad while a polishing liquid (usually containing abrasive particles and a chemical activator) is applied to the wafer surface. The abrasive particles provide mechanical grinding action, while the chemical activator promotes the chemical removal of the material. However, there are some problems with current chemical mechanical polishing technology that affect the polishing quality of the object to be polished. Summary of the invention

[0003] In a first aspect of the present disclosure, a method for simulating a wafer processing process is provided. The method includes: determining a target processing of a target processing stage to be performed on the to-be-processed region at the current moment based on at least a value of a first process parameter of the to-be-processed region of the wafer at the current moment; and simulating the target processing of the to-be-processed region based on at least a value of a second process parameter associated with the target processing stage to update the value of the first process parameter of the to-be-processed region at the next moment.

[0004] In a second aspect of the present disclosure, an electronic device is provided. The electronic device includes a processor and a memory coupled to the processor. The memory has instructions stored therein, and when the instructions are executed by the processor, the electronic device executes the method according to the first aspect of the present disclosure.

[0005] In a third aspect of the present disclosure, a computer-readable storage medium is provided. The computer-readable storage medium stores a computer program. When the computer program is executed by a processor, the method according to the first aspect of the present disclosure is implemented.

[0006] It will be understood from the following description that according to an embodiment of the present disclosure, at least based on the value of the first process parameter of the wafer's to-be-processed area at the current moment, the target processing of the target processing stage to be performed on the to-be-processed area at the current moment is determined. At least based on the value of the second process parameter associated with the target processing stage, the target processing of the to-be-processed area is simulated to update the value of the first process parameter of the to-be-processed area at the next moment. In this way, the process parameter value at the next moment can be predicted based on the process parameter value at the current moment, thereby completing the simulation of wafer processing. Other benefits will be described below in conjunction with the corresponding embodiments.

[0007] It should be understood that the contents described in the summary of the present invention are not intended to limit the key features or important features of the embodiments of the present disclosure, nor are they intended to limit the scope of the present disclosure. Other features of the present disclosure will become easily understood through the following description. BRIEF DESCRIPTION OF THE DRAWINGS

[0008] The above and other features, advantages and aspects of the embodiments of the present disclosure will become more apparent with reference to the following detailed description in conjunction with the accompanying drawings. In the accompanying drawings, the same or similar reference numerals represent the same or similar elements, wherein:

[0009] Figure 1 A schematic diagram showing an example environment in which various embodiments of the present disclosure can be implemented;

[0010] Figure 2A A flow chart of a method for simulating a wafer processing process according to some embodiments of the present disclosure is shown;

[0011] Figure 2B A flowchart showing another method for simulating a wafer processing process according to some embodiments of the present disclosure; and

[0012] Figure 3 A block diagram of a server or electronic device is shown in which one or more embodiments of the present disclosure may be implemented. DETAILED DESCRIPTION

[0013] Embodiments of the present disclosure will be described in more detail below with reference to the accompanying drawings. Although certain embodiments of the present disclosure are shown in the accompanying drawings, it should be understood that the present disclosure can be implemented in various forms and should not be construed as being limited to the embodiments described herein, which are instead provided for a more thorough and complete understanding of the present disclosure. It should be understood that the drawings and embodiments of the present disclosure are only for exemplary purposes and are not intended to limit the scope of protection of the present disclosure.

[0014] In the description of the embodiments of the present disclosure, the term "including" and similar terms should be understood as open inclusion, that is, "including but not limited to". The term "based on" should be understood as "based at least in part on". The term "one embodiment" or "the embodiment" should be understood as "at least one embodiment". The terms "first", "second", etc. may refer to different or the same objects. Other explicit and implicit definitions may also be included below.

[0015] Figure 1 A schematic diagram of an example environment 100 in which the various embodiments of the present disclosure can be implemented is shown. The example environment 100 may generally include an electronic device 110. The electronic device 110 may be used to simulate a wafer processing process. For example, the electronic device 110 may be used to generate a wafer processing model 120 or update the wafer processing model 120. In this document, the wafer processing process may be a CMP process. The wafer processing model 120 may be used to simulate or simulate a CMP process. The wafer processing model 120 may be initialized in any manner. For example, the wafer processing model 120 may simulate a CMP process on a target wafer 130 to be processed to obtain a (simulated) processed target wafer 132.

[0016] In some embodiments, the electronic device 110 may generate or update the wafer processing model 120 based on a set of measurement parameter information (e.g., measurement parameter information 102-1, 102-2, ...) and a set of simulation parameter information (e.g., simulation parameter information 104-1, 104-2, ...) of the target wafer. Generating or updating the wafer processing model 120 refers to determining or updating the various parameters of the wafer processing model 120. A set of measurement parameter information may be obtained by actually processing the target wafer, such as CMP processing, and then measuring the processed target wafer. A set of simulation parameter information may be parameter information of the simulated wafer obtained by simulating the processing of the target wafer using the wafer processing model 120. Reference will be made to Figure 2A and Figure 2B Several example embodiments of determining or updating the wafer process model 120 for simulating a wafer processing procedure are described in detail.

[0017] In some embodiments, the electronic device 110 may be communicatively connected to a wafer processing platform, such as a CMP platform. The electronic device 110 may also be communicatively connected to one or more sensors at various locations on the wafer processing platform or adjacent to the wafer processing platform. The wafer processing platform may actually process the wafer and transmit a set of measurement parameter information to the electronic device 110.

[0018] In some embodiments, the electronic device 110 can also be connected to the CMP platform in communication and control the CMP platform to perform polishing operations. For example, the electronic device controls the loading and unloading of the target wafer 130, the setting of the platen, the identification of the area on the target wafer 130, and the area-based control and / or unpartitioned target control of the target wafer 130 area during the CMP process / operation. The electronic device controls the CMP platform to perform polishing work on the surface of the target wafer 130 to achieve the CMP operation. The CMP operation may include more than one CMP process, which polishes the target wafer 130 to achieve the CMP target for the area or area group within the target wafer 130.

[0019] The electronic device 110 may determine the process parameter values ​​ultimately used for the wafer processing platform, such as the CMP platform, based on the obtained or updated process parameter values ​​of the wafer processing model 120. These process parameter values ​​may include values ​​of various process parameters used for CMP.

[0020] In the example environment 100, the electronic device 110 can be any type of device with computing capabilities, including a terminal device or a server device. The terminal device can be any type of mobile terminal, fixed terminal or portable terminal, including a mobile phone, a desktop computer, a laptop computer, a notebook computer, a netbook computer, a tablet computer, a media computer, a multimedia tablet, a personal communication system (PCS) device, a personal navigation device, a personal digital assistant (PDA), an audio / video player, a digital camera / camcorder, a positioning device, a television receiver, a radio broadcast receiver, an e-book device, a gaming device, or any combination of the foregoing, including accessories and peripherals of these devices or any combination thereof. The server device can include, for example, a computing system / server, such as a mainframe, an edge computing node, a computing device in a cloud environment, and the like.

[0021] It should be understood that the structure and function of the environment 100 are described for exemplary purposes only, and do not imply any limitation on the scope of the present disclosure. Example embodiments according to the present disclosure will be described in detail below with reference to the accompanying drawings.

[0022] As briefly mentioned above, when integrated circuits (ICs) are built layer by layer on the surface of a semiconductor wafer, the CMP process is used to polish or flatten the top layer or layers to provide a flat surface for subsequent manufacturing steps. Therefore, ensuring the flatness of the wafer surface (i.e., the ultimate goal of the CMP process) is particularly important for improving chip performance.

[0023] Currently, the CMP process is mainly controlled by the final state prediction model. The final wafer surface height fluctuation is predicted by using predetermined CMP process parameters, and the CMP platform is controlled to polish the wafer according to the prediction results. On the one hand, this method contains many fixed assumptions, resulting in low model prediction accuracy and affecting the flatness of the final wafer surface. On the other hand, this modeling method lacks the simulation process of the intermediate state, and lacks analyzability and stability.

[0024] To this end, an embodiment of the present disclosure proposes a method for simulating a wafer processing process. According to an embodiment of the present disclosure, based at least on the value of the first process parameter of the to-be-processed area of ​​the wafer at the current moment, the target processing of the target processing stage to be performed on the to-be-processed area at the current moment is determined; and based at least on the value of the second process parameter associated with the target processing stage, the target processing of the to-be-processed area is simulated to update the value of the first process parameter of the to-be-processed area at the next moment. In this way, the process parameter value at the next moment can be predicted based on the process parameter value at the current moment, thereby completing the simulation of wafer processing.

[0025] The following describes example embodiments of the present disclosure with continued reference to the accompanying drawings.

[0026] Figure 2A An example of a method 200 for simulating a wafer processing process is shown. In some embodiments, the method 200 may be performed as follows: Figure 1 The electronic device 110 shown executes. It should be understood that the method 200 may further include additional blocks not shown and / or may omit one (or some) of the blocks shown, and the scope of the present disclosure is not limited in this respect.

[0027] In box 210, the electronic device 110 determines the target processing of the target processing stage to be performed on the area to be processed at the current moment based on at least the value of the first process parameter of the area to be processed of the wafer at the current moment. As an example, the first process parameter may include at least one of the following: the thickness of the non-channel area of ​​the area to be processed (represented as ThickNT in this article), the thickness of the channel area of ​​the area to be processed (represented as ThickT in this article), the butterfly depression in the area to be processed (represented as Dishing in this article), and the corrosion of the area to be processed (represented as Erosion in this article). It should be understood that in some embodiments, the first process parameter may also include other appropriate process parameters. The embodiments of the present disclosure are not limited in this regard.

[0028] In block 220, the electronic device 110 simulates the target processing of the area to be processed based on at least the value of the second process parameter associated with the target processing stage to update the value of the first process parameter of the area to be processed at the next moment. As an example, the second process parameter may include, but is not limited to, a generalized grinding rate for the target processing stage. The second process parameter may also include at least one of the following: a polishing pad process parameter value, a polishing liquid process parameter value, and a pressure correction coefficient value.

[0029] In this way, the process parameters at the next moment can be predicted based on the process parameters at the current moment, thereby completing the simulation of the wafer processing process.

[0030] In some embodiments, the electronic device 110 may determine which processing stage of at least one processing stage the target processing stage at the time belongs to. For example, the electronic device 110 may determine the target processing stage at the current moment according to the processing duration of each processing stage and the duration from the current moment to the start moment.

[0031] In some embodiments, the electronic device 110 may determine the target processing to be performed on the to-be-processed area at the current moment in the target processing stage based on the value of the first process parameter of the to-be-processed area at the current moment. The target processing may be processing of a certain material at the target stage, such as grinding.

[0032] As an example, the CMP process can be simulated based on the corresponding process parameter value at any time in each polishing stage of the CMP process to determine the simulation parameter information at this time. The simulation parameter information indicates the value of the first process parameter of the wafer obtained by simulation after the wafer is polished using the process parameter value.

[0033] In some embodiments, the electronic device 110 first determines the target processing stage (i.e., the polishing stage) corresponding to the current moment. Exemplarily, the electronic device 110 can determine the material interface information of the area to be processed based on the value of the first process parameter measured at the current moment. The material interface information indicates at least one of the following: the material interface of the non-channel area of ​​the area to be processed, and the material interface of the channel area of ​​the area to be processed.

[0034] Since different polishing stages correspond to different grinding material layers, the electronic device 110 can determine the target processing to be performed on the area to be processed at the target processing stage at the current moment based on the determined material interface information. The target processing indicates at least one of the following: processing of the non-channel area of ​​the area to be processed, and processing of the channel area of ​​the area to be processed. For example, if the channel area and the non-channel area of ​​the area to be processed are both in a certain metal material layer, it indicates that the metal material is currently to be processed, such as grinding. If the channel area of ​​the area to be processed is in a first material layer, and the non-channel area of ​​the area to be processed is in a second material layer, it indicates that the first material and the second material are to be processed, such as grinding, respectively.

[0035] In some embodiments, the electronic device 110 can determine the grinding rate for the corresponding material layer indicated by the process parameter value according to the material layer in which the channel region and the non-channel region of the determined area to be processed are located, so as to process the area to be processed. The electronic device 110 can then determine the value of the first process parameter of the processed area to be processed as the value of the first process parameter at the next moment.

[0036] In some embodiments, the electronic device 110 can determine the value of the second process parameter corresponding to the target processing stage and the pressure parameter information. Exemplarily, the electronic device 110 can determine the pressure parameter information based on the value of the first process parameter at the current moment and the nominal pressure at the current moment. The nominal pressure refers to the pressure value specified by the user. For example, the user can set the nominal pressure for the CMP grinding machine. CMP can be divided into different stages. Different nominal pressures can be set for each stage. Different pressure values ​​are usually required to be applied to different points in the wafer to be processed area. The actual pressure value to be applied to each point can be determined based on the nominal pressure and the value of the first process parameter. In some embodiments, the pressure parameter information includes at least one of the following: the pressure for the non-channel area of ​​the area to be processed, and the pressure for the channel area of ​​the area to be processed.

[0037] In some embodiments, the pressure parameter information can be determined based on the layout graphic information of the area to be processed, the process parameters of the polishing pad, the process parameters of the polishing liquid, and the pressure correction coefficient. For example, at the current moment, the height of point A in the area to be processed of the wafer is 20 nanometers (nm), and the height of point A needs to be ground to 15nm, then it is determined that point A needs to be ground 5nm within a predetermined time. In this case, the electronic device 110 can determine the pressure value to be applied based on the process parameters of the polishing pad and the process parameters of the polishing liquid. Combined with the pressure correction coefficient of the CMP platform, the obtained pressure value is corrected, and finally the pressure parameter information that needs to be applied to the CMP platform is determined.

[0038] Exemplarily, the electronic device 110 may determine at least one simulated grinding rate for simulating the target processing stage based on the determined pressure parameter information and the value of the second process parameter (e.g., nominal grinding rate) using a simulation model. The simulation model may be an initialized wafer processing model 120 or a previously updated wafer processing model 120. Based on the at least one simulated grinding rate, a grinding simulation is performed on the area to be processed to obtain the value of the first process parameter of the area to be processed at the next moment.

[0039] In some embodiments, the simulated polishing rate includes but is not limited to the simulated polishing rate for the non-channel area of ​​the area to be processed and the simulated polishing rate for the channel area of ​​the area to be processed. Exemplarily, for each graphic design system (GDS) grid point during the polishing process, the pressure parameter information calculation formula at any time is as follows:

[0040] P_NT = P + (dishing_full / dishing_pre) × P × ((1-d) / d) (1)

[0041] P_T = P – (dishing_pre / dishing_full) × P × (d / (1-d)) (2)

[0042] Among them, d is the material spatial distribution density of the GDS grid, w is the width of the layout line or pattern, s is the spatial distance between the lines and patterns in the layout, P is the perimeter of the area to be processed in the layout, and SPad is the deformation coefficient of the polishing pad. dishing_pre is the difference between the thickness of the non-channel area and the thickness of the channel area at the previous moment, dishing_full is the difference between the thickness of the non-channel area and the thickness of the channel area at the current moment, P_NT is the pressure parameter information of the non-channel area, and P_T is the pressure parameter information of the channel area.

[0043] Assume that the material interface being ground in the non-channel area structure of the GDS grid point at the current moment is Material_NT, and the material being ground in the channel area structure is Material_T, according to the set material nominal grinding rate R_material. Then the simulation grinding rate of the GDS grid point is determined by the following method:

[0044] R_NT = m × ( P1_NT / (a×P_NT + b) ) × R_material (3)

[0045] R_T = n × ( P1_T / (c×P_T + d) ) × R_material (4)

[0046] Wherein, R_NT is the simulated grinding rate of the non-channel area, R_T is the simulated grinding rate of the channel area, a and b are the pressure correction coefficients of the non-channel area structure, m is the grinding rate correction coefficient of the non-channel area structure, c and d are the pressure correction coefficients of the channel area structure, n is the grinding rate correction coefficient of the channel area structure, P1_NT is the nominal pressure of the non-channel area (i.e., the user input pressure), and P1_T is the nominal pressure of the channel area.

[0047] According to the simulated grinding rate R_NT of the non-channel area and the simulated grinding rate R_T of the channel area calculated above, the value of the first process parameter at the next moment can be obtained. For example, the thickness ThickNT of the non-channel area at the next moment is equal to the ThickNT at the current moment minus R_NT×dt (dt is the time length between adjacent moments, that is, the time step or step length), the thickness ThickT of the channel area at the next moment is equal to the ThickT at the current moment minus R_T×dt, and the butterfly-shaped depression Dishing at the next moment is equal to the ThickNT at the next moment minus the ThickT at the next moment. The corrosion Erosion at the next moment is equal to the target thickness at the current moment minus ThickNT. The target thickness at the current moment can be a certain parameter, for example, it can be specified by the user, which is indispensable information in the process information.

[0048] In this way, the complete CMP calculation results can be obtained, and the material interface conditions, actual pressure conditions, actual grinding rate conditions, thickness values, etc. of each point in the channel area and the channel area at each time step can be known. Therefore, a more in-depth and thorough analysis of CMP can be performed. In addition, the calculation results of this scheme are accurate. This scheme assumes that when the time step dt is small enough, the thickness of the channel area and the grinding amount of the non-channel area at each point are equal to dt×grinding rate. This assumption is robust enough and very consistent with the actual situation, so the calculation results are very accurate.

[0049] In some embodiments, the electronic device 110 may iteratively perform the process from box 210 to box 220 until the processing duration of at least one processing stage expires. That is, the simulation of at least one processing stage ends. By iteratively simulating at least one processing stage of the wafer processing process, simulation parameter information of the to-be-processed area of ​​the wafer may be obtained.

[0050] Figure 2B A flow chart of a method 250 for simulating a wafer processing process according to some embodiments of the present disclosure is shown. As an example, the method 250 may be implemented at the electronic device 110.

[0051] In box 260, the electronic device 110 processes the area to be processed of the wafer in at least one processing stage to obtain measurement parameter information of the area to be processed after processing. For example, the electronic device 110 can process the area to be processed based on the process parameter value and processing time of at least one processing stage of the area to be processed of the wafer to obtain measurement parameter information of the area to be processed after processing. As an example, the measurement parameter information may include at least one of the following: the thickness of the non-channel area of ​​the area to be processed, the thickness of the channel area of ​​the area to be processed, the butterfly depression in the area to be processed, and the corrosion of the area to be processed. That is, the measurement parameter information includes but is not limited to the thickness of the non-channel area of ​​the area to be processed, the thickness of the channel area of ​​the area to be processed, the butterfly depression in the area to be processed, and the corrosion of the area to be processed. It should be understood that the measurement parameter information may also include other appropriate geometric information. The embodiments of the present disclosure are not limited in this regard.

[0052] The area to be processed of the wafer may refer to one or more areas or grids to be processed in the wafer. Each area to be processed or grid of the wafer may be processed separately, and the measurement parameter information of the entire wafer may be measured. In some embodiments, multiple areas of the wafer may be determined based on the differences in structural features within the relevant wafer surface area. In the CMP process, structural features affect the polishing removal rate of each feature and affect how each feature changes during the polishing process. In some embodiments, each stage of the CMP process achieves the CMP target for an area or a group of areas (but not the entire wafer). The area targeted by the CMP process may be a group of areas (but not all areas) of a "target area" or a "multiple target areas". At each stage, the CMP process (e.g., turntable rotation speed, surface pressure, slurry, pad, and other parameters / conditions for performing CMP) may be for features in the target area to have a higher polishing rate (i.e., more efficiently polishing features in the target area).

[0053] In some embodiments, at least one processing stage, such as the complete physical process of CMP, can be decomposed into calculations for each time step. Assume that the entire CMP is divided into M (M is an integer greater than or equal to 1) stages (each stage has different physical parameter settings), each stage lasts for T1, T2, T3, .. T_M seconds, and the unit time step is set to dt (generally dt <= 1s or other appropriate time lengths). Different process parameters can be set for different stages, for example, CMP is divided into three stages, named 1, 2, and 3. The nominal pressure setting for each stage can be different, and the generalized removal rate (Remove Rate) of each material can be freely defined in each stage.

[0054] In some embodiments, the processing or polishing process of the wafer can be divided into multiple stages according to the structural characteristics of the wafer. For example, the polishing process of the wafer can be divided into a bulk stage (also referred to as the first stage), a touchdown stage (also referred to as the second stage), and a barrier removal stage (also referred to as the third stage) according to the different grinding materials. The first stage is used to grind the metal material on the top layer of the wafer, such as the material on the polishing pad. The second stage is used for the wafer to contact the polishing pad. The third stage is used to remove the barrier layer material, such as the barrier layer material of the grinding wafer). For another example, the wafer processing stage can be divided into two stages, four stages, or fewer or more stages. That is, at least one processing stage may include one or more of the first stage, the second stage, and the third stage. At least one processing stage may also include other appropriate stages. The embodiments of the present disclosure are not limited in this regard.

[0055] Since different polishing stages require different materials to be ground, different process parameters need to be used in each processing or polishing stage. In some embodiments, different process parameter values ​​can be set for each processing stage. The process parameters can have fixed values ​​or can include values ​​to be optimized. For example, fixed process parameter values ​​can include but are not limited to grinding pressure, pressure duration, etc. The process parameter values ​​to be optimized can include but are not limited to the grinding rate for the non-channel area of ​​the area to be processed, the grinding rate for the channel area of ​​the area to be processed, the polishing pad process parameters, the polishing liquid process parameters, the pressure correction factor, and the like.

[0056] In some embodiments, the electronic device 110 can determine the process parameter value and processing time of at least one processing stage based on the CMP target of the wafer, and use the CMP platform to polish the area to be processed of the wafer. These process parameter values ​​can be any initialized values, or values ​​set based on experience. Subsequently, the wafer after polishing is measured to determine the measurement information after polishing. The measurement results include the measurement parameter information of the wafer at the end of at least one polishing stage. Different process parameters can have a mutual restriction relationship.

[0057] In some embodiments, it is possible to predefine which parameters need to be optimized and which parameters are fixed parameters, define the mutual restriction relationship between the parameters, and define the range of the value of each parameter to be optimized. In the embodiments of this article, for the purpose of explanation, it is assumed that there are a total of A parameters to be optimized (A is an integer greater than or equal to 1). In the entire process, many physical variables are defined, such as the grinding rate of each material, and the influencing factors of the layout graphic features, etc. The entire CMP is a continuous and complete process, from the beginning to the final stage, and each stage can have relevant measurement values, for example, a measurement can be performed after the end of the first stage, or another measurement can be performed in the third stage. Therefore, there can be several stages (at least one) of measurement values ​​(specifically, the value of the first process parameter of each grid point of the wafer layout graphic at the end of the stage, such as the value of indicators such as corrosion, channel thickness, non-channel thickness, butterfly depression, etc.). The undetermined parameters of the first stage can be obtained by feedback and solution through the measurement values ​​of other stages, such as the third stage. Similarly, the unknown parameters defined in other stages, such as the third stage, can be calculated through the measurement values ​​of the first stage.

[0058] In block 270, the electronic device 110 may perform simulation processing of at least one processing stage on the to-be-processed area of ​​the wafer to obtain simulation parameter information of the to-be-processed area after the simulation processing. For example, the electronic device 110 may iteratively perform simulation processing on at least one processing stage based on the process parameter value of at least one processing stage until the processing time of at least one processing stage is reached to obtain simulation parameter information of the to-be-processed area after the simulation processing.

[0059] At block 280, the electronic device 110 may update the value of the second process parameter based at least on the comparison between the simulation parameter information and the measurement parameter information. In some embodiments, the electronic device 110 may determine the difference between the simulation parameter information and the measurement parameter information corresponding to each polishing process stage, and update the process parameter value of the process stage based on the difference. Exemplarily, the electronic device 110 may first determine the difference between the simulation parameter information and the measurement parameter information, and then determine the accuracy of the simulation based on the difference between the two. The accuracy of the simulation may be a ratio of the difference between the two to the measurement parameter information.

[0060] In some embodiments, the electronic device 110 may update the process parameter values ​​using a machine learning model (e.g., a genetic algorithm model). Exemplarily, the electronic device 110 may first define parameters such as the initial population size, crossover probability, and mutation probability of the genetic algorithm, and generate a primary population according to the constraints. For any one of the multiple processing stages, the electronic device 110 generates a set of reference values ​​(i.e., the primary population) for the process parameters of this processing stage. Each of a set of reference values ​​indicates an individual. The length of each individual is the same as the number of parameters to be optimized. Each individual indicates the initial values ​​of all parameters to be optimized.

[0061] As an example, we can define the maximum number of iterations N and the population size Q of the genetic algorithm, define which parameters need to be optimized and which parameters are fixed parameters, define the mutual restriction relationship between parameters, and define the value range of each parameter to be optimized. Assume that there are a total of A parameters to be optimized. According to the previously defined A parameters to be optimized and their value ranges, a random value is taken for each parameter to obtain a vector of length A. This behavior is repeated Q times to obtain a matrix of size [A, Q]. This matrix is ​​the initial population, which contains Q individuals, each of which is A in length, and contains the results of random initialization of A parameters.

[0062] As mentioned above Figure 2ABriefly described, the existing primary population, which contains the current iteration values ​​of all pending parameters, performs time step calculation based on the GDS information in the input wafer data, such as density, width, diameter, spacing, etc., pre-CMP (Pre-CMP) information (for example, including non-channel thickness ThickNT, channel thickness ThickT, butterfly depression Dishing, Erosion, etc.). You can first determine which stage of the M stages of CMP it currently belongs to, and then calculate the actual channel pressure and non-channel pressure of each point based on the GDS information, polishing pad process parameters, polishing liquid process parameters, and nominal pressure of each point, referred to as P_NT and P_T. Next, based on the current ThickNT and ThickT of each point, the material interface of the channel part and the material interface of the non-channel part of each point at the current moment are determined, so as to obtain the material information of each point at the current moment (the material information refers to the stage of grinding which material each point on the wafer / GDS is at at the current moment), and obtain the generalized grinding rate R of each point based on the material information. According to P_NT, P_T, and the generalized grinding rate R, the actual grinding rate R_T on the channel and the actual grinding rate R_NT on the non-channel of each point can be calculated. The ThickNT at the next moment is equal to the ThickNT at the current moment minus R_NT×dt, the ThickT at the next moment is equal to the ThickT at the current moment minus R_T×dt, and the Dishing at the next moment is equal to the ThickNT at the next moment minus the ThickT at the next moment. The Erosion at the next moment is equal to the target thickness at the current moment minus ThickNT.

[0063] Subsequently, the electronic device 110 may determine performance indicators corresponding to the set of reference values. The performance indicators indicate the accuracy of simulating the processing of the wafer using the corresponding reference values. For each reference value in a set of reference values, the electronic device 110 may process the area to be processed based on the reference value to obtain a set of measurement parameter information corresponding to each reference value. Subsequently, based on a set of reference values, at least one processing stage of the area to be processed is simulated to obtain a set of simulation parameter information after simulating at least one processing stage. Based on a set of simulation parameter information and a set of measurement parameter information, the electronic device 110 may determine the performance indicators of each set of reference values, and the performance indicators indicate the accuracy of simulating the processing of the wafer using the corresponding reference values.

[0064] Exemplarily, for a first reference value in a set of reference values, the electronic device 110 may determine a first loss value (also referred to as a first objective function value) based on first simulation parameter information corresponding to the first reference value in a set of simulation parameter information and first measurement parameter information corresponding to the first reference value in a set of measurement parameter information. The loss value may indicate an individual loss. The electronic device 110 may determine a penalty value based on an association between process parameters of at least one processing stage. The electronic device 110 may determine a first performance indicator for the first reference value based on the first loss value and the penalty value. For example, the sum or weighted sum of the first loss value and the penalty value may be determined as a first performance indicator (also referred to as a first fitness or a first survival degree). As an example, the loss value may be calculated using formula (5):

[0065] obj = w1×ThickNT_gap + w2×ThickT_gap + w3×Dishing_gap (5)

[0066] Wherein, obj represents the loss function value, ThickNT_gap is the difference between the measured thickness and the simulated thickness of the non-channel area at the current moment, ThickT_gap is the difference between the measured thickness and the simulated thickness of the channel area at the current moment, Dishing_gap is the difference between the first thickness difference and the second thickness difference at the current moment, the first thickness difference is the difference between the simulated thickness of the non-channel area and the simulated thickness of the channel area, the second thickness difference is the difference between the measured thickness of the non-channel area and the measured thickness of the channel area, w1, w2, w3 are weight values, and the weight values ​​can be pre-set fixed values. It should be understood that the calculation method of the loss value listed in formula (5) is only exemplary and not restrictive. Any appropriate method can be used to calculate the loss value, penalty value and performance index. The scope of the present disclosure is not limited in this respect.

[0067] The electronic device 110 may update the process parameter value of at least one processing stage based on at least one reference value in a set of reference values ​​having a performance indicator exceeding a threshold. In some embodiments, the electronic device 110 may replace the process parameter value of at least one processing stage with at least one parameter value having a performance indicator exceeding a threshold.

[0068] Specifically, the time step calculations in each processing stage described above can be repeated until M CMP processing stages are calculated to obtain ThickNT, ThickT and Dishing at the final moment, and define the objective function obj = w1×ThickNT_gap + w2×ThickT_gap + w3×Dishing_gap to obtain a comprehensive objective function value recorded as J. For Q populations, Q objective function values ​​can be obtained. According to the mutual restrictions between each pre-defined parameter to be determined, the penalty value K of each population is calculated. According to Q populations, Q penalty values ​​can be obtained. Add J and K to get the survival of the final Q populations. Take the population with the highest survival, repeat crossover and mutation Q-1 times to obtain Q-1 new populations, and add the population with the highest survival itself, and a total of Q new next generation populations can be obtained.

[0069] In some embodiments, the electronic device 110 may iteratively execute method 250 to update each process parameter value. For example, the electronic device 110 may sort the individuals in the population whose corresponding performance indicators exceed the threshold in order from small to large, and select the first K individuals as target individuals. The threshold may be pre-set, or the threshold may be dynamically set according to the performance indicators of each individual. The electronic device 110 may perform crossover and mutation operations on the selected K target individuals according to the crossover probability and mutation probability set in the initial parameters, thereby generating a population of offspring. The electronic device 110 may calculate the loss value and performance indicator of each individual in the offspring population. Then, the individual with the smallest loss value is selected from the parent and offspring populations.

[0070] The electronic device 110 can determine whether the maximum genetic generation (i.e., the maximum number of iterations) has been reached. If it has been reached, the electronic device 110 can output the selected individual with the best performance indicator. If it has not been reached, at least one reference value is updated multiple times to obtain a new set of reference values. Using a new set of reference values, the electronic device 110 can obtain a new set of simulation parameter information and a new set of measurement parameter information. The electronic device 110 can update the process parameter value of at least one processing stage based on a new set of simulation parameter information and a new set of measurement parameter information. The electronic device 110 can repeat this step until the maximum genetic generation output result is reached.

[0071] This cycle repeats over and over again, and a complete time step calculation is performed based on Q populations. The fitness of the population is evaluated, and mutation and crossover are performed to obtain the next generation of Q populations until the maximum number of iterations N is reached, which stops. The A undetermined parameter iteration values ​​of the population with the highest fitness are output, which are the optimized values ​​of the A undetermined parameters obtained by the algorithm, and the corresponding CMP complete calculation results under this parameter value are output at the same time.

[0072] In this way, the optimized values ​​of each process parameter in each processing stage of the wafer processing process can be determined. That is, the values ​​of each simulation parameter of the wafer processing model 120 can be determined. By adopting such a wafer processing model 120, the processing process of the wafer, such as the CMP process, can be better simulated. This solution fully realizes the simulation of the entire CMP process, and the CMP can be freely divided into several sub-processes. Each sub-process can freely define its process parameter value, has simulation flexibility, and is suitable for various scenarios.

[0073] In this way, the state information corresponding to each moment in the polishing process (for example, material interface conditions, actual pressure conditions, actual grinding rate conditions, and wafer thickness values, etc.) is determined, so as to accurately analyze the polishing process. On the one hand, the process parameter values ​​are updated according to the simulation parameter information and measurement parameter information at each moment, thereby improving the accuracy and reliability of the polishing process. At the same time, the process parameter values ​​that match each polishing stage are determined separately, which further improves the reliability of the process parameters and improves the effect of the CMP process. On the other hand, this solution supports the free definition of parameters according to the process without considering mathematical calculation problems (for example, traditional gradient descent will encounter problems such as non-differentiable objective functions, gradient vanishing, and gradient explosion). Compared with traditional mathematical optimization algorithms, its parameter definition has higher degrees of freedom and the algorithm is more stable.

[0074] Figure 3 1 shows a block diagram of a server or electronic device 300 in which one or more embodiments of the present disclosure may be implemented. The electronic device 300 may be used to implement, for example, Figure 1 The electronic device 110 shown. It should be understood that Figure 3 The electronic device 300 shown is merely exemplary and should not constitute any limitation on the functionality and scope of the embodiments described herein.

[0075] like Figure 3 As shown, the electronic device 300 is in the form of a general electronic device. The components of the electronic device 300 may include, but are not limited to, one or more processors 310 or processing units, a memory 320, a storage device 330, one or more communication units 340, one or more input devices 350, and one or more output devices 360. The processing unit may be an actual or virtual processor and is capable of performing various processes according to a program stored in the memory 320. In a multi-processor system, multiple processing units execute computer executable instructions in parallel to improve the parallel processing capability of the electronic device 300.

[0076] The electronic device 300 typically includes a plurality of computer storage media. Such media may be any available media accessible to the electronic device 300, including but not limited to volatile and non-volatile media, removable and non-removable media. The memory 320 may be a volatile memory (e.g., a register, a cache, a random access memory (RAM)), a non-volatile memory (e.g., a read-only memory (ROM), an electrically erasable programmable read-only memory (EEPROM), flash memory), or some combination thereof. The storage device 330 may be a removable or non-removable medium, and may include a machine-readable medium, such as a flash drive, a disk, or any other medium, which may be capable of being used to store information and / or data (e.g., training data for training) and may be accessed within the electronic device 300.

[0077] The electronic device 300 may further include additional removable / non-removable, volatile / non-volatile storage media. Figure 3 As shown in , a disk drive for reading or writing from a removable, non-volatile disk (e.g., a "floppy disk") and an optical drive for reading or writing from a removable, non-volatile optical disk may be provided. In these cases, each drive may be connected to the bus (not shown) by one or more data media interfaces. The memory 320 may include a computer program product 325 having one or more program modules that are configured to perform various methods or actions of various embodiments of the present disclosure.

[0078] The communication unit 340 enables communication with other electronic devices via a communication medium. Additionally, the functions of the components of the electronic device 300 can be implemented in a single computing cluster or multiple computing machines that can communicate via a communication connection. Therefore, the electronic device 300 can operate in a networked environment using a logical connection with one or more other servers, a network personal computer (PC), or another network node.

[0079] The input device 350 may be one or more input devices, such as a mouse, a keyboard, a tracking ball, etc. The output device 360 ​​may be one or more output devices, such as a display, a speaker, a printer, etc. The electronic device 300 may also communicate with one or more external devices (not shown) through the communication unit 340 as needed, such as a storage device, a display device, etc., communicate with one or more devices that allow a user to interact with the electronic device 300, or communicate with any device (e.g., a network card, a modem, etc.) that allows the electronic device 300 to communicate with one or more other electronic devices. Such communication may be performed via an input / output (I / O) interface (not shown).

[0080] According to an exemplary implementation of the present disclosure, a computer-readable storage medium is provided, on which one or more computer instructions are stored, wherein the one or more computer instructions are executed by a processor to implement the method described above.

[0081] Various aspects of the present disclosure are described herein with reference to flowcharts and / or block diagrams of methods, devices (systems) and computer program products implemented according to the present disclosure. It should be understood that each box in the flowchart and / or block diagram and the combination of boxes in the flowchart and / or block diagram can be implemented by computer-readable program instructions.

[0082] These computer-readable program instructions can be provided to a processing unit of a general-purpose computer, a special-purpose computer, or other programmable data processing device, thereby producing a machine, so that when these instructions are executed by the processing unit of the computer or other programmable data processing device, a device that implements the functions / actions specified in one or more boxes in the flowchart and / or block diagram is generated. These computer-readable program instructions can also be stored in a computer-readable storage medium, and these instructions cause the computer, programmable data processing device, and / or other equipment to work in a specific manner, so that the computer-readable medium storing the instructions includes a manufactured product, which includes instructions for implementing various aspects of the functions / actions specified in one or more boxes in the flowchart and / or block diagram.

[0083] Computer-readable program instructions may also be loaded onto a computer, other programmable data processing apparatus, or other device so that a series of operating steps are performed on the computer, other programmable data processing apparatus, or other device to produce a computer-implemented process, thereby causing the instructions executed on the computer, other programmable data processing apparatus, or other device to implement the functions / actions specified in one or more boxes in the flowchart and / or block diagram.

[0084] The flow chart and block diagram in the accompanying drawings show the possible architecture, function and operation of the system, method and computer program product according to multiple implementations of the present disclosure. In this regard, each square box in the flow chart or block diagram can represent a part of a module, program segment or instruction, and a part of a module, program segment or instruction includes one or more executable instructions for realizing the logical function of the specification. In some implementations as replacements, the function marked in the square box can also occur in a sequence different from that marked in the accompanying drawings. For example, two continuous square boxes can actually be executed substantially in parallel, and they can sometimes be executed in reverse order, depending on the functions involved. It should also be noted that each square box in the block diagram and / or flow chart, and the combination of the square boxes in the block diagram and / or flow chart can be realized by a special hardware-based system that performs the function or action of the specification, or can be realized by a combination of special hardware and computer instructions.

[0085] The above descriptions of various implementations of the present disclosure are exemplary, non-exhaustive, and not limited to the disclosed implementations. Many modifications and variations will be apparent to those of ordinary skill in the art without departing from the scope and spirit of the described implementations. The selection of terms used herein is intended to best explain the principles of the implementations, practical applications, or improvements to the technology in the marketplace, or to enable other persons of ordinary skill in the art to understand the implementations disclosed herein.

Claims

1. A method for simulating a wafer processing process, comprising: Determine material interface information of the area to be processed at least based on the value of the first process parameter of the area to be processed of the wafer at a current moment; Based on the material interface information, determining the target processing of the target processing stage to be performed on the area to be processed at the current moment; Determining a value of a second process parameter associated with the target processing stage based at least on a nominal grinding rate, a nominal pressure of a non-channel region of the region to be processed, a nominal pressure of a channel region of the region to be processed, and at least one pressure correction factor value, the second process parameter comprising at least a first simulated grinding rate for the non-channel region and a second simulated grinding rate for the channel region for the target processing stage; as well as The target processing of the area to be processed is simulated based on at least the value of the second process parameter associated with the target processing stage, so as to update the value of the first process parameter of the area to be processed at a next moment.

2. The method for simulating a wafer processing process according to claim 1, characterized in that: The first simulated grinding rate and the second simulated grinding rate are determined using equations (1) and (2): R_NT = m × ( P1_NT / (a×P_NT + b) ) × R_material (1) R_T = n × ( P1_T / (c×P_T + d) ) × R_material (2) Wherein, R_NT is the first simulated grinding rate, R_T is the second simulated grinding rate, a and b are the structural pressure correction coefficients of the non-channel area, m is the grinding rate correction coefficient of the non-channel area, c and d are the structural pressure correction coefficients of the channel area, n is the grinding rate correction coefficient of the channel area, P1_NT is the nominal pressure of the non-channel area, P1_T is the nominal pressure of the channel area, P_NT is the pressure parameter information of the non-channel area, P_T is the pressure parameter information of the channel area, and R_material is the nominal grinding rate.

3. The method for simulating wafer processing according to claim 1, characterized in that: The first process parameter includes at least one of the following: a first thickness of a non-channel region of the to-be-processed region, a second thickness of a channel region of the to-be-processed region, a butterfly-shaped recess in the to-be-processed region, and corrosion of the to-be-processed region.

4. The method for simulating wafer processing according to claim 3, characterized in that: The first process parameter is updated by: Determine the first thickness at a next moment based on the first simulated grinding rate, the first thickness at a current moment, and a time length; Determine the second thickness at a next moment based on the second simulated grinding rate, the second thickness at a current moment, and the time length; Determining the butterfly-shaped depression at a next moment based on the first thickness and the second thickness at a next moment; as well as The corrosion at the next moment is determined based on the target thickness at the current moment and the first thickness.

5. The method for simulating wafer processing according to claim 1, characterized in that: The second process parameter also includes at least one of the following: a polishing pad process parameter value, a polishing liquid process parameter value, and a pressure correction coefficient value.

6. The method for simulating wafer processing according to claim 1, characterized in that: The material interface information indicates at least one of the following: a material interface where the non-channel region of the to-be-processed region is located, and a material interface where the channel region of the to-be-processed region is located, and The target processing indicates at least one of the following: processing of a non-channel area of ​​the area to be processed, and processing of a channel area of ​​the area to be processed.

7. The method for simulating wafer processing according to claim 1, characterized in that: The method is iteratively executed until a predetermined duration of at least one processing stage for the wafer is reached, so as to obtain simulation parameter information after simulation of the area to be processed after the predetermined duration of processing, wherein the at least one processing stage includes the target processing stage.

8. The method for simulating wafer processing according to claim 7, characterized in that: The method further comprises: Based at least on the value of the second process parameter, the wafer is processed in the at least one processing stage to obtain measurement parameter information of the processed area; and Based at least on a comparison between the simulation parameter information and the measurement parameter information, a value of the second process parameter is updated.

9. The method for simulating wafer processing according to claim 8, characterized in that: At least based on a comparison between the simulation parameter information and the measurement parameter information, updating the value of the second process parameter comprises: generating a set of reference values ​​for the second process parameter; Processing the area to be processed based on the set of reference values ​​to obtain a set of measurement parameter information of the area to be processed after the processing; Simulating the at least one processing stage on the area to be processed based on the set of reference values, and obtaining a set of simulation parameter information after simulating the at least one processing stage; Determining, based on the set of simulation parameter information and the set of measurement parameter information, a performance indicator for each of the set of reference values, the performance indicator indicating an accuracy of simulating a processing process of a wafer using the corresponding reference value; and The value of the second process parameter of the at least one processing stage is updated based on at least one reference value in the set of reference values ​​having a performance indicator exceeding a threshold value.

10. The method for simulating wafer processing according to claim 9, characterized in that: Determining the performance indicators of each of the set of reference values ​​based on the set of simulation parameter information and the set of measurement parameter information includes: For a first reference value in the set of reference values, determining a first loss value based on first simulation parameter information in the set of simulation parameter information corresponding to the first reference value and first measurement parameter information in the set of measurement parameter information corresponding to the first reference value; Determining a penalty value based on the correlation between the process parameters of the at least one processing stage; and Based on the first loss value and the penalty value, a first performance indicator for the first reference value is determined.

11. The method for simulating wafer processing according to claim 9, characterized in that: At least based on at least one reference value in the set of reference values ​​having a performance indicator exceeding a threshold, updating the value of the second process parameter of the at least one processing stage comprises: The value of the second process parameter of the at least one processing stage is replaced by the at least one parameter value.

12. The method for simulating wafer processing according to claim 9, characterized in that: At least based on at least one reference value in the set of reference values ​​having a performance indicator exceeding a threshold, updating the value of the second process parameter of the at least one processing stage comprises: updating the at least one reference value a plurality of times to obtain a set of new reference values; Using the set of new reference values, obtaining a set of new simulation parameter information and a set of new measurement parameter information; and Based on the new set of simulation parameter information and the new set of measurement parameter information, a value of the second process parameter of the at least one processing stage is updated.

13. The method for simulating wafer processing according to claim 7, characterized in that: The at least one processing stage comprises at least one of the following: The first stage for removing material from the polishing pad, The second stage for the wafer to come into contact with the polishing pad, The third stage is used to remove the barrier material.

14. An electronic device, characterized in that: include: at least one processing unit; as well as at least one memory coupled to the at least one processing unit and storing instructions for execution by the at least one processing unit, the instructions, when executed by the at least one processing unit, causing the electronic device to perform a method for simulating a wafer processing process, the method comprising: Determine material interface information of the area to be processed at least based on the value of the first process parameter of the area to be processed of the wafer at a current moment; Based on the material interface information, determining the target processing of the target processing stage to be performed on the area to be processed at the current moment; determining a value of a second process parameter associated with the target processing stage based at least on a nominal grinding rate, a nominal pressure of a non-channel region of the region to be processed, a nominal pressure of a channel region of the region to be processed, and at least one pressure correction factor value, the second process parameter comprising at least a first simulated grinding rate for the non-channel region and a second simulated grinding rate for the channel region for the target processing stage; and The target processing of the area to be processed is simulated based on at least the value of the second process parameter associated with the target processing stage, so as to update the value of the first process parameter of the area to be processed at a next moment.

15. The electronic device according to claim 14, characterized in that: The first simulated grinding rate and the second simulated grinding rate are determined using equations (1) and (2): R_NT = m × ( P1_NT / (a×P_NT + b) ) × R_material (1) R_T = n × ( P1_T / (c×P_T + d) ) × R_material (2) Wherein, R_NT is the first simulated grinding rate, R_T is the second simulated grinding rate, a and b are the structural pressure correction coefficients of the non-channel area, m is the grinding rate correction coefficient of the non-channel area, c and d are the structural pressure correction coefficients of the channel area, n is the grinding rate correction coefficient of the channel area, P1_NT is the nominal pressure of the non-channel area, P1_T is the nominal pressure of the channel area, P_NT is the pressure parameter information of the non-channel area, P_T is the pressure parameter information of the channel area, and R_material is the nominal grinding rate.

16. The electronic device according to claim 14, characterized in that: The first process parameter includes at least one of the following: a first thickness of a non-channel region of the to-be-processed region, a second thickness of a channel region of the to-be-processed region, a butterfly-shaped recess in the to-be-processed region, and corrosion of the to-be-processed region.

17. The electronic device according to claim 16, characterized in that: The first process parameter is updated by: Determine the first thickness at a next moment based on the first simulated grinding rate, the first thickness at a current moment, and a time length; Determine the second thickness at a next moment based on the second simulated grinding rate, the second thickness at a current moment, and the time length; determining the butterfly-shaped depression at a next moment based on the first thickness and the second thickness at a next moment; as well as The corrosion at the next moment is determined based on the target thickness at the current moment and the first thickness.

18. The electronic device according to claim 14, characterized in that: The second process parameter also includes at least one of the following: a polishing pad process parameter value, a polishing liquid process parameter value, and a pressure correction coefficient value.

19. The electronic device according to claim 14, characterized in that: The material interface information indicates at least one of the following: a material interface where the non-channel region of the to-be-processed region is located, and a material interface where the channel region of the to-be-processed region is located, and The target processing indicates at least one of the following: processing of a non-channel area of ​​the area to be processed, and processing of a channel area of ​​the area to be processed.

20. A computer-readable storage medium, characterized in that: A computer program is stored thereon, characterized in that the computer program can be executed by a processor to implement the method according to any one of claims 1 to 13.

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