A high-precision detection method and circuit for voltage fluctuation of an energy storage battery

Abstract

The application relates to a high-precision detection method and circuit for fluctuation change of an energy storage battery terminal voltage, and belongs to the field of signal detection. The circuit comprises a half-bridge compensation capacitor loop, a two-stage balanced capacitor charging and discharging loop, a two-way feedback control circuit and a microprocessor control system; the two-stage balanced capacitor is used for offsetting the terminal voltage of the energy storage battery, so that high-precision detection of the slight fluctuation of the terminal voltage is realized; through control of the charging switch, the terminal voltage of the two-stage balanced capacitor is charged to the terminal voltage of the energy storage battery to be detected, and the difference between the terminal voltage of the energy storage battery and the terminal voltage of the balanced capacitor is amplified; in the process of impedance spectrum detection of the energy storage battery, the compensation capacitor loop is controlled through the feedback loop, the voltage of the balanced capacitor is compensated so that the balanced capacitor is maintained at the original terminal voltage level of the energy storage battery; through differential amplification of the voltage signals of the voltage detection end of the energy storage battery to be detected and the voltage detection end of the balanced capacitor, high-precision detection of the slight fluctuation change of the terminal voltage of the energy storage battery is realized.

Description

Technical Field

[0001] This invention belongs to the field of signal detection and relates to a high-precision detection method and circuit for voltage fluctuation changes at the terminal of an energy storage battery. Background Technology

[0002] With the rapid development of the new energy vehicle industry, the production and use of power batteries are increasing year by year, and the capacity of retired power batteries is also increasing annually. These retired batteries still possess considerable capacity and lifespan, allowing for secondary use in fields with lower energy and power requirements, such as power storage, communication base stations, and low-speed electric vehicles. Electron impedance spectroscopy (EIS) is particularly suitable for analyzing changes in battery health status, and based on the test results, internal characteristic parameters of the battery can be deduced, further analyzing the performance evolution of the battery from a mechanistic perspective.

[0003] Power batteries typically consist of multiple units. First, individual cells are connected in series or parallel to form a battery module. Then, multiple battery modules form a battery pack, further forming a power battery containing a large number of individual cells. The voltage level is usually in the hundreds of volts. Under high voltage conditions, the voltage response amplitude generated by current excitation is relatively small, making it difficult to accurately detect the voltage response signal.

[0004] Current traditional measuring equipment is designed for individual cells and cannot perform online testing of battery packs. Therefore, it is necessary to design a new detection circuit to achieve high-precision detection of this type of signal. Summary of the Invention

[0005] In view of this, the purpose of this invention is to provide a high-precision detection method and circuit for voltage fluctuation changes in energy storage batteries. This method can improve upon the limitations of existing technologies in accurately measuring minute voltage disturbance signals in high-voltage battery modules, thereby enabling direct measurement of the impedance spectrum of high-voltage battery modules.

[0006] To achieve the above objectives, the present invention provides the following technical solution:

[0007] A high-precision detection circuit for voltage fluctuations at the terminal of an energy storage battery includes a two-stage balanced capacitor charging and discharging circuit, a half-bridge compensation capacitor circuit, a feedback control signal generation circuit, an instrumentation amplifier U1, a 16-bit ADC analog-to-digital converter U2, an optocoupler, and a microprocessor control system.

[0008] The two-stage balancing capacitor circuit includes a primary balancing capacitor C1, a secondary balancing capacitor C2, a charging resistor R1, a charging resistor R5, a discharging resistor R3, a charging switch K1, and a discharging switch K2; the half-bridge compensation capacitor circuit includes a compensation capacitor C3, a diode D2, switches K3 and K4, and a charging resistor R7; the feedback control signal generation circuit includes a high-precision 16-bit DAC converter, a high-precision programmable gain amplifier U3, zero-crossing comparators U4 and U5, two RC charging and discharging circuits, and a MOSFET driver U6;

[0009] The primary balancing capacitor C1 and the secondary balancing capacitor C2 are connected through a charging resistor R1, and connected to the compensation capacitor through a diode D1 and a resistor R10. The two balancing capacitors C1 and C2 are connected to the positive terminal of the battery under test through a charging resistor R5 and a charging switch K1, and their negative terminals are connected to the negative terminal of the battery. The half-bridge switches K3 and K4 are connected in series to the positive terminal of the battery under test, and their common terminal is connected to the negative terminal of the compensation capacitor C3. The positive terminal of the compensation capacitor C3 is connected to the positive terminal of the battery under test through a diode D2 and a charging resistor R7. The positive terminal of the secondary balancing capacitor C2 and the positive terminal of the battery under test are connected to the 16-bit ADC converter U2 through a high-precision programmable instrumentation amplifier U1, and connected to the microprocessor control system through an optocoupler. The positive terminal of the secondary balancing capacitor is connected to the non-inverting input terminal of the feedback loop through sampling resistors R2 and R4, forming a differential input with the voltage signal given by the 16-bit DAC converter. After being amplified by the instrumentation amplifier, the half-bridge switch control signal is generated by two zero-crossing comparators U4 and U5, and then controlled by the MOSFET driver to control the half-bridge switches K3 and K4 respectively.

[0010] Furthermore, the control method for this circuit specifically includes the following steps:

[0011] S1: Before testing, close switches K1 and K4, and open switches K2 and K3. The two-stage balancing capacitors C1 and C2, as well as the compensation capacitor C3, are in a charging state. After charging to the voltage of the battery under test, open the charging switch K1. At this time, the differential input voltage of the programmable instrumentation amplifier U1 is close to zero. Simultaneously, the microprocessor control system acquires the battery terminal voltage through the ADC converter U2 and outputs a corresponding proportional analog voltage signal to the inverting input of the instrumentation amplifier U3 through the 16-bit DAC converter.

[0012] S2: The voltage values ​​of the two-stage balancing capacitors are input to the non-inverting input terminal of the instrumentation amplifier U3 through sampling resistors R2 and R4. When the voltage value is lower than the set value, the instrumentation amplifier U3 outputs a low level, generating two opposite control signals to control switch K3 to close and K4 to open. The voltage at the positive terminal of compensation capacitor C3 rises to twice the capacitor voltage, and then quickly compensates the voltage of the balancing capacitor through R10, D1 and R1.

[0013] S3: When the voltage of the balancing capacitor returns to the set voltage and exceeds the set value of the 16-bit DAC, the instrumentation amplifier U3 outputs a high level, generating two opposite control signals to control switch K3 to open and K4 to close. The compensation capacitor C3 stops charging the voltage of the balancing capacitor. Steps S2 and S3 are repeated, and the voltage of the balancing capacitor is always maintained at the voltage of the battery under test. At the same time, the positive terminal of the secondary balancing capacitor C2 and the positive terminal of the battery are detected by the instrumentation amplifier U1 and the AD converter U2 to detect small changes in the battery terminal voltage.

[0014] S4: After the test is completed, disconnect the half-bridge switch K3, close the half-bridge switch K4 and the discharge switch K2, and discharge the two-stage balancing capacitors C1, C2 and the compensation capacitor C3. When the voltage drops to the safe voltage, disconnect the discharge switch K2.

[0015] Furthermore, in step S1, the secondary balancing capacitors C1 and C2 and the compensation capacitor C3 are charged, specifically including the following steps:

[0016] S11: Before the test, close switches K1 and K4, and open switches K2 and K3. If the initial voltage of the primary balancing capacitor C1 is 0, then its relevant potential is:

[0017]

[0018] Among them, U C1+ and U C1- These are the positive and negative potentials of the primary balancing capacitor C1, U B+ It is the DC voltage of the battery under test, U B- τ is the negative electrode potential of the battery under test, τ1 is the time constant of charging the balancing capacitor C1, R5 is the resistance value of the charging resistor R5, C1 is the capacitance value of the balancing capacitor C1, and t is the closing time of switch S2.

[0019] If the initial voltage of the secondary balancing capacitor C2 is 0, then its relevant potential is:

[0020]

[0021] U C2+ and U C2- τ2 is the positive and negative potentials of the secondary balancing capacitor C2, τ2 is the charging time constant of the balancing capacitor C2, R5 is the resistance value of the charging resistor R5, and R1 is the resistance value of the charging resistor R1.

[0022] If the initial voltage of the compensation capacitor C3 is 0, then its relevant potential is:

[0023]

[0024] U C3+ and U C3-These are the positive and negative potentials of the compensation capacitor C3, τ3 is the charging time constant of the compensation capacitor C3, R7 is the resistance value of the charging resistor R7, and U D2 It is the forward voltage drop of diode D2.

[0025] S12: After the closing time t of switches K1 and K4, the capacitor is fully charged. The expression for the charging time t is:

[0026] t≥5*max{τ1, τ2, τ4}

[0027] After charging is complete, the voltage of the secondary balancing capacitor equals the voltage of the battery under test. Then, disconnect charging switch K1. At this point, the voltage at the non-inverting input of the programmable amplifier equals the voltage of the battery under test, and the voltage at the inverting input equals the voltage of the secondary balancing capacitor. The relevant potential expressions are as follows:

[0028] U 1+ =U 1- =U C2+ =U B+

[0029] Among them, U 1+ and U 1- These are the potentials of the non-inverting and inverting input terminals of the instrumentation amplifier U1, respectively.

[0030] S13: Before the test begins, the battery terminal voltage is detected by ADC converter U2, and the corresponding proportional secondary balancing capacitor set voltage value is calculated by the microprocessor control system. The voltage is then output to the inverting input of the high-precision programmable instrumentation amplifier U3 via DAC converter. The relevant voltage expression is as follows:

[0031]

[0032] Among them, U 3- R is the voltage at the inverting input of instrumentation amplifier U3, and R2 and R4 are the resistance values ​​of sampling resistors R2 and R4, respectively.

[0033] Furthermore, in step S2, voltage compensation is performed on the two-stage balancing capacitors C1 and C2 through a half-bridge compensation capacitor circuit, specifically including the following steps:

[0034] S21: The voltage between the primary balancing capacitor C1 and the secondary balancing capacitor C2 will slowly decrease during the detection process. The relevant voltage expression is as follows:

[0035]

[0036] Among them, U C1 (t), U C2(t) represents the voltage of the first-stage balancing capacitors C1 and C2 at time t after the charging switch K1 is turned off, U0 is the initial charging voltage of the two-stage balancing capacitors, i.e., the terminal voltage of the battery under test, and τ c1 τ is the leakage time constant of the primary balancing capacitor C1. c2 R is the leakage time constant of the secondary balancing capacitor C2. leak1 R is the leakage resistance of capacitor C1. leak2 C1 is the leakage resistance of capacitor C2, C2 is the capacitance of capacitor C1, and C2 is the capacitance of capacitor C2.

[0037] S22: The voltage of the primary balancing capacitor C1 is input to the positive input terminal of the instrumentation amplifier U3 through sampling resistors R2 and R4. It is compared with the set voltage value at the inverting input terminal to output a control signal. The relevant potential expression is as follows:

[0038]

[0039] Among them, U C1 (t) represents the voltage value of the balancing capacitor at time t after the charging switch K1 is turned off, U 3+ This is the potential at the non-inverting input terminal of instrumentation amplifier U3. When the voltage of capacitor C1 drops below the set value, a low-level signal is output.

[0040] S23: After the instrumentation amplifier U3 detects a small change in the capacitor voltage by using a high amplification factor, when the voltage drops slightly below the set value, the instrumentation amplifier U3 outputs a low-level signal. This signal is input to the non-inverting input of the zero-crossing comparator U4 and the inverting input of the zero-crossing comparator U5, respectively. After passing through the MOSFET driver U6, two opposite control signals are generated to control the half-bridge switch K3 to close and K4 to open. At this time, the compensation capacitor C3 compensates the voltage of capacitors C1 and C2 through diode D1 and resistor R10. The expression for the positive voltage of the compensation capacitor C3 at this time is as follows.

[0041] U C3+ =2U B+

[0042] Furthermore, in step S3, the compensation capacitor C3 charges the balancing capacitor C1, and the charging voltage expression is as follows:

[0043]

[0044] Among them, U C1(0) represents the voltage value at the moment when switch K3 is closed after capacitor C1 is de-energized and its voltage drops below the set voltage. When the voltage of capacitor C1 recovers to the set value and exceeds the set value, instrumentation amplifier U3 outputs a high-level signal. This signal is input to the non-inverting input of zero-crossing comparator U4 and the inverting input of zero-crossing comparator U5, respectively. After passing through MOSFET driver U6, two opposite control signals are generated to control half-bridge switch K3 to open and K4 to close, stopping the power supply. At this time, the voltage expression of compensation capacitor C3 is as follows:

[0045] U C3+ =U B+ -U D2

[0046] By continuously cycling the above charging and discharging process, the voltage of the two-stage balancing capacitors is always maintained at the voltage of the battery under test.

[0047] Furthermore, in the above control process, the two reverse signals of control switches K3 and K4 have a dead time, which is calculated as follows:

[0048]

[0049] Where R8 and R9 are the resistance values ​​of resistors R8 and R9, and C5 and C4 are the capacitance values ​​of capacitors C5 and C4. The control signal waveform diagram is attached. Figure 3 As shown.

[0050] Furthermore, in step S4, discharging the two-stage balancing capacitors C1 and C2 and the compensation capacitor C3 specifically includes the following steps:

[0051] S41: After completion, stop AD detection, close discharge switch K2, and the initial voltage of balancing capacitor C1 is U. B+ Then its related potential is:

[0052]

[0053] Where τ5 is the time constant for the discharge of balancing capacitor C1, and t is the closing time of switch S3; similarly, the calculations for balancing capacitor C2 and compensation capacitor C3 are similar.

[0054] S42: After the discharge switch is closed for 5-10 τ1 cycles, all the capacitors in the circuit have been discharged to a safe voltage. The positive terminal potential of the capacitor is close to the negative terminal potential. Disconnect the discharge switch K2. After the discharge is completed, the balancing capacitor C1 does not store energy.

[0055] The beneficial effects of this invention are as follows: the invention utilizes the voltage of multi-stage balancing capacitors to offset the high voltage of the battery under test, while improving the problem of voltage leakage of the capacitor itself through the pre-stage capacitor and compensation capacitor. The battery terminal voltage and the balancing capacitor terminal voltage are differentially amplified to achieve high-precision detection of small disturbance signals under high voltage bias, providing hardware support for direct detection of impedance spectrum under high voltage module, and providing a solution for small signal detection under such high voltage bias.

[0056] Other advantages, objectives, and features of the invention will be set forth in part in the description which follows, and in part will be apparent to those skilled in the art from the following examination, or may be learned from practice of the invention. The objectives and other advantages of the invention can be realized and obtained through the following description. Attached Figure Description

[0057] To make the objectives, technical solutions, and advantages of the present invention clearer, the preferred embodiments of the present invention will be described in detail below with reference to the accompanying drawings, wherein:

[0058] Figure 1 This is a topology diagram of the high-precision measurement circuit for multi-stage balanced capacitors of the present invention;

[0059] Figure 2 This is a flowchart of the high-precision measurement circuit control for the multi-stage balanced capacitor of the present invention.

[0060] Figure 3 This is a schematic diagram of the switching control signal for a half-bridge compensation capacitor circuit.

[0061] Figure 4 This is a schematic diagram of the voltage across two balancing capacitors. Detailed Implementation

[0062] The following specific examples illustrate the implementation of the present invention. Those skilled in the art can easily understand other advantages and effects of the present invention from the content disclosed in this specification. The present invention can also be implemented or applied through other different specific embodiments, and various details in this specification can be modified or changed based on different viewpoints and applications without departing from the spirit of the present invention. It should be noted that the illustrations provided in the following embodiments are only schematic representations of the basic concept of the present invention. Unless otherwise specified, the following embodiments and features can be combined with each other.

[0063] The accompanying drawings are for illustrative purposes only and are schematic diagrams, not actual pictures. They should not be construed as limiting the invention. To better illustrate the embodiments of the invention, some parts in the drawings may be omitted, enlarged, or reduced, and do not represent the actual product dimensions. It is understandable to those skilled in the art that some well-known structures and their descriptions may be omitted in the drawings.

[0064] In the accompanying drawings of the embodiments of the present invention, the same or similar reference numerals correspond to the same or similar components. In the description of the present invention, it should be understood that if terms such as "upper," "lower," "left," "right," "front," and "rear" indicate the orientation or positional relationship based on the orientation or positional relationship shown in the drawings, they are only for the convenience of describing the present invention and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, the terms used to describe positional relationships in the drawings are only for illustrative purposes and should not be construed as limiting the present invention. For those skilled in the art, the specific meaning of the above terms can be understood according to the specific circumstances.

[0065] Please see Figures 1-4 , Figure 1 This is a high-precision detection method and circuit topology diagram for the voltage fluctuation of an energy storage battery. The circuit includes a two-stage balanced capacitor charging and discharging circuit, a half-bridge compensation capacitor circuit, a feedback control signal generation circuit, an instrumentation amplifier U1, a 16-bit AD analog-to-digital converter U2, an optocoupler, and a microprocessor control system.

[0066] The two-stage balancing capacitor circuit includes a primary balancing capacitor C1, a secondary balancing capacitor C2, a charging resistor R1, a charging resistor R5, a discharging resistor R3, a charging switch K1, and a discharging switch K2; the half-bridge compensation capacitor circuit includes a compensation capacitor C3, a diode D2, switches K3 and K4, and a charging resistor R7; the feedback control signal generation circuit includes a high-precision 16-bit DAC converter, a high-precision programmable gain amplifier U3, zero-crossing comparators U4 and U5, two RC charging and discharging circuits, and a MOSFET driver U6;

[0067] The primary balancing capacitor C1 and the secondary balancing capacitor C2 are connected through a charging resistor R1, and connected to the compensation capacitor through a diode D1 and a resistor R10. The two balancing capacitors C1 and C2 are connected to the positive terminal of the battery under test through a charging resistor R5 and a charging switch K1, and their negative terminals are connected to the negative terminal of the battery. The half-bridge switches K3 and K4 are connected in series to the positive terminal of the battery under test, and their common terminal is connected to the negative terminal of the compensation capacitor C3. The positive terminal of the compensation capacitor C3 is connected to the positive terminal of the battery under test through a diode D2 and a charging resistor R7. The positive terminal of the secondary balancing capacitor C2 and the positive terminal of the battery under test are connected to a 16-bit AD converter through a high-precision programmable instrumentation amplifier U1, and connected to a microprocessor control system through an optocoupler. The positive terminal of the secondary balancing capacitor is connected to the non-inverting input terminal of the feedback loop through sampling resistors R2 and R4, forming a differential input with the voltage signal given by the 16-bit DAC converter. After being amplified by the instrumentation amplifier, the signal is used to generate a half-bridge switch control signal through two zero-crossing comparators U4 and U5, which, after passing through a MOSFET driver, control the half-bridge switches K3 and K4 respectively.

[0068] Figure 2 Here is the control flowchart for this circuit, such as Figure 2 As shown, the control method of this circuit specifically includes the following steps:

[0069] S1: Before testing, close switches K1 and K4, and open switches K2 and K3. The two-stage balancing capacitors C1 and C2, as well as the compensation capacitor C3, are in a charging state. After charging to the voltage of the battery under test, open the charging switch K1. At this time, the differential input voltage of the programmable instrumentation amplifier U1 is close to zero. Simultaneously, the microprocessor control system acquires the battery terminal voltage through the ADC converter U2 and outputs a corresponding proportional analog voltage signal to the inverting input of the instrumentation amplifier U3 through the 16-bit DAC converter.

[0070] This requires charging each stage of the capacitors, specifically including the following steps:

[0071] S11: Before the test, close switches K1 and K4, and open switches K2 and K3. If the initial voltage of the primary balancing capacitor C1 is 0, then its relevant potential is:

[0072]

[0073] Among them, U C1+ and U C1- These are the positive and negative potentials of the primary balancing capacitor C1, U B+ It is the DC voltage of the battery under test, U B- τ is the negative electrode potential of the battery under test, τ1 is the time constant of charging the balancing capacitor C1, R5 is the resistance value of the charging resistor R5, C1 is the capacitance value of the balancing capacitor C1, and t is the closing time of switch S2.

[0074] If the initial voltage of the secondary balancing capacitor C2 is 0, then its relevant potential is:

[0075]

[0076] U C2+ and U C2- τ2 is the positive and negative potentials of the secondary balancing capacitor C2, τ2 is the charging time constant of the balancing capacitor C2, R5 is the resistance value of the charging resistor R5, and R1 is the resistance value of the charging resistor R1.

[0077] If the initial voltage of the compensation capacitor C3 is 0, then its relevant potential is:

[0078]

[0079] U C3+ and U C3- These are the positive and negative potentials of the compensation capacitor C3, τ3 is the charging time constant of the compensation capacitor C3, R7 is the resistance value of the charging resistor R7, and U D2 It is the forward voltage drop of diode D2.

[0080] S12: After the closing time t of switches K1 and K4, the capacitor is fully charged. The expression for the charging time t is:

[0081] t≥5*max{τ1, τ2, τ4}

[0082] After charging is complete, the voltage of the secondary balancing capacitor equals the voltage of the battery under test. Then, disconnect charging switch K1. At this point, the voltage at the non-inverting input of the programmable amplifier equals the voltage of the battery under test, and the voltage at the inverting input equals the voltage of the secondary balancing capacitor. The relevant potential expressions are as follows:

[0083] U 1+ =U 1- =U C2+ =U B+

[0084] Among them, U 1+ and U 1- These are the potentials of the non-inverting and inverting input terminals of the instrumentation amplifier U1, respectively.

[0085] S13: Before the test begins, the battery terminal voltage is detected by ADC converter U2, and the corresponding proportional secondary balancing capacitor set voltage value is calculated by the microprocessor control system. The voltage is then output to the inverting input of the high-precision programmable instrumentation amplifier U3 via DAC converter. The relevant voltage expression is as follows:

[0086]

[0087] Among them, U 3- R is the voltage at the inverting input of instrumentation amplifier U3, and R2 and R4 are the resistance values ​​of sampling resistors R2 and R4, respectively.

[0088] S2: The voltage values ​​of the two-stage balancing capacitors are input to the non-inverting input terminal of the instrumentation amplifier U3 through sampling resistors R2 and R4. When the voltage value is lower than the set value, the instrumentation amplifier U3 outputs a low level, generating two opposite control signals to control switch K3 to close and K4 to open. The voltage at the positive terminal of compensation capacitor C3 rises to twice the capacitor voltage, and then quickly compensates the voltage of the balancing capacitor through R10, D1 and R1.

[0089] S21: The voltage between the primary balancing capacitor C1 and the secondary balancing capacitor C2 will slowly decrease during the detection process. The relevant voltage expression is as follows:

[0090]

[0091] Among them, U C1 (t), U C2 (t) represents the voltage of the first-stage balancing capacitors C1 and C2 at time t after the charging switch K1 is turned off, U0 is the initial charging voltage of the two-stage balancing capacitors, i.e., the terminal voltage of the battery under test, and τ c1 τ is the leakage time constant of the primary balancing capacitor C1. c2 R is the leakage time constant of the secondary balancing capacitor C2. leak1 R is the leakage resistance of capacitor C1. leak2 C1 is the leakage resistance of capacitor C2, C2 is the capacitance of capacitor C1, and C2 is the capacitance of capacitor C2.

[0092] S22: The voltage of the primary balancing capacitor C1 is input to the positive input terminal of the instrumentation amplifier U3 through sampling resistors R2 and R4. It is compared with the set voltage value at the inverting input terminal to output a control signal. The relevant potential expression is as follows:

[0093]

[0094] Among them, U C1 (t) represents the voltage value of the balancing capacitor at time t after the charging switch K1 is turned off, U 3+ This is the potential at the non-inverting input terminal of instrumentation amplifier U3. When the voltage of capacitor C1 drops below the set value, a low-level signal is output.

[0095] S23: After the instrumentation amplifier U3 detects a small change in the capacitor voltage by using a high amplification factor, when the voltage drops slightly below the set value, the instrumentation amplifier U3 outputs a low-level signal. This signal is input to the non-inverting input of the zero-crossing comparator U4 and the inverting input of the zero-crossing comparator U5, respectively. After passing through the MOSFET driver U6, two opposite control signals are generated to control the half-bridge switch K3 to close and K4 to open. At this time, the compensation capacitor C3 compensates the voltage of capacitors C1 and C2 through diode D1 and resistor R10. The expression for the positive voltage of the compensation capacitor C3 at this time is as follows.

[0096] U C3+ =2U B+

[0097] S3: When the voltage of the balancing capacitor returns to the set voltage, if it exceeds the set value, the instrumentation amplifier U3 outputs a high level, generating two opposite control signals to open switch K3 and close switch K4. The compensation capacitor C3 stops charging the balancing capacitor. Steps S2 and S3 are repeated, and the balancing capacitor voltage is always maintained at the voltage of the battery under test. Simultaneously, the positive terminal of the secondary balancing capacitor C2 and the positive terminal of the battery are detected by the instrumentation amplifier U1 and the ADC converter U2 to detect minute changes in the battery terminal voltage. In this step, the compensation capacitor C3 charges the balancing capacitor C1, and the charging voltage expression is as follows:

[0098]

[0099] Among them, U C1 (0) represents the voltage value at the moment when switch K3 is closed after capacitor C1 is de-energized and its voltage drops below the set voltage. When the voltage of capacitor C1 recovers to the set value and exceeds the set value, instrumentation amplifier U3 outputs a high-level signal. This signal is input to the non-inverting input of zero-crossing comparator U4 and the inverting input of zero-crossing comparator U5, respectively. After passing through MOSFET driver U6, two opposite control signals are generated to control half-bridge switch K3 to open and K4 to close, stopping the power supply. At this time, the voltage expression of compensation capacitor C3 is as follows:

[0100] U C3+ =U B+

[0101] By continuously cycling the above charge-discharge process, the voltage of the two-stage balancing capacitors remains constant at the voltage of the battery under test. For example... Figure 3 The image shows the two opposite control signals with dead time. The dead time calculation expression is as follows:

[0102]

[0103] Where R8 and R9 are the resistance values ​​of resistors R8 and R9, and C5 and C4 are the capacitance values ​​of capacitors C5 and C4. The control signal waveform diagram is attached. Figure 3 As shown.

[0104] S4: After the test is completed, disconnect the half-bridge switch K3, close the half-bridge switch K4 and the discharge switch K2, and discharge the two-stage balancing capacitors C1, C2 and the compensation capacitor C3. When the voltage drops to the safe voltage, disconnect the discharge switch K2.

[0105] The specific steps for controlling the operation of each switch are as follows:

[0106] S41: After completion, stop AD detection, close discharge switch K2, and the initial voltage of balancing capacitor C1 is U. B+ Then its related potential is:

[0107]

[0108] Where τ5 is the time constant for the discharge of balancing capacitor C1, and t is the closing time of switch S3; similarly, the calculations for balancing capacitor C2 and compensation capacitor C3 are similar.

[0109] S42: After the discharge switch is closed for 5-10 τ1 cycles, all the capacitors in the circuit have been discharged to a safe voltage. The positive terminal potential of the capacitor is close to the negative terminal potential. Disconnect the discharge switch K2. After the discharge is completed, the balancing capacitor C1 does not store energy.

[0110] The voltage of the primary balancing capacitor C1 during the entire testing process is as follows: Figure 4 As shown. Due to the presence of the secondary balancing capacitor C2, the potential fluctuation at the inverting input terminal of the instrumentation amplifier U1 is much smaller than the voltage fluctuation of the primary balancing capacitor C1, thereby improving the detection accuracy of small fluctuations in the terminal voltage of the energy storage battery.

[0111] In summary, this invention can greatly improve the leakage problem of capacitors, so that the capacitor voltage is always maintained at the level of the battery voltage under test, thereby enabling high-precision measurement of small voltage disturbance signals under high voltage bias.

[0112] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention and are not intended to limit it. Although the present invention has been described in detail with reference to preferred embodiments, those skilled in the art should understand that modifications or equivalent substitutions can be made to the technical solutions of the present invention without departing from the spirit and scope of the present invention, and all such modifications or substitutions should be covered within the scope of the claims of the present invention.

Claims

1. A high-precision method for detecting voltage fluctuations at the terminals of an energy storage battery, characterized in that: This method is based on a high-precision detection circuit for changes in the terminal voltage of an energy storage battery. The detection circuit includes a two-stage balanced capacitor charging and discharging circuit, a half-bridge compensation capacitor circuit, a feedback control signal generation circuit, an instrumentation amplifier U1, a 16-bit ADC converter U2, an optocoupler, and a microprocessor control system. The two-stage balancing capacitor circuit includes a primary balancing capacitor C1, a secondary balancing capacitor C2, a charging resistor R1, a charging resistor R5, a discharging resistor R3, a charging switch K1, and a discharging switch K2; the half-bridge compensation capacitor circuit includes a compensation capacitor C3, a diode D2, switches K3 and K4, and a charging resistor R7; the feedback control signal generation circuit includes a high-precision 16-bit DAC converter, a high-precision programmable gain amplifier U3, zero-crossing comparators U4 and U5, two RC charging and discharging circuits, and a MOSFET driver U6; The primary balancing capacitor C1 and the secondary balancing capacitor C2 are connected through a charging resistor R1, and the compensation capacitor is connected through a diode D1 and a resistor R10. The two balancing capacitors C1 and C2 are connected to the positive terminal of the battery under test through a charging resistor R5 and a charging switch K1, and their negative terminals are connected to the negative terminal of the battery. The half-bridge switches K3 and K4 are connected in series to the positive terminal of the battery under test, and their common terminal is connected to the negative terminal of the compensation capacitor C3. The positive terminal of the compensation capacitor C3 is connected to the positive terminal of the battery under test through a diode D2 and a charging resistor R7. The positive terminal of the secondary balancing capacitor C2 and the positive terminal of the battery under test are connected to a 16-bit ADC converter through a high-precision programmable instrumentation amplifier U1, and then connected to a microprocessor control system through an optocoupler. The positive terminal of the secondary balancing capacitor is connected to the non-inverting input terminal of the feedback loop through sampling resistors R2 and R4, forming a differential input with the voltage signal given by the 16-bit DAC converter. After being amplified by the instrumentation amplifier, the half-bridge switch control signal is generated by two zero-crossing comparators U4 and U5, and then controlled by a MOSFET driver to control the half-bridge switches K3 and K4 respectively. The detection method includes the following steps: S1: Before testing, close switches K1 and K4, and open switches K2 and K3. The two-stage balancing capacitors C1 and C2 and the compensation capacitor C3 are in a charging state. After charging to the voltage of the battery under test, open the charging switch K1. At this time, the differential input voltage of the programmable instrumentation amplifier U1 is close to zero. At the same time, the microprocessor control system collects the battery terminal voltage through the ADC converter U2 and outputs the corresponding proportional analog voltage signal to the inverting input of the instrumentation amplifier U3 through the 16-bit DAC converter. S2: The voltage values ​​of the two-stage balancing capacitors are input to the non-inverting input terminal of the instrumentation amplifier U3 through sampling resistors R2 and R4. The output signal of the instrumentation amplifier U3 passes through zero comparators U4 and U5, generating two opposite control signals to control switch K3 to close and K4 to open. The positive voltage of compensation capacitor C3 is raised to twice the capacitor voltage, and the voltage of the balancing capacitor is quickly compensated through R10, D1 and R1. S3: When the voltage of the balancing capacitor recovers to the set voltage and exceeds the set value of the 16-bit DAC, the output signal of the instrumentation amplifier U3 passes through the zero comparators U4 and U5 to generate two opposite control signals to control switch K3 to open and K4 to close. The compensation capacitor C3 stops charging the voltage of the balancing capacitor. The cycle of steps S2 and S3 is repeated, and the voltage of the balancing capacitor is always maintained at the original terminal voltage of the energy storage battery under test. At the same time, the positive terminal of the secondary balancing capacitor C2 and the positive terminal of the battery detect the slight changes in the terminal voltage of the energy storage battery through the instrumentation amplifier U1 and the 16-bit ADC converter U2. S4: After the test is completed, disconnect switches K1 and K3, close half-bridge switch K4 and discharge switch K2, discharge the two-stage balancing capacitors C1 and C2 and compensation capacitor C3. When the voltage drops to the safe voltage, disconnect discharge switch K2.

2. The high-precision detection method for voltage fluctuation changes at the terminal of an energy storage battery according to claim 1, characterized in that: In step S1, charging the secondary balancing capacitors C1 and C2 and the compensation capacitor C3 specifically includes the following steps: S11: Before the test, close switches K1 and K4, and open switches K2 and K3. If the initial voltage of the primary balancing capacitor C1 is 0, then its relevant potential is: in, U C1+ and U C1- These are the positive and negative potentials of the primary balancing capacitor C1. U B+ It is the DC voltage of the battery under test. U B- It is the negative electrode potential of the battery under test. τ 1 is the time constant for charging the balancing capacitor C1. R 5 is the resistance value of charging resistor R5. C 1 is the capacitance value of the balancing capacitor C1. C 2 is the capacitance value of the secondary balancing capacitor C2. t It is the closing time of switch S2; If the initial voltage of the secondary balancing capacitor C2 is 0, then its relevant potential is: U C2+ and U C2- These are the positive and negative electrode potentials of the secondary balancing capacitor C2. It is the time constant of the charging of the balancing capacitor C2. R 5 is the resistance value of charging resistor R5. R 1 is the resistance value of the charging resistor R1; If the initial voltage of the compensation capacitor C3 is 0, then its relevant potential is: U C3+ and U C3- These are the positive and negative potentials of the compensation capacitor C3. C 3 indicates the capacitance value of compensation capacitor C3. It is the time constant of the charging of the compensation capacitor C3. R 7 is the resistance value of the charging resistor R7. U D2 It is the forward voltage drop of diode D2; S12: During the closing time of switches K1 and K4 t Afterwards, capacitors C1, C2, and C3 are fully charged. The charging time is... t The expression is: After charging is complete, the voltages of the secondary balancing capacitors C1 and C2 are equal to the voltage of the battery under test. Then, the charging switch K1 is disconnected. At this time, the voltage at the non-inverting input of the programmable amplifier is equal to the voltage of the battery under test, and the voltage at the inverting input is equal to the voltage of the secondary balancing capacitors. The relevant potential expressions are as follows: in, U 1+ and U 1- These are the potentials of the non-inverting and inverting input terminals of instrumentation amplifier U1, respectively. S13: Before the test begins, the battery terminal voltage is detected by ADC converter U2, and the corresponding proportional secondary balancing capacitor set voltage value is calculated by the microprocessor control system. The voltage is then output to the inverting input of the high-precision programmable instrumentation amplifier U3 via a 16-bit DAC converter. The relevant voltage expression is as follows: in, U 3- This is the voltage at the inverting input terminal of instrumentation amplifier U3. R 2 and R 4 represents the resistance values ​​of sampling resistors R2 and R4, respectively.

3. The high-precision detection method for voltage fluctuation changes at the terminal of an energy storage battery according to claim 2, characterized in that: In step S2, voltage compensation is performed on the two-stage balancing capacitors C1 and C2 through a half-bridge compensation capacitor circuit, specifically including the following steps: S21: The voltage between the primary balancing capacitor C1 and the secondary balancing capacitor C2 will slowly decrease during the detection process. The relevant voltage expression is as follows: in, , After the primary balancing capacitors C1 and C2 are disconnected by the charging switch K1... t Voltage at time, The initial charging voltage of the two-stage balancing capacitor is the terminal voltage of the battery under test. The leakage time constant of the primary balancing capacitor C1 is... The leakage time constant of the secondary balancing capacitor C2 is... The leakage resistance value of capacitor C1 is... The leakage resistance value of capacitor C2 is... C 1 represents the capacitance value of capacitor C1. C 2 represents the capacitance value of capacitor C2; S22: The voltage of the primary balancing capacitor C1 is input to the positive input terminal of the instrumentation amplifier U3 through sampling resistors R2 and R4. It is compared with the set voltage value at the inverting input terminal to output a control signal. The relevant potential expression is as follows: in, U C1 (t) To balance the voltage value of the capacitor at time t after the charging switch K1 is turned off, This is the potential at the non-inverting input terminal of instrumentation amplifier U3. When the voltage of capacitor C1 drops below the set value, a low-level signal is output. S23: Instrumentation amplifier U3, after detecting minute changes in capacitor voltage using a high amplification factor, outputs a low-level signal when the voltage drops slightly below the set value. This signal is input to the non-inverting input of zero-crossing comparator U4 and the inverting input of zero-crossing comparator U5, respectively. The MOSFET driver U6 then generates two opposite control signals to close half-bridge switch K3 and open K4. At this time, compensation capacitor C3 compensates for the voltage of capacitors C1 and C2 through diode D1 and resistor R10. The expression for the positive voltage of compensation capacitor C3 at this time is as follows: 。 4. The high-precision detection method for voltage fluctuation changes at the terminal of an energy storage battery according to claim 3, characterized in that: In step S3, the compensation capacitor C3 charges the balancing capacitor C1, and the charging voltage expression is as follows: in, Let C1 be the voltage value of capacitor C1 when switch K3 is closed. When the voltage of capacitor C1 is higher than the set value, the instrumentation amplifier U3 outputs a high-level signal, which passes through zero comparators U4 and U5, and MOSFET driver U6 to generate two opposite control signals to control half-bridge switch K3 to open and K4 to close, stopping the power supply. The voltage expression of compensation capacitor C3 at this time is as follows: By continuously cycling the above charging and discharging process, the voltage of the two-stage balancing capacitors is always maintained at the original terminal voltage of the battery under test.

5. The high-precision detection method for voltage fluctuation changes at the terminal of an energy storage battery according to claim 4, characterized in that: In S3, the two reverse signals of control switches K3 and K4 have a dead time, which is calculated as follows: in, R 8 and R 9 represents the resistance values ​​of resistors R8 and R9. C 5 and C 6 represents the capacitance values ​​of capacitors C5 and C6.

6. The high-precision detection method for voltage fluctuation changes at the terminal of an energy storage battery according to claim 5, characterized in that: In step S4, discharging the two-stage balancing capacitors C1 and C2 and the compensation capacitor C3 specifically includes the following steps: S41: After completing the measurement, stop the AD detection, close the discharge switch K2, and the initial voltage of the balancing capacitor C1 is... U B+ Then its related potential is: in, It is the time constant of the discharge of the balancing capacitor C1. t This is the closing time of switch S3; similarly, the calculation of balancing capacitor C2 and compensation capacitor C3 is similar. S42: 5-10 hours after the discharge switch is closed τ After step 1, all the capacitors in the circuit have been discharged to a safe voltage, and the positive terminal potential of the capacitor is close to the negative terminal potential. Disconnect the discharge switch K2. After the discharge is completed, the balancing capacitor C1 no longer stores energy.

Images