Gpu primitive pre-processing apparatus, system and method

Abstract

The present disclosure relates to the field of computer technology, and particularly relates to a GPU primitive preprocessing device, system and method. The preprocessing module in the device is configured to obtain state information and vertex index relationship corresponding to a rendering instruction, the state information comprising first storage information of vertex indexes, a topology structure indicating an arrangement mode of the vertex indexes, and second storage information of vertex data; obtain vertex index information comprising a plurality of vertex indexes according to the first storage information; segment the plurality of vertex indexes according to the topology structure and the first storage information to obtain at least one vertex index corresponding to each primitive; obtain each vertex data corresponding to each primitive according to the at least one vertex index corresponding to each primitive, the vertex index relationship and the second storage information, and integrate the data to form primitive information of each primitive and send the primitive information to a GPU pipeline module to execute a rendering task. The process can be simplified, the coupling degree between modules can be reduced, real-time feedback can be provided, and efficient simulation can be achieved with a lightweight model.

Description

Technical Field

[0001] The present disclosure relates to the field of computer technology, and in particular to a GPU primitive preprocessing device, system, and method. Background Art

[0002] In the early stages of graphics processing unit (GPU) design, software modeling is crucial for verifying the functionality and performance of the GPU. This process not only allows for a preliminary evaluation of the GPU's potential performance, but also provides software developers with an early development platform through a simulation environment. This approach promotes parallel development across multiple departments and accelerates the progress of the entire project. In the GPU modeling process, it is crucial to provide software developers with a complete GPU model that meets design standards. Doing so enables developers to parse compliant data passed through the PCIE interface in a virtual machine. However, in related technologies, the modeling methods used in the simulation GPU preprocessing process have problems such as high model complexity, high hardware-level module coupling, hardware design restrictions on model development and design, and low operating efficiency. Summary of the Invention

[0003] In view of this, the present disclosure proposes a GPU primitive preprocessing device, system, and method.

[0004] According to one aspect of the present disclosure, a GPU primitive preprocessing device is provided, the device comprising a preprocessing module, the preprocessing module being configured to perform the following steps:

[0005] Receive a rendering instruction from the GPU instruction front end, and obtain state information and a vertex index relationship corresponding to the rendering instruction, the state information including first storage information of the vertex index, a topological structure indicating an arrangement of the vertex index, and second storage information of the vertex data, the vertex index relationship being used to indicate a correspondence between the vertex index and the vertex data of the same vertex;

[0006] Acquire vertex index information from a vertex index buffer of a GPU display memory according to the first storage information, where the vertex index information includes a plurality of vertex indices;

[0007] Segmenting the plurality of vertex indexes in the vertex index information according to the topological structure and the first stored information to obtain at least one vertex index corresponding to each primitive in the rendering instruction;

[0008] Acquire each vertex data corresponding to each primitive from a vertex data buffer in the GPU display memory according to at least one vertex index corresponding to each primitive, the vertex index relationship, and the second stored information;

[0009] Performing data integration on all vertex data of each of the graphic primitives to form graphic primitive information of each of the graphic primitives;

[0010] The primitive information of each primitive is sent to a GPU pipeline module, so that the GPU pipeline module performs a rendering task for the rendering instruction based on the primitive information of each primitive.

[0011] In one possible implementation, the preprocessing module is also used to add an element identifier to the element information of each element during the data integration process, and also sends the element information of each element to the debugging module, so that the debugging module can display the corresponding element log based on the element identifier of each element.

[0012] In a possible implementation, the device further includes the debugging module.

[0013] The debugging module is configured to receive and record the graphic element information of each graphic element from the pre-processing module; and

[0014] When a query request for a primitive to be checked is received, the processing progress of the primitive to be checked is obtained from the GPU pipeline module according to the primitive identifier to be checked indicated in the query request, and a corresponding primitive log is generated and displayed according to the processing progress of the primitive to be checked;

[0015] The metadata log is displayed in JSON format.

[0016] In a possible implementation, the first storage information includes an index number, an index bit width, and a first starting address of the vertex index buffer.

[0017] wherein, acquiring vertex index information from a vertex index buffer of a GPU display memory according to the first storage information, wherein the vertex index information includes a plurality of vertex indexes, comprises: acquiring vertex index information from a vertex index buffer of a GPU display memory indicated by the first starting address;

[0018] The method further comprises dividing the multiple vertex indexes in the vertex index information according to the topological structure and the first storage information to obtain at least one vertex index corresponding to each primitive in the rendering instruction, including dividing the multiple vertex indexes in the vertex index information according to the topological structure, the index number and the index bit width to obtain at least one vertex index corresponding to each primitive in the rendering instruction.

[0019] In a possible implementation, the second storage information includes a vertex number, a vertex bit width, and a second starting address of the vertex data buffer; the vertex index relationship represents a correspondence between a vertex index and vertex data through a correspondence between an index number and a vertex number;

[0020] The method of obtaining, from a vertex data buffer in a display memory of the GPU, vertex data corresponding to each of the graphics primitives based on at least one vertex index corresponding to each of the graphics primitives, the vertex index relationship, and the second storage information, includes:

[0021] Determining the vertex number of each vertex data corresponding to each primitive according to the index number of each vertex index corresponding to each primitive and the vertex index relationship;

[0022] Determining, according to the vertex number and the vertex bit width of each vertex data corresponding to each primitive, an offset address of each vertex data corresponding to each primitive relative to the second starting address;

[0023] According to the offset address of each vertex data corresponding to each primitive and the second starting address, each vertex data corresponding to each primitive is obtained from the vertex data buffer in the GPU display memory.

[0024] In one possible implementation, at least one split identifier and / or end identifier is set in the vertex index information, and each split identifier is set between corresponding vertex indices in the vertex index information. The split identifier is used to indicate the position in the vertex index information where the splitting algorithm needs to be reset before continuing the vertex index splitting, and the end identifier is used to indicate the position in the vertex index information where the vertex index splitting needs to be ended.

[0025] In a possible implementation, the pre-processing module accesses the GPU memory through a storage module interface, and the storage module interface is pre-modeled for the GPU that needs to be verified.

[0026] In a possible implementation, the pre-processing module is formed by pre-modeling the functions of the GPU that needs to be verified.

[0027] According to another aspect of the present disclosure, a GPU primitive preprocessing system is provided, the system comprising: a GPU primitive preprocessing device, a GPU display memory, and a GPU pipeline module;

[0028] The preprocessing module in the GPU primitive preprocessing device performs the following steps:

[0029] Receive a rendering instruction from the GPU instruction front end, and obtain state information and a vertex index relationship corresponding to the rendering instruction, the state information including first storage information of the vertex index, a topological structure indicating an arrangement of the vertex index, and second storage information of the vertex data, the vertex index relationship being used to indicate a correspondence between the vertex index and the vertex data of the same vertex;

[0030] Acquire vertex index information from a vertex index buffer of a GPU display memory according to the first storage information, where the vertex index information includes a plurality of vertex indices;

[0031] Segmenting the plurality of vertex indexes in the vertex index information according to the topological structure and the first stored information to obtain at least one vertex index corresponding to each primitive in the rendering instruction;

[0032] Acquire each vertex data corresponding to each primitive from a vertex data buffer in the GPU display memory according to at least one vertex index corresponding to each primitive, the vertex index relationship, and the second stored information;

[0033] Performing data integration on all vertex data of each of the graphic primitives to form graphic primitive information of each of the graphic primitives;

[0034] Sending the primitive information of each primitive to a GPU pipeline module;

[0035] The GPU pipeline module is used to execute the rendering task for the rendering instruction based on the primitive information of each primitive.

[0036] In one possible implementation, the preprocessing module is also used to add an element identifier to the element information of each element during the data integration process, and also sends the element information of each element to the debugging module, so that the debugging module can display the corresponding element log based on the element identifier of each element.

[0037] In a possible implementation, the GPU primitive preprocessing device further includes the debugging module.

[0038] The debugging module is configured to receive and record the graphic element information of each graphic element from the pre-processing module; and

[0039] When a query request for a primitive to be checked is received, the processing progress of the primitive to be checked is obtained from the GPU pipeline module according to the primitive identifier to be checked indicated in the query request, and a corresponding primitive log is generated and displayed according to the processing progress of the primitive to be checked;

[0040] The metadata log is displayed in JSON format.

[0041] In a possible implementation, the first storage information includes an index number, an index bit width, and a first starting address of the vertex index buffer.

[0042] wherein, acquiring vertex index information from a vertex index buffer of a GPU display memory according to the first storage information, wherein the vertex index information includes a plurality of vertex indexes, comprises: acquiring vertex index information from a vertex index buffer of a GPU display memory indicated by the first starting address;

[0043] The method further comprises dividing the multiple vertex indexes in the vertex index information according to the topological structure and the first storage information to obtain at least one vertex index corresponding to each primitive in the rendering instruction, including dividing the multiple vertex indexes in the vertex index information according to the topological structure, the index number and the index bit width to obtain at least one vertex index corresponding to each primitive in the rendering instruction.

[0044] In a possible implementation, the second storage information includes a vertex number, a vertex bit width, and a second starting address of the vertex data buffer; the vertex index relationship represents a correspondence between a vertex index and vertex data through a correspondence between an index number and a vertex number;

[0045] The method of obtaining, from a vertex data buffer in a display memory of the GPU, vertex data corresponding to each of the graphics primitives based on at least one vertex index corresponding to each of the graphics primitives, the vertex index relationship, and the second storage information, includes:

[0046] Determining the vertex number of each vertex data corresponding to each primitive according to the index number of each vertex index corresponding to each primitive and the vertex index relationship;

[0047] Determining, according to the vertex number and the vertex bit width of each vertex data corresponding to each primitive, an offset address of each vertex data corresponding to each primitive relative to the second starting address;

[0048] According to the offset address of each vertex data corresponding to each primitive and the second starting address, each vertex data corresponding to each primitive is obtained from the vertex data buffer in the GPU display memory.

[0049] In one possible implementation, at least one split identifier and / or end identifier is set in the vertex index information, and each split identifier is set between corresponding vertex indices in the vertex index information. The split identifier is used to indicate the position in the vertex index information where the splitting algorithm needs to be reset before continuing the vertex index splitting, and the end identifier is used to indicate the position in the vertex index information where the vertex index splitting needs to be ended.

[0050] In a possible implementation, the system further includes a storage module interface, and the pre-processing module accesses the GPU display memory through the storage module interface. The storage module interface is pre-modeled for the GPU that needs to be verified.

[0051] In a possible implementation, the pre-processing module is formed by pre-modeling the functions of the GPU that needs to be verified.

[0052] According to another aspect of the present disclosure, a GPU primitive preprocessing method is provided, which is applied to a GPU primitive preprocessing device, wherein the device includes a preprocessing module. The method includes controlling the preprocessing module to perform the following steps:

[0053] Receive a rendering instruction from the GPU instruction front end, and obtain state information and a vertex index relationship corresponding to the rendering instruction, the state information including first storage information of the vertex index, a topological structure indicating an arrangement of the vertex index, and second storage information of the vertex data, the vertex index relationship being used to indicate a correspondence between the vertex index and the vertex data of the same vertex;

[0054] Acquire vertex index information from a vertex index buffer of a GPU display memory according to the first storage information, where the vertex index information includes a plurality of vertex indices;

[0055] Segmenting the plurality of vertex indexes in the vertex index information according to the topological structure and the first stored information to obtain at least one vertex index corresponding to each primitive in the rendering instruction;

[0056] Acquire each vertex data corresponding to each primitive from a vertex data buffer in the GPU display memory according to at least one vertex index corresponding to each primitive, the vertex index relationship, and the second stored information;

[0057] Integrating all vertex data of each of the graphic primitives to form graphic primitive information of each of the graphic primitives;

[0058] The primitive information of each primitive is sent to a GPU pipeline module, so that the GPU pipeline module performs a rendering task for the rendering instruction based on the primitive information of each primitive.

[0059] In a possible implementation, the method further includes:

[0060] The preprocessing module is controlled to add an element identifier to the element information of each element during data integration, and the element information of each element is sent to the debugging module so that the debugging module can display the corresponding element log based on the element identifier of each element.

[0061] In one possible implementation, the method further includes: controlling the debugging module to receive and record primitive information of each primitive from the pre-processing module; and upon receiving a query request for a primitive to be checked, obtaining a processing progress of the primitive to be checked from the GPU pipeline module according to a primitive identifier to be checked indicated in the query request, generating and displaying a corresponding primitive log according to the processing progress of the primitive to be checked;

[0062] The metadata log is displayed in JSON format.

[0063] In a possible implementation, the first storage information includes an index number, an index bit width, and a first starting address of the vertex index buffer.

[0064] wherein, acquiring vertex index information from a vertex index buffer of a GPU display memory according to the first storage information, wherein the vertex index information includes a plurality of vertex indexes, comprises: acquiring vertex index information from a vertex index buffer of a GPU display memory indicated by the first starting address;

[0065] The method further comprises dividing the multiple vertex indexes in the vertex index information according to the topological structure and the first storage information to obtain at least one vertex index corresponding to each primitive in the rendering instruction, including dividing the multiple vertex indexes in the vertex index information according to the topological structure, the index number and the index bit width to obtain at least one vertex index corresponding to each primitive in the rendering instruction.

[0066] In a possible implementation, the second storage information includes a vertex number, a vertex bit width, and a second starting address of the vertex data buffer; the vertex index relationship represents a correspondence between a vertex index and vertex data through a correspondence between an index number and a vertex number;

[0067] The method of obtaining, from a vertex data buffer in a display memory of the GPU, vertex data corresponding to each of the graphics primitives based on at least one vertex index corresponding to each of the graphics primitives, the vertex index relationship, and the second storage information, includes:

[0068] Determining the vertex number of each vertex data corresponding to each primitive according to the index number of each vertex index corresponding to each primitive and the vertex index relationship;

[0069] Determining, according to the vertex number and the vertex bit width of each vertex data corresponding to each primitive, an offset address of each vertex data corresponding to each primitive relative to the second starting address;

[0070] According to the offset address of each vertex data corresponding to each primitive and the second starting address, each vertex data corresponding to each primitive is obtained from the vertex data buffer in the GPU display memory.

[0071] In one possible implementation, at least one split identifier and / or end identifier is set in the vertex index information, and each split identifier is set between corresponding vertex indices in the vertex index information. The split identifier is used to indicate the position in the vertex index information where the splitting algorithm needs to be reset before continuing the vertex index splitting, and the end identifier is used to indicate the position in the vertex index information where the vertex index splitting needs to be ended.

[0072] In a possible implementation, the pre-processing module is formed by pre-modeling the functions of the GPU that needs to be verified.

[0073] According to another aspect of the present disclosure, a GPU primitive preprocessing device is provided, comprising: a processor; and a memory for storing processor-executable instructions; wherein the processor is configured to implement the above method when executing the instructions stored in the memory.

[0074] According to another aspect of the present disclosure, a non-volatile computer-readable storage medium is provided, on which computer program instructions are stored, wherein the computer program instructions implement the above method when executed by a processor.

[0075] According to another aspect of the present disclosure, a computer program product is provided, including a computer-readable code, or a non-volatile computer-readable storage medium carrying the computer-readable code. When the computer-readable code runs in a processor of an electronic device, the processor in the electronic device executes the above method.

[0076] The GPU primitive preprocessing device, system, and method provided by the embodiments of the present disclosure have the following advantages:

[0077] Simplifying the hardware design and modeling process: By streamlining the hardware-based design and modeling process, development efficiency and maintenance convenience are significantly improved. This significantly shortens the start of software development during the GPU design phase, facilitating parallel development across departments.

[0078] Reduced coupling between modules: Function-based modules are used to replace traditional hardware modules, eliminating synchronization dependencies between hardware modules and achieving high cohesion and low coupling of the model.

[0079] Provide real-time feedback for software development: The provided GPU primitive preprocessing device can record key operating information in real time and present it in log form, effectively reducing the debugging difficulty and time cost during the software development process.

[0080] Lightweight model enables efficient simulation: By eliminating unnecessary hardware simulation details, an efficient lightweight model is constructed, significantly improving simulation speed.

[0081] Further features and aspects of the present disclosure will become apparent from the following detailed description of exemplary embodiments with reference to the attached drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0082] The accompanying drawings, which are incorporated in and constitute a part of the specification, illustrate exemplary embodiments, features, and aspects of the disclosure and, together with the description, serve to explain the principles of the disclosure.

[0083] Figure 1 A block diagram of a GPU primitive pre-processing apparatus according to an embodiment of the present disclosure is shown.

[0084] Figure 2 A flowchart illustrating a workflow of a pre-processing module in a GPU primitive pre-processing device according to an embodiment of the present disclosure is shown.

[0085] Figure 3 A block diagram of a GPU primitive pre-processing apparatus according to an embodiment of the present disclosure is shown.

[0086] Figure 4 It is a block diagram showing a device 1900 for GPU primitive preprocessing according to an exemplary embodiment. DETAILED DESCRIPTION

[0087] Various exemplary embodiments, features, and aspects of the present disclosure will be described in detail below with reference to the accompanying drawings. The same reference numerals in the accompanying drawings represent elements with the same or similar functions. Although various aspects of the embodiments are shown in the accompanying drawings, the drawings are not necessarily drawn to scale unless otherwise indicated.

[0088] The word “exemplary” is used exclusively herein to mean “serving as an example, example, or illustration.” Any embodiment described herein as “exemplary” is not necessarily to be construed as preferred or advantageous over other embodiments.

[0089] In addition, numerous specific details are provided in the following detailed description to better illustrate the present disclosure. Those skilled in the art will appreciate that the present disclosure can be practiced without certain specific details. In some instances, methods, means, components, and circuits well known to those skilled in the art are not described in detail in order to highlight the main points of the present disclosure.

[0090] During the design process of the GPU, it is necessary to perform software modeling on the GPU in the early stage of the project. On the one hand, the functions and performance of the GPU can be verified in advance. On the other hand, a development platform can be provided to software developers in advance through a virtual machine, which is convenient for parallel development of multiple departments. During the modeling process of the GPU, it is necessary to provide software developers with a complete GPU primitive preprocessing module that conforms to the design. In this process, accurate modeling of the entire GPU pipeline (including the GPU primitive preprocessing module) is particularly critical. Among them, the GPU primitive preprocessing module refers to the module used by the GPU to receive the primitive information sent by the upstream driver to the pipeline module through PCIE, and to preprocess and issue it. Specifically, the GPU primitive preprocessing module is mainly responsible for extracting the primitive information issued by the driver from the video memory, and performing primitive segmentation, statistical primitive information, and triggering pipeline processing and other operations.

[0091] In related technologies, the Electronic System Level (ESL) modeling of GPU primitive preprocessing modules typically uses C++ frameworks such as SystemC and simulates the partitioning of hardware modules through transaction-based software models. This has the following technical limitations:

[0092] Complex hardware design requirements: The existing GPU primitive preprocessing module model is overly complex in hardware design, involving extensive clock management, register configuration, and consistency assurance issues. This design increases the model complexity, thus affecting its maintainability.

[0093] High coupling strength between hardware-level modules: In the existing GPU primitive preprocessing module model, due to hardware-level limitations, a high degree of coupling between modules occurs during the modeling process, which poses an obstacle to the scalability and subsequent maintenance of the model.

[0094] Hardware details limit software development feedback: During the collaborative development of hardware and software, the hardware-based GPU primitive preprocessing module model often finds it difficult to provide appropriate feedback to software developers because it focuses on hardware implementation details and cannot meet the research needs of software developers.

[0095] Inefficient hardware simulation detail processing: The hardware-based GPU primitive preprocessing module model has low operating efficiency due to its complex hardware simulation details.

[0096] To solve the above problems, the present disclosure provides a GPU primitive preprocessing device, system, and method, which have the following advantages:

[0097] Simplifying the hardware design and modeling process: By streamlining the hardware-based design and modeling process, development efficiency and maintenance convenience are significantly improved. This significantly shortens the start of software development during the GPU design phase, facilitating parallel development across departments.

[0098] Reduced coupling between modules: Function-based modules are used to replace traditional hardware modules, eliminating synchronization dependencies between hardware modules and achieving high cohesion and low coupling of the model.

[0099] Provide real-time feedback for software development: The provided GPU primitive preprocessing device can record key operating information in real time and present it in log form, effectively reducing the debugging difficulty and time cost during the software development process.

[0100] Lightweight model enables efficient simulation: By eliminating unnecessary hardware simulation details, an efficient lightweight model is constructed, significantly improving simulation speed.

[0101] like Figure 1 As shown, an embodiment of the present disclosure provides a GPU primitive preprocessing device, which includes a preprocessing module 11. The preprocessing module 11 is pre-modeled for the GPU function that needs to be verified, and no longer considers issues such as clock management, register configuration, and consistency assurance required by the hardware. Therefore, the model of the preprocessing module 11 can be lightweight and run efficiently, and it can also simplify the hardware design modeling process and reduce the coupling between modules. The preprocessing module 11 can exist in the form of a software module and can be implemented in the required language. For example, in C++, the preprocessing module 11 can be an object instance.

[0102] The preprocessing module 11 is used to implement primitive preprocessing. A primitive can refer to the smallest unit of graphics processed by a GPU. In a GPU, primitives can be roughly divided into three categories: points, line segments, and triangles. Primitives are composed of vertices. For "point" primitives, each primitive has one vertex. For "line segment" primitives, each primitive has two vertices. For "triangle" primitives, each primitive contains three vertices. The vertex data of each vertex includes its geometric information (position information), color information, and other rendering-related information.

[0103] Among them, such as Figure 1 As shown, the GPU instruction front end 21 is used to send rendering instructions that need to be pre-processed to the pre-processing module 11.

[0104] like Figure 1 、 Figure 2 As shown, the pre-processing module 11 is used to perform the following steps 1 to 6.

[0105] Step 1: The preprocessing module 11 receives rendering instructions from the GPU instruction front end and obtains the state information and vertex index relationship corresponding to the rendering instructions. The state information includes first storage information of vertex indexes, a topological structure indicating the arrangement of vertex indexes, and second storage information of vertex data. The vertex index relationship is used to indicate the correspondence between vertex indexes and vertex data. The topological structure can indicate the arrangement of vertex indexes, corresponding to primitives, and can be set based on relevant rules of the graphics API.

[0106] In some embodiments, the rendering instruction may carry state information and vertex index relationships, or carry address information indicating the storage location of the state information and vertex index relationships (the address information may be a pointer indicating a storage space address, etc., which is not limited by the present disclosure). The pre-processing module 11 may obtain the corresponding state information and vertex index relationships based on the rendering instruction. Alternatively, the rendering instruction, state information, and vertex index relationships may also be sent to the pre-processing module 11 separately via the GPU instruction front end, which is not limited by the present disclosure.

[0107] In some embodiments, the vertex index may be the corresponding index of the vertex. Each vertex has a corresponding unique vertex index and unique vertex data. The correspondence between the vertex index and the vertex data of each vertex may be represented by a vertex index relationship, and the vertex index relationship may be represented by a correspondence between the index identifier corresponding to the vertex index and the vertex data corresponding to the vertex identifier. To further simplify the representation of the vertex index relationship, the index identifier and the vertex identifier may both include numbers, and the vertex index and vertex data of the same vertex may have the same number.

[0108] In some embodiments, the first storage information may indicate the storage address of the vertex index, such as the address of a vertex index buffer storing each vertex index, a pointer indicating the vertex index buffer storing each vertex index, etc., which is not limited in this disclosure. The second storage information may indicate the storage address of the vertex data, such as the address of a vertex data buffer storing each vertex data, a pointer indicating the vertex data buffer storing each vertex data, etc., which is not limited in this disclosure.

[0109] Step 2: The pre-processing module 11 obtains vertex index information from the vertex index buffer of the GPU memory according to the first storage information, wherein the vertex index information includes multiple vertex indices, wherein the vertex indexes are stored sequentially and continuously in the vertex index buffer.

[0110] Step 3: The pre-processing module 11 divides the multiple vertex indexes in the vertex index information according to the topological structure and the first storage information to obtain at least one vertex index corresponding to each primitive in the rendering instruction.

[0111] Step 4: The pre-processing module 11 obtains the vertex data corresponding to each of the primitives from the vertex data buffer in the GPU display memory according to at least one vertex index corresponding to each of the primitives, the vertex index relationship and the second storage information.

[0112] In a possible implementation, the first storage information may include an index number, an index bit width, and a first starting address of the vertex index buffer. The second storage information includes a vertex number, a vertex bit width, and a second starting address of the vertex data buffer. The vertex index relationship may represent the correspondence between the vertex index and the vertex data of the same vertex through the correspondence between the index number and the vertex number. The index number and the vertex number may be arranged sequentially, so that the vertex number may also indicate the offset information of the corresponding vertex data, and then the offset of the vertex data may be determined based on the vertex number and the vertex bit width, and finally the offset address of the vertex data may be determined based on the second starting address and the offset. Similarly, the index number may also indicate the offset information of the corresponding vertex index, and then the offset of the vertex index may be determined based on the index number, the index bit width, and the vertex index. For example, the index number (IdxOffset) of the vertex index of vertex A is 1, and the vertex number (VtxOffset) of the vertex data is also 1.

[0113] In this implementation, step 2 may include: obtaining vertex index information from a vertex index buffer in a GPU memory indicated by the first starting address. Step 3 may include: segmenting multiple vertex indices in the vertex index information according to the topological structure, the index number, and the index bit width to obtain at least one vertex index corresponding to each primitive in the rendering instruction.

[0114] In this implementation, step 4 may include: determining the vertex number of each vertex data corresponding to each primitive based on the index number of each vertex index corresponding to each primitive and the vertex index relationship; determining the offset address of each vertex data corresponding to each primitive relative to the second starting address based on the vertex number of each vertex data corresponding to each primitive and the vertex bit width; obtaining the vertex data corresponding to each primitive from the vertex data buffer in the GPU video memory based on the offset address of each vertex data corresponding to each primitive and the second starting address.

[0115] Step 5: The pre-processing module 11 integrates all vertex data of each primitive to form primitive information of each primitive. The data integration may be to merge vertex data of the same primitive together.

[0116] Step 6: The pre-processing module 11 sends the primitive information of each primitive to the GPU pipeline module 23, so that the GPU pipeline module 23 performs the rendering task for the rendering instruction based on the primitive information of each primitive.

[0117] In this embodiment, the preprocessing module 11 can perform the steps of acquiring, integrating, and sending the vertex data of a primitive to the GPU pipeline module 23 after determining at least one vertex index corresponding to the primitive; it can also determine at least one vertex index corresponding to all primitives, and then perform the subsequent steps of "acquiring, integrating, and sending the vertex data to the GPU pipeline module 23" for each primitive in sequence; it can also determine at least one vertex index corresponding to all primitives, and then perform the steps of acquiring and integrating the vertex data of all primitives in sequence, and then send the primitive information of each primitive to the GPU pipeline module 23 in sequence. The present disclosure does not impose any restrictions on this.

[0118] In some embodiments, the state information may be represented in the structure shown in Table 1. The structure of the state information may be configured according to actual needs, and the present disclosure does not impose any limitation thereto.

[0119] Table 1 Example of status information structure

[0120]

[0121] In a possible implementation, the vertex index information may also be provided with at least one split identifier and / or end identifier, each of which is provided between corresponding vertex indices in the vertex index information, and the split identifier is used to indicate the position in the vertex index information where the split algorithm needs to be reset before continuing the vertex index splitting, the split identifier indicates that the vertex indexes before and after the split identifier belong to two different parts of data, the two vertex data before and after the split identifier cannot be used interchangeably, and the split algorithm needs to be reset for re-split, so that in the two vertex indexes before and after the split identifier, the vertex index before the split identifier corresponds to the last vertex data in the part of data before the split identifier, and the vertex index after the split identifier corresponds to the first vertex data in the other part of data after the split identifier. The end identifier is used to indicate the position in the vertex index information where the vertex index splitting needs to be ended, and the end identifier indicates that the splitting has ended. The split identifier and / or end identifier may also be a "special" vertex index used to identify the split and end, and the "vertex index belonging to the split identifier and the end identifier" is different from the "vertex index corresponding to the vertex data", which can be distinguished by identifiers, etc., and the present disclosure does not impose any restrictions on this.

[0122] In this implementation, during step 3, if the pre-processing module 11 detects a segmentation identifier, it can be determined that the segmentation of the current portion of data has ended, and the segmentation algorithm is reset, starting with the next vertex index, and re-starting the segmentation of the next portion of data. If the end identifier is detected, it can be determined that the segmentation for the current rendering instruction has ended, and the segmentation stops.

[0123] In one possible implementation, the preprocessing module 11 is also used to add an element identifier to the element information of each element during the data integration process, and also sends the element information of each element to the debugging module, so that the debugging module can display the corresponding element log based on the element identifier of each element.

[0124] In one possible implementation, Figure 3 As shown, the GPU primitive preprocessing device may further include a debugging module 12. The debugging module 12 is configured to receive and record primitive information of each primitive from the preprocessing module 11; and upon receiving a request for a primitive to be checked, obtain the processing progress of the primitive to be checked from the GPU pipeline module 23 based on the primitive identifier indicated in the request, and generate and display a corresponding primitive log based on the processing progress of the primitive to be checked. The primitive log is displayed in JSON format.

[0125] Among them, when the debugging module 12 receives the viewing request, it sends a progress query request to the GPU pipeline module 23 based on the identifier of the primitive to be checked. After receiving the progress query request, the GPU pipeline module 23 determines the processing progress of the corresponding primitive to be checked based on the identifier of the primitive to be checked in the progress query request, and returns the processing progress of the primitive to be checked to the debugging module 12. After receiving the processing progress of the primitive to be checked, the debugging module 12 forms a primitive log corresponding to the primitive to be checked based on the processing progress, and then displays the primitive log to the user (GPU developer, etc.) in JSON format. The primitive log based on the granularity of the primitive is more in line with the graphics calculation process, so that the user can clearly and intuitively understand the rendering process of different primitives based on the primitive log, monitor and verify the behavior of the GPU model in real time, and debug the GPU model in time, effectively reducing the debugging difficulty and time cost in the software development process, and improving the efficiency and speed of the entire GPU development.

[0126] In this embodiment, the debugging module 12 is further configured to generate debugging information based on the primitive log and send the debugging information to the driver software so that the driver developer can view the primitive log, thereby providing the driver developer with a running verification interface.

[0127] In some embodiments, the primitive log may include the primitive identifier of the primitive to be checked, the vertex data corresponding to the primitive to be checked (that is, the parsing result of the primitive in the GPU model), and the current processing stage of the primitive to be checked (the processing stage may be a rendering-related stage such as a geometry stage and a rasterization stage).

[0128] In one possible implementation, the pre-processing module 11 accesses the GPU memory via a storage module interface 22. The storage module interface 22 is pre-modeled for the GPU to be verified. In some embodiments, the GPU pipeline module 23 and / or the GPU instruction front end 21 may also be pre-modeled for the GPU to be verified.

[0129] For the convenience of developers, the GPU primitive preprocessing device or the GPU primitive preprocessing system described below can be encapsulated into a callable library, and the library can be further encapsulated into a virtual machine. A software simulation platform is provided for users, and QEMU can be used as a carrier, which is divided into a host side Host and a device side Device. Device is a virtual PCIE device simulated by QEMU, and Host is the environment developed by software developers, which is also the development space provided by the present disclosure for software developers. In Device, it is necessary to access the encapsulated GPU model, which is mainly divided into four parts: a firmware simulation module (which can be a Firmware ESL simulation model built based on ESL), a GPU primitive preprocessing device, a GPU pipeline module 23, a GPU instruction processing front end 21 and a virtual storage (including GPU video memory). In this way, the GPU instruction processing front end 21 is connected to the Firmware, and the GPU primitive preprocessing device is connected to the GPU instruction processing front end 21 and the GPU pipeline module 23, realizing the combination of the software model and the ESL model. The strategy of encapsulating the entire device or system into a virtual machine provides software developers with a simulation platform that is closer to the actual hardware environment and provides a more accurate and practical simulation environment. It can also provide logging services to developers on the Host side.

[0130] The GPU primitive preprocessing device provided by the embodiments of the present disclosure can bring the following beneficial effects:

[0131] High operational efficiency and interface availability: Since the pre-processing module only ensures the normal implementation of GPU functions, it no longer considers hard requirements such as the clock and storage configuration of the hardware circuit. Compared with the traditional ESL modeling method, it builds an efficient lightweight model, significantly improves the simulation speed, and also makes the pre-processing module have high processing speed, low latency, and high operational efficiency.

[0132] Comprehensive software and hardware simulation: The combination of software models and ESL models, along with the strategy of encapsulating the device into a virtual machine, provides software developers with a simulation platform that is closer to the actual hardware environment. This comprehensive approach may provide a more accurate and practical simulation environment than traditional ESL models.

[0133] Logging Service and User Interface: The debugging module provides software developers with a clear verification interface that displays the results of instruction parsing and primitive information on the GPU, providing high practicality and user experience. The logging service and user interface that displays primitive logs enable software developers to monitor and verify GPU model behavior in real time in a clear, intuitive manner that better aligns with the graphics computing process, making it easy to use and highly effective.

[0134] Low coupling between modules: The coupling between GPU hardware modules in the GPU primitive preprocessing device is low. Each module in the GPU primitive preprocessing device can work independently and can also be updated and maintained independently, which improves the flexibility and scalability of the overall maintenance and upgrade of the GPU primitive preprocessing device.

[0135] Scalability and convenience of updating: The GPU primitive preprocessing device no longer focuses on the details of the GPU hardware, making it easier to expand and update. It is suitable for the development and use of different GPUs. It can also achieve corresponding expansion and update of the GPU instruction processing front-end simulation device according to the update and expansion of the GPU, thereby improving the speed and efficiency of GPU development.

[0136] The present disclosure also provides a GPU primitive preprocessing system, which includes the above-mentioned GPU primitive preprocessing device, GPU display memory, and GPU pipeline module 23.

[0137] The pre-processing module 11 in the GPU primitive pre-processing device performs the following steps:

[0138] Receive a rendering instruction from the GPU instruction front end 21, and obtain state information and a vertex index relationship corresponding to the rendering instruction, the state information including first storage information of the vertex index, a topological structure indicating an arrangement of the vertex index, and second storage information of the vertex data, the vertex index relationship being used to indicate a correspondence between the vertex index and the vertex data of the same vertex;

[0139] Acquire vertex index information from a vertex index buffer of a GPU display memory according to the first storage information, where the vertex index information includes a plurality of vertex indices;

[0140] Segmenting the plurality of vertex indexes in the vertex index information according to the topological structure and the first stored information to obtain at least one vertex index corresponding to each primitive in the rendering instruction;

[0141] Acquire each vertex data corresponding to each primitive from a vertex data buffer in the GPU display memory according to at least one vertex index corresponding to each primitive, the vertex index relationship, and the second stored information;

[0142] Performing data integration on all vertex data of each of the graphic primitives to form graphic primitive information of each of the graphic primitives;

[0143] Sending the primitive information of each primitive to the GPU pipeline module 23;

[0144] The GPU pipeline module 23 is configured to execute a rendering task for the rendering instruction based on the primitive information of each primitive.

[0145] In one possible implementation, the preprocessing module is also used to add an element identifier to the element information of each element during the data integration process, and also sends the element information of each element to the debugging module, so that the debugging module can display the corresponding element log based on the element identifier of each element.

[0146] In a possible implementation, the GPU primitive preprocessing device further includes the debugging module.

[0147] The debugging module is configured to receive and record the graphic element information of each graphic element from the pre-processing module; and

[0148] When a query request for a primitive to be checked is received, the processing progress of the primitive to be checked is obtained from the GPU pipeline module according to the primitive identifier to be checked indicated in the query request, and a corresponding primitive log is generated and displayed according to the processing progress of the primitive to be checked;

[0149] The metadata log is displayed in JSON format.

[0150] In a possible implementation, the first storage information includes an index number, an index bit width, and a first starting address of the vertex index buffer.

[0151] wherein, acquiring vertex index information from a vertex index buffer of a GPU display memory according to the first storage information, wherein the vertex index information includes a plurality of vertex indexes, comprises: acquiring vertex index information from a vertex index buffer of a GPU display memory indicated by the first starting address;

[0152] The method further comprises dividing the multiple vertex indexes in the vertex index information according to the topological structure and the first storage information to obtain at least one vertex index corresponding to each primitive in the rendering instruction, including dividing the multiple vertex indexes in the vertex index information according to the topological structure, the index number and the index bit width to obtain at least one vertex index corresponding to each primitive in the rendering instruction.

[0153] In a possible implementation, the second storage information includes a vertex number, a vertex bit width, and a second starting address of the vertex data buffer; the vertex index relationship represents a correspondence between a vertex index and vertex data through a correspondence between an index number and a vertex number;

[0154] The method of obtaining, from a vertex data buffer in a display memory of the GPU, vertex data corresponding to each of the graphics primitives based on at least one vertex index corresponding to each of the graphics primitives, the vertex index relationship, and the second storage information, includes:

[0155] Determining the vertex number of each vertex data corresponding to each primitive according to the index number of each vertex index corresponding to each primitive and the vertex index relationship;

[0156] Determining, according to the vertex number and the vertex bit width of each vertex data corresponding to each primitive, an offset address of each vertex data corresponding to each primitive relative to the second starting address;

[0157] According to the offset address of each vertex data corresponding to each primitive and the second starting address, each vertex data corresponding to each primitive is obtained from the vertex data buffer in the GPU display memory.

[0158] In one possible implementation, at least one split identifier and / or end identifier is set in the vertex index information, and each split identifier is set between corresponding vertex indices in the vertex index information. The split identifier is used to indicate the position in the vertex index information where the splitting algorithm needs to be reset before continuing the vertex index splitting, and the end identifier is used to indicate the position in the vertex index information where the vertex index splitting needs to be ended.

[0159] In a possible implementation, the system further includes a storage module interface 22 , through which the pre-processing module 11 accesses the GPU memory. The storage module interface 22 is pre-modeled for the GPU that needs to be verified.

[0160] In a possible implementation, the pre-processing module is formed by pre-modeling the functions of the GPU that needs to be verified.

[0161] In some embodiments, the GPU primitive preprocessing system can further include a GPU instruction front end 21. The GPU instruction front end 21 is configured to issue rendering instructions that need to be preprocessed to the preprocessing module 11.

[0162] The present disclosure also provides a GPU primitive preprocessing method applied to the above-mentioned GPU primitive preprocessing device, wherein the device includes a preprocessing module 11, and the method includes controlling the preprocessing module 11 to perform the following steps:

[0163] receiving a rendering instruction from a GPU instruction front end, and obtaining state information and vertex index relationships corresponding to the rendering instruction, wherein the state information includes first storage information of vertex indexes, a topology structure indicating an arrangement mode of vertex indexes, and second storage information of vertex data, and the vertex index relationships are used to indicate a corresponding relationship between vertex indexes and vertex data of the same vertex;

[0164] obtaining vertex index information from a vertex index buffer of a GPU video memory according to the first storage information, wherein the vertex index information includes a plurality of vertex indexes;

[0165] segmenting the plurality of vertex indexes in the vertex index information according to the topology structure and the first storage information to obtain at least one vertex index corresponding to each primitive in the rendering instruction;

[0166] obtaining vertex data corresponding to each primitive from a vertex data buffer in the GPU video memory according to the at least one vertex index corresponding to each primitive, the vertex index relationships, and the second storage information;

[0167] performing data integration on all vertex data of each primitive to form primitive information of each primitive;

[0168] sending the primitive information of each primitive to a GPU pipeline module, so that the GPU pipeline module performs a rendering task for the rendering instruction based on the primitive information of each primitive.

[0169] In a possible implementation, the method further includes:

[0170] controlling the preprocessing module to add a primitive identifier to the primitive information of each primitive during the data integration, and sending the primitive information of each primitive to a debugging module, so that the debugging module performs corresponding primitive log display based on the primitive identifier of each primitive.

[0171] In one possible implementation, the method further includes: controlling the debugging module to receive and record primitive information of each primitive from the pre-processing module; and upon receiving a query request for a primitive to be checked, obtaining a processing progress of the primitive to be checked from the GPU pipeline module according to a primitive identifier to be checked indicated in the query request, generating and displaying a corresponding primitive log according to the processing progress of the primitive to be checked;

[0172] The metadata log is displayed in JSON format.

[0173] In a possible implementation, the first storage information includes an index number, an index bit width, and a first starting address of the vertex index buffer.

[0174] wherein, acquiring vertex index information from a vertex index buffer of a GPU display memory according to the first storage information, wherein the vertex index information includes a plurality of vertex indexes, comprises: acquiring vertex index information from a vertex index buffer of a GPU display memory indicated by the first starting address;

[0175] The method further comprises dividing the multiple vertex indexes in the vertex index information according to the topological structure and the first storage information to obtain at least one vertex index corresponding to each primitive in the rendering instruction, including dividing the multiple vertex indexes in the vertex index information according to the topological structure, the index number and the index bit width to obtain at least one vertex index corresponding to each primitive in the rendering instruction.

[0176] In a possible implementation, the second storage information includes a vertex number, a vertex bit width, and a second starting address of the vertex data buffer; the vertex index relationship represents a correspondence between a vertex index and vertex data through a correspondence between an index number and a vertex number;

[0177] The method of obtaining, from a vertex data buffer in a display memory of the GPU, vertex data corresponding to each of the graphics primitives based on at least one vertex index corresponding to each of the graphics primitives, the vertex index relationship, and the second storage information, includes:

[0178] Determining the vertex number of each vertex data corresponding to each primitive according to the index number of each vertex index corresponding to each primitive and the vertex index relationship;

[0179] Determining, according to the vertex number and the vertex bit width of each vertex data corresponding to each primitive, an offset address of each vertex data corresponding to each primitive relative to the second starting address;

[0180] According to the offset address of each vertex data corresponding to each primitive and the second starting address, each vertex data corresponding to each primitive is obtained from the vertex data buffer in the GPU display memory.

[0181] In one possible implementation, at least one split identifier and / or end identifier is set in the vertex index information, and each split identifier is set between corresponding vertex indices in the vertex index information. The split identifier is used to indicate the position in the vertex index information where the splitting algorithm needs to be reset before continuing the vertex index splitting, and the end identifier is used to indicate the position in the vertex index information where the vertex index splitting needs to be ended.

[0182] In a possible implementation, the pre-processing module is formed by pre-modeling the functions of the GPU that needs to be verified.

[0183] It should be noted that while the above embodiments are used as examples to describe the GPU primitive preprocessing device, system, and method, those skilled in the art will appreciate that the present disclosure is not limited thereto. In fact, users can flexibly configure the various modules and steps based on their personal preferences and / or actual application scenarios, as long as they comply with the technical solutions of the present disclosure.

[0184] In some embodiments, the functions or modules included in the device provided by the embodiments of the present disclosure can be used to execute the method described in the above method embodiments. The specific implementation can refer to the description of the above method embodiments. For the sake of brevity, it will not be repeated here.

[0185] The present disclosure also provides a computer-readable storage medium having computer program instructions stored thereon, wherein the computer program instructions implement the above method when executed by a processor. The computer-readable storage medium may be a volatile or non-volatile computer-readable storage medium.

[0186] An embodiment of the present disclosure further proposes an electronic device, comprising: a processor; and a memory for storing instructions executable by the processor; wherein the processor is configured to implement the above method when executing the instructions stored in the memory.

[0187] An embodiment of the present disclosure also provides a computer program product, including computer-readable code, or a non-volatile computer-readable storage medium carrying computer-readable code. When the computer-readable code runs in a processor of an electronic device, the processor in the electronic device executes the above method.

[0188] Figure 4 1 is a block diagram of an apparatus 1900 for GPU primitive preprocessing according to an exemplary embodiment. For example, the apparatus 1900 may be provided as a server or a terminal device.Figure 4 The apparatus 1900 includes a processing component 1922, which further includes one or more processors, and a memory resource represented by a memory 1932 for storing instructions, such as an application, that can be executed by the processing component 1922. The application stored in the memory 1932 may include one or more modules, each corresponding to a set of instructions. In addition, the processing component 1922 is configured to execute the instructions to perform the above-described method.

[0189] The device 1900 may also include a power supply component 1926 configured to perform power management of the device 1900, a wired or wireless network interface 1950 configured to connect the device 1900 to a network, and an input / output interface 1958 (I / O interface). The device 1900 may operate based on an operating system stored in the memory 1932, such as Windows Server 2003. TM , MacOS X TM , Unix TM ,Linux TM , FreeBSD TM or similar.

[0190] In an exemplary embodiment, a non-volatile computer-readable storage medium is also provided, such as a memory 1932 including computer program instructions that can be executed by the processing component 1922 of the apparatus 1900 to perform the above-described method.

[0191] The present disclosure may be a system, method and / or computer program product. The computer program product may include a computer-readable storage medium carrying computer-readable program instructions for causing a processor to implement various aspects of the present disclosure.

[0192] A computer-readable storage medium can be a tangible device that can hold and store instructions for use by an instruction execution device. A computer-readable storage medium can be, for example, but not limited to, an electrical storage device, a magnetic storage device, an optical storage device, an electromagnetic storage device, a semiconductor storage device, or any suitable combination thereof. More specific examples (a non-exhaustive list) of computer-readable storage media include: a portable computer disk, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), a static random access memory (SRAM), a portable compact disc read-only memory (CD-ROM), a digital versatile disk (DVD), a memory stick, a floppy disk, a mechanical encoding device, such as a punch card or a raised structure in a groove on which instructions are stored, and any suitable combination thereof. As used herein, a computer-readable storage medium is not to be construed as a transient signal per se, such as a radio wave or other freely propagating electromagnetic wave, an electromagnetic wave propagating through a waveguide or other transmission medium (e.g., a light pulse through a fiber optic cable), or an electrical signal transmitted through an electrical wire.

[0193] The computer-readable program instructions described herein can be downloaded from a computer-readable storage medium to each computing / processing device, or downloaded to an external computer or external storage device via a network, such as the Internet, a local area network, a wide area network, and / or a wireless network. The network can include copper transmission cables, fiber optic transmission, wireless transmission, routers, firewalls, switches, gateway computers, and / or edge servers. The network adapter card or network interface in each computing / processing device receives the computer-readable program instructions from the network and forwards the computer-readable program instructions to be stored in the computer-readable storage medium in each computing / processing device.

[0194] The computer program instructions for performing the operations of the present disclosure may be assembly instructions, instruction set architecture (ISA) instructions, machine instructions, machine-dependent instructions, microcode, firmware instructions, state setting data, or source code or object code written in any combination of one or more programming languages, including object-oriented programming languages ​​such as Smalltalk, C++, and conventional procedural programming languages ​​such as "C" language or similar programming languages. Computer-readable program instructions may be executed entirely on a user's computer, partially on a user's computer, as an independent software package, partially on a user's computer, partially on a remote computer, or entirely on a remote computer or server. In the case of a remote computer, the remote computer may be connected to the user's computer via any type of network, including a local area network (LAN) or a wide area network (WAN), or may be connected to an external computer (e.g., utilizing an Internet service provider to connect via the Internet). In some embodiments, an electronic circuit, such as a programmable logic circuit, a field programmable gate array (FPGA), or a programmable logic array (PLA), may be personalized by utilizing the state information of the computer-readable program instructions. The electronic circuit may execute the computer-readable program instructions, thereby realizing various aspects of the present disclosure.

[0195] Various aspects of the present disclosure are described herein with reference to flowcharts and / or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of the present disclosure. It should be understood that each block of the flowcharts and / or block diagrams, and combinations of blocks in the flowcharts and / or block diagrams, can be implemented by computer-readable program instructions.

[0196] These computer-readable program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer, or other programmable data processing device, thereby producing a machine, so that when these instructions are executed by the processor of the computer or other programmable data processing device, a device is generated that implements the functions / actions specified in one or more blocks in the flowchart and / or block diagram. These computer-readable program instructions can also be stored in a computer-readable storage medium, where these instructions cause the computer, programmable data processing device, and / or other device to operate in a specific manner. Thus, the computer-readable medium storing the instructions comprises an article of manufacture that includes instructions for implementing various aspects of the functions / actions specified in one or more blocks in the flowchart and / or block diagram.

[0197] Computer-readable program instructions may also be loaded onto a computer, other programmable data processing apparatus, or other device so that a series of operational steps are performed on the computer, other programmable data processing apparatus, or other device to produce a computer-implemented process, thereby causing the instructions executed on the computer, other programmable data processing apparatus, or other device to implement the functions / actions specified in one or more blocks in the flowchart and / or block diagram.

[0198] The flow charts and block diagrams in the accompanying drawings show the possible architecture, functions and operations of the systems, methods and computer program products according to multiple embodiments of the present disclosure. In this regard, each box in the flow chart or block diagram can represent a part of a module, program segment or instruction, and the part of the module, program segment or instruction contains one or more executable instructions for realizing the prescribed logical function. In some alternative implementations, the functions marked in the box can also occur in a sequence different from that marked in the accompanying drawings. For example, two consecutive boxes can actually be executed substantially in parallel, and they can sometimes be executed in the opposite order, depending on the functions involved. It should also be noted that each box in the block diagram and / or flow chart, and the combination of the boxes in the block diagram and / or flow chart can be implemented by a dedicated hardware-based system that performs the prescribed function or action, or can be implemented by a combination of dedicated hardware and computer instructions.

[0199] While various embodiments of the present disclosure have been described above, the foregoing description is intended to be illustrative, non-exhaustive, and not limited to the disclosed embodiments. Many modifications and variations will be apparent to those skilled in the art without departing from the scope and spirit of the described embodiments. The terminology used herein is selected to best explain the principles of the embodiments, their practical applications, or technological improvements in the marketplace, or to enable others skilled in the art to understand the embodiments disclosed herein.

Claims

1. A GPU primitive preprocessing device, characterized in that: The device includes a pre-processing module, which is configured to perform the following steps: Receive a rendering instruction from the GPU instruction front end, and obtain state information and a vertex index relationship corresponding to the rendering instruction, the state information including first storage information of the vertex index, a topological structure indicating an arrangement of the vertex index, and second storage information of the vertex data, the vertex index relationship being used to indicate a correspondence between the vertex index and the vertex data of the same vertex; Acquire vertex index information from a vertex index buffer of a GPU display memory according to the first storage information, where the vertex index information includes a plurality of vertex indices; Segmenting the plurality of vertex indexes in the vertex index information according to the topological structure and the first stored information to obtain at least one vertex index corresponding to each primitive in the rendering instruction; Acquire each vertex data corresponding to each primitive from a vertex data buffer in the GPU display memory according to at least one vertex index corresponding to each primitive, the vertex index relationship, and the second stored information; Performing data integration on all vertex data of each of the graphic primitives to form graphic primitive information of each of the graphic primitives; The primitive information of each primitive is sent to a GPU pipeline module, so that the GPU pipeline module performs a rendering task for the rendering instruction based on the primitive information of each primitive.

2. The device according to claim 1, characterized in that The preprocessing module is also used to add an element identifier to the element information of each element during the data integration process, and also sends the element information of each element to the debugging module so that the debugging module can display the corresponding element log based on the element identifier of each element.

3. The device according to claim 2, characterized in that The device further includes the debugging module, The debugging module is configured to receive and record the graphic element information of each graphic element from the pre-processing module; and When a query request for a primitive to be checked is received, the processing progress of the primitive to be checked is obtained from the GPU pipeline module according to the primitive identifier to be checked indicated in the query request, and a corresponding primitive log is generated and displayed according to the processing progress of the primitive to be checked; The metadata log is displayed in JSON format.

4. The device according to claim 1, characterized in that The first storage information includes an index number, an index bit width, and a first starting address of the vertex index buffer. wherein, acquiring vertex index information from a vertex index buffer of a GPU display memory according to the first storage information, wherein the vertex index information includes a plurality of vertex indexes, comprises: acquiring vertex index information from a vertex index buffer of a GPU display memory indicated by the first starting address; The method further comprises dividing the multiple vertex indexes in the vertex index information according to the topological structure and the first storage information to obtain at least one vertex index corresponding to each primitive in the rendering instruction, including dividing the multiple vertex indexes in the vertex index information according to the topological structure, the index number and the index bit width to obtain at least one vertex index corresponding to each primitive in the rendering instruction.

5. The device according to claim 4, characterized in that The second storage information includes a vertex number, a vertex bit width, and a second starting address of the vertex data buffer; the vertex index relationship represents a correspondence between a vertex index and vertex data through a correspondence between an index number and a vertex number; The method of obtaining, from a vertex data buffer in a display memory of the GPU, vertex data corresponding to each of the graphics primitives based on at least one vertex index corresponding to each of the graphics primitives, the vertex index relationship, and the second storage information, includes: Determining the vertex number of each vertex data corresponding to each primitive according to the index number of each vertex index corresponding to each primitive and the vertex index relationship; Determining, according to the vertex number and the vertex bit width of each vertex data corresponding to each primitive, an offset address of each vertex data corresponding to each primitive relative to the second starting address; According to the offset address of each vertex data corresponding to each primitive and the second starting address, each vertex data corresponding to each primitive is obtained from the vertex data buffer in the GPU display memory.

6. The device according to claim 1, characterized in that At least one split identifier and / or end identifier is set in the vertex index information, and each split identifier is set between the corresponding vertex indices in the vertex index information. The split identifier is used to indicate the position in the vertex index information where the split algorithm needs to be reset before continuing the vertex index splitting, and the end identifier is used to indicate the position in the vertex index information where the vertex index splitting needs to be ended.

7. The device according to claim 1, characterized in that The pre-processing module accesses the GPU display memory through a storage module interface, and the storage module interface is pre-modeled for the GPU that needs to be verified.

8. The device according to claim 1, characterized in that The pre-processing module is formed by pre-modeling the functions of the GPU that needs to be verified.

9. A GPU primitive preprocessing system, characterized in that: The system includes: a GPU primitive preprocessing device, a GPU display memory, and a GPU pipeline module; The preprocessing module in the GPU primitive preprocessing device performs the following steps: Receive a rendering instruction from the GPU instruction front end, and obtain state information and a vertex index relationship corresponding to the rendering instruction, the state information including first storage information of the vertex index, a topological structure indicating an arrangement of the vertex index, and second storage information of the vertex data, the vertex index relationship being used to indicate a correspondence between the vertex index and the vertex data of the same vertex; Acquire vertex index information from a vertex index buffer of a GPU display memory according to the first storage information, where the vertex index information includes a plurality of vertex indices; Segmenting the plurality of vertex indexes in the vertex index information according to the topological structure and the first stored information to obtain at least one vertex index corresponding to each primitive in the rendering instruction; Acquire each vertex data corresponding to each primitive from a vertex data buffer in the GPU display memory according to at least one vertex index corresponding to each primitive, the vertex index relationship, and the second stored information; Performing data integration on all vertex data of each of the graphic primitives to form graphic primitive information of each of the graphic primitives; Sending the primitive information of each primitive to a GPU pipeline module; The GPU pipeline module is used to execute the rendering task for the rendering instruction based on the primitive information of each primitive.

10. A GPU primitive preprocessing method, characterized in that: The method is applied to a GPU primitive preprocessing device, the device comprising a preprocessing module, and the method comprises controlling the preprocessing module to perform the following steps: Receive a rendering instruction from the GPU instruction front end, and obtain state information and a vertex index relationship corresponding to the rendering instruction, the state information including first storage information of the vertex index, a topological structure indicating an arrangement of the vertex index, and second storage information of the vertex data, the vertex index relationship being used to indicate a correspondence between the vertex index and the vertex data of the same vertex; Acquire vertex index information from a vertex index buffer of a GPU display memory according to the first storage information, where the vertex index information includes a plurality of vertex indices; Segmenting the plurality of vertex indexes in the vertex index information according to the topological structure and the first stored information to obtain at least one vertex index corresponding to each primitive in the rendering instruction; Acquire each vertex data corresponding to each primitive from a vertex data buffer in the GPU display memory according to at least one vertex index corresponding to each primitive, the vertex index relationship, and the second stored information; Performing data integration on all vertex data of each of the graphic primitives to form graphic primitive information of each of the graphic primitives; The primitive information of each primitive is sent to a GPU pipeline module, so that the GPU pipeline module performs a rendering task for the rendering instruction based on the primitive information of each primitive.

11. A GPU primitive preprocessing device, characterized in that: include: processor; a memory for storing processor-executable instructions; Wherein, the processor is configured to implement the method of claim 10 when executing the instructions stored in the memory.

12. A non-volatile computer-readable storage medium having computer program instructions stored thereon, characterized in that: When the computer program instructions are executed by a processor, the method according to claim 10 is implemented.

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