Array substrate, preparation method thereof and display panel

Abstract

The application provides an array substrate, a preparation method thereof and a display panel. The array substrate comprises a substrate, a metal wiring layer arranged on one surface of the substrate and comprising a plurality of metal wires arranged at intervals, and a dielectric layer arranged on a side of the metal wiring layer away from the substrate. The dielectric layer comprises a plurality of isolation portions arranged at intervals and a plurality of covering portions arranged at intervals. The covering portions cover the metal wires, and the plurality of covering portions and the plurality of isolation portions are arranged alternately. The isolation portions and the covering portions define first channels therebetween. The dielectric layer is divided into the covering portions and the isolation portions. The adjacent two covering portions covered with the metal wires are isolated by the isolation portions, and the channels are formed between the covering portions and the isolation portions. The carbonized particles generated by laser cutting are isolated, and the risk of short circuit of the lines caused by the connection of the adjacent metal wires through the carbonized particles is reduced.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of display, in particular to an array substrate, a preparation method thereof and a display panel. BACKGROUND

[0002] In the related art, one of the processes in the preparation process of the display panel is to perform laser cutting on a large-size array substrate to obtain a plurality of small-size array substrates. The substrate at the laser cutting position is carbonized to generate carbonized particles, and the carbonized particles are attached to the cutting surface of the array substrate, causing the metal traces in the array substrate to be short-circuited, resulting in display abnormalities of the display panel. SUMMARY

[0003] Therefore, the present application provides an array substrate, a preparation method thereof and a display panel to solve the problem that the array substrate is prone to short circuit.

[0004] The technical scheme adopted by the present application to solve the above technical problems is as follows:

[0005] In a first aspect, an embodiment of the present application provides an array substrate, comprising:

[0006] a substrate;

[0007] a metal trace layer disposed on a surface of the substrate and comprising a plurality of metal lines arranged at intervals;

[0008] a dielectric layer disposed on a side of the metal trace layer away from the substrate;

[0009] wherein the dielectric layer comprises a plurality of isolation portions arranged at intervals and a plurality of covering portions arranged at intervals, the covering portions cover the metal lines, the plurality of covering portions and the plurality of isolation portions are arranged alternately, and the isolation portions and the covering portions define first channels therebetween.

[0010] In some embodiments of the present application, the isolation portions comprise a plurality of isolation columns arranged at intervals, and the first channels are defined between the plurality of isolation columns and between the isolation columns and the covering portions.

[0011] In some embodiments of the present application, the substrate is provided with a plurality of second channels, and the second channels correspond to and communicate with the first channels one by one.

[0012] In some embodiments of the present application, the substrate comprises:

[0013] a first substrate;

[0014] a first barrier layer disposed on a side of the first substrate facing the metal trace layer;

[0015] a second sub-substrate disposed on a side of the first barrier layer facing away from the first sub-substrate;

[0016] a second barrier layer disposed on a side of the second sub-substrate facing away from the first sub-substrate, the metal trace layer disposed on a side of the second barrier layer facing away from the first sub-substrate, and the second barrier layer having a plurality of second channels.

[0017] In some embodiments of the present application, the surface of the isolation column has a plurality of first grooves.

[0018] In some embodiments of the present application, the surface of the isolation column is wavy.

[0019] In some embodiments of the present application, the surface of the covering portion has a plurality of second grooves.

[0020] In some embodiments of the present application, the surface of the substrate has a plurality of third grooves.

[0021] In a second aspect, embodiments of the present application provide a method for manufacturing an array substrate, comprising:

[0022] disposing a metal trace layer on a substrate, the metal trace layer comprising a plurality of metal lines arranged at intervals;

[0023] forming a dielectric layer on a side of the metal trace layer facing away from the substrate;

[0024] disposing a photomask on a side of the dielectric layer facing away from the substrate, irradiating a surface of the dielectric layer facing the photomask with an exposure machine, and etching the dielectric layer after exposure to pattern the dielectric layer, the patterned dielectric layer comprising a plurality of isolation portions and a plurality of covering portions arranged at intervals, the covering portions covering the metal lines, the plurality of covering portions and the plurality of isolation portions arranged alternately, and the isolation portions and the covering portions defining first channels therebetween.

[0025] In a third aspect, embodiments of the present application provide a display panel comprising the array substrate of the first aspect or the array substrate manufactured by the manufacturing method of the second aspect.

[0026] In summary, due to the adoption of the above technical solutions, the present application has at least the following beneficial effects:

[0027] The embodiment of the present application provides an array substrate and a preparation method thereof and a display panel, which mainly separate a dielectric layer into a covering part and an isolation part, isolate two adjacent covering parts covered with metal wires by the isolation part, form a channel between the covering part and the isolation part, isolate carbonized particles generated by laser cutting, and reduce the risk of short circuit of the adjacent metal wires caused by the carbonized particles. In detail, first, the covering part is used to cover and insulate the metal wires, so as to avoid the short circuit between the adjacent metal wires; then, the isolation part is used to isolate the adjacent metal wires, so as to increase the difficulty of connecting and conducting the adjacent metal wires by the carbonized particles generated by laser cutting, thereby reducing the risk of short circuit of the metal wires; and finally, the covering part and the isolation part are arranged at intervals, so that a channel is formed between the covering part and the isolation part, the carbonized particles generated by laser cutting are attached to the channel, and the carbonized particles need to turn over the isolation part and pass through the channel defined by the isolation part and the covering part on both sides of the isolation part to connect and conduct the adjacent metal wires, which is equivalent to increasing the distance of the carbonized particles connecting the adjacent metal wires, so as to prevent the short circuit of the metal wires caused by the attachment of the carbonized particles, and improve the reliability of the array substrate. BRIEF DESCRIPTION OF DRAWINGS

[0028] Figure 1 A schematic diagram of an array substrate provided by the embodiment of the present application;

[0029] Figure 2 A flowchart of a preparation method of an array substrate provided by the embodiment of the present application.

[0030] REFERENCE SIGNS:

[0031] 100, array substrate; 110, substrate; 111, first sub-substrate; 112, first barrier layer; 113, second sub-substrate; 114, second barrier layer; 1141, second channel; 120, metal wiring layer; 121, metal wire; 130, dielectric layer; 131, isolation part; 1311, isolation column; 132, covering part; 133, first channel. DETAILED DESCRIPTION

[0032] The technical solutions in the embodiments of the present application will be described below with reference to the drawings in the embodiments of the present application.

[0033] In the description of the present application, it should be understood that the words "first", "second" are only used for description purpose, and cannot be understood as indicating or implying relative importance or indicating the number of the indicated technical features. Therefore, the features limited by "first", "second" can explicitly or implicitly include one or more features. In the description of the present application, the meaning of "multiple" is two or more, unless otherwise specifically limited.

[0034] In this application, the word "exemplary" is used to mean "serving as an example, instance, or illustration." Any embodiment described as exemplary in this application is not necessarily to be construed as preferred or advantageous over other embodiments.

[0035] See Figure 1 The embodiments of the present application provide an array substrate 100, comprising:

[0036] a substrate 110;

[0037] a metal wiring layer 120 arranged on a surface of the substrate 110, and the metal wiring layer 120 comprises a plurality of metal wires 121 arranged at intervals;

[0038] a dielectric layer 130 arranged on a side of the metal wiring layer 120 away from the substrate 110;

[0039] The dielectric layer 130 comprises a plurality of isolation portions 131 arranged at intervals and a plurality of covering portions 132 arranged at intervals, the covering portions 132 cover the metal wires 121, and the plurality of covering portions 132 and the plurality of isolation portions 131 are alternately arranged at intervals, so that the first channels 133 are defined between the isolation portions 131 and the covering portions 132.

[0040] The technical scheme provided by the present application is mainly to separate the dielectric layer 130 into the covering portions 132 and the isolation portions 131, use the isolation portions 131 to isolate the adjacent two covering portions 132 covered with the metal wires 121 and form channels between the covering portions 132 and the isolation portions 131, isolate the carbonized particles generated due to laser cutting, and reduce the risk of short circuit of the adjacent metal wires 121 caused by the carbonized particles. In detail, first, the covering portions 132 are used to cover the metal wires 121 to form insulation protection, so as to avoid connection short circuit between the adjacent metal wires 121; then, the isolation portions 131 are used to isolate the adjacent metal wires 121, so as to increase the difficulty of connection and conduction of the adjacent metal wires 121 caused by the carbonized particles generated due to laser cutting, thereby reducing the risk of short circuit of the metal wires 121; and by arranging the covering portions 132 and the isolation portions 131 at intervals, the channels are formed between the covering portions 132 and the isolation portions 131, the carbonized particles generated due to laser cutting are attached in the channels, and a plurality of carbonized particles need to pass through the isolation portions 131 and the channels defined by the covering portions 132 on both sides of the isolation portions 131 to realize the conduction of the adjacent metal wires 121, which is equivalent to increasing the distance of the carbonized particles connecting the adjacent metal wires 121, so as to achieve the purpose of preventing the attachment of the carbonized particles from causing the short circuit of the metal wires 121, and improve the reliability of the array substrate 100.

[0041] In some embodiments, the isolation portion 131 comprises a plurality of isolation columns 1311 arranged at intervals, and the first channels 133 are defined between the plurality of isolation columns 1311 and between the isolation columns 1311 and the covering portion 132. It should be noted that the length of the isolation columns 1311 is not less than the length of the metal lines 121 on both sides of the isolation columns 1311, so that the length of the first channels 133 defined by the isolation columns 1311 is greater than or equal to the length of the metal lines 121, ensuring that the isolation columns 1311 are arranged at each position between adjacent metal lines 121, and the difficulty of connecting the adjacent metal lines 121 by the carbonized particles is improved. In the present embodiment, the channels are formed between the covering portion 132 and the isolation portion 131, so that the carbonized particles generated by laser cutting can be attached to the channels. Connecting the adjacent metal lines 121 by the carbonized particles needs to pass through the first channels 133 defined by the isolation portion 131 and the covering portion 132 and the first channels 133 defined between the plurality of isolation columns 1311, so that the path of the carbonized particles connecting the adjacent metal lines 121 is lengthened, thereby effectively preventing short circuit and improving the reliability of the array substrate 100.

[0042] Further, the substrate 110 is provided with a plurality of second channels 1141, and the second channels 1141 correspond to and communicate with the first channels 133. Since the carbonized particles are formed during laser cutting, they are not only dispersed on the cutting surface of the dielectric layer 130, but also dispersed on the cutting surface of the substrate 110, that is, the first channels 133 in the foregoing embodiments can effectively lengthen the path of the carbonized particles connecting the adjacent metal lines 121 on the cutting surface of the dielectric layer 130, but there is still a risk that the carbonized particles connect the adjacent metal lines 121 on the cutting surface of the substrate 110. Therefore, by providing the second channels 1141 on the substrate 110, the carbonized particles dispersed on the cutting surface of the substrate 110 can be attached to the second channels 1141, and connecting the adjacent metal lines 121 by the carbonized particles needs to pass through the second channels 1141, so that the path of the carbonized particles connecting the adjacent metal lines 121 is lengthened, thereby effectively preventing short circuit and improving the reliability of the array substrate 100. In addition, by setting the second channels 1141 to correspond to and communicate with the first channels 133, the first channels 133 and the second channels 1141 are combined to form channels with more complex paths, which improves the difficulty of connecting the metal lines 121 by the carbonized particles, and the one-to-one correspondence and communication between the first channels 133 and the second channels 1141 are simpler in the forming process, only one photomask and one etching are needed, thereby saving cost and improving process efficiency.

[0043] In some embodiments, the substrate 110 comprises:

[0044] a first sub-substrate 111;

[0045] a first barrier layer 112 arranged on a side of the first sub-substrate 111 facing the metal wiring layer 120.

[0046] A second sub-substrate 113 is arranged on the side of the first barrier layer 112 away from the first sub-substrate 111;

[0047] A second barrier layer 114 is arranged on the side of the second sub-substrate 113 away from the first sub-substrate 111, and the metal trace layer 120 is arranged on the side of the second barrier layer 114 away from the first sub-substrate 111, and the second barrier layer 114 is provided with a plurality of second channels 1141.

[0048] In this embodiment, by arranging the substrate 110 as a multi-layer structure, the array substrate 100 has higher mechanical strength during manufacturing and use, can resist various mechanical stresses, and reduces the possibility of substrate cracking and deformation. The materials of the first barrier layer 112 and the second barrier layer 114 can be silicon nitride or silicon oxide, and in this embodiment, silicon nitride is preferred. The first barrier layer 112 and the second barrier layer 114 both have good diffusion prevention performance, which can effectively prevent metal ions from diffusing to the substrate 110. In addition, the second barrier layer 114 also prevents the material of the second sub-substrate 113 from contaminating the metal trace layer 120, thereby improving the purity and stability of the metal trace layer 120. Through the communication design of the first channels 133 and the second channels 1141, the attachment path of the carbonized particles between the metal trace layer 120 becomes more complex and tortuous, thereby increasing the difficulty of the carbonized particles connecting adjacent metal lines 121. The isolation column 1311 provides physical isolation, and the first channels 133 and the second channels 1141 provide electrical isolation and the function of capturing carbonized particles, further reducing the risk of short circuit.

[0049] In some embodiments, the surface of the isolation column 1311 is provided with a plurality of first grooves. By providing the first grooves on the surface of the isolation column 1311, the first grooves can provide additional surface area, making it easier for carbonized particles to be captured and fixed. By increasing the capture position, the first grooves effectively reduce the possibility of carbonized particles moving freely in the channel, thereby reducing the risk of short circuit, and also increasing the difficulty of carbonized particles connecting adjacent metal lines 121. It should be noted that the formation of the first grooves is achieved by forming a plurality of holes inside the dielectric layer 130, similar to a honeycomb structure. When the dielectric layer 130 is cut, the cutting surface will form a plurality of first grooves. During the cutting process, some carbonized particles will be adsorbed into the first grooves.

[0050] In some embodiments, the surface of the isolation column 1311 is wavy, which is beneficial to increase the surface area of the isolation column 1311, prolong the path of the carbonized particles connecting between adjacent metal lines 121, increase the difficulty of the carbonized particles connecting adjacent metal lines 121, and reduce the probability of short circuit risk occurring.

[0051] In some embodiments, a plurality of second grooves are provided on the surface of the covering portion 132. The second grooves are provided on the surface of the covering portion 132, and the second grooves can provide additional surface area, making it easier for the carbonized particles to be captured and fixed. By increasing the capture position, the second grooves effectively reduce the possibility of the carbonized particles moving freely in the channel, thereby reducing the risk of short circuits, and also increasing the difficulty of the carbonized particles connecting adjacent metal wires 121. It should be noted that the second grooves are formed by forming a plurality of holes inside the dielectric layer 130, similar to a honeycomb structure. When the dielectric layer 130 is cut, a plurality of second grooves will be formed on the cutting surface. During the cutting process, some of the carbonized particles will be adsorbed into the second grooves.

[0052] In some embodiments, the surface of the substrate 110 is provided with multiple third grooves. Similarly, the third grooves provided on the surface of the substrate 110 provide additional surface area, making it easier for carbonized particles to be captured and fixed. By increasing the number of capture locations, the third grooves effectively reduce the possibility of carbonized particles moving freely within the channel, thereby reducing the risk of short circuits and increasing the difficulty of carbonized particles connecting adjacent metal lines 121. It should be noted that the third grooves are formed by forming multiple holes within the substrate 110, similar to a honeycomb structure. When the substrate 110 is cut, multiple third grooves are formed on the cut surface. During the cutting process, some carbonized particles are attracted to the third grooves. Because the substrate 110 also needs to provide support and maintain mechanical strength, the third grooves are only formed in the portion of the substrate 110 near the metal routing layer 120 to ensure a certain degree of mechanical strength. In other words, the multiple holes are formed only in the portion of the substrate 110 near the metal routing layer 120, similar to a honeycomb structure. In this embodiment, holes are formed in the second barrier layer 114 of the substrate 110, and the third grooves are formed after cutting.

[0053] See Figure 2 , an embodiment of the present application further provides a method for preparing an array substrate, comprising:

[0054] S1. Disposing a metal wiring layer on a substrate, wherein the metal wiring layer includes a plurality of metal wires disposed at intervals.

[0055] A layer of metal material, such as molybdenum (Mo), is deposited on a substrate, and then a plurality of spaced metal lines are formed through photolithography and etching processes. These metal lines are used to achieve electrical connections and signal transmission.

[0056] S2. Form a dielectric layer on the side of the metal wiring layer facing away from the substrate.

[0057] A layer of dielectric material, such as polyimide or silicon oxide, is deposited on the side of the metal trace layer facing away from the substrate. The dielectric layer serves to isolate and protect the metal lines from shorting and external interference.

[0058] S3. A photomask is placed on the side of the dielectric layer facing away from the substrate. The surface of the dielectric layer facing the photomask is exposed to light using an exposure machine. The exposed dielectric layer is then etched to pattern it. The patterned dielectric layer includes a plurality of spaced-apart isolation portions 131 and a plurality of spaced-apart covering portions 132. The covering portions 132 cover the metal lines. The plurality of covering portions 132 are arranged alternately with the plurality of isolation portions 131, such that the first channels 133 are defined between the isolation portions 131 and the covering portions 132.

[0059] A photomask is placed on the side of the dielectric layer 130 facing away from the substrate 110. The dielectric layer 130 is patterned using photolithography techniques. After photolithography, the dielectric layer 130 is etched to form a plurality of spaced-apart isolation portions 131 and a plurality of spaced-apart covering portions 132. The covering portions 132 cover the metal lines 121. The plurality of covering portions 132 are arranged alternately with the plurality of isolation portions 131, such that the first channels 133 are formed between the isolation portions 131 and the covering portions 132. During laser cutting, carbonized particles may be generated around the metal lines 121. By forming the first channels 133 in the dielectric layer 130, the carbonized particles are confined within these channels and cannot freely move and connect adjacent metal lines 121, effectively reducing the risk of short circuit caused by carbonized particles. The covering portions 132 cover the metal lines 121, forming an insulating protection layer that prevents external impurities or carbonized particles from directly contacting the metal lines 121, reducing the risk of short circuit. The isolation portions 131 separate adjacent metal lines 121, further increasing the difficulty of carbonized particles connecting adjacent metal lines 121, thereby improving electrical reliability.

[0060] In this embodiment, the first channels 133 are formed using MCD (Multi-Chip Display) MASK. MCD MASK refers to a multi-layer mask used in photolithography processes. It can be used to manufacture complex integrated circuits and microstructures in displays. Each layer of the mask corresponds to a specific pattern. These patterns are accurately aligned in multiple layers to form the final circuit or display structure. The patterning process includes:

[0061] Computer-aided design software (CAD) is used to generate patterns for each layer. These patterns define the layout of materials such as metal lines 121, insulating layers, and semiconductor regions.

[0062] The mask is made according to the CAD patterns. The mask is usually composed of a quartz substrate and a photoresist layer on top, which is exposed to an electron beam or laser to create patterns.

[0063] A layer of photoresist is coated on the substrate, and then the pattern on the mask is transferred to the photoresist layer by a photoetching machine. After the photoresist is developed, the pattern is revealed.

[0064] Unwanted material is removed by an etching process, or new material is added by a deposition process, to form the desired structure. After the patterning of each layer is completed, multiple layers are stacked to form a complex multilayer structure.

[0065] In this embodiment, the mask covers the dielectric layer 130, and a through hole is formed in the position of the mask that is aligned with the two adjacent metal wires 121, so that during the etching process, the mask can only protect the dielectric layer 130 at the position that is not aligned with the two adjacent metal wires 121, and the aligned part is etched away, so that the dielectric layer 130 forms multiple isolation columns 1311 and multiple covering parts 132. The MCD MASK can achieve sub-micron level accuracy, so that the microstructure can be accurately aligned, and is suitable for the manufacture of high-density circuits.

[0066] The embodiment of the present application also provides a display panel, which comprises the array substrate 100 described in any one of the foregoing embodiments, so that the display panel has good electrical stability and reliability during the cutting process and is not affected by carbonized particles to cause short circuit.

[0067] Meanwhile, specific words are used in the present application to describe the embodiments of the present application. As "one embodiment", "an embodiment", and / or "some embodiments" mean a certain feature, structure or characteristic related to at least one embodiment of the present application. Therefore, it should be emphasized and noted that the "one embodiment" or "one embodiment" or "one alternative embodiment" mentioned in different positions in the specification does not necessarily refer to the same embodiment. In addition, some features, structures or characteristics in one or more embodiments of the present application can be properly combined.

[0068] Similarly, it should be noted that, in order to simplify the expression of the disclosure of the present application and to help understand one or more embodiments of the application, in the foregoing description of the embodiments of the present application, various features are sometimes combined into one embodiment, figure or description thereof. However, this method of disclosure does not mean that the features required by the present application are more than the features mentioned in the claims. In fact, the features of the embodiment are less than all the features of the disclosed single embodiment.

Claims

1. An array substrate, characterized in that: The array substrate is configured to form a plurality of sub-array substrates by laser cutting, and the array substrate includes: substrate; A metal wiring layer is provided on a surface of the substrate and includes a plurality of metal wires arranged at intervals; a dielectric layer, disposed on a side of the metal wiring layer facing away from the substrate; The dielectric layer includes a plurality of spaced-apart isolation portions and a plurality of spaced-apart covering portions, the covering portions cover the metal wires, the covering portions and the isolation portions are alternately arranged, and a first channel is defined between the isolation portions and the covering portions.

2. The array substrate according to claim 1, wherein: The isolation portion includes a plurality of isolation columns arranged at intervals, and the first channel is defined between the plurality of isolation columns and between the isolation columns and the covering portion.

3. The array substrate according to claim 2, wherein: The substrate is provided with a plurality of second channels, and the second channels correspond to and communicate with the first channels one by one.

4. The array substrate according to claim 3, wherein: The substrate comprises: a first sub-substrate; a first barrier layer, provided on a side of the first sub-substrate facing the metal wiring layer; a second sub-substrate, disposed on a side of the first barrier layer facing away from the first sub-substrate; The second barrier layer is provided on a side of the second sub-substrate away from the first sub-substrate, the metal wiring layer is provided on a side of the second barrier layer away from the first sub-substrate, and the second barrier layer is provided with a plurality of the second channels.

5. The array substrate according to any one of claims 2 to 4, wherein: A plurality of first grooves are formed on the surface of the isolation column.

6. The array substrate according to any one of claims 2 to 4, wherein: The surface of the isolation column is wavy.

7. The array substrate according to any one of claims 1 to 4, wherein: A plurality of second grooves are formed on the surface of the covering portion.

8. The array substrate according to any one of claims 1 to 4, wherein: A plurality of third grooves are formed on the surface of the substrate.

9. A method for preparing an array substrate, characterized in that: include: A metal wiring layer is provided on the substrate, wherein the metal wiring layer includes a plurality of metal wires arranged at intervals; forming an initial dielectric layer on a side of the metal wiring layer facing away from the substrate; A photomask is provided on a side of the initial dielectric layer facing away from the substrate, an exposure machine is used to irradiate the surface of the initial dielectric layer facing the photomask, and the exposed initial dielectric layer is etched to pattern the initial dielectric layer and form a dielectric layer, wherein the dielectric layer includes a plurality of spaced-apart isolation portions and a plurality of spaced-apart covering portions, the covering portions covering the metal wires, the plurality of covering portions and the plurality of isolation portions being alternately arranged, and a first channel being defined between the isolation portions and the covering portions; the dielectric layer, the metal wiring layer, and the substrate together constitute an array substrate, and the array substrate is configured to form a plurality of sub-array substrates by laser cutting.

10. A display panel, characterized in that: The invention comprises the array substrate according to any one of claims 1 to 8 or the array substrate prepared by the preparation method according to claim 9.

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