Non-polar CAN communication circuit, communication method, device, air conditioner and readable medium

Abstract

The present application relates to a non-polar CAN communication circuit, a communication method, a device, an air conditioner and a readable medium. The non-polar CAN communication circuit includes a first transceiver, a second transceiver, a first switch circuit, a second switch circuit and a main chip. In the present application, the two transceivers are always in a continuous working state. The main chip applies a control signal to the switch circuit to select one of the two transceivers to connect to the main chip, so that no matter what polarity the CAN communication bus is, there is no need to switch the transceiver to receive the data frame of the corresponding polarity. Instead, the two transceivers are always in a working state. No matter what polarity the CAN communication bus is, there is a transceiver that can receive the data frame. Then, it is only necessary to switch the data channel between the two transceivers and the main chip to pass the data frame to the main chip, thereby realizing non-polar communication and solving the technical problem that both transceivers cannot work normally, resulting in abnormal communication.

Description

Technical Field

[0001] The present application relates to the field of CAN communication technology, and in particular to a non-polar CAN communication circuit, a communication method, a device, an air conditioner and a readable medium. Background Art

[0002] With the increasing popularity of multi-split air conditioners, due to the various excellent characteristics of CAN communication, the proportion of CAN communication in multi-split unit communication is increasing. In order to simplify the unit communication wiring at the project site, the network units are usually required to support non-polarity communication, that is, there is no need to ensure the absolute correspondence between the wiring between the units. The units automatically identify the current communication network CAN communication polarity. In order to achieve non-polarity communication, many communication schemes use two CAN transceivers, whose differential signal ends are reversed, and their output signals are connected together to enter the main chip CAN controller. Only one of the two transceiver chips remains in working state at any time, thereby achieving the effect of non-polarity communication. In the actual project site, the above scheme is affected by the interference of the differential bus and the limitation of the working principle of the CAN transceiver itself, resulting in a certain small probability that both transceivers cannot work normally, resulting in abnormal communication.

[0003] Currently, no effective solution has been proposed to solve the problem of abnormal communication caused by both transceivers failing to work properly. Summary of the invention

[0004] The present application provides a non-polarity CAN communication circuit, communication method, device, air conditioner and readable medium to solve the technical problem that two transceivers cannot work normally and cause communication abnormality.

[0005] According to one aspect of an embodiment of the present application, the present application provides a non-polarity CAN communication circuit, which includes a first transceiver, a second transceiver, a first switching circuit, a second switching circuit and a main chip, wherein: the first transceiver and the second transceiver have opposite polarities and are in working state at the same time, and are used to receive data frames transmitted by a differential bus of a CAN communication network with different polarities, and transmit the data frames to the main chip; the first switching circuit is connected to the first transceiver, and is used to control the conduction or cutoff of a first data channel between the first transceiver and the main chip; the second switching circuit is connected to the second transceiver, and is used to control the conduction or cutoff of a second data channel between the second transceiver and the main chip; the main chip is respectively connected to the first switching circuit and the second switching circuit, and is used to send a control signal to drive the first switching circuit and the second switching circuit to operate.

[0006] Optionally, the CAN high-order pin of the first transceiver is connected to the CAN bus high-order of the CAN communication network differential bus, the CAN low-order pin of the first transceiver is connected to the CAN bus low-order of the CAN communication network differential bus, the CAN high-order pin of the second transceiver is connected to the CAN bus low-order of the CAN communication network differential bus, and the CAN low-order pin of the second transceiver is connected to the CAN bus high-order of the CAN communication network differential bus.

[0007] Optionally, the first switching circuit includes a first switching tube, a first end of the first switching tube is connected to the output end of the first transceiver, a second end of the first switching tube is connected to the input end of the main chip, and a control end of the first switching tube is connected to the control signal output end of the main chip. The first switching tube is used to shut down when the control end receives a low-level signal to block the data channel between the first transceiver and the main chip, or to turn on when the control end receives a high-level signal to turn on the data channel between the first transceiver and the main chip.

[0008] Optionally, the second switching circuit includes a second switching tube, a first end of the second switching tube is connected to the output end of the second transceiver, a second end of the second switching tube is connected to the input end of the main chip, and a control end of the second switching tube is connected to the control signal output end of the main chip. The second switching tube is used to be turned off when the control end receives a low-level signal to block the data channel between the second transceiver and the main chip, or to be turned on when the control end receives a high-level signal to turn on the data channel between the second transceiver and the main chip.

[0009] Optionally, the control end of the first switch tube and the control end of the second switch tube receive opposite level signals at the same time.

[0010] Optionally, the non-polar CAN communication circuit also includes a level switching circuit, including: a first resistor, one end of which is connected to the control signal output end of the main chip, and the other end is connected to the control end of the transistor; the transistor, the first end is connected to the control end of the second switch tube, and the second end is grounded; a second resistor, one end of which is connected to the power supply, and the other end is connected to the first end of the transistor; a third switch tube, the control end is connected to the output end of the second switch tube, the first end is connected to the power supply, and the second end is connected to the control end of the first switch tube; a third resistor, one end of which is connected to the second end of the third switch tube, and the other end is grounded.

[0011] Optionally, the level switching circuit is used to, when the control signal output terminal of the main chip outputs a high level, turn on the transistor to pull the control end of the second switch tube to a low level, and turn off the third switch tube to pull the control end of the first switch tube to a high level; or, when the control signal output terminal of the main chip outputs a low level, turn off the transistor to pull the control end of the second switch tube to a high level, and turn on the third switch tube to pull the control end of the first switch tube to a low level.

[0012] According to another aspect of an embodiment of the present application, the present application provides a non-polarity CAN communication method, which is applied to the above-mentioned non-polarity CAN communication circuit, including: switching the high and low levels of the control signal applied to the first switch circuit and the second switch circuit according to a preset time interval to alternately select the first data channel or the second data channel to be turned on, wherein the first data channel is the data channel between the first transceiver and the main chip, and the second data channel is the data channel between the second transceiver and the main chip, the first switch circuit is used to control the conduction or cutoff of the first data channel, and the second switch circuit is used to control the conduction or cutoff of the second data channel, and the first transceiver and the second transceiver have opposite polarities and are in working state at the same time; when a data frame is received through the first data channel or the second data channel, and the content of the data frame matches the communication protocol, the current level of the control signal is fixedly maintained to continuously turn on the current data channel until the time when the current data channel does not receive the data frame reaches a preset time threshold, and the high and low levels of the control signal continue to be switched according to the preset time interval.

[0013] According to another aspect of an embodiment of the present application, the present application provides a non-polarity CAN communication device, which is applied to the above-mentioned non-polarity CAN communication circuit, including: a data channel selection module, which is used to switch the high and low levels of the control signal applied to the first switch circuit and the second switch circuit according to a preset time interval to alternately select the first data channel or the second data channel to be turned on, wherein the first data channel is a data channel between the first transceiver and the main chip, and the second data channel is a data channel between the second transceiver and the main chip, the first switch circuit is used to control the conduction or cutoff of the first data channel, and the second switch circuit is used to control the conduction or cutoff of the second data channel, and the first transceiver and the second transceiver have opposite polarities and are in working state at the same time; a data channel holding module, which is used to fix and maintain the current level of the control signal to continuously turn on the current data channel when a data frame is received through the first data channel or the second data channel, and the content of the data frame matches the communication protocol, until the time when the current data channel does not receive the data frame reaches a preset time threshold, and then continue to switch the high and low levels of the control signal according to the preset time interval.

[0014] According to another aspect of an embodiment of the present application, the present application provides an air conditioner, including a memory, a processor, a communication interface and a communication bus, the memory stores a computer program that can be run on the processor, the memory and the processor communicate through the communication bus and the communication interface, and the steps of the above method are implemented when the processor executes the computer program.

[0015] According to another aspect of an embodiment of the present application, the present application also provides a computer-readable medium having a non-volatile program code executable by a processor, and the program code enables the processor to execute the above method.

[0016] The above technical solution provided by the embodiment of the present application has the following advantages compared with the related art:

[0017] The present application provides a non-polarity CAN communication circuit, which includes a first transceiver, a second transceiver, a first switch circuit, a second switch circuit and a main chip, wherein: the first transceiver and the second transceiver have opposite polarities and are in working state at the same time, and are used to receive data frames transmitted by a differential bus of a CAN communication network with different polarities, and transmit the data frames to the main chip; the first switch circuit is connected to the first transceiver, and is used to control the conduction or cutoff of a first data channel between the first transceiver and the main chip; the second switch circuit is connected to the second transceiver, and is used to control the conduction or cutoff of a second data channel between the second transceiver and the main chip; the main chip is respectively connected to the first switch circuit and the second switch circuit, and is used to send a control signal to drive the first switch circuit and the second switch circuit to operate. In the present application, the two transceivers are always in a continuous working state. The main chip applies a control signal to the switching circuit to select one of the two transceivers to connect to the main chip, so that no matter what the polarity of the CAN communication bus is, there is no need to switch the transceiver to receive the data frame of the corresponding polarity. Instead, the two transceivers always remain in a working state. No matter what the polarity of the CAN communication bus is, there is a transceiver that can receive the data frame. Therefore, it is only necessary to switch the data channel between the two transceivers and the main chip to pass the data frame to the main chip, thereby realizing non-polarity communication and solving the technical problem of communication abnormality caused by the two transceivers not being able to work normally. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the present application and, together with the description, serve to explain the principles of the present application.

[0019] In order to more clearly illustrate the technical solutions in the embodiments of the present application or the related technologies, the drawings required for use in the embodiments or the related technical descriptions are briefly introduced below. Obviously, for ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative labor.

[0020] Figure 1 A schematic diagram of an optional non-polarity CAN communication circuit structure provided according to an embodiment of the present application;

[0021] Figure 2 It is a schematic diagram of the central control board circuit of a commercial air conditioner in the related art;

[0022] Figure 3 This is the internal schematic diagram of the transceiver chip;

[0023] Figure 4 A schematic diagram of an optional non-polarity CAN communication circuit provided according to an embodiment of the present application;

[0024] Figure 5 A schematic diagram of an optional level switching circuit provided according to an embodiment of the present application;

[0025] Figure 6 A schematic flow chart of an optional non-polarity CAN communication method provided according to an embodiment of the present application;

[0026] Figure 7 A block diagram of an optional non-polarity CAN communication device provided according to an embodiment of the present application;

[0027] Figure 8 A schematic diagram of an optional air conditioning structure provided in an embodiment of the present application. DETAILED DESCRIPTION

[0028] In order to make the purpose, technical solution and advantages of the embodiments of the present application clearer, the technical solution in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without making creative work are within the scope of protection of this application.

[0029] In the subsequent description, the suffixes such as "module", "component" or "unit" used to represent elements are only used to facilitate the description of the present application and have no specific meaning. Therefore, "module" and "component" can be used interchangeably.

[0030] In the related art, in order to achieve non-polarity communication, many communication solutions use two CAN transceivers, whose differential signal ends are reversed, and their output signals are connected together to enter the main chip CAN controller. Only one of the two transceiver chips remains in working state at any time, thereby achieving the effect of non-polarity communication. In the actual engineering site, the above solution is affected by the interference of the differential bus and the limitations of the working principle of the CAN transceiver itself, resulting in a small probability that both transceivers cannot work normally, resulting in abnormal communication.

[0031] In order to solve the problems mentioned in the background technology, according to one aspect of the embodiments of the present application, an embodiment of a non-polarity CAN communication circuit is provided, such as Figure 1 As shown, the non-polarity CAN communication circuit includes a first transceiver 101, a second transceiver 102, a first switch circuit 103, a second switch circuit 104 and a main chip 105, wherein:

[0032] The first transceiver 101 and the second transceiver 102 have opposite polarities and are in working state at the same time, and are used to receive data frames transmitted by the CAN communication network differential bus with different polarities, and transmit the data frames to the main chip 105;

[0033] The first switch circuit 103 is connected to the first transceiver 101 and is used to control the conduction or cutoff of the first data channel between the first transceiver 101 and the main chip 105;

[0034] The second switch circuit 104 is connected to the second transceiver 102 and is used to control the conduction or cutoff of the second data channel between the second transceiver 102 and the main chip 105;

[0035] The main chip 105 is connected to the first switch circuit 103 and the second switch circuit 104 respectively, and is used to send a control signal to drive the first switch circuit 103 and the second switch circuit 104 to operate.

[0036] In the embodiment of the present application, the main chip controls the action of the first switch circuit and the second switch circuit through a control signal, so that only one of the first data channel and the second data channel is turned on and the other is turned off at the same time, thereby selecting the output of the transceiver to be connected to the main chip, and the first transceiver and the second transceiver are always kept in working state, so there is no need to switch the working state of the transceiver, thereby avoiding occasional working abnormalities caused by circuit discharge when the transceiver is switching.

[0037] The following uses the related technology as an example to explain why the transceiver may occasionally work abnormally due to circuit discharge when switching.

[0038] In the related art, the circuit diagram of the central control board of a commercial air conditioner is as follows Figure 2 As shown, two transceivers U1 and U2 are used as non-polarity CAN. When the power is just turned on, if the polarity is normal, communication can be normal. If CANH / CANL is connected reversely, after 5 seconds, the polarity is switched by switching Q1 / Q2 and Q3 / Q4 on and off. If the correct data is not received, the MCU will send a signal to continuously switch the high and low levels of CS1, and repeatedly switch these transistors or MOS tubes.

[0039] However, in actual testing, when the switch circuit is switched to switch the working state of the transceiver, the data RXD received by the MCU is always at a high level. After switching CS1, normal communication is still not possible. The reason is that the voltage of the VIO pin of the transceiver cannot be pulled down, and the level of the RXD output is not pulled low enough, so the MCU still recognizes it as a high level. Testing the VIO of the two transceivers and the base level of the transistor or PMOS that controls the VIO voltage, it is found that the level is switching normally, but the VIO voltage of the transceiver with the transistor / PMOS turned off can only drop to 3V, and cannot drop to 0V. The reason is related to circuit discharge, such as Figure 3 As shown, RXD (receiving end of the main chip) is connected to VIO in a push-pull manner through a switch S1. When VIO is less than VUV_VIO, RXD can be considered as S1 disconnected; when VIO is greater than VUV_VIO, S1 can be considered as turned on, and the RXD state depends on control signal 1 and control signal 2. VUV_VIO is a specific voltage threshold used to describe the voltage control point on the VIO pin in the internal circuit of the CAN transceiver. Combined with Figure 2 , the two CAN transceivers U2 and U1 are directly connected, and when U1 switches to U2, U2 can quickly establish normal operation because it is strongly pulled to the power supply by Q2 and Q4; while U1's Q1 and Q3 are disconnected, its VCC and VIO current consumption slowly decreases to 0V. Therefore, U2 is already working normally, and U1's VCC and VIO have not yet decreased to 0V. During the period when RXD is at a high level (U2 is already working normally), the U1 chip has not completely powered off because VIO has not been completely powered off, and the PMOS controlled by its internal control signal 1 is turned on, VIO will be the same as the RXD voltage and will not decrease to 0V, and RXD will in turn be affected by U1. When the normally working U2 receives the dominant level of the bus and needs to pull down RXD, U1 needs to pull up RXD at this time, and the RXD voltage stays at VIO / 2, and the MCU mistakenly recognizes it as a high level, so communication abnormality occurs.

[0040] It can be seen that as long as the working state of the transceiver is switched, the main chip selects the working transceiver, and the above-mentioned occasional problem will exist. In this application, the two transceivers are always in a continuous working state, and the main chip applies a control signal to the switch circuit to select one of the two transceivers to connect to the main chip, so that no matter what polarity the CAN communication bus is, there is no need to switch the transceiver to receive the data frame of the corresponding polarity, but the two transceivers are always in a working state, no matter what polarity the CAN communication bus is, there is a transceiver that can receive the data frame, and then only the data channel between the two transceivers and the main chip needs to be switched to pass the data frame to the main chip, realizing non-polarity communication, and solving the technical problem of abnormal communication caused by the inability of the two transceivers to work normally.

[0041] In an optional embodiment, the present application may also introduce a redundancy management mechanism, that is, in addition to the two transceivers, a spare transceiver is added. When a fault is detected in the working transceiver, the system can seamlessly switch to the spare transceiver to ensure the continuity of communication. At the same time, the mechanism can also automatically diagnose the cause of the fault and report it to the maintenance personnel.

[0042] In an optional embodiment, the present application can also be combined with an intelligent power management system. When a transceiver is detected to be unused, the system can temporarily reduce the power consumption of the transceiver or even put it into sleep mode to save energy. Once it is necessary to switch to the transceiver, the system can quickly wake it up and put it into working state.

[0043] Combine the following Figure 4 The non-polarity CAN communication circuit provided by the present application is shown, and each component in the circuit is described in detail.

[0044] In an optional embodiment, if Figure 4 As shown, the CAN high pin CANH of the first transceiver U1 is connected to the CAN bus high CANH of the CAN communication network differential bus, the CAN low pin CANL of the first transceiver is connected to the CAN bus low CANL of the CAN communication network differential bus, the CAN high pin CANH of the second transceiver is connected to the CAN bus low CANL of the CAN communication network differential bus, and the CAN low pin CANL of the second transceiver is connected to the CAN bus high CANH of the CAN communication network differential bus.

[0045] In the present application embodiment, Figure 4 As shown, the first transceiver U1 and the second transceiver U2 are CAN transceiver chips, the VCC of U1 and U2 are connected to 5V to power the chip, and the VIO is connected to 3.3V. CANH and CANL are connected to the CAN communication network differential bus, wherein the CANH pin of U1 is connected to the bus CANH, and the CANL pin is connected to the bus CANL; the CANH pin of U2 is connected to the bus CANL, and the CANL pin is connected to the bus CANH, so that the polarity of the first transceiver U1 and the second transceiver U2 is opposite. When there is a data frame on the CAN differential bus, one of the chips in U1 and U2 can receive the correct data frame. Then the Rx of the transceiver that receives the correct data frame will be connected to the RXD of the main chip, and the Rx of the other transceiver will be disconnected from the RXD of the main chip. The main chip can then receive the correct data frame. That is, if the polarity of the U1 transceiver is consistent with the bus polarity, the correct data frame can be received, and the same applies to U2. If the data frame of the transceiver is inconsistent with the polarity of the bus, the data frame usually cannot be received. Even if the data frame is received, it needs to be compared with the communication protocol definition, such as the arbitration area definition, data area definition, etc.

[0046] The entire communication process between the main chip and the transceiver is as follows: After the controller is powered on, both transceivers will work. Since the differential signals input by the two transceivers are opposite, when there is a signal on the current bus, the output of one and only one transceiver will have a data frame; the main chip CAN controller first tries to connect to the output Rxd of U1. If the data frame can be received and the content of the data frame is consistent with the protocol, it can be confirmed that the polarity of U1 is consistent with the bus, and the main chip IO level will not be switched. Otherwise, the level is switched, and the CAN controller is connected to the output of U2. After a period of time, if no data frame is received, the IO level will continue to switch to connect the CAN controller to the output of U1. Until the correct data frame is received.

[0047] This application allows the CAN communication network to be installed without considering the bus polarity problem, because no matter how CANH and CANL are connected, there is always a transceiver that can normally receive the data frame.

[0048] In an optional embodiment, if Figure 4 As shown, the first switch circuit includes a first switch tube Q1, a first end of the first switch tube is connected to the output end RX of the first transceiver, a second end of the first switch tube is connected to the input end RXD of the main chip, a control end CS1 of the first switch tube is connected to the control signal output end of the main chip, and the first switch tube Q1 is used to turn off when the control end receives a low-level signal to block the data channel between the first transceiver and the main chip, or to turn on when the control end receives a high-level signal to turn on the data channel between the first transceiver and the main chip.

[0049] In an optional embodiment, if Figure 4 As shown, the second switch circuit includes a second switch tube Q2, a first end of the second switch tube Q2 is connected to the output end RX of the second transceiver, a second end of the second switch tube Q2 is connected to the input end RXD of the main chip, a control end CSN1 of the second switch tube Q2 is connected to the control signal output end of the main chip, and the second switch tube Q2 is used to turn off when the control end receives a low-level signal to block the data channel between the second transceiver and the main chip, or to turn on when the control end receives a high-level signal to turn on the data channel between the second transceiver and the main chip.

[0050] In the embodiment of the present application, the conduction and cutoff of the first switch tube Q1 and the second switch tube Q2 are both controlled by the main chip, and the control end CS1 of the first switch tube Q1 and the control end CSN1 of the second switch tube Q2 receive opposite level signals at the same time, so as to connect only the output of one transceiver to the main chip at any time.

[0051] In the embodiment of the present application, both the first switch tube Q1 and the second switch tube Q2 can be selected as NMOS tubes.

[0052] In the embodiment of the present application, the pull-up voltage sources of CS1 and CSN1 need to be 5V, so when selecting NMOS, it should be noted that VGS (TH) should not exceed 1.7V. For example, when the high level of U1 and U2 is 3.3V, VGS = 1.7V is also conductive. For example, the maximum GATE threshold voltage of model AO3400A is 1.4V.

[0053] This application controls the on and off of the switch tube through the main chip, so that the main chip can be selected to connect to one of the transceivers, and the working state of the switching transceiver is changed to the transceiver output of the main chip, so as to realize non-polarity CAN communication, and through the blocking effect of Q1 and Q2, the reliability of the communication circuit is greatly improved. It is not necessary to make one of the transceivers work by cutting off the power supply of the transceiver as in other patents, so as to avoid the abnormal RXD level problem when switching between U1 and U2.

[0054] In an optional embodiment, if Figure 5 As shown, the non-polarity CAN communication circuit also includes a level switching circuit, including:

[0055] A first resistor R1, one end of which is connected to the control signal output terminal CAN_INV_MCU of the main chip, and the other end of which is connected to the control terminal of the transistor Q3;

[0056] The transistor Q3 has a first end connected to the control end CSN1 of the second switch tube Q2 and a second end grounded;

[0057] A second resistor R2, one end of which is connected to the power supply, and the other end of which is connected to the first end of the transistor Q3;

[0058] A third switch tube Q4, a control end of which is connected to the output end CSN1 of the second switch tube Q2, a first end of which is connected to a power source, and a second end of which is connected to the control end CS1 of the first switch tube Q1;

[0059] The third resistor R3 has one end connected to the second end of the third switch tube Q4 and the other end grounded.

[0060] In an optional embodiment, the level switching circuit is used to, when the control signal output terminal of the main chip outputs a high level, turn on the transistor to pull the control end of the second switch tube to a low level, and turn off the third switch tube to pull the control end of the first switch tube to a high level; or, when the control signal output terminal of the main chip outputs a low level, turn off the transistor to pull the control end of the second switch tube to a high level, and turn on the third switch tube to pull the control end of the first switch tube to a low level.

[0061] In the embodiment of the present application, the main chip can output a level, that is, different level signals are generated at CS1 and CSN1. Figure 5 As shown, CAN_INV_MCU is the output level of the main chip, which can output high level or low level. When the output is high level, transistor Q3 is turned on, CNS1 is low level, and CS1 is high level; similarly, when the main chip outputs low level, CS1 is low level and CSN1 is high level.

[0062] In the embodiment of the present application, at the initial power-on, the main chip can default to a level output, either high or low, and then determine to switch the level output at a certain time interval based on whether a data frame is received. If the controller is connected to the same engineering communication network, the level of the corresponding polarity can be memorized after the polarity is determined as the initial level output.

[0063] This application uses a simple combination of resistors and transistors to design a level switching circuit to effectively control the on and off states of the switch tube. When the main chip needs to switch the communication path, it only needs to change the output level to complete the control of the transceiver. The main chip can output a control signal to generate different level signals at CS1 and CSN1, thereby realizing non-polarity CAN communication.

[0064] The following takes the example of switching from the Rx of the first transceiver U1 to the RXD of the main chip to the Rx of the second transceiver U2 to the RXD of the main chip. The Rx of the two chips are connected in series with NMOS tubes, namely the first switch tube Q1 and the second switch tube Q2, and then connected to the RXD of the main chip. VCC and VIO do not need to be disconnected.

[0065] When CS1 is at a low level, the first switch tube Q1 is turned off. Although the VCC and VIO of the first transceiver U1 work normally, the Rx voltage of the first transceiver U1 will not affect the RXD of the main chip due to the shutdown of Q1. The first switch tube Q1 blocks U1. At the same time, because CSN1 is at a high level, the second switch tube Q2 is turned on, and the Rx of the second transceiver U2 will be transmitted to the RXD of the main chip without distortion, and the communication is normal. Q2 does not affect the normal communication of U2.

[0066] This application uses the non-polarity circuit described in the patent to achieve non-polarity communication through two CAN transceivers. Since U1 and U2 are always working, the reliability of the communication circuit is greatly improved through the blocking effect of Q1 and Q2. It is not necessary to use the method of other patents to cut off the power supply of the transceiver to make one of the transceivers work, avoiding the RXD level abnormality problem when U1 and U2 are switched.

[0067] In the present application, the two transceivers are always in a continuous working state. The main chip applies a control signal to the switching circuit to select one of the two transceivers to connect to the main chip, so that no matter what the polarity of the CAN communication bus is, there is no need to switch the transceiver to receive the data frame of the corresponding polarity. Instead, the two transceivers always remain in a working state. No matter what the polarity of the CAN communication bus is, there is a transceiver that can receive the data frame. Therefore, it is only necessary to switch the data channel between the two transceivers and the main chip to pass the data frame to the main chip, thereby realizing non-polarity communication and solving the technical problem of communication abnormality caused by the two transceivers not being able to work normally.

[0068] According to another aspect of the embodiment of the present application, the present application also provides a non-polarity CAN communication method, which can be applied to Figure 1 In the hardware environment of the non-polarity CAN communication circuit shown in FIG. The non-polarity CAN communication method can be executed by a main chip, such as Figure 6 As shown, the method may include the following steps:

[0069] Step S602, switching the high and low levels of the control signals applied to the first switch circuit and the second switch circuit at a preset time interval to alternately select the first data channel or the second data channel to be turned on, wherein the first data channel is a data channel between the first transceiver and the main chip, the second data channel is a data channel between the second transceiver and the main chip, the first switch circuit is used to control the on or off of the first data channel, the second switch circuit is used to control the on or off of the second data channel, and the first transceiver and the second transceiver have opposite polarities and are in working state at the same time;

[0070] Step S604, when a data frame is received through the first data channel or the second data channel, and the content of the data frame matches the communication protocol, the level of the current control signal is fixedly maintained to continuously turn on the current data channel, until the time when the current data channel has not received the data frame reaches a preset time threshold, and the high and low levels of the control signal continue to be switched according to the preset time interval.

[0071] In an embodiment of the present application, when the system is powered on, the main chip outputs a level signal to the first switch circuit and the second switch circuit by default. At this time, assuming that the first switch circuit is turned on and the second switch circuit is turned off, the main chip attempts to receive a data frame through the first data channel. If a data frame is received on the first data channel and the content of the data frame complies with the provisions of the communication protocol, the main chip will maintain the current control signal level to keep the first data channel in the on state. If no data frame is received within a period of time, the system will switch the level of the control signal, that is, the first switch circuit is turned off, the second switch circuit is turned on, and the main chip attempts to receive the data frame through the second data channel. The system will continue to switch the control signal level at a preset time interval until the data frame is successfully received and matches the communication protocol. Once the correct data frame is received, the system will fix the current control signal level to keep the data channel in the on state.

[0072] In the embodiment of the present application, the preset time interval includes a time interval for switching from connecting to the first transceiver to connecting to the second transceiver and a time interval for switching from connecting to the second transceiver to connecting to the first transceiver. The two may be the same or may be set differently according to actual needs.

[0073] In the present application, the two transceivers are always in a continuous working state. The main chip applies a control signal to the switching circuit to select one of the two transceivers to connect to the main chip, so that no matter what the polarity of the CAN communication bus is, there is no need to switch the transceiver to receive the data frame of the corresponding polarity. Instead, the two transceivers always remain in a working state. No matter what the polarity of the CAN communication bus is, there is a transceiver that can receive the data frame. Therefore, it is only necessary to switch the data channel between the two transceivers and the main chip to pass the data frame to the main chip, thereby realizing non-polarity communication and solving the technical problem of communication abnormality caused by the two transceivers not being able to work normally.

[0074] According to another aspect of the embodiment of the present application, Figure 7 As shown, a non-polarity CAN communication device is provided, which is applied to the above-mentioned non-polarity CAN communication circuit, including:

[0075] A data channel selection module 701, used to switch the high and low levels of the control signal applied to the first switch circuit and the second switch circuit according to a preset time interval, so as to alternately select the first data channel or the second data channel to be turned on, wherein the first data channel is the data channel between the first transceiver and the main chip, the second data channel is the data channel between the second transceiver and the main chip, the first switch circuit is used to control the conduction or cutoff of the first data channel, the second switch circuit is used to control the conduction or cutoff of the second data channel, and the first transceiver and the second transceiver have opposite polarities and are in working state at the same time;

[0076] The data channel maintaining module 703 is used to fix the level of the current control signal to continuously turn on the current data channel when a data frame is received through the first data channel or the second data channel and the content of the data frame matches the communication protocol, until the time when the current data channel has not received the data frame reaches a preset time threshold, and then continue to switch the high and low levels of the control signal according to the preset time interval.

[0077] It should be noted that the data channel selection module 701 in this embodiment can be used to execute step S602 in the embodiment of the present application, and the data channel maintaining module 703 in this embodiment can be used to execute step S604 in the embodiment of the present application.

[0078] It should be noted that the examples and application scenarios implemented by the above modules and corresponding steps are the same, but are not limited to the contents disclosed in the above embodiments. It should be noted that the above modules as part of the device can be run in Figure 1 In the hardware environment shown, it can be implemented by software or by hardware.

[0079] According to another aspect of the embodiment of the present application, the present application provides an air conditioner, such as Figure 8 As shown, it includes a memory 801, a processor 803, a communication interface 805 and a communication bus 807. The memory 801 stores a computer program that can be run on the processor 803. The memory 801 and the processor 803 communicate through the communication interface 805 and the communication bus 807. When the processor 803 executes the computer program, the steps of the above method are implemented.

[0080] The memory and processor in the above electronic device communicate via a communication bus and a communication interface. The communication bus may be a Peripheral Component Interconnect (PCI) bus or an Extended Industry Standard Architecture (EISA) bus, etc. The communication bus may be divided into an address bus, a data bus, a control bus, etc.

[0081] The memory may include a random access memory (RAM) or a non-volatile memory, such as at least one disk memory. Optionally, the memory may also be at least one storage device located away from the aforementioned processor.

[0082] The above-mentioned processor can be a general-purpose processor, including a central processing unit (CPU), a network processor (NP), etc.; it can also be a digital signal processor (DSP), an application specific integrated circuit (ASIC), a field programmable gate array (FPGA) or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components.

[0083] According to another aspect of the embodiments of the present application, a computer program product or a computer program is provided, the computer program product or the computer program includes computer instructions, and the computer instructions are stored in a computer-readable storage medium. The processor of the computer device reads the computer instructions from the computer-readable storage medium, and the processor executes the computer instructions, so that the computer device performs the steps of any of the above embodiments.

[0084] Optionally, in an embodiment of the present application, the computer-readable medium is configured to store program codes for the processor to perform the following steps:

[0085] Switching the high and low levels of the control signal applied to the first switch circuit and the second switch circuit at a preset time interval to alternately select the first data channel or the second data channel to be turned on, wherein the first data channel is a data channel between the first transceiver and the main chip, and the second data channel is a data channel between the second transceiver and the main chip, the first switch circuit is used to control the conduction or cutoff of the first data channel, and the second switch circuit is used to control the conduction or cutoff of the second data channel, and the first transceiver and the second transceiver have opposite polarities and are in working state at the same time;

[0086] When a data frame is received through the first data channel or the second data channel and the content of the data frame matches the communication protocol, the current level of the control signal is fixedly maintained to continuously turn on the current data channel until the time when the current data channel has not received the data frame reaches a preset time threshold, and the high and low levels of the control signal continue to be switched according to the preset time interval.

[0087] Optionally, the specific examples in this embodiment may refer to the examples described in the above embodiments, and this embodiment will not be described in detail here.

[0088] When the embodiments of the present application are specifically implemented, reference may be made to the above-mentioned embodiments, which have corresponding technical effects.

[0089] It is understood that the embodiments described herein may be implemented in hardware, software, firmware, middleware, microcode, or a combination thereof. For hardware implementation, the processing unit may be implemented in one or more application specific integrated circuits (ASIC), digital signal processors (DSP), digital signal processing devices (DSPD), programmable logic devices (PLD), field programmable gate arrays (FPGA), general purpose processors, controllers, microcontrollers, microprocessors, other electronic units for performing the functions described in the present application, or a combination thereof.

[0090] For software implementation, the technology described herein can be implemented by a unit that performs the functions described herein. The software code can be stored in a memory and executed by a processor. The memory can be implemented in the processor or outside the processor.

[0091] Those of ordinary skill in the art will appreciate that the units and algorithm steps of each example described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are performed in hardware or software depends on the specific application and design constraints of the technical solution. Professional and technical personnel can use different methods to implement the described functions for each specific application, but such implementation should not be considered to be beyond the scope of this application.

[0092] Those skilled in the art can clearly understand that, for the convenience and brevity of description, the specific working processes of the systems, devices and units described above can refer to the corresponding processes in the aforementioned method embodiments and will not be repeated here.

[0093] In the embodiments provided in the present application, it should be understood that the disclosed devices and methods can be implemented in other ways. For example, the device embodiments described above are only schematic. For example, the division of the modules is only a logical function division. There may be other division methods in actual implementation, such as multiple modules or components can be combined or integrated into another system, or some features can be ignored or not executed. Another point is that the mutual coupling or direct coupling or communication connection shown or discussed can be an indirect coupling or communication connection through some interfaces, devices or units, which can be electrical, mechanical or other forms.

[0094] The units described as separate components may or may not be physically separated, and the components shown as units may or may not be physical units, that is, they may be located in one place or distributed on multiple network units. Some or all of the units may be selected according to actual needs to achieve the purpose of the solution of this embodiment.

[0095] In addition, each functional unit in each embodiment of the present application may be integrated into one processing unit, or each unit may exist physically separately, or two or more units may be integrated into one unit.

[0096] If the function is implemented in the form of a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on such an understanding, the technical solution of the embodiment of the present application is essentially or the part that contributes to the prior art or the part of the technical solution can be embodied in the form of a software product, which is stored in a storage medium, including several instructions to make a computer device (which can be a personal computer, a server, or a network device, etc.) perform all or part of the steps of the method described in each embodiment of the present application. The aforementioned storage medium includes: various media that can store program codes, such as a USB flash drive, a mobile hard disk, a ROM, a RAM, a magnetic disk or an optical disk. It should be noted that, in this article, relational terms such as "first" and "second" are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply that there is any such actual relationship or order between these entities or operations. Moreover, the term "include", "include" or any other variant thereof is intended to cover non-exclusive inclusion, so that the process, method, article or device including a series of elements includes not only those elements, but also includes other elements that are not explicitly listed, or also includes elements inherent to such a process, method, article or device. Without more constraints, an element defined by the phrase "comprising a..." does not exclude the existence of other identical elements in the process, method, article or apparatus comprising the element.

[0097] The above description is only a specific implementation of the present application, so that those skilled in the art can understand or implement the present application. Various modifications to these embodiments will be apparent to those skilled in the art, and the general principles defined herein can be implemented in other embodiments without departing from the spirit or scope of the present application. Therefore, the present application will not be limited to the embodiments shown herein, but will conform to the widest range consistent with the principles and novel features applied for herein.

Claims

1. A non-polarity CAN communication circuit, characterized in that: The non-polarity CAN communication circuit includes a first transceiver, a second transceiver, a first switch circuit, a second switch circuit and a main chip, wherein: The first transceiver and the second transceiver have opposite polarities and are in working state at the same time, and are used to receive data frames transmitted by the CAN communication network differential bus with different polarities, and transmit the data frames to the main chip; The first switch circuit is connected to the first transceiver and is used to control the conduction or cutoff of the first data channel between the first transceiver and the main chip; The second switch circuit is connected to the second transceiver and is used to control the conduction or cutoff of the second data channel between the second transceiver and the main chip; The main chip is connected to the first switch circuit and the second switch circuit respectively, and is used to send a control signal to drive the first switch circuit and the second switch circuit to operate; The CAN high pin of the first transceiver is connected to the CAN bus high of the CAN communication network differential bus, the CAN low pin of the first transceiver is connected to the CAN bus low of the CAN communication network differential bus, the CAN high pin of the second transceiver is connected to the CAN bus low of the CAN communication network differential bus, and the CAN low pin of the second transceiver is connected to the CAN bus high of the CAN communication network differential bus; The non-polarity CAN communication circuit also includes a spare transceiver, which is used to seamlessly switch to the spare transceiver when a failure is detected in any working transceiver.

2. The non-polarity CAN communication circuit according to claim 1, characterized in that: The first switching circuit includes a first switching tube, a first end of the first switching tube is connected to the output end of the first transceiver, a second end of the first switching tube is connected to the input end of the main chip, and a control end of the first switching tube is connected to the control signal output end of the main chip. The first switching tube is used to turn off when the control end receives a low-level signal to block the data channel between the first transceiver and the main chip, or to turn on when the control end receives a high-level signal to turn on the data channel between the first transceiver and the main chip.

3. The non-polarity CAN communication circuit according to claim 2, characterized in that: The second switch circuit includes a second switch tube, a first end of the second switch tube is connected to the output end of the second transceiver, a second end of the second switch tube is connected to the input end of the main chip, and a control end of the second switch tube is connected to the control signal output end of the main chip. The second switch tube is used to turn off when the control end receives a low-level signal to block the data channel between the second transceiver and the main chip, or to turn on when the control end receives a high-level signal to turn on the data channel between the second transceiver and the main chip.

4. The non-polarity CAN communication circuit according to claim 3, characterized in that: At the same time, the control end of the first switch tube and the control end of the second switch tube receive opposite level signals.

5. The non-polarity CAN communication circuit according to claim 4, characterized in that: The non-polarity CAN communication circuit also includes a level switching circuit, including: A first resistor, one end of which is connected to the control signal output terminal of the main chip, and the other end of which is connected to the control terminal of the transistor; The triode has a first end connected to the control end of the second switch tube and a second end connected to ground; A second resistor, one end of which is connected to the power supply, and the other end of which is connected to the first end of the transistor; A third switch tube, a control end of which is connected to the output end of the second switch tube, a first end of which is connected to a power source, and a second end of which is connected to the control end of the first switch tube; The third resistor has one end connected to the second end of the third switch tube and the other end grounded.

6. The non-polarity CAN communication circuit according to claim 5, characterized in that: The level switching circuit is used for, when the control signal output terminal of the main chip outputs a high level, the transistor is turned on to pull the control end of the second switch tube to a low level, and the third switch tube is turned off to pull the control end of the first switch tube to a high level; or, when the control signal output terminal of the main chip outputs a low level, the transistor is turned off to pull the control end of the second switch tube to a high level, and the third switch tube is turned on to pull the control end of the first switch tube to a low level.

7. A non-polarity CAN communication method, applied to the non-polarity CAN communication circuit as claimed in any one of claims 1 to 6, characterized in that: include: Switching the high and low levels of the control signal applied to the first switch circuit and the second switch circuit at a preset time interval to alternately select the first data channel or the second data channel to be turned on, wherein the first data channel is a data channel between the first transceiver and the main chip, and the second data channel is a data channel between the second transceiver and the main chip, the first switch circuit is used to control the conduction or cutoff of the first data channel, and the second switch circuit is used to control the conduction or cutoff of the second data channel, and the first transceiver and the second transceiver have opposite polarities and are in working state at the same time; When a data frame is received through the first data channel or the second data channel and the content of the data frame matches the communication protocol, the current level of the control signal is fixedly maintained to continuously turn on the current data channel until the time when the current data channel has not received the data frame reaches a preset time threshold, and the high and low levels of the control signal continue to be switched according to the preset time interval.

8. A non-polarity CAN communication device, applied to the non-polarity CAN communication circuit as claimed in any one of claims 1 to 6, characterized in that: include: A data channel selection module, used to switch the high and low levels of the control signal applied to the first switch circuit and the second switch circuit according to a preset time interval, so as to alternately select the first data channel or the second data channel to be turned on, wherein the first data channel is the data channel between the first transceiver and the main chip, the second data channel is the data channel between the second transceiver and the main chip, the first switch circuit is used to control the conduction or cutoff of the first data channel, the second switch circuit is used to control the conduction or cutoff of the second data channel, and the first transceiver and the second transceiver have opposite polarities and are in working state at the same time; A data channel maintaining module is used to fix the level of the current control signal to continuously conduct the current data channel when a data frame is received through the first data channel or the second data channel and the content of the data frame matches the communication protocol, until the time when the current data channel has not received the data frame reaches a preset time threshold, and then continue to switch the high and low levels of the control signal according to the preset time interval.

9. An air conditioner, comprising a memory, a processor, a communication interface and a communication bus, wherein the memory stores a computer program that can be run on the processor, and the memory and the processor communicate through the communication bus and the communication interface, characterized in that: When the processor executes the computer program, the non-polarity CAN communication method described in claim 7 is implemented.

10. A computer readable medium having a non-volatile program code executable by a processor, characterized in that: The program code enables the processor to execute the non-polarity CAN communication method of claim 7.

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