ONFI interface signal testing method, system and electronic device thereof

Abstract

The present invention discloses an ONFI interface signal testing method, system and electronic equipment thereof, and belongs to the field of chip interface testing technology. The method includes extracting complete three-port S parameter data on a PCB, obtaining frequency response data of a transmission line related to an ONFI interface; establishing a measurement circuit model and a simulation circuit model; establishing a transmission function of a measurement circuit and a transmission function of a simulation circuit; establishing an overall transmission function; and obtaining an ONFI interface signal test result based on the overall transmission function. The de-embedding method is used to overcome the problem of inaccurate test evaluation caused by the inability of the ONFI interface in the prior art to test the position of the chip pin. The present invention also obtains the signal quality of the chip pin position by extracting the S parameters of the three ports on the PCB board and establishing a transmission function model, thereby further improving the accuracy of the ONFI interface test result.

Description

Technical Field

[0001] The present invention relates to the technical field of chip interface testing, in particular to an ONFI interface signal testing method, system and electronic equipment thereof. Background Art

[0002] Interface chip testing is an essential part of chip design. By performing consistency testing on products, in addition to understanding whether the products meet standard test specifications, the margins of various signal indicators can also be quantified. If the margin is sufficient, it means that the product can be designed to reduce costs, otherwise it needs to be redesigned. For system manufacturers, how to reduce product costs is crucial in the face of a rapidly changing market and fierce competition. For upstream chip manufacturers, if the system based on their chips can be shown to have a very high margin after consistency testing, it can indicate the performance of their products, providing sufficient confidence and margin for cost reduction design for their downstream customers' product design and development. Therefore, the importance of consistency testing to the entire industry is self-evident.

[0003] In this field, ONFI (Open NAND Flash Interface) is an interface standard for connecting NAND flash memory chips and controller chips. The ONFI interface defines the communication protocol between flash memory devices and host controllers, including specifications for timing, commands, data transmission, etc. By adopting the ONFI interface, NAND flash memory devices produced by different manufacturers can be used interchangeably in various systems, thereby simplifying the integration and control of flash memory devices and improving the data transmission speed and performance of flash memory devices. ONFI interface testing is an important means to evaluate whether the ONFI interface is compatible with different Flash manufacturers. ONFI interface testing can ensure the interoperability between NAND flash memory chips and controller chips produced by different manufacturers. Through testing, it can be verified whether they can communicate and transfer data correctly when following the ONFI standard. ONFI interface testing can verify various functions of the interface, including the correctness of operations such as read, write, and erase. This helps to ensure that the interface can perform data transmission and storage operations in accordance with specifications in actual applications. By performing performance testing on the ONFI interface, its performance in terms of data transmission speed, latency, throughput, etc. can be evaluated. This is very important for determining whether the interface can meet the performance requirements in specific application scenarios. With the development of technology, the version of ONFI interface is constantly updated. ONFI interface testing is particularly important to ensure the compatibility between the new interface version and the old version, and the compatibility between the new interface and the existing equipment. ONFI interface testing can also verify the reliability of the interface under long-term use and various environmental conditions. This is crucial to ensure the security of data and the stability of equipment.

[0004] It can be seen that ONFI interface testing is crucial to ensure normal communication, data transmission, and storage operations between NAND flash chips and controller chips, and helps ensure the performance, stability, and reliability of the device.

[0005] In ONFI interface testing, existing technologies such as Figure 1 As shown in the figure, the signal quality is evaluated by reserving test points on the PCB. However, the ONFI protocol specification defines the signal requirements of the Flash pin. When testing at the PCB test point, the stub (line length) at the PCB test point is long, which will cause reflection and unstable signal quality. The characteristics of the Flash pin cannot be fully evaluated, resulting in inaccurate ONFI interface test results. Summary of the invention

[0006] In order to solve the problems existing in the above background technology, the present invention adopts the following technical solutions:

[0007] The present application provides an ONFI interface signal testing method, comprising the following steps:

[0008] Extract the complete three-port S parameter data on the PCB and obtain the frequency response data of the transmission line related to the ONFI interface;

[0009] Based on the above three-port S parameter data, a measurement circuit model and a simulation circuit model are established;

[0010] Establishing the transfer function of the measurement circuit and the transfer function of the simulation circuit;

[0011] An overall transfer function is established based on the transfer function of the measurement circuit and the transfer function of the simulation circuit;

[0012] Based on the overall transfer function, the ONFI interface signal test results are obtained.

[0013] As a preferred solution of the present application, the complete three-port S parameter data on the PCB is extracted to obtain the frequency response data of the transmission line related to the ONFI interface, which specifically includes the following process:

[0014] Connect the ports of the VNA to the three ports on the PCB board;

[0015] Perform VNA calibration, including the use of open, short, and load standards, as well as calibration of connecting line length and loss;

[0016] Set the VNA's measurement parameters, including the desired frequency range, number of sweep points, and power level;

[0017] Use VNA to perform S-parameter measurements;

[0018] The measured S parameter data is processed.

[0019] As a preferred solution of the present application, the measured S parameter data is processed, including correction and normalization, specifically as follows:

[0020] Perform back-propagation correction and standards-based correction;

[0021] Normalizing the S-parameter data involves converting the measured S-parameter data into values ​​relative to a reference impedance.

[0022] As a preferred solution of the present application, based on the above three-port S parameter data, a measurement circuit model and a simulation circuit model are established, specifically:

[0023] Use S-parameter data to build a transfer function model of the measurement circuit;

[0024] Use S-parameter data to build a transfer function model for the simulation circuit;

[0025] Compare the transfer functions of the measured circuit model and the simulated circuit model, analyze the differences and similarities between them, and obtain comparative analysis results;

[0026] Based on the results of comparative analysis, the simulation circuit model is optimized.

[0027] As a preferred solution of the present application, based on the above three-port S parameter data, a measurement circuit model and a simulation circuit model are established, which also includes: obtaining signal quality data of the chip pin position through a de-embedding tool, specifically including:

[0028] Determine the chip pin locations and related signal lines that need to be tested;

[0029] Use the de-embedding tool on an oscilloscope to connect the oscilloscope to the chip pin location and obtain signal quality data.

[0030] As a preferred solution of the present application, the transmission function of the measurement circuit and the transmission function of the simulation circuit are established, specifically including:

[0031] The transfer function of the measurement circuit is established and expressed as:

[0032] Hm(f)=Vmeas(f) / Vsrc(f),

[0033] Wherein, Hm(f) represents the transfer function of the measurement circuit, Vmeas(f) represents the output signal of the measurement circuit, and Vsrc(f) represents the input signal of the measurement circuit;

[0034] The transfer function of the simulation circuit is established and expressed as:

[0035] Hs(f)=Vsim(f) / Vsrc(f),

[0036] Wherein, Hs(f) represents the transfer function of the simulation circuit, Vsim(f) represents the output signal of the simulation circuit, and Vsrc(f) represents the input signal of the simulation circuit.

[0037] As a preferred solution of the present application, an overall transfer function is established based on the transfer function of the measurement circuit and the transfer function of the simulation circuit. The specific process includes:

[0038] By linking the measured circuit transfer function with the simulated circuit transfer function, the overall transfer function is obtained, which is expressed as follows:

[0039] H(f)= Hs(f) / Hm(f)= Vsim(f) / Vmeas(f),

[0040] Where H(f) represents the overall transfer function;

[0041] The simulation signal is converted into the actual measurement signal through the overall transfer function, which is specifically expressed as follows:

[0042] Vmeas(f)*H(f)= Vsim(f).

[0043] As a preferred solution of the present application, based on the overall transmission function, the ONFI interface signal test results are obtained, including transmission loss analysis, phase change analysis, time domain analysis and frequency domain analysis.

[0044] The present application also provides an ONFI interface signal testing system, which applies the aforementioned ONFI interface signal testing method, and the system includes:

[0045] A test data acquisition module configured to extract complete three-port S-parameter data on the PCB and obtain frequency response data of the transmission line associated with the ONFI interface;

[0046] A circuit model building module, configured to build a measurement circuit model and a simulation circuit model based on the three-port S parameter data;

[0047] a transfer function building module configured to build a transfer function of a measurement circuit and a transfer function of a simulation circuit;

[0048] an overall transfer function building module configured to build an overall transfer function based on a transfer function of a measurement circuit and a transfer function of a simulation circuit;

[0049] The result data analysis module is configured to obtain ONFI interface signal test results based on the overall transfer function.

[0050] The present application also provides an electronic device, comprising a processor, a memory, an input device and an output device coupled to each other; wherein the memory is used to store computer program code, the computer program code includes computer instructions, and when the processor executes the computer instructions, the electronic device executes the aforementioned ONFI interface signal testing method.

[0051] Compared with the prior art, the present invention has the following beneficial effects:

[0052] The present invention obtains the signal quality of the chip pin position by extracting the S parameters of the three ports on the PCB board and establishing a transmission function model, which is helpful to evaluate the accuracy of the simulation circuit model, provide useful reference and guidance for actual circuit design, and improve the accuracy of ONFI interface test results.

[0053] The present invention monitors and evaluates the signal quality data of the chip pin position in real time through a de-embedding tool, solves the problem that the ONFI interface test signal quality cannot test the chip pin position, and further improves the accuracy of the ONFI interface test result.

[0054] The present invention links the simulated signal with the actual measured signal by establishing and using the transfer function, and can establish a corresponding relationship between the simulation and the actual test, thereby helping to verify the accuracy of the simulation results and predict and optimize the signal in practical applications. Not only can the signal characteristics of the test circuit be better understood and the circuit design be optimized, but the reliability of the ONFI interface can also be further improved.

[0055] The present invention evaluates the test results of ONFI interface signals according to the characteristics of the transmission function, can find potential problems and perform corresponding optimization and adjustment to ensure that the performance of the interface meets the consistency requirements, and further improve the accuracy of the ONFI interface test results. BRIEF DESCRIPTION OF THE DRAWINGS

[0056] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0057] Figure 1 It is a schematic diagram of the ONFI interface test structure in the background technology;

[0058] Figure 2 A schematic diagram of a flow chart of an ONFI interface signal testing method provided by the present invention;

[0059] Figure 3 It is a schematic diagram of the measurement circuit structure of the present invention;

[0060] Figure 4 It is a schematic diagram of the simulation circuit structure of the present invention;

[0061] Figure 5 It is a structural schematic diagram of the measuring circuit and the simulation circuit model of the present invention;

[0062] Figure 6 A schematic diagram of a signal quality waveform of a test point reserved on a conventional PCB of the present invention;

[0063] Figure 7 It is a schematic diagram of the signal quality waveform at the chip pin position after de-embedding of the present invention;

[0064] Figure 8 A schematic structural diagram of an electronic device according to another embodiment of the present invention; DETAILED DESCRIPTION

[0065] The technical solution of the present invention will be clearly and completely described below in conjunction with the embodiments. Obviously, the described embodiments are only part of the embodiments of the present invention, rather than all of the embodiments. Based on the embodiments in the present invention, all other embodiments obtained by ordinary technicians in this field without making creative work are within the scope of protection of the present invention. It should be noted that relational terms such as "first" and "second" are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations.

[0066] The invention provides an ONFI interface signal testing method, system and electronic equipment thereof.

[0067] The technical solution of the present invention will be described in detail below:

[0068] Embodiment 1

[0069] The purpose of the present invention is to provide an ONFI interface signal testing method, which overcomes the problem of inaccurate test evaluation caused by the inability of the ONFI interface to test the position of the chip pin in the prior art through a de-embedding method. At the same time, the present invention also obtains the signal quality of the chip pin position by extracting the S parameters of the three ports on the PCB board and establishing a transmission function model, thereby further improving the accuracy of the ONFI interface test result.

[0070] Figure 2 FIG. 1 is a flow chart of an ONFI interface signal testing method provided by the present invention. Specifically, Figure 2 As shown, a method for testing ONFI interface signals includes the following steps:

[0071] S100, extracting complete three-port S parameter data on the PCB, and obtaining frequency response data of the transmission line related to the ONFI interface.

[0072] S200 . Establish a measurement circuit model and a simulation circuit model based on the three-port S parameter data.

[0073] S300: Establishing a transfer function of a measurement circuit and a transfer function of a simulation circuit.

[0074] S400: Establish an overall transmission function based on the transmission function of the measurement circuit and the transmission function of the simulation circuit.

[0075] S500: Obtain ONFI interface signal test results based on the overall transfer function.

[0076] About step S100

[0077] In the embodiments of the present invention, "S parameters" generally refer to scattering parameters, also known as "matrix parameters". S parameters are a set of parameters used to describe a linear multi-port network, which can describe the transmission, reflection and scattering characteristics of signals in the circuit. For the case of three ports, S parameters generally include the following parameters:

[0078] S11: represents the ratio of the signal input from port 1 that is reflected back to port 1, and is used to describe the reflection loss of port 1.

[0079] S22: represents the proportion of the signal input from port 2 that is reflected back to port 2, used to describe the reflection loss of port 2.

[0080] S33: represents the proportion of the signal input from port 3 that is reflected back to port 3, used to describe the reflection loss of port 3.

[0081] S12: Indicates the proportion of the signal input from port 2 that is transmitted to port 1. It is used to describe the transmission loss and phase change of the signal from port 2 to port 1.

[0082] S13: represents the proportion of the signal input from port 3 that is transmitted to port 1, used to describe the transmission loss and phase change of the signal from port 3 to port 1.

[0083] S21: Indicates the proportion of the signal input from port 1 that is transmitted to port 2. It is used to describe the transmission loss and phase change of the signal from port 1 to port 2.

[0084] S23: represents the proportion of the signal input from port 3 that is transmitted to port 2, used to describe the transmission loss and phase change of the signal from port 3 to port 2.

[0085] S31: represents the proportion of the signal input from port 1 that is transmitted to port 3, used to describe the transmission loss and phase change of the signal from port 1 to port 3.

[0086] S32: represents the proportion of the signal input from port 2 that is transmitted to port 3, used to describe the transmission loss and phase change of the signal from port 2 to port 3.

[0087] S parameters can be used to analyze and evaluate the signal transmission characteristics on PCB, including reflection loss (reflection coefficient), transmission loss (transmission coefficient), phase change, etc., so as to optimize circuit design and ensure stable signal transmission.

[0088] In one embodiment of the present invention, a network analyzer or a vector network analyzer (VNA) is used to measure the S parameters of the three ports on the PCB. The step S100 extracts the complete three-port S parameter data on the PCB to obtain the frequency response data of the transmission line related to the ONFI interface. Specifically, the following process is included:

[0089] S101. Connection: First, connect the port of the network analyzer or vector network analyzer (VNA) to the three ports on the PCB board. Make sure the connection is correct to ensure the accuracy of signal transmission.

[0090] S102, Calibration: Calibrate the VNA to eliminate the effects of components such as cables and adapters on the measurement results. Calibration usually includes the use of open circuit, short circuit and load standards, as well as calibration of cable length and loss.

[0091] S103, set measurement parameters: set the measurement parameters of the VNA, including the required frequency range, number of scan points, power level, etc. Ensure that these parameters can cover the frequency range to be measured and can provide sufficient resolution and accuracy.

[0092] S104. Perform S-parameter measurements: Use a VNA to perform S-parameter measurements. This may involve measuring parameters such as S11-S33 and their variations at different frequencies. Make sure to record all S-parameter data.

[0093] S105, data processing: processing the measured S parameter data, including correction and normalization, etc. By processing the S parameter data, accurate S parameter data can be obtained for subsequent analysis and modeling.

[0094] This embodiment extracts complete three-port S parameter data on the PCB, provides an important reference for circuit design and analysis, helps to understand the transmission characteristics of the signal on the PCB board, and performs corresponding optimization and improvement, provides a reliable data basis for subsequent analysis and optimization, and improves the reliability of ONFI interface signal testing.

[0095] As a preferred embodiment of the present invention, in step S105, the measured S parameter data is processed, including correction and normalization, specifically:

[0096] Calibration: When measuring S parameters, it may be affected by connecting wires, adapters and other components, and calibration is required to eliminate these effects. The calibration method in this embodiment includes reverse propagation calibration (TRL calibration) and calibration based on standard parts. Taking TRL calibration as an example, the calibration process includes the following steps:

[0097] Measure S-parameters of open, short, and load standards for use in building correction models.

[0098] The measured S parameter data is corrected using the correction model to eliminate the influence of components such as connecting wires and adapters on the measurement results.

[0099] Normalization: Normalize the S-parameter data, for example, convert it to a value relative to a reference impedance, usually 50 ohms. Normalization helps eliminate the effects of impedance mismatches between different systems and makes the data easier to compare and analyze. Specifically, the normalization process includes the following steps:

[0100] The measured S-parameter data is converted to values ​​relative to a reference impedance (eg, 50 ohms).

[0101] The data is normalized to conform to a standard reference impedance, for example, S11 and S22 are normalized to reflection coefficients, and S21 and S12 are normalized to transmission coefficients.

[0102] For example, when TRL correction is performed and the measured S parameter data is obtained, the following is obtained:

[0103] S11 = 0.1∠30°,

[0104] S12 = 0.2∠45°,

[0105] S21 = 0.25∠20°,

[0106] S22 = 0.3∠25°,

[0107] Then, normalization is performed to convert these S parameter data into values ​​relative to a 50 ohm reference impedance, for example, S11 and S22 are converted into absolute values ​​of reflection coefficients, and S21 and S12 are converted into absolute values ​​of transmission coefficients.

[0108] Through correction and normalization processing, the present invention can obtain accurate and comparable S parameter data, providing a reliable basis for subsequent analysis and modeling.

[0109] About step S200

[0110] Using the three-port S parameter data, the measurement circuit model and simulation circuit model are established. The circuit model structure is as follows: Figure 5 As shown. The measurement circuit model describes the transmission characteristics from the chip's transmitter to the test point on the PCB, and the simulation circuit model describes the transmission characteristics from the chip's transmitter to the pin position of the Flash chip. When establishing the measurement circuit and simulation circuit models, the accuracy and integrity of the S parameter data must be ensured to ensure the reliability of the model; at the same time, the correct use of the de-embedding tool must be ensured to obtain accurate signal quality data at the chip pin position.

[0111] By extracting the complete three-port S parameters on the PCB, the measurement circuit and simulation circuit models are established, specifically:

[0112] S201, establish a measurement circuit model, such as Figure 3 As shown in the figure: Use S parameter data to establish a transfer function model of the measurement circuit. For example, if the measurement circuit is from the transmitter of the chip to the test point on the PCB, the S parameter data is converted into a transfer function, and then the transfer function model is established.

[0113] S202, establish a simulation circuit model, such as Figure 4 As shown in the figure: Use S parameter data to establish a transfer function model of the simulation circuit. For example, if the simulation circuit is from the transmitter of the chip to the pin position of the Flash chip, the same S parameter data can be used to convert it into a transfer function and establish a transfer function model.

[0114] S203, comparative analysis: compare the transfer functions of the measurement circuit model and the simulation circuit model, and analyze the differences and similarities between them. The analysis includes analyzing the transmission characteristics of the signal on the PCB board. The attenuation, frequency response, phase change, etc. of the signal can be evaluated to understand the quality and stability of the signal during transmission. The consistency between the simulation circuit model and the actual measurement circuit can be understood through comparative analysis, and the accuracy of the simulation circuit model can be evaluated.

[0115] S204, design optimization: Based on the results of the comparative analysis, the simulation circuit model is optimized, including the design, layout or connection method of the PCB board to improve the transmission characteristics and quality of the signal. For example, the wiring, ground line design, impedance matching, etc. of the PCB board can be adjusted to reduce signal attenuation and signal distortion, so that it can more accurately reflect the transmission characteristics of the actual measurement circuit.

[0116] The embodiment of the present invention uses the extracted complete three-port S parameters on the PCB to establish a measurement circuit model and a simulation circuit model, and performs comparative analysis and optimization design. It is helpful to evaluate the accuracy of the simulation circuit model and provide useful reference and guidance for actual circuit design. The embodiment of the present invention also uses S parameter data measurement and transmission function modeling to evaluate the signal quality of the chip pin position, and performs corresponding optimization and improvement. This ensures that the signal transmission quality of the chip pin position meets the design requirements, thereby improving the performance and stability of the system.

[0117] Preferably, step S200 also includes obtaining accurate signal quality data of the chip pin position through a de-embedding tool to solve the problem that the ONFI interface test signal quality cannot test the chip pin position. Specifically including:

[0118] Determine the chip pin locations and related signal lines that need to be tested;

[0119] Use the de-embedding tools on the oscilloscope, such as a suitable probe or fixture, to connect the oscilloscope to the chip pin location to obtain signal quality data.

[0120] The de-embedding function of an oscilloscope refers to the ability of the oscilloscope’s de-embedding tools, such as probes, to minimize the impact on the circuit under test when connected to the circuit under test. This function is designed to ensure accurate measurement results while minimizing the interference of the measurement equipment itself on the circuit under test.

[0121] The embodiments of the present invention can monitor and evaluate the signal quality of the chip pin position in real time, including waveform, amplitude, timing and other characteristics, through the de-embedding tool on the oscilloscope. Since the de-embedding function of the oscilloscope probe usually has the characteristics of low interference, wide bandwidth, high sensitivity and accurate calibration. Therefore, the de-embedding tool of the oscilloscope can be inserted into the measurement circuit while minimizing the impact on the circuit under test. This is very important for evaluating the signal quality of the chip pin position, because the signal waveform, amplitude, timing and other characteristics of the chip pin position can be directly observed and analyzed, so as to better understand its characteristics and quality.

[0122] About step S300

[0123] Establish the transfer function of the measurement circuit and the transfer function of the simulation circuit, including:

[0124] S301. Establish the transfer function of the measurement circuit. The transfer function of the measurement circuit describes the characteristics of the actual measurement circuit, which represents the response of the measurement circuit to the input signal. Through the transfer function of the measurement circuit, we can understand the characteristics of the measurement circuit such as attenuation and phase change of the input signal.

[0125] based on Figure 3 The measurement circuit model shown in the figure establishes the transfer function of the measurement circuit as:

[0126] Hm(f)=Vmeas(f) / Vsrc(f),

[0127] Wherein, Hm(f) represents the transfer function of the measurement circuit, Vmeas(f) represents the output signal of the measurement circuit, which is usually a voltage signal measured by a measurement device, and Vsrc(f) represents the input signal of the measurement circuit, which is usually an input signal source of the measurement device, and can be a voltage or current signal. In the embodiment of the present invention, Vsrc(f) is described by taking the input voltage signal of the measurement circuit as an example.

[0128] S302: Establish the transfer function of the simulation circuit. The transfer function of the simulation circuit describes the characteristics of the simulation circuit, which represents the response of the simulation circuit to the input signal. Through the transfer function of the simulation circuit, we can understand the characteristics of the simulation circuit such as attenuation and phase change of the input signal.

[0129] based on Figure 4 The measurement circuit model is shown, and the transfer function of the simulation circuit is:

[0130] Hs(f)=Vsim(f) / Vsrc(f),

[0131] Wherein, Hs(f) represents the transfer function of the simulation circuit, Vsim(f) represents the output signal of the simulation circuit, which is usually a voltage signal measured by a measuring device, and Vsrc(f) represents the input signal of the simulation circuit, which is usually an input signal source of the measuring device, and can be a voltage or current signal. In the embodiment of the present invention, Vsrc(f) is described by taking the input voltage signal of the simulation circuit as an example.

[0132] About step S400

[0133] Based on the transfer function of the measurement circuit and the transfer function of the simulation circuit, the overall transfer function is established. The overall transfer function (H(f)) describes the response of the simulation signal after passing through the measurement circuit. The specific process includes:

[0134] S401, by linking the measured circuit transfer function and the simulated circuit transfer function, an overall transfer function is obtained. The specific expression is as follows:

[0135] H(f)= Hs(f) / Hm(f)= Vsim(f) / Vmeas(f),

[0136] Where H(f) represents the overall transfer function, which describes the response of the simulation signal after passing through the measurement circuit. The overall transfer function is obtained by linking the measurement circuit transfer function with the simulation circuit transfer function.

[0137] S402, converting the simulation signal into an actual measurement signal through the overall transfer function, which is specifically expressed as follows:

[0138] Vmeas(f)*H(f)= Vsim(f),

[0139] The above expression indicates that the actual measured signal multiplied by the overall transfer function equals the simulated signal. This shows that by processing the actual measured signal (multiplying it by the overall transfer function), an approximation of the simulated signal can be obtained.

[0140] The present invention links the simulated signal with the actual measured signal by establishing and using the transfer function, and can establish a corresponding relationship between the simulation and the actual test, thereby helping to verify the accuracy of the simulation results and predict and optimize the signal in practical applications. Not only can the signal characteristics of the test circuit be better understood and the circuit design be optimized, but the reliability of the ONFI interface can also be further improved.

[0141] About step S500

[0142] After the overall transmission function H(f) is obtained, an ONFI interface signal test is performed based on the overall transmission function H(f), and after the ONFI interface signal test is performed, the performance of the ONFI interface is evaluated by analyzing the characteristics of the transmission function. The performance of the ONFI interface is evaluated by analyzing the characteristics of the transmission function, including:

[0143] Transmission loss analysis: Through the transmission function, the loss of the signal during the transmission process can be obtained. For example, the transmission loss curve at different frequencies can be analyzed to determine the attenuation of the signal in the interface. If the transmission loss exceeds the specified range, you may need to consider using a better transmission line or enhancing the signal driving capability. For example, through the transmission function analysis, it is found that during the transmission of the ONFI interface, the signal has a large transmission loss at high frequency, which exceeds the specified range. After analysis, it is found that this may be caused by the attenuation of the transmission line. To solve this problem, you can consider using a lower loss transmission line or increasing the signal driving capability to compensate for the transmission loss.

[0144] Phase variation analysis: The transfer function can also provide information about the phase variation of the signal during transmission. By analyzing the phase response, the phase distortion of the signal in the interface can be determined. For example, if the phase variation of the signal exceeds the specified range, it may be necessary to consider using phase compensation technology or adjusting the transmission line length to correct the phase distortion.

[0145] Time domain analysis: Using the transfer function, you can perform time domain analysis to evaluate the delay and waveform distortion of the signal during transmission. For example, you can analyze the rise time, fall time, and waveform integrity of the signal to determine the stability and accuracy of the signal.

[0146] Frequency domain analysis: The transfer function can also provide the characteristics of the signal in the frequency domain, including frequency response, frequency attenuation and other information. By analyzing the frequency domain characteristics, the transmission performance of the signal at different frequencies can be determined, such as the transmission loss at high frequencies.

[0147] The present invention evaluates the test results of the ONFI interface signal according to the characteristics of the transmission function, can find potential problems and perform corresponding optimization and adjustment to ensure that the performance of the interface meets the consistency requirements.

[0148] The following is an example of ONFI interface signal test results:

[0149] Figure 6 It shows the signal quality of the test points reserved on the traditional PCB. Figure 7 The figure shows the signal quality of the chip pin position after de-embedding of the present invention. Figure 6 and Figure 7 From the test results, we can see that Figure 6 The signal quality of the test point reserved on the PCB shown in the figure has a non-monotonic waveform. This is because the stub (line length) at the PCB test point is long, which will cause reflection, resulting in unstable signal quality and non-monotonic signal waveform. Figure 6 As shown, the waveform has multiple peaks and troughs.

[0150] In contrast, the present invention can measure the signal quality at the chip pin position through the de-embedding method, which can basically eliminate the influence of reflection. Because the chip pin position is closer to the actual signal receiving end, the signal transmission path is shorter, and the influence of reflection is relatively small, so the signal waveform is more monotonous and stable. Figure 7 As shown, the signal quality at the chip pin position after de-embedding of the present invention can basically eliminate the influence of reflection, better reflect the actual signal quality at the chip pin position, and better reflect the status of the signal received by the Flash.

[0151] Embodiment 2

[0152] The present invention provides an ONFI interface signal testing system, which uses an ONFI interface signal testing method as described in the first embodiment, and the system includes:

[0153] A test data acquisition module configured to extract complete three-port S-parameter data on the PCB and obtain frequency response data of the transmission line associated with the ONFI interface;

[0154] A circuit model building module, configured to build a measurement circuit model and a simulation circuit model based on the three-port S parameter data;

[0155] a transfer function building module configured to build a transfer function of a measurement circuit and a transfer function of a simulation circuit;

[0156] an overall transfer function building module configured to build an overall transfer function based on a transfer function of a measurement circuit and a transfer function of a simulation circuit;

[0157] The result data analysis module is configured to obtain ONFI interface signal test results based on the overall transfer function.

[0158] Among them, the test data acquisition module includes:

[0159] Connect the ports of the VNA to the three ports on the PCB board;

[0160] Perform VNA calibration, including the use of open, short, and load standards, as well as calibration of connecting line length and loss;

[0161] Set the VNA's measurement parameters, including the desired frequency range, number of sweep points, and power level;

[0162] Use VNA to perform S-parameter measurements;

[0163] The measured S parameter data is processed, including correction and normalization.

[0164] Among them, the circuit model building module includes:

[0165] Use S-parameter data to build a transfer function model of the measurement circuit;

[0166] Use S-parameter data to build a transfer function model for the simulation circuit;

[0167] Compare the transfer functions of the measured circuit model and the simulated circuit model, analyze the differences and similarities between them, and obtain comparative analysis results;

[0168] Based on the results of comparative analysis, the simulation circuit model is optimized.

[0169] Among them, the transfer function building block includes,

[0170] The transfer function of the measurement circuit is established and expressed as:

[0171] Hm(f)=Vmeas(f) / Vsrc(f),

[0172] Wherein, Hm(f) represents the transfer function of the measurement circuit, Vmeas(f) represents the output signal of the measurement circuit, and Vsrc(f) represents the input signal of the measurement circuit;

[0173] The transfer function of the simulation circuit is established and expressed as:

[0174] Hs(f)=Vsim(f) / Vsrc(f),

[0175] Wherein, Hs(f) represents the transfer function of the simulation circuit, Vsim(f) represents the output signal of the simulation circuit, and Vsrc(f) represents the input signal of the simulation circuit.

[0176] Among them, the overall transfer function building block includes,

[0177] By linking the measured circuit transfer function with the simulated circuit transfer function, the overall transfer function is obtained, which is expressed as follows:

[0178] H(f)= Hs(f) / Hm(f)= Vsim(f) / Vmeas(f),

[0179] Where H(f) represents the overall transfer function;

[0180] The simulation signal is converted into the actual measurement signal through the overall transfer function, which is specifically expressed as follows:

[0181] Vmeas(f)*H(f)= Vsim(f).

[0182] Among them, the result data analysis module includes transmission loss analysis, phase change analysis, time domain analysis and frequency domain analysis.

[0183] Embodiment 3

[0184] like Figure 8 As shown, the present invention also provides an electronic device 2, including a processor 21 and a memory 22, the memory 22 is used to store computer program codes, the computer program codes include computer instructions, when the processor 21 executes the computer instructions, the electronic device executes an ONFI interface signal testing method of the above embodiment.

[0185] The electronic device 2 also includes an input device 24 and an output device 23. The processor 21, the memory 22, the input device 24 and the output device 23 are coupled via a connector, and the connector includes various interfaces, transmission lines or buses, etc., which are not limited in the embodiments of the present invention. It should be understood that in various embodiments of the present invention, coupling refers to mutual connection in a specific manner, including direct connection or indirect connection through other devices, for example, through various interfaces, transmission lines, buses, etc.

[0186] The processor 21 may be one or more graphics processing units (GPUs). When the processor 21 is a GPU, the GPU may be a single-core GPU or a multi-core GPU. Optionally, the processor 21 may be a processor group consisting of multiple GPUs, and the multiple processors are coupled to each other via one or more buses. Optionally, the processor may also be other types of processors, etc., which are not limited in the embodiments of the present invention.

[0187] The memory 22 can be used to store computer program instructions and various computer program codes including program codes for executing the scheme of the present invention. Optionally, the memory includes but is not limited to random access memory (RAM), read-only memory (ROM), erasable programmable read only memory (EPROM), or portable read only memory (CD-ROM), which is used for related instructions and data.

[0188] The input device 24 is used to input data and / or signals, and the output device 23 is used to output data and / or signals. The output device 23 and the input device 24 can be independent devices or an integrated device.

[0189] The foregoing is merely a specific embodiment of the present invention, which enables those skilled in the art to understand or implement the present invention. Various modifications to these embodiments will be apparent to those skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of the present invention. Therefore, the present invention will not be limited to the embodiments shown herein, but rather to the widest scope consistent with the principles and novel features claimed herein.

Claims

1. A method for testing ONFI interface signals, characterized in that: The steps include: Extract the complete three-port S parameter data on the PCB and obtain the frequency response data of the transmission line related to the ONFI interface; Based on the above three-port S parameter data, a measurement circuit model and a simulation circuit model are established; Establishing the transfer function of the measurement circuit and the transfer function of the simulation circuit; An overall transfer function is established based on the transfer function of the measured circuit and the transfer function of the simulated circuit; Based on the overall transfer function, the ONFI interface signal test results are obtained; Among them, extracting the complete three-port S parameter data on the PCB and obtaining the frequency response data of the transmission line related to the ONFI interface includes the following processes: Connect the ports of the VNA to the three ports on the PCB board; Perform VNA calibration, including the use of open, short, and load standards, as well as calibration of connecting line length and loss; Set the VNA's measurement parameters, including the desired frequency range, number of sweep points, and power level; Use VNA to perform S-parameter measurements; Process the measured S parameter data; The establishment of the transfer function of the measurement circuit and the transfer function of the simulation circuit specifically includes: The transfer function of the measurement circuit is established and expressed as: Hm(f)=Vmeas(f) / Vsrc(f), Wherein, Hm(f) represents the transfer function of the measurement circuit, Vmeas(f) represents the output signal of the measurement circuit, and Vsrc(f) represents the input signal of the measurement circuit; The transfer function of the simulation circuit is established and expressed as: Hs(f)=Vsim(f) / Vsrc(f), Wherein, Hs(f) represents the transfer function of the simulation circuit, Vsim (f) represents the output signal of the simulation circuit, and Vsrc(f) represents the input signal of the simulation circuit; Among them, based on the transfer function of the measurement circuit and the transfer function of the simulation circuit, the overall transfer function is established, and the specific process includes: By linking the measured circuit transfer function with the simulated circuit transfer function, the overall transfer function is obtained, which is expressed as follows: H(f)= Hs(f) / Hm(f)= Vsim(f) / Vmeas(f), Where H(f) represents the overall transfer function; The simulation signal is converted into the actual measurement signal through the overall transfer function, which is specifically expressed as follows: Vmeas(f)*H(f)= Vsim(f).

2. The ONFI interface signal testing method according to claim 1, characterized in that: The measured S parameter data is processed, including correction and normalization, specifically: Perform back-propagation correction and standards-based correction; Normalizing the S-parameter data involves converting the measured S-parameter data into values ​​relative to a reference impedance.

3. The ONFI interface signal testing method according to claim 1, characterized in that: Based on the above three-port S parameter data, the measurement circuit model and simulation circuit model are established, specifically: Use S-parameter data to build a transfer function model of the measurement circuit; Use S-parameter data to build a transfer function model for the simulation circuit; Compare the transfer functions of the measured circuit model and the simulated circuit model, analyze the differences and similarities between them, and obtain comparative analysis results; Based on the results of comparative analysis, the simulation circuit model is optimized.

4. The ONFI interface signal testing method according to claim 3, characterized in that: Based on the above three-port S parameter data, a measurement circuit model and a simulation circuit model are established, which also includes: obtaining signal quality data at the chip pin position through a de-embedding tool, specifically including: Determine the chip pin locations and related signal lines that need to be tested; Use the de-embedding tool on an oscilloscope to connect the oscilloscope to the chip pin location and obtain signal quality data.

5. The ONFI interface signal testing method according to claim 1, characterized in that: Based on the overall transfer function, the ONFI interface signal test results are obtained, including transmission loss analysis, phase change analysis, time domain analysis, and frequency domain analysis.

6. An ONFI interface signal testing system, using an ONFI interface signal testing method as claimed in any one of claims 1 to 5, characterized in that: The system comprises: A test data acquisition module configured to extract complete three-port S-parameter data on the PCB and obtain frequency response data of the transmission line associated with the ONFI interface; A circuit model building module, configured to build a measurement circuit model and a simulation circuit model based on the three-port S parameter data; a transfer function building module configured to build a transfer function of a measurement circuit and a transfer function of a simulation circuit; an overall transfer function building module configured to build an overall transfer function based on a transfer function of a measurement circuit and a transfer function of a simulation circuit; The result data analysis module is configured to obtain ONFI interface signal test results based on the overall transfer function.

7. An electronic device, characterized in that: The electronic device comprises a mutually coupled processor, a memory, an input device and an output device; wherein the memory is used to store computer program codes, the computer program codes include computer instructions, and when the processor executes the computer instructions, the electronic device executes an ONFI interface signal testing method as described in any one of claims 1 to 5.

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