Source driver, charge compensation method and display device

Abstract

The application discloses a source driver, a charging compensation method and a display device, and belongs to the display field.The source driver comprises a driving module, a buffer module and a compensation module, the driving module is used for generating a data signal of each output channel based on received display information, and the display information comprises setting data;the buffer module is connected with the driving module, the buffer module is connected with a display panel through a plurality of fan-out wirings to form a plurality of output channels, and the buffer module is used for charging the display panel based on a driving force of each output channel and each data signal;the compensation module is connected with the driving module and the buffer module respectively, and is used for controlling the driving force of each output channel based on the setting data, wherein the driving force of the output channel is positively correlated with the impedance of the corresponding fan-out wiring.The application can compensate for the charging difference caused by the impedance of the fan-out wiring, improve the pixel charging time difference, and further improve the visual experience of the display panel.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of display, in particular to a source driver, a charging compensation method and a display device. BACKGROUND

[0002] With the continuous development of LCD (Liquid Crystal Display) technology, display panels such as smart TVs and desktop displays are gradually developing towards high resolution and high refresh rate, and users' requirements for display panel display effects are also becoming higher and higher. The data signal of the display panel is mainly provided by the source driver, and the source driver is connected with the data line of the display panel through fanout lines. However, due to the influence of fanout lines, charging differences are prone to occur between pixels on the display panel with high resolution and high refresh rate, which further leads to uneven brightness of the display picture and affects the visual experience of the display panel. SUMMARY

[0003] Embodiments of the present application provide a source driver, a charging compensation method and a display device to improve the charging difference of pixels on the display panel and improve the visual experience of the display panel.

[0004] To solve the above technical problems, embodiments of the present application disclose the following technical solutions:

[0005] In a first aspect, a source driver for driving a display panel is provided, and the source driver comprises:

[0006] a driving module configured to generate a data signal for each output channel based on received display information, the display information comprising setting data;

[0007] a buffer module connected with the driving module, the buffer module being connected with the display panel through a plurality of fanout lines to form a plurality of output channels, the buffer module being configured to charge the display panel based on a driving force of each output channel and each data signal;

[0008] a compensation module connected with the driving module and the buffer module respectively, and configured to control the driving force of each output channel based on the setting data, wherein the driving force of the output channel is positively correlated with the impedance of the corresponding fanout line.

[0009] In combination with the first aspect, the setting data comprises a plurality of groups of driving force parameters of the output channels; and the compensation module is configured to control the driving force of each output channel based on the setting data, comprising:

[0010] generate a control signal for each of the output channels based on a driving force parameter of each of the output channels, to control the driving force of the corresponding group of all the output channels through the control signal of each of the output channels.

[0011] In combination with the first aspect, the buffer module includes n operational amplifiers, an output terminal of each of the operational amplifiers is connected to a corresponding fan-out wire, and n is the total number of the output channels; and the compensation module includes:

[0012] n first control units, each of the first control units is connected to a first power supply terminal of a corresponding operational amplifier;

[0013] m second control units, each of the second control units is connected to the driving module and M first control units, respectively, to generate the control signal for the corresponding M output channels, where n = m x M.

[0014] In combination with the first aspect, the first control unit includes:

[0015] a plurality of parallel current control units, each of the current control units includes a mirror current source and a switching unit connected in series, the mirror current source is configured to provide a charging current, and the switching unit is configured to be turned on or turned off in response to the control signal.

[0016] In combination with the first aspect, the control signal for each of the output channels has a number of bits t, and the number of current control units is N, which satisfies: N = 2 t .

[0017] In combination with the first aspect, the buffer module includes a plurality of output ports distributed along a first direction, and the display panel includes a plurality of data lines, each of the output ports is connected to a corresponding data line through a corresponding fan-out wire, and the plurality of output ports includes a first port and a second port.

[0018] The length of the fan-out wire connected to the first port is greater than the length of the fan-out wire connected to the second port, and the driving force of the output channel corresponding to the first port is greater than the driving force of the output channel corresponding to the second port.

[0019] In combination with the first aspect, the plurality of output ports further includes a third port, and the third port is located on a side of the second port away from the first port.

[0020] The fan-out wire connected to the third port is mirror-symmetric to the fan-out wire connected to the first port along a central axis of the source driver, and the driving force of the output channel corresponding to the first port is the same as the driving force of the output channel corresponding to the third port.

[0021] In combination with the first aspect, the driving module comprises a data receiving unit, a shift register unit, a data temporary storage unit, a data latching unit, a level conversion unit and a digital-to-analog conversion unit.

[0022] The output end of the data receiving unit is connected with the input end of the compensation module and the data temporary storage unit respectively, the input end of the data temporary storage unit is also connected with the output end of the shift register unit, the output end of the data temporary storage unit is connected with the input end of the data latching unit, the output end of the data latching unit is connected with the input end of the level conversion unit, the output end of the level conversion unit is connected with the input end of the digital-to-analog conversion unit, and the output end of the digital-to-analog conversion unit is connected with the input end of the buffer module.

[0023] In the second aspect, a charging compensation method is provided, which is applied to the source driver as described in any one of the first aspect, and the method comprises:

[0024] Based on the received display information, the data signal of each output channel is generated, and the display information comprises setting data;

[0025] Based on the setting data, the driving force of each output channel is controlled, wherein the driving force of the output channel is positively correlated with the impedance of the corresponding fan-out wire;

[0026] Based on the driving force of each output channel and each data signal, the display panel is charged.

[0027] In the third aspect, a display device is provided, which comprises a display panel and the source driver as described in any one of the first aspect, and the source driver is connected with the display panel through a plurality of fan-out wires.

[0028] One of the above technical solutions has the following advantages or beneficial effects:

[0029] Compared with the prior art, the source driver provided by the application comprises a driving module, a buffer module and a compensation module, the driving module is configured to generate a data signal of each output channel based on received display information, the display information comprises setting data; the buffer module is connected with the driving module, the buffer module is connected with the display panel through a plurality of fan-out wirings to form a plurality of output channels, the buffer module is configured to charge the display panel based on a driving force of each output channel and each data signal; the compensation module is connected with the driving module and the buffer module respectively, and is configured to control the driving force of each output channel based on the setting data, wherein the driving force of the output channel is positively correlated with the impedance of the corresponding fan-out wiring. The source driver provided by the application can control the driving force of each output channel to be adapted to the impedance of the corresponding fan-out wiring through the compensation module, so as to compensate for the charging difference caused by the impedance difference of the fan-out wirings, thereby improving the charging time difference of the pixels, keeping the charging time of each pixel on the display panel consistent, and further improving the situation that the display picture is not bright and dark, and improving the visual experience of the display panel.

[0030] The charging compensation method provided by the application can control the driving force of each output channel to be adapted to the impedance of the corresponding fan-out wiring based on the setting data, so as to improve the charging time difference of the pixels caused by the impedance difference of the fan-out wirings, keep the charging time of each pixel on the display panel consistent, and further improve the situation that the display picture is not bright and dark, and improve the visual experience of the display panel.

[0031] The display device provided by the application can control the driving force of each output channel according to the impedance of each fan-out wiring, so that the display panel is not easily affected by the impedance of the fan-out wirings, and further the display picture has good brightness uniformity and good visual experience. BRIEF DESCRIPTION OF DRAWINGS

[0032] In order to more clearly illustrate the technical solutions in the embodiments of the application, the following will briefly introduce the drawings needed to be used in the embodiment description. Obviously, the drawings in the following description are only some embodiments of the application, and other drawings can be obtained by those skilled in the art without creating any creative labor.

[0033] Figure 1 It is a structural schematic diagram of the display device of the embodiment of the application;

[0034] Figure 2 It is a traditional waveform schematic diagram of the data signal output by the source driver charging the display panel;

[0035] Figure 3 It is a whole structural schematic diagram of the source driver provided by the embodiment of the application;

[0036] Figure 4A waveform diagram of a data signal output by the source driver to charge the display panel is provided in the embodiments of the present application;

[0037] Figure 5 For Figure 3 A structural diagram of the compensation module in the embodiments of the present application is provided.

[0038] Figure 6 For Figure 3 A partial structural diagram of the buffer module in the embodiments of the present application is provided.

[0039] Figure 7 For Figure 5 A structural diagram of the first control unit in the embodiments of the present application is provided.

[0040] Figure 8 A schematic diagram of the overall flow of the charging compensation method in the embodiments of the present application is provided.

[0041] Reference signs:

[0042] 10 - display panel; 11 - fan-out wire area; 20 - source driver; 21 - driving module; 211 - data receiving unit; 212 - shift register unit; 213 - data temporary storage unit; 214 - data latching unit; 215 - level conversion unit; 216 - digital and analog conversion unit; 22 - buffer module; 221 - output port; 2211 - first port; 2212 - second port; 2213 - third port; 222 - operational amplifier; 2221 - first input end; 2222 - second output end; 2223 - first power supply end; 2224 - second power supply end; 2225 - output end; 23 - compensation module; 231 - first control unit; 2311 - mirror current source; 2312 - switch unit; 232 - second control unit; 30 - timing controller; 40 - printed circuit board; 50 - fan-out wire. DETAILED DESCRIPTION

[0043] The technical solutions in the embodiments of the present application will be described clearly and completely below with reference to the drawings in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, rather than all the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without creative work fall within the scope of protection of the present application.

[0044] In the description of the present application, it needs to be understood that the terms "upper", "lower", "front", "back", "left", "right", "top", "bottom", "inner", "outer" and the like indicate the orientation or positional relationship based on the orientation or positional relationship shown in the drawings, and are only for the convenience of describing the present application and simplifying the description, and do not indicate or imply that the devices or elements referred to must have a particular orientation, be constructed and operated in a particular orientation, and therefore cannot be understood as limiting the present application. In addition, the terms "first", "second" are only for descriptive purposes and cannot be understood as indicating or implying relative importance or implicitly indicating the number of the technical features indicated. Therefore, the features defined as "first", "second" can explicitly or implicitly include one or more features. In the description of the present application, the meaning of "multiple" is two or more, at least one of which can be one, two or more, unless otherwise specifically limited.

[0045] Please refer to Figure 1 , Figure 1 is a structural schematic diagram of a display device of an embodiment of the present application. The display device of the embodiment of the present application can include a display panel 10, a plurality of source drivers 20 and a timing controller 30. The plurality of source drivers 20 can be arranged on one side of the display panel 10, and the timing controller 30 can be arranged on a printed circuit board (PCB) 40. The display panel 10 has a fanout wiring area 11, and the fanout wiring area 11 is provided with a plurality of fanout wires 50. Each source driver 20 is electrically connected to the display panel 10 through a corresponding fanout wire 50 to form a plurality of output channels. The timing controller 30 is electrically connected to the plurality of source drivers 20. Exemplarily, the display panel 10 can be a liquid crystal panel.

[0046] The display panel 10 further includes scan lines, data lines and arrayed pixel units. The scan lines extend along a first direction X, the data lines extend along a second direction Y, and the first direction X intersects the second direction Y. Exemplarily, the first direction X can be the row direction of the display panel 10, and the second direction Y can be the column direction of the display panel 10. The pixel units are respectively electrically connected to corresponding scan lines and corresponding data lines, and the source drivers 20 are electrically connected to corresponding data lines through corresponding fanout wires 50.

[0047] The timing controller 30 is configured to provide display information of the display panel 10, and each source driver 20 is configured to control the transmission of data signals of part of the data lines to load the data signals onto corresponding data lines, thereby driving corresponding pixel units to emit light and realizing driving the display panel 10 to display a picture.

[0048] Please refer to Figure 2 , Figure 2This is a schematic diagram of a conventional waveform used to charge the display panel by the data signal output from the source driver. Because the size of the source driver 20 differs from the size of the corresponding display area, the lengths and layouts of the multiple fan-out traces 50 connected to the source driver 20 also differ. Figure 1 Taking the first region a, the second region b, and the third region c on the display panel 10 as an example, the fan-out traces 50 corresponding to the first region a and the third region c are symmetrically arranged, and the fan-out traces 50 corresponding to the second region b all extend along the second direction Y. Since the fan-out traces 50 corresponding to the first region a and the third region c are both longer than the fan-out traces 50 corresponding to the second region b, the impedance of the corresponding fan-out traces 50 is greater. Therefore, the charging speed of the first region a (curve a') and the charging speed of the third region c (curve c') are both slower than the charging speed of the second region b (curve b'). This difference in charging speed can easily lead to uneven brightness in the displayed image. Especially for the high-resolution, high-refresh-rate display panel 10, since the charging time of each row of pixels is short, the uneven brightness will be more obvious, thus seriously affecting the visual experience of the display panel 10.

[0049] In view of this, this application provides a source driver 20, which controls the driving force of each output channel to match the impedance of the corresponding fan-out trace 50 to compensate for the charging difference caused by the impedance difference of the fan-out trace 50, thereby improving the charging time consistency of each pixel unit on the display panel 10, and thus solving at least part of the above-mentioned technical problems.

[0050] Please see Figure 3 , Figure 3 This is a schematic diagram of the overall structure of the source driver provided in an embodiment of this application. The source driver 20 provided in this embodiment includes a driving module 21, a buffer module 22, and a compensation module 23. The driving module 21 is configured to generate a data signal for each output channel based on received display information, the display information including setting data. The buffer module 22 is connected to the driving module 21 and is connected to the display panel through multiple fan-out traces to form multiple output channels. The buffer module 22 is configured to charge the display panel based on the driving force of each output channel and each data signal. The compensation module 23 is connected to both the driving module 21 and the buffer module 22, and is configured to control the driving force of each output channel based on the setting data, wherein the driving force of the output channel is positively correlated with the impedance of the corresponding fan-out trace.

[0051] Specifically, the display information further includes display data, and the setting data includes a driving force parameter of each output channel, the driving force parameter of each output channel representing data used to control the driving force of each output channel, and the display data can be a data set representing corresponding data to be loaded by a plurality of pixel units. The driving force of the output channel is positively correlated with the impedance of the corresponding fan-out wire, indicating that the greater the impedance of the fan-out wire, the higher the driving force of the corresponding output channel, and the smaller the impedance of the fan-out wire, the smaller the driving force of the corresponding output channel. It can be understood that the setting data can be pre-set according to the impedance of the fan-out wire corresponding to each output channel.

[0052] It can be understood that the source driver 20 of the embodiment of the present application can control the driving force of each output channel to be adapted to the impedance of the corresponding fan-out wire through the compensation module 23, so as to compensate for the charging difference caused by the impedance of the fan-out wire, thereby improving the charging time difference of the pixels, keeping the charging time of each pixel on the display panel consistent, and further improving the situation of the display panel that the display screen is not bright and dark, and improving the visual experience of the display panel.

[0053] In some embodiments, the driving module 21 includes a data receiving unit 211, a shift register unit 212, a data temporary storage unit 213, a data latching unit 214, a level conversion unit 215, and a digital-to-analog conversion unit 216.

[0054] The output end of the data receiving unit 211 is connected with the input end of the compensation module 23 and the data temporary storage unit 213 respectively, the input end of the data temporary storage unit 213 is further connected with the output end of the shift register unit 212, the output end of the data temporary storage unit 213 is connected with the input end of the data latching unit 214, the output end of the data latching unit 214 is connected with the input end of the level conversion unit 215, the output end of the level conversion unit 215 is connected with the input end of the digital-to-analog conversion unit 216, and the output end of the digital-to-analog conversion unit 216 is connected with the input end of the buffer module 22.

[0055] The data receiving unit 211 is configured to receive the display information sent by the timing controller and transmit the display information to the data temporary storage unit 213 in the form of a serial signal. When the data receiving unit 211 transmits the serial signal to the data temporary storage unit 213, the shift register unit 212 is configured to generate a shift clock signal, and the data temporary storage unit 213 is configured to store the received serial signal under the control of the shift clock signal and transmit the stored serial signal to the data latch unit 214 in parallel after the storage is full. The level conversion unit 215 is configured to convert the low-level signal in the data latch unit 214 into a high-level signal, and the digital-to-analog conversion unit 216 is equivalent to a multi-channel selection switch. The converted high-level signal is used to open the corresponding switch to select the corresponding voltage, and the selected voltage is output after being enhanced by the buffer module 22.

[0056] Please refer to Figure 1 and Figure 3 In some embodiments, the buffer module 22 includes a plurality of output ports 221 distributed along the first direction X, each output port 221 is connected to a corresponding data line through a corresponding fan-out wire 50, and the plurality of output ports 221 includes a first port 2211 and a second port 2212. The length of the fan-out wire connected to the first port 2211 is greater than the length of the fan-out wire connected to the second port 2212, and the driving force of the output channel corresponding to the first port 2211 is greater than the driving force of the output channel corresponding to the second port 2212.

[0057] Through the above scheme, the length of the fan-out wire increases the impedance of the fan-out wire, and by increasing the driving force of the output channel corresponding to the longer fan-out wire, the charging inconsistency caused by the length difference of the fan-out wire can be better compensated, and the display effect of the display panel can be effectively improved.

[0058] In some embodiments, the plurality of output ports 221 further includes a third port 2213 located on the side of the second port 2212 away from the first port 2211. The fan-out wire connected to the third port 2213 is mirror-symmetric to the fan-out wire connected to the first port 2211 along the center axis C of the source driver, and the driving force of the output channel corresponding to the first port 2211 is the same as the driving force of the output channel corresponding to the third port 2213.

[0059] Through the above scheme, by increasing the driving force of the output channel corresponding to the longer fan-out wire while keeping the driving force of the output channel corresponding to the fan-out wire with the same length the same, the in-plane charging consistency can be better balanced, and the display effect of the display panel can be effectively improved.

[0060] Please refer to Figure 4 , Figure 4This is a waveform diagram illustrating the charging of a display panel by the data signal output from the source driver provided in an embodiment of this application. Exemplarily, using... Figure 1 Taking the first region a, the second region b, and the third region c on the central display panel 10 as examples, for a source driver 20, the fan-out traces 50 corresponding to the output channels on both sides are longer than the fan-out traces 50 corresponding to the output channel in the middle, and are mirror-symmetrical about the middle output channel. The fan-out traces 50 corresponding to the first region a and the third region c are equivalent to the fan-out traces 50 corresponding to the output channels on both sides of the source driver 20, and the fan-out trace 50 corresponding to the second region b is equivalent to the fan-out trace 50 corresponding to the output channel in the middle of the source driver 20, and both extend along the second direction Y. In order to compensate for the difference in charging delay caused by the length of the fan-out traces 50, the driving force of the output channels corresponding to the first region a and the third region c (corresponding to curves d' and f') is set to be faster and / or the driving force of the output channel corresponding to the second region b (corresponding to curve e') is set to be slower, so that the output waveform area of ​​all channels is basically the same, thereby compensating for the problem of inconsistent charging time caused by the difference in the sector traces 50.

[0061] In some embodiments, the driving force can be controlled in groups. For example, the setting data may include driving force parameters for multiple groups of output channels. That is, the setting data includes grouping information for the output channels, as well as the sequence number of each group of output channels and the corresponding driving force parameter. The driving force parameter of each group of output channels is used to simultaneously control the driving force of all output channels in that group. Accordingly, the compensation module 23 is configured to control the driving force of each output channel based on the setting data, which can be specifically implemented in the following way:

[0062] Based on the driving force parameters of each output channel, a control signal for each output channel is generated, so as to control the driving force of all output channels in the corresponding group through the control signal of each output channel.

[0063] The above approach can reduce the amount of data to be set, reduce the required storage space, simplify the processing, reduce hardware pressure, and thus improve processing speed.

[0064] Please refer to the following: Figures 5 to 7 , Figure 5 for Figure 3 A schematic diagram of the structure of the compensation module. Figure 6 for Figure 3 A partial structural diagram of the buffer module. Figure 7 for Figure 5 A schematic diagram of the structure of the first control unit. In some embodiments, the buffer module 22 includes n operational amplifiers 222, where n is the total number of output channels. That is, each operational amplifier 222 corresponds to one output channel.

[0065] Exemplarily, the operational amplifier 222 includes a first input end 2221, a second output end 2222, a first power supply end 2223, a second power supply end 2224, and an output end 2225. The first input end 2221 can be a positive input end, configured to receive display data of a corresponding output channel; the second output end 2222 can be a negative input end, electrically connected with the output end 2225; the second power supply end 2224 can be grounded; and the output end 2225 of the operational amplifier 222 is connected with a corresponding fan-out wire.

[0066] The compensation module 23 of the embodiment can include n first control units 231 and m second control units 232. Each first control unit 231 is connected with the first power supply end 2223 of a corresponding operational amplifier 222. Each second control unit 232 is connected with the driving module 21 and the M first control units 231 respectively, configured to generate a control signal corresponding to M output channels, where n = m x M. Exemplarily, the source driver has 960 output channels (i.e., n = 960), all the output channels are divided into four groups (i.e., m = 4), and each group has 240 output channels (i.e., M = 240). Therefore, each 240 output channels are controlled by the same control signal, and thus the driving force of the leftmost and rightmost 240 output channels can be set faster, and the driving force of the middle two 240 channels can be set slower, so as to maintain the in-plane charge uniformity.

[0067] In some examples, the control signal of each group of output channels has a bit number t. The larger t is, the more fine the data control is, but at the same time, more setting data is required. Exemplarily, t can be 3, that is, the control signal of each group of output channels is 3 bits. In this way, the adjustment accuracy and hardware storage requirement can be considered, and better control effect can be achieved.

[0068] In some embodiments, the first control unit 231 includes a plurality of parallel current control units, each of which includes a mirror current source 2311 and a switching unit 2312 connected in series. The mirror current source 2311 is configured to provide a charging current i, and the switching unit 2312 is configured to be turned on or off in response to a control signal. Specifically, if the control signal is 1, the switching unit 2312 can be turned on, and if the control signal is 0, the switching unit 2312 can be turned off.

[0069] In some examples, the control signal of each group of output channels has a bit number t, and the number of current control units is N, satisfying: N = 2 tFor example, taking t=3 as an example, the first control unit 231 includes 8 current control units, respectively labeled as 1-8, and 3-bit control signals are used to control the opening and closing of the 8 switch units 2312. For example, the 3-bit control signal is 11100000, then the switch units 2312 corresponding to serial numbers 1-3 are closed, and the switch units 2312 corresponding to serial numbers 4-8 are opened, and the current control units of the switch units 2312 corresponding to serial numbers 1-3 together provide a charging current of 3i to the operational amplifier 222. It can be understood that the more the switch units 2312 are closed, the greater the charging current provided to the operational amplifier 222, and correspondingly, the greater the driving force of the operational amplifier 222; the fewer the switch units 2312 are closed, the smaller the charging current provided to the operational amplifier 222, and correspondingly, the smaller the driving force of the operational amplifier 222.

[0070] Through the above scheme, the driving force of the operational amplifier 222 is adjusted by adjusting the charging current of the operational amplifier 222, which is relatively convenient to realize. In addition, the first control unit 231 is provided with multiple groups of parallel mirror current sources 2311 and switch units 2312, and the size of the charging current is adjusted by the opening and closing of the switch units 2312, which is ingenious in structure and easy to control.

[0071] In other embodiments, the driving force of each output channel can also be controlled individually, and the embodiments of the present application do not limit this. The specific structure of the compensation module 23 can also adopt other structures, as long as the idea of adjusting the charging current of the first power supply end 2223 of the operational amplifier 222 according to the impedance of the fan-out wire 50 is adopted, which should be included in the protection scope of the embodiments of the present application. In addition, the impedance influencing factors of the fan-out wire 50 can also include line width, material, etc. in addition to length, which can be determined according to actual conditions, and the embodiments of the present application do not limit this.

[0072] It can be understood that the source driver 20 of the embodiments of the present application can control the driving force of each output channel to adapt to the impedance of the corresponding fan-out wire 50 through the compensation module 23, so as to compensate for the charging difference caused by the impedance of the fan-out wire 50, thereby improving the charging time difference of the pixels, keeping the charging time of each pixel on the display panel consistent, and further improving the situation that the display picture is not uniform in brightness and darkness, and improving the visual experience of the display panel.

[0073] Correspondingly, the embodiments of the present application also provide a charging compensation method. Please refer to Figure 8 , Figure 8 for the overall flowchart of the charging compensation method of the embodiments of the present application. The charging compensation method is applied to the source driver 20 of the embodiments of the present application, and specifically includes the following steps:

[0074] Step 801: generating a data signal of each output channel based on the received display information, the display information comprising setting data.

[0075] Step 802: controlling a driving force of each output channel based on the setting data, wherein the driving force of the output channel is positively correlated with the impedance of the corresponding fan-out wire.

[0076] Step 803: charging the display panel based on the driving force of each output channel and each data signal.

[0077] It can be understood that the charging compensation method of the embodiments of the present application can control the driving force of each output channel based on the setting data to adapt to the impedance of the corresponding fan-out wire, thereby improving the pixel charging time difference caused by the impedance difference of the fan-out wire, so that the charging time of each pixel on the display panel is consistent, and the situation of bright and dark display picture is improved, and the visual experience of the display panel is improved.

[0078] Correspondingly, the display device of the embodiments of the present application can control the driving force of each output channel according to the impedance of each fan-out wire, so that the display panel is not easily affected by the impedance of the fan-out wire, and the display picture has good brightness uniformity and good visual experience.

[0079] It should be noted that the various embodiments of the above source driver, charging compensation method and display device can be mutually referred to, and the features not specifically described in a certain embodiment can be referred to the related content in other embodiments.

[0080] The above provides a detailed introduction to the source driver, charging compensation method and display device provided by the embodiments of the present application. The principle and implementation mode of the present application are described by applying specific examples, and the above embodiment description is only used to help understand the technical solutions and core ideas of the present application; those skilled in the art should understand that the technical solutions recorded in the above embodiments can be modified, or some technical features can be replaced by equivalents; and these modifications or replacements do not make the essence of the corresponding technical solutions deviate from the scope of the technical solutions of the embodiments of the present application.

Claims

1. A source driver, characterized in that, For driving the display panel, the source driver includes: The driving module is configured to generate data signals for each output channel based on received display information. The display information includes setting data, which is preset according to the impedance of the fan-out traces corresponding to each output channel. The setting data includes multiple sets of driving force parameters for the output channels. Each set of driving force parameters for the output channels is used to simultaneously control the driving force of all output channels in that set. A buffer module is connected to the drive module and to the display panel via multiple fan-out traces to form multiple output channels. The buffer module is configured to charge the display panel based on the driving force of each output channel and each data signal. A compensation module is connected to both the drive module and the buffer module, and is configured to control the driving force of each output channel based on the set data, wherein the driving force of the output channel is positively correlated with the impedance of the corresponding fan-out trace.

2. The source driver according to claim 1, characterized in that, The compensation module is configured to control the driving force of each output channel based on the set data, including: Based on the driving force parameters of each group of output channels, a control signal for each group of output channels is generated to control the driving force of all output channels in the corresponding group through the control signal of each group of output channels.

3. The source driver according to claim 2, characterized in that, The buffer module includes n operational amplifiers, the output of each operational amplifier being connected to a corresponding fan-out trace, where n is the total number of output channels; the compensation module includes: n first control units, each of which is connected to the first power supply terminal of the corresponding operational amplifier; There are m second control units, each of which is connected to the drive module and M first control units respectively, for generating control signals corresponding to the M output channels, where n = m × M.

4. The source driver according to claim 3, characterized in that, The first control unit includes: Multiple current control units connected in parallel, each current control unit including a mirror current source and a switching unit connected in series, the mirror current source being configured to provide charging current, and the switching unit being configured to turn on or off in response to the control signal.

5. The source driver according to claim 4, characterized in that, Each output channel's control signal has t bits, and the number of current control units is N, satisfying: N=2. t .

6. The source driver according to claim 1, characterized in that, The buffer module includes multiple output ports distributed along a first direction, and the display panel includes multiple data lines. Each output port is connected to a corresponding data line through a corresponding fan-out trace. The multiple output ports include a first port and a second port. Wherein, the length of the fan-out trace connected to the first port is greater than the length of the fan-out trace connected to the second port, and the driving force of the output channel corresponding to the first port is greater than the driving force of the output channel corresponding to the second port.

7. The source driver according to claim 6, characterized in that, The plurality of output ports further include a third port, the third port being located on the side of the second port away from the first port; The fan-out trace connected to the third port is mirror-symmetrical to the fan-out trace connected to the first port along the central axis of the source driver, and the driving force of the output channel corresponding to the first port is the same as the driving force of the output channel corresponding to the third port.

8. The source driver according to claim 1, characterized in that, The driving module includes a data receiving unit, a shift register unit, a data temporary storage unit, a data latch unit, a level conversion unit, and a digital-to-analog conversion unit; The output of the data receiving unit is connected to the input of the compensation module and the data temporary storage unit, respectively. The input of the data temporary storage unit is also connected to the output of the shift register unit. The output of the data temporary storage unit is connected to the input of the data latch unit. The output of the data latch unit is connected to the input of the level conversion unit. The output of the level conversion unit is connected to the input of the digital-to-analog conversion unit. The output of the digital-to-analog conversion unit is connected to the input of the buffer module.

9. A charging compensation method, characterized in that, The charging compensation method is applied to the source driver as described in any one of claims 1 to 8, the method comprising: Based on the received display information, a data signal for each output channel is generated. The display information includes setting data, which is preset according to the impedance of the fan-out traces corresponding to each output channel. The setting data includes multiple sets of driving force parameters for the output channels. Each set of driving force parameters for the output channels is used to simultaneously control the driving force of all output channels in that set. Based on the set data, the driving force of each output channel is controlled, wherein the driving force of the output channel is positively correlated with the impedance of the corresponding fan-out trace; The display panel is charged based on the driving force of each output channel and each data signal.

10. A display device, characterized in that, It includes a display panel and a source driver as described in any one of claims 1-8, wherein the source driver is connected to the display panel via a plurality of fan-out traces.

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