A radio signal receiving circuit for a multi-antenna DSP radio
Through the radio signal receiving circuit of a multi-antenna DSP radio, the cooperation of the Radio DSP processing unit and the second RF receiving unit is achieved, and the function of automatically searching for frequency in different regions and locking the emergency channel is solved, solving the problem of inconsistent emergency broadcast frequency and frequency band , simplifies the user's listening process.
Patent Information
- Application Number
- CN202411390322.1
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2024-10-08
- Publication Date
- 2024-12-17
- Estimated Expiration
- 2044-10-08
AI Technical Summary
When a vehicle travels to different regions, the frequency and frequency bands of emergency broadcasts are inconsistent, which increases the difficulty for users to listen to emergency broadcasts. It is difficult for the existing technology to achieve automatic frequency search and frequency locking.
A radio signal receiving circuit for a multi-antenna DSP radio is designed, including a first RF receiving unit, a second RF receiving unit, an ADC unit and a Radio DSP processing unit, and the tuning of the second RF receiving unit is controlled by outputting a tuning signal through the Radio DSP processing unit. Search for emergency channels in the current area and lock the frequency for playback after receiving RDS information or broadcast identifier.
It realizes the function of automatically searching for frequency and locking the emergency channel in the current area when the vehicle is driving to different regions. It is compatible with the input and output of multiple mode signals, simplifying the user's listening process.
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Figure CN118921073B_ABST
Abstract
Description
Technical Field
[0001] The invention relates to the technical field of wireless transmission, and in particular to a radio signal receiving circuit of a multi-antenna DSP radio. Background Art
[0002] Since the frequencies and bands of emergency broadcast channels are not consistent, when a vehicle is traveling outside, if you need to check whether the emergency channel in the current corresponding area is broadcasting, you need to query and adjust. Since there are many types of emergency broadcasts in each region, different regions will also use different frequency bands, which will increase the difficulty for users to listen to emergency broadcasts. Summary of the invention
[0003] In view of the above technical problems, the purpose of the present invention is to provide a radio signal receiving circuit of a multi-antenna DSP radio, comprising a first RF receiving unit, a second RF receiving unit, an ADC unit, and a Radio DSP processing unit, wherein the ADC unit is connected to the first RF receiving unit, the second RF receiving unit, and the Radio DSP processing unit, and the Radio DSP processing unit is connected to the second RF receiving unit, wherein the first RF receiving unit is used to receive and demodulate the AM amplitude modulation and / or FM frequency modulation broadcast signals adjusted by the user and output AM_10 or FM_10 to the ADC unit, wherein the ADC unit converts the signals into digital signals and inputs them into the Radio DSP processing unit for normal playback, and at the same time, the Radio DSP processing unit outputs tuning signals of different frequency bands PA_1 to control the tuning of the second RF receiving unit, searches for emergency channels in the current area through AM_2I and / or FM_2I, and feeds back AM_2O and / or FM_2O signals to the ADC unit for conversion into digital signals and then inputs them into the Radio DSP processing unit, when the Radio After receiving the RDS information or broadcast identification of the emergency channel in the current area, the DSP processing unit outputs the PA_2 signal to lock the current tuning frequency of the second RF receiving unit and play when there is a broadcast on the emergency channel.
[0004] Further, the second RF receiving unit includes a first resistor R1, a third resistor R3, a ninth resistor R9, a fourteenth resistor R14, a first digital potentiometer U1, a sixth operational amplifier U6, a third transistor Q3, a third varactor D3, a fourth varactor D4, a first capacitor C1, a second capacitor C2, and a third inductor L3;
[0005] One end of the first resistor R1 and one end of the third resistor R3 are connected to the power supply, the other end of the first resistor R1 is connected to one end of the first capacitor C1 and the collector of the third transistor Q3, the emitter of the third transistor Q3 is connected to one end of the fourteenth resistor R14, the base of the third transistor Q3 is connected to one end of the second capacitor C2, the other end of the third resistor R3, and one end of the ninth resistor R9, the other end of the second capacitor C2 is connected to the anode of the third variable capacitance diode D3 and one end of the third inductor L3, the tap end of the first digital potentiometer U1 is connected to the third variable capacitance diode D 3, the cathode of the fourth varactor diode D4, and the in-phase end of the sixth operational amplifier U6 are connected, the inverting end of the sixth operational amplifier U6 is connected to the PA_1 signal, the output end of the sixth operational amplifier U6 is connected to the control end of the first digital potentiometer U1, the clock end of the first digital potentiometer U1 is connected to the CLK clock source, the wake-up end of the first digital potentiometer U1 is connected to the PA_2 signal, the other end of the third inductor L3, the anode of the fourth varactor diode D4, the other end of the ninth resistor R9, the other end of the fourteenth resistor R14 and the ground are connected.
[0006] Further, the second RF receiving unit further includes a fifth resistor R5, a sixth resistor R6, a tenth resistor R10, a twelfth resistor R12, and a fourth operational amplifier U4;
[0007] One end of the fifth resistor R5 is connected to AM_2I, one end of the sixth resistor R6 is connected to the other end of the first capacitor C1, the in-phase end of the fourth operational amplifier U4 is connected to the other end of the fifth resistor R5 and one end of the twelfth resistor R12, the inverting end of the fourth operational amplifier U4 is connected to the other end of the sixth resistor R6 and one end of the tenth resistor R10, the output end of the fourth operational amplifier U4 and the other end of the tenth resistor R10 are connected to AM_2O, and the other end of the twelfth resistor R12 is connected to the ground end.
[0008] Further, the second RF receiving unit also includes an eighth resistor R8, an eleventh resistor R11, a fifteenth resistor R15, a sixteenth resistor R16, a seventeenth resistor R17, an eighteenth resistor R18, a second operational amplifier U2, a third operational amplifier U3, a fifth operational amplifier U5, a first field effect transistor Q1, a second field effect transistor Q2, a first diode D1, a second diode D2, a third capacitor C3, a fourth capacitor C4, a first inductor L1, and a second inductor L2;
[0009] One end of the first inductor L1 and one end of the second inductor L2 are connected to the power supply, the in-phase end of the second operational amplifier U2 is connected to the other end of the first capacitor C1, the output end of the second operational amplifier U2 is connected to the gate of the first field effect transistor Q1, the drain of the first field effect transistor Q1 is connected to the anode of the first diode D1 and the other end of the second inductor L2, the cathode of the first diode D1 is connected to one end of the third capacitor C3, one end of the eleventh resistor R11, and one end of the fifteenth resistor R15, the inverting end of the fifth operational amplifier U5 is connected to the other end of the eleventh resistor R11 and one end of the sixteenth resistor R16, the output end of the fifth operational amplifier U5, the other end of the sixteenth resistor R16 is connected to FM_2O, and the fifth operational amplifier U5 is connected to the output end of the fifth operational amplifier U5. The in-phase end is connected to one end of the eighth resistor R8 and one end of the seventeenth resistor R17, the cathode of the second diode D2 is connected to one end of the fourth capacitor C4, the other end of the eighth resistor R8, and one end of the eighteenth resistor R18, the anode of the second diode D2 is connected to the other end of the first inductor L1 and the drain of the second field effect transistor Q2, the gate of the second field effect transistor Q2 is connected to the output end of the third operational amplifier U3, the in-phase end of the third operational amplifier U3 is connected to FM_2I, the source of the first field effect transistor Q1, the source of the second field effect transistor Q2, the other end of the third capacitor C3, the other end of the fourth capacitor C4, the other end of the fifteenth resistor R15, the other end of the seventeenth resistor R17, the other end of the eighteenth resistor R18 and the ground end are connected.
[0010] Furthermore, the second RF receiving unit further includes a second resistor R2 and a seventh resistor R7;
[0011] One end of the second resistor R2 is connected to the power supply, the other end of the second resistor R2 is connected to one end of the seventh resistor R7 and the inverting end of the second operational amplifier U2, and the other end of the seventh resistor R7 is connected to the ground.
[0012] Furthermore, the second RF receiving unit further includes a fourth resistor R4 and a thirteenth resistor R13;
[0013] One end of the fourth resistor R4 is connected to the power supply, the other end of the fourth resistor R4 is connected to one end of the thirteenth resistor R13 and the inverting end of the third operational amplifier U3, and the other end of the thirteenth resistor R13 is connected to the ground.
[0014] Furthermore, it also includes a GPS unit, which is connected to the Radio DSP processing unit. The GPS unit feeds back positioning information to the Radio DSP processing unit, and the Radio DSP processing unit outputs a tuning signal of a corresponding frequency band to the second RF receiving unit.
[0015] Furthermore, it also includes multiple RS receiving circuits, and the remaining RS receiving circuits are used for the first RS receiving circuit to perform signal enhancement.
[0016] The beneficial effects of the present invention compared with the prior art are:
[0017] The present invention can automatically search for emergency broadcast channels in the current area when the vehicle travels to different areas, lock the current channel after receiving the emergency channel information in the current area, and the automatic search can be compatible with the input and output of multiple mode signals. BRIEF DESCRIPTION OF THE DRAWINGS
[0018] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the following briefly introduces the prior art and the drawings required for use in the embodiments. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.
[0019] Figure 1 The present invention provides an overall structural diagram.
[0020] Figure 2 This is a schematic diagram of the circuit connection of the second RF receiving unit provided by the present invention. DETAILED DESCRIPTION
[0021] In order to make the objects and advantages of the present invention more clearly understood, the present invention is specifically described below in conjunction with embodiments. It should be understood that the following text is only used to describe one or several specific implementations of the present invention, and does not strictly limit the scope of protection specifically requested by the present invention.
[0022] The present invention discloses a radio signal receiving circuit of a multi-antenna DSP radio, comprising a first RF receiving unit, a second RF receiving unit, an ADC unit, and a Radio DSP processing unit. The ADC unit is connected to the first RF receiving unit, the second RF receiving unit, and the Radio DSP processing unit. The Radio DSP processing unit is connected to the second RF receiving unit. The first RF receiving unit is used to receive and demodulate the AM amplitude modulation and / or FM frequency modulation broadcasting signals adjusted by the user and output AM_10 or FM_10 to the ADC unit. The ADC unit converts the signals into digital signals and inputs them into the Radio DSP processing unit for normal playback. At the same time, the Radio DSP processing unit outputs PA_1 tuning signals of different frequency bands to control the tuning of the second RF receiving unit. The emergency channels of the current area are searched through AM_2I and / or FM_2I, and the AM_2O and / or FM_2O signals are fed back to the ADC unit for conversion into digital signals and then input into the Radio DSP processing unit. The DSP processing unit outputs a PA_2 signal to lock the current tuning frequency of the second RF receiving unit after receiving the RDS information or broadcast identification of the emergency channel in the current area, and plays the broadcast when there is a broadcast on the emergency channel.
[0023] Specifically, the second RF receiving unit includes a first resistor R1, a third resistor R3, a ninth resistor R9, a fourteenth resistor R14, a first digital potentiometer U1, a sixth operational amplifier U6, a third transistor Q3, a third varactor D3, a fourth varactor D4, a first capacitor C1, a second capacitor C2, and a third inductor L3;
[0024] One end of the first resistor R1 and one end of the third resistor R3 are connected to the power supply, the other end of the first resistor R1 is connected to one end of the first capacitor C1 and the collector of the third transistor Q3, the emitter of the third transistor Q3 is connected to one end of the fourteenth resistor R14, the base of the third transistor Q3 is connected to one end of the second capacitor C2, the other end of the third resistor R3, and one end of the ninth resistor R9, the other end of the second capacitor C2 is connected to the anode of the third variable capacitance diode D3 and one end of the third inductor L3, the tap end of the first digital potentiometer U1 is connected to the third variable capacitance diode D 3, the cathode of the fourth varactor diode D4, and the in-phase end of the sixth operational amplifier U6 are connected, the inverting end of the sixth operational amplifier U6 is connected to the PA_1 signal, the output end of the sixth operational amplifier U6 is connected to the control end of the first digital potentiometer U1, the clock end of the first digital potentiometer U1 is connected to the CLK clock source, the wake-up end of the first digital potentiometer U1 is connected to the PA_2 signal, the other end of the third inductor L3, the anode of the fourth varactor diode D4, the other end of the ninth resistor R9, the other end of the fourteenth resistor R14 and the ground are connected.
[0025] Specifically, the second RF receiving unit further includes a fifth resistor R5, a sixth resistor R6, a tenth resistor R10, a twelfth resistor R12, and a fourth operational amplifier U4;
[0026] One end of the fifth resistor R5 is connected to AM_2I, one end of the sixth resistor R6 is connected to the other end of the first capacitor C1, the in-phase end of the fourth operational amplifier U4 is connected to the other end of the fifth resistor R5 and one end of the twelfth resistor R12, the inverting end of the fourth operational amplifier U4 is connected to the other end of the sixth resistor R6 and one end of the tenth resistor R10, the output end of the fourth operational amplifier U4 and the other end of the tenth resistor R10 are connected to AM_2O, and the other end of the twelfth resistor R12 is connected to the ground end.
[0027] Specifically, the second RF receiving unit further includes an eighth resistor R8, an eleventh resistor R11, a fifteenth resistor R15, a sixteenth resistor R16, a seventeenth resistor R17, an eighteenth resistor R18, a second operational amplifier U2, a third operational amplifier U3, a fifth operational amplifier U5, a first field effect transistor Q1, a second field effect transistor Q2, a first diode D1, a second diode D2, a third capacitor C3, a fourth capacitor C4, a first inductor L1, and a second inductor L2;
[0028] One end of the first inductor L1 and one end of the second inductor L2 are connected to the power supply, the in-phase end of the second operational amplifier U2 is connected to the other end of the first capacitor C1, the output end of the second operational amplifier U2 is connected to the gate of the first field effect transistor Q1, the drain of the first field effect transistor Q1 is connected to the anode of the first diode D1 and the other end of the second inductor L2, the cathode of the first diode D1 is connected to one end of the third capacitor C3, one end of the eleventh resistor R11, and one end of the fifteenth resistor R15, the inverting end of the fifth operational amplifier U5 is connected to the other end of the eleventh resistor R11 and one end of the sixteenth resistor R16, the output end of the fifth operational amplifier U5, the other end of the sixteenth resistor R16 is connected to FM_2O, and the fifth operational amplifier U5 is connected to the output end of the fifth operational amplifier U5. The in-phase end is connected to one end of the eighth resistor R8 and one end of the seventeenth resistor R17, the cathode of the second diode D2 is connected to one end of the fourth capacitor C4, the other end of the eighth resistor R8, and one end of the eighteenth resistor R18, the anode of the second diode D2 is connected to the other end of the first inductor L1 and the drain of the second field effect transistor Q2, the gate of the second field effect transistor Q2 is connected to the output end of the third operational amplifier U3, the in-phase end of the third operational amplifier U3 is connected to FM_2I, the source of the first field effect transistor Q1, the source of the second field effect transistor Q2, the other end of the third capacitor C3, the other end of the fourth capacitor C4, the other end of the fifteenth resistor R15, the other end of the seventeenth resistor R17, the other end of the eighteenth resistor R18 and the ground end are connected.
[0029] Specifically, the second RF receiving unit further includes a second resistor R2 and a seventh resistor R7;
[0030] One end of the second resistor R2 is connected to the power supply, the other end of the second resistor R2 is connected to one end of the seventh resistor R7 and the inverting end of the second operational amplifier U2, and the other end of the seventh resistor R7 is connected to the ground.
[0031] Specifically, the second RF receiving unit further includes a fourth resistor R4 and a thirteenth resistor R13;
[0032] One end of the fourth resistor R4 is connected to the power supply, the other end of the fourth resistor R4 is connected to one end of the thirteenth resistor R13 and the inverting end of the third operational amplifier U3, and the other end of the thirteenth resistor R13 is connected to the ground.
[0033] Specifically, it also includes a GPS unit, which is connected to the Radio DSP processing unit. The GPS unit feeds back positioning information to the Radio DSP processing unit, and the Radio DSP processing unit outputs a tuning signal of a corresponding frequency band to the second RF receiving unit.
[0034] Specifically, it also includes a plurality of RF receiving circuits, and the RF receiving circuits are used for the first RF receiving unit to perform signal enhancement.
[0035] Working principle of the present invention:
[0036] See attached Figure 1 The first RF receiving unit is used to receive and demodulate the AM and / or FM broadcast signals adjusted by the user and output AM_1O or FM_1O to the ADC unit for conversion into digital signals. The signals are fed back to the Radio DSP processing unit for normal playback. At the same time, the Radio DSP processing unit outputs different frequency band tuning signals PA_1 to the second RF receiving unit for tuning and searches for the emergency channel in the current area. When AM_2I and / or FM_2I receive the emergency broadcast signal, they are demodulated and fed back to the ADC unit through AM_2O and / or FM_2O signals for conversion into digital signals, which are then input to the Radio DSP processing unit. After the Radio DSP processing unit receives the RDS information or broadcast identifier of the emergency channel in the current area, it outputs the PA_2 signal to lock the current tuning frequency of the second RF receiving unit and plays when there is a broadcast on the emergency channel.
[0037] See attached Figure 2 The tuning signals of the different frequency band signals fed back by the Radio DSP processing unit are low-to-high voltage signals or high-to-low voltage cycle signals, and are connected to the inverting terminal of the sixth operational amplifier U6 in the second RF receiving unit through PA_1. The second RF receiving unit includes an AM output mode and an FM output mode, and any one or a combination of these modes can be used. Figure 2Two modes are shown, wherein the clock end 4 pin of the first digital potentiometer U1 receives the CLK clock source, the control end 5 pin of the first digital potentiometer U1 is connected to the in-phase end of the sixth operational amplifier U6, so that the sixth operational amplifier U6 first samples the voltage of the tap end 11 pin of the first digital potentiometer U1, the wake-up end 3 pin of the first digital potentiometer U1 is connected to PA_2, and the Radio DSP processing unit feeds back a low level wake-up when not detected, and after wake-up, the sixth operational amplifier U6 compares the in-phase end and the inverting end signals and outputs an adjustment signal to the control end 5 pin of the first digital potentiometer U1, and the first digital potentiometer U1 is adjusted, and the tap end 11 pin voltage is first made to correspond to PA_1, and then the third varactor D3 and the fourth varactor D4 are changed in capacitance, the third inductor L3 and the second capacitor C2 oscillate with the third varactor D3 and the fourth varactor D4 and are coupled to the base of the third transistor Q3 for amplification, and the third The resistor R3 and the ninth resistor R9 set the static bias voltage of the third transistor Q3, so that Q3 can be turned on at any time when the connection end of the third varactor diode D3 and the third inductor L3 is at a low potential. The first resistor R1 and the twelfth resistor R12 limit the current of the base and emitter of the third transistor Q3. When the second capacitor C2 is coupled, the potential of the first capacitor C1 end is pulled down and coupled to the inverting end of the fourth operational amplifier U4 and / or the non-inverting end of the second operational amplifier U2 through the sixth resistor R6. The method can be applicable to either or a combination of AM and FM modes.
[0038] In AM mode, the inverting end of the fourth operational amplifier U4 inputs the signal to the inverting end of the fourth operational amplifier U4 through the sixth resistor R6 and the tenth resistor R10, and outputs the signal differentially to AM_2O. When there is no emergency broadcast signal input to AM_2O, the instantaneous carrier amplitude of AM_2I is consistent with the tuning amplitude of the input of the inverting end of the fourth operational amplifier U4, and the amplitude does not change. When there is audio input in the emergency broadcast, AM_2I changes its amplitude, and the fourth operational amplifier U4 outputs the difference signal to AM_2O;
[0039] In FM mode, the signal coupled by the first capacitor C1 is input to the in-phase terminal of the second operational amplifier U2. The inverting terminal of the second operational amplifier U2 sets a reference signal through the second resistor R2 and the seventh resistor R7, or is set through a power supply. The reference signal is used for comparison by the second operational amplifier U2 during capacitor coupling to control the first field effect tube Q1 to be turned on or off. When turned on, the power supply passes through the second inductor L2 and the first field effect tube Q1 loop, and the voltage at the connection terminal of the first diode D1 and the fifteenth resistor R15 decreases. When the first field effect tube Q1 is turned off, the voltage at the terminal of the first diode D1 and the fifteenth resistor R15 increases. After filtering by the third capacitor C3, the frequency modulation signal is converted into a voltage signal. When the tuning voltage signal input by PA_1 changes, the sixth operational amplifier U6 controls the first digital potentiometer U1 to adjust. The frequency of the first capacitor C1 coupled to the in-phase terminal of the second operational amplifier U2 changes, and the frequency of the output terminal of the second operational amplifier U2 changes. The second operational amplifier U2 controls the first field effect tube Q1 to be turned on. The instantaneous carrier frequency of the FM_2I signal is consistent with the frequency output by the second operational amplifier U2 when there is no emergency audio input. The inverting terminal output of the third operational amplifier U3 controls the conduction and cutoff of the second field effect tube Q2. When the second field effect tube Q2 is turned on, the first inductor L1 passes through the grounding loop of the second field effect tube Q2. When the second field effect tube Q2 is turned off, the voltage at the connection terminal of the second diode D2 and the eighteenth resistor R18 rises. After filtering and voltage stabilization by the fourth capacitor C4, the frequency signal is converted into a voltage signal. At this time, the voltage of the capacitor C3 is consistent with that of the capacitor C4. The voltage at the terminal of the capacitor C4 is input to the fifth operational amplifier U5 through the eighth resistor R8, and the voltage at the terminal of the third capacitor C3 is input to the inverting terminal of the fifth operational amplifier U5 through the eleventh resistor R11. The fifth operational amplifier U5 performs differential output to FM_2O. When there is audio input in the emergency broadcast, FM_2I changes frequency, the voltage at the terminal of the fourth capacitor C4 changes, and the fifth operational amplifier U5 performs differential output to FM_2O.
[0040] The FM_2O and AM_2O feedback signals are first input into the ADC unit for digital conversion and then input into the Radio DSP processing unit. When the Radio DSP processing unit receives the RDS information or broadcast identification of the emergency channel in the current area, it outputs a high-level PA_2 signal to pin 3 of the first digital potentiometer U1. The first digital potentiometer U1 is in sleep mode and locks the current output voltage of pin 11. The coupling frequency of C1 is fixed. When the RDS information or broadcast identification is lost, a low-level PA_2 signal is output to control the first digital potentiometer U1 to start again, and the second RF receiving unit enters automatic frequency search again. The Radio DSP processing unit can also input a tuning signal according to the positioning information fed back by the GPS unit.
[0041] It is obvious to those skilled in the art that the present invention is not limited to the details of the above exemplary embodiments, and that the present invention can be implemented in other specific forms without departing from the spirit or essential characteristics of the present invention.
Claims
1. A radio signal receiving circuit for a multi-antenna DSP radio, characterized in that: It includes a first RF receiving unit, a second RF receiving unit, an ADC unit, and a Radio DSP processing unit. The ADC unit is connected to the first RF receiving unit, the second RF receiving unit, and the Radio DSP processing unit. The Radio DSP processing unit is connected to the second RF receiving unit. The first RF receiving unit is used to receive and demodulate the AM amplitude modulation and / or FM frequency modulation broadcast signals adjusted by the user and output AM_10 or FM_10 to the ADC unit. The ADC unit converts the signals into digital signals and inputs them into the Radio DSP processing unit for normal playback. At the same time, the Radio DSP processing unit outputs PA_1 tuning signals of different frequency bands to control the tuning of the second RF receiving unit. The emergency channel of the current area is searched through AM_2I and / or FM_2I, and the AM_2O and / or FM_2O signals are fed back to the ADC unit for conversion into digital signals and then input into the Radio DSP processing unit. When the Radio DSP processing unit receives the RDS information or broadcast identifier of the emergency channel of the current area, it outputs the PA_2 signal to lock the current tuning frequency of the second RF receiving unit, and plays when there is a broadcast on the emergency channel. The second RF receiving unit includes a first resistor, a third resistor, a ninth resistor, a fourteenth resistor, a first digital potentiometer, a sixth operational amplifier, a third transistor, a third varactor diode, a fourth varactor diode, a first capacitor, a second capacitor, and a third inductor; One end of the first resistor and one end of the third resistor are connected to the power supply, the other end of the first resistor is connected to one end of the first capacitor and the collector of the third transistor, the emitter of the third transistor is connected to one end of the fourteenth resistor, the base of the third transistor is connected to one end of the second capacitor, the other end of the third resistor, and one end of the ninth resistor, the other end of the second capacitor is connected to the anode of the third varactor and one end of the third inductor, the tap end of the first digital potentiometer is connected to the cathode of the third varactor, the cathode of the fourth varactor, and the in-phase end of the sixth operational amplifier, the inverting end of the sixth operational amplifier is connected to the PA_1 signal, the output end of the sixth operational amplifier is connected to the control end of the first digital potentiometer, the clock end of the first digital potentiometer is connected to the CLK clock source, the wake-up end of the first digital potentiometer is connected to the PA_2 signal, and the other end of the third inductor, the anode of the fourth varactor, the other end of the ninth resistor, the other end of the fourteenth resistor and the ground end are connected.
2. The radio signal receiving circuit of the multi-antenna DSP radio according to claim 1, characterized in that: The second RF receiving unit further includes a fifth resistor, a sixth resistor, a tenth resistor, a twelfth resistor, and a fourth operational amplifier; One end of the fifth resistor is connected to AM_2I, one end of the sixth resistor is connected to the other end of the first capacitor, the in-phase end of the fourth operational amplifier is connected to the other end of the fifth resistor and one end of the twelfth resistor, the inverting end of the fourth operational amplifier is connected to the other end of the sixth resistor and one end of the tenth resistor, the output end of the fourth operational amplifier and the other end of the tenth resistor are connected to AM_2O, and the other end of the twelfth resistor is connected to the ground end.
3. The radio signal receiving circuit of the multi-antenna DSP radio according to claim 1, characterized in that: The second RF receiving unit also includes an eighth resistor, an eleventh resistor, a fifteenth resistor, a sixteenth resistor, a seventeenth resistor, an eighteenth resistor, a second operational amplifier, a third operational amplifier, a fifth operational amplifier, a first field effect transistor, a second field effect transistor, a first diode, a second diode, a third capacitor, a fourth capacitor, a first inductor, and a second inductor; One end of the first inductor and one end of the second inductor are connected to the power supply, the in-phase end of the second operational amplifier is connected to the other end of the first capacitor, the output end of the second operational amplifier is connected to the gate of the first field effect transistor, the drain of the first field effect transistor is connected to the anode of the first diode and the other end of the second inductor, the cathode of the first diode is connected to one end of the third capacitor, one end of the eleventh resistor, and one end of the fifteenth resistor, the inverting end of the fifth operational amplifier is connected to the other end of the eleventh resistor and one end of the sixteenth resistor, the output end of the fifth operational amplifier and the other end of the sixteenth resistor are connected to FM_2O, and the fifth operational amplifier is connected to the output end of the fifth operational amplifier. The in-phase end is connected to one end of the eighth resistor and one end of the seventeenth resistor, the cathode of the second diode is connected to one end of the fourth capacitor, the other end of the eighth resistor, and one end of the eighteenth resistor, the anode of the second diode is connected to the other end of the first inductor and the drain of the second field effect transistor, the gate of the second field effect transistor is connected to the output end of the third operational amplifier, the in-phase end of the third operational amplifier is connected to FM_2I, the source of the first field effect transistor, the source of the second field effect transistor, the other end of the third capacitor, the other end of the fourth capacitor, the other end of the fifteenth resistor, the other end of the seventeenth resistor, the other end of the eighteenth resistor and the ground are connected.
4. The radio signal receiving circuit of the multi-antenna DSP radio according to claim 3, characterized in that: The second RF receiving unit further includes a second resistor and a seventh resistor; One end of the second resistor is connected to the power supply, the other end of the second resistor is connected to one end of the seventh resistor and the inverting end of the second operational amplifier, and the other end of the seventh resistor is connected to the ground.
5. The radio signal receiving circuit of the multi-antenna DSP radio according to claim 3, characterized in that: The second RF receiving unit further includes a fourth resistor and a thirteenth resistor; One end of the fourth resistor is connected to the power supply, the other end of the fourth resistor is connected to one end of the thirteenth resistor and the inverting end of the third operational amplifier, and the other end of the thirteenth resistor is connected to the ground.
6. The radio signal receiving circuit of the multi-antenna DSP radio according to claim 1, characterized in that: It also includes a GPS unit, which is connected to the Radio DSP processing unit. The GPS unit feeds back positioning information to the Radio DSP processing unit, and the Radio DSP processing unit outputs a tuning signal of a corresponding frequency band to the second RF receiving unit.
7. The radio signal receiving circuit of the multi-antenna DSP radio according to claim 1, characterized in that: It also includes a plurality of RF receiving circuits, wherein the RF receiving circuits are used for the first RF receiving unit to perform signal enhancement.
