An optimization method and related equipment applied to neural network loop

Abstract

The embodiment of the present application belongs to the field of computer programming technology, and relates to an optimization method and related equipment applied to neural network loops, the method comprising: obtaining data signals collected by a central system; performing feature extraction operations on the data signals to obtain feature extraction data; inputting the feature extraction data into an artificial neural network for data analysis operations to obtain data analysis results; generating control microinstructions according to the data analysis results; and performing loop operations on the target neural network according to the control microinstructions. The present application establishes a neural network loop process regarding a neural network central control terminal, a command execution module, a neural network interaction module, and an evaluation module according to the operation of the neural network under the operation of the neural network in communication. In the process, reasonable operations are performed according to the microinstructions of the neural network central control terminal, and then the priority division of the instruction set is used to ensure that the microinstructions with high priority are effectively operated.

Description

Technical Field

[0001] The present application relates to the field of computer programming technology, and in particular to an optimization method and related equipment applied to a neural network loop. Background Art

[0002] Microinstructions refer to a set of control signals that execute a set of micro-operations in a microprogram-controlled computer. Neural networks (NNs) are divided into artificial neural networks (ANNs) and spiking neural networks (SNNs), among which ANNs are widely used in information processing to simulate the behavioral characteristics of animal neural networks. Instruction sets are used to control computer system operations and are an effective tool to improve the efficiency of microprocessors.

[0003] Currently, in order to improve the operating efficiency of neural networks in communication, the number of neural network cycles is usually reduced or cancelled. However, the applicant has found that reducing or canceling the number of neural network cycles will lead to a decrease in the accuracy of information transmission. Summary of the invention

[0004] The purpose of the embodiments of the present application is to propose an optimization method and related equipment applied to neural network loops to solve the problem that reducing or canceling the number of neural network loops will lead to reduced accuracy of information transmission.

[0005] In order to solve the above technical problems, the embodiment of the present application provides an optimization method applied to a neural network loop, which adopts the following technical solution:

[0006] Obtain data signals collected by the central system;

[0007] Performing a feature extraction operation on the data signal to obtain feature extraction data;

[0008] Inputting the feature extraction data into an artificial neural network for data analysis to obtain data analysis results;

[0009] Generate control microinstructions according to the data analysis results;

[0010] The target neural network is driven cyclically according to the control microinstructions.

[0011] Furthermore, after the step of acquiring the data signal collected by the central system, the following steps are also included:

[0012] Performing a preprocessing operation on the data signal to obtain preprocessed data;

[0013] The step of performing a feature extraction operation on the data signal to obtain feature extraction data specifically includes the following steps:

[0014] A feature extraction operation is performed on the preprocessed data to obtain the feature extracted data.

[0015] Furthermore, the step of performing a cyclic operation on the driving target neural network according to the control microinstruction specifically includes the following steps:

[0016] Performing a feasibility detection operation on the control microinstruction to obtain a feasibility detection result, wherein the feasibility detection result includes a feasible microinstruction and / or an infeasible microinstruction;

[0017] Execute the feasible microinstruction, and record the feasible information flow of the feasible microinstruction, and / or output the infeasible information flow of the infeasible microinstruction;

[0018] The target neural network is driven cyclically according to the feasibility information flow.

[0019] Furthermore, after the step of generating control microinstructions according to the data analysis results, the following steps are also included:

[0020] Performing classification operations on the control microinstructions to obtain microinstruction classification results;

[0021] Performing a priority sorting operation on the microinstruction classification results to obtain optimized microinstructions;

[0022] The step of performing a cyclic operation on the driving target neural network according to the control microinstruction specifically includes the following steps:

[0023] The target neural network is driven cyclically according to the optimized microinstructions.

[0024] Furthermore, the microinstruction classification results include a complex instruction set, a reduced instruction set, and an external auxiliary instruction set, and the step of performing a priority sorting operation on the microinstruction classification results to obtain optimized microinstructions specifically includes the following steps:

[0025] Performing complex classification processing on the complex instruction set to obtain an executable simplified instruction set, an executable internal auxiliary instruction set, and a non-executable instruction set;

[0026] The weight order of the optimized microinstructions is set from high to low as the reduced instruction set, the executable reduced instruction set, the executable internal auxiliary instruction set, the external auxiliary instruction set and the non-executable instruction set.

[0027] In order to solve the above technical problems, the embodiment of the present application also provides an optimization device applied to a neural network loop, which adopts the following technical solution:

[0028] A signal acquisition module is used to acquire data signals collected by the central system;

[0029] A feature extraction module, used to perform a feature extraction operation on the data signal to obtain feature extraction data;

[0030] A data analysis module, used for inputting the feature extraction data into an artificial neural network for data analysis operation to obtain data analysis results;

[0031] A microinstruction generation module, used for generating control microinstructions according to the data analysis results;

[0032] A loop operation module is used to perform a loop operation on the driving target neural network according to the control microinstructions.

[0033] Furthermore, the device further comprises: a preprocessing module, and the feature extraction module comprises: a feature extraction submodule, wherein:

[0034] The preprocessing module is used to perform a preprocessing operation on the data signal to obtain preprocessed data;

[0035] The feature extraction submodule is used to perform a feature extraction operation on the preprocessed data to obtain the feature extracted data.

[0036] Furthermore, the cyclic operation module includes:

[0037] A feasibility detection submodule, used for performing a feasibility detection operation on the control microinstruction to obtain a feasibility detection result, wherein the feasibility detection result includes a feasible microinstruction and / or an infeasible microinstruction;

[0038] A microinstruction execution submodule, configured to execute the feasible microinstruction, and record the feasibility information flow of the feasible microinstruction, and / or output the infeasibility information flow of the infeasible microinstruction;

[0039] The loop operation submodule is used to perform a loop operation on the driving target neural network according to the feasibility information flow.

[0040] In order to solve the above technical problems, the embodiment of the present application further provides a computer device, which adopts the following technical solution:

[0041] It includes a memory and a processor, wherein the memory stores computer-readable instructions, and when the processor executes the computer-readable instructions, the steps of the optimization method applied to the neural network loop as described above are implemented.

[0042] In order to solve the above technical problems, the embodiment of the present application further provides a computer-readable storage medium, which adopts the following technical solution:

[0043] The computer-readable storage medium stores computer-readable instructions, which, when executed by a processor, implement the steps of the optimization method applied to a neural network loop as described above.

[0044] The present application provides an optimization method applied to a neural network loop, comprising: acquiring a data signal collected by a central system; performing a feature extraction operation on the data signal to obtain feature extraction data; inputting the feature extraction data into an artificial neural network to perform a data analysis operation to obtain a data analysis result; generating a control microinstruction based on the data analysis result; and performing a loop operation on driving a target neural network based on the control microinstruction. Compared with the prior art, the present application establishes a neural network cycle process regarding the neural network central control end, command execution module, neural network interaction module and evaluation module according to the operation status of the neural network during the operation of the neural network in communication. In this process, reasonable operation is performed according to the microinstructions of the neural network central control end, and then the priority division of the instruction set is used to ensure that the microinstructions with high priority are effectively operated. At the same time, during the operation of the microinstructions, the commands are executed in sequence according to the weight of the priority, and the feasibility of the microinstructions is judged and detected during execution, and the executable commands and feedback execution information are synchronously issued after the detection to form the synchronization of the neural network cycle and the operation of the neural network, and the neural network data is checked in the neural network cycle, so that the neural network cycle can be guaranteed on the premise of ensuring the efficiency of the neural network operation, and the accuracy of the information transmitted by the neural network can be guaranteed. At the same time, through microinstructions and optimized instruction sets, the synchronization of neural network operation and data checking capabilities can be improved; under the premise of efficient operation, the neural network cycle is guaranteed to improve the accuracy of information transmission; priority setting ensures the efficient execution of high-priority instruction sets and improves the acceleration effect of the neural network cycle. BRIEF DESCRIPTION OF THE DRAWINGS

[0045] In order to more clearly illustrate the scheme in the present application, a brief introduction is given below to the drawings required for use in the description of the embodiments of the present application. Obviously, the drawings described below are some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.

[0046] Figure 1 is an exemplary system architecture diagram to which the present application may be applied;

[0047] Figure 2 It is a flowchart of the implementation of the optimization method applied to the neural network loop provided in the first embodiment of the present application;

[0048] Figure 3 It is a schematic diagram of the system structure of an optimization device applied to a neural network loop provided in Example 2 of the present application;

[0049] Figure 4 It is a schematic diagram of the structure of an optimization device applied to a neural network loop provided in Example 2 of the present application;

[0050] Figure 5 It is a structural diagram of an embodiment of a computer device according to the present application. DETAILED DESCRIPTION

[0051] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as those commonly understood by technicians in the technical field of the present application; the terms used in the specification of the application herein are only for the purpose of describing specific embodiments and are not intended to limit the present application; the terms "including" and "having" and any variations thereof in the specification and claims of the present application and the above-mentioned drawings are intended to cover non-exclusive inclusions. The terms "first", "second", etc. in the specification and claims of the present application or the above-mentioned drawings are used to distinguish different objects, not to describe a specific order.

[0052] Reference to "embodiments" herein means that a particular feature, structure, or characteristic described in conjunction with the embodiments may be included in at least one embodiment of the present application. The appearance of the phrase in various locations in the specification does not necessarily refer to the same embodiment, nor is it an independent or alternative embodiment that is mutually exclusive with other embodiments. It is explicitly and implicitly understood by those skilled in the art that the embodiments described herein may be combined with other embodiments.

[0053] In order to enable those skilled in the art to better understand the solution of the present application, the technical solution in the embodiments of the present application will be clearly and completely described below in conjunction with the accompanying drawings.

[0054] like Figure 1 As shown, the system architecture 100 may include terminal devices 101, 102, 103, a network 104, and a server 105. The network 104 is used to provide a medium for communication links between the terminal devices 101, 102, 103 and the server 105. The network 104 may include various connection types, such as wired, wireless communication links, or optical fiber cables.

[0055] Users can use terminal devices 101, 102, 103 to interact with server 105 through network 104 to receive or send messages, etc. Various communication client applications can be installed on terminal devices 101, 102, 103, such as web browser applications, shopping applications, search applications, instant messaging tools, email clients, social platform software, etc.

[0056] Terminal devices 101, 102, 103 can be various electronic devices with display screens and supporting web browsing, including but not limited to smart phones, tablet computers, e-book readers, MP3 players (Moving Picture Experts Group Audio Layer III), MP4 (Moving Picture Experts Group Audio Layer IV), laptop computers and desktop computers, etc.

[0057] The server 105 may be a server that provides various services, such as a background server that provides support for web pages displayed on the terminal devices 101 , 102 , and 103 .

[0058] It should be noted that the optimization method applied to the neural network loop provided in the embodiment of the present application is generally executed by a server / terminal device, and accordingly, the optimization device applied to the neural network loop is generally set in the server / terminal device.

[0059] It should be understood that Figure 1 The number of terminal devices, networks and servers in the embodiment is only for illustration. Any number of terminal devices, networks and servers may be provided according to implementation requirements.

[0060] Embodiment 1

[0061] Continue to refer Figure 2 , shows a flow chart of an embodiment of an optimization method applied to a neural network loop according to the present application. The optimization method applied to a neural network loop includes: step S201, step S202, step S203, step S204 and step S205.

[0062] In step S201, the data signal collected by the central system is obtained.

[0063] In step S202, a feature extraction operation is performed on the data signal to obtain feature extraction data.

[0064] In step S203, the feature extraction data is input into the artificial neural network for data analysis operation to obtain data analysis results.

[0065] In step S204, control microinstructions are generated according to the data analysis results.

[0066] In step S205, the target neural network is driven in a loop according to the control microinstructions.

[0067] In the embodiments of this application, see Figure 3 and Figure 4 The schematic diagram of the system structure of the design center system of the recurrent neural network accelerator shown in the figure, wherein the design center system includes a neural network central control terminal, a command execution module, a neural network interaction module and an evaluation module. The neural network central control terminal is set at the center of the design center system and forms data interaction with the command execution module, the neural network interaction module and the evaluation module through the neural network respectively. The command execution module receives the signal of the neural network central control terminal and controls the neural network interaction module. With the neural network central control terminal as the center, a cycle of neural network information data is formed.

[0068] In the embodiment of the present application, the neural network central control terminal is used to receive all data signals in the design center system, analyze the data signal values, and then issue multiple instructions about the neural network based on the analysis results. The instruction information is collected to form microinstructions after being issued. Among them, the data signals in the design center system mainly include sensor data, user input, system status information, etc. For example, in an intelligent transportation system, the data signal can be a real-time video stream from a camera, traffic flow data from a sensor, and a user's route planning request.

[0069] In the embodiment of the present application, the neural network central control terminal is configured with four independent neural network data lines, which are respectively a unidirectional neural network data line for the neural network central control terminal to transmit instructions to the command execution module, a unidirectional neural network data line for the neural network central control terminal to receive feedback information flow from the command execution module, a unidirectional neural network data line for the neural network central control terminal to receive feedback information flow from the neural network interaction module, and a unidirectional neural network data line for the neural network central control terminal to transmit the analyzed feedback information flow to the evaluation module. The four neural network lines do not interfere with each other, and while reducing information interference, the speed of information transmission can be increased.

[0070] In the embodiment of the present application, multiple CPUs are established in the neural network control terminal, and each CPU independently collects microinstructions. Each CPU processes different information, which can effectively ensure the working efficiency of each CPU and reduce mutual interference during data processing.

[0071] In the embodiment of the present application, a neural network database is established in the neural network central control terminal, and multiple sub-databases are established in the database, and each sub-database includes a MySQL+Amoeba database cluster and an Amoeba proxy server cluster. The sub-database can be used to organize the database, and then the sub-database cluster can be used to classify multiple data in the database, thereby improving the efficiency of subsequent data capture.

[0072] In the embodiments of the present application, existing research may be insufficient in loop optimization of the neural network. Although reducing or canceling the number of loops can improve operating efficiency, this may reduce the accuracy of information transmission and affect the final performance of the neural network. In this regard, the present application provides the following optimization directions:

[0073] (1) Layered loop optimization:

[0074] Divide the neural network model into different layers, such as input layer, hidden layer, and output layer;

[0075] For each layer Perform independent loop optimization to reduce redundant calculations;

[0076] The calculation results of each layer are combined to obtain the final model output.

[0077] Among them, for each layer , after loop optimization It can be expressed as:

[0078] in, is the weight matrix, For input, is the bias, is the activation function. Through optimization, redundant calculations and invalid operations are reduced.

[0079] (2) Parallel computing:

[0080] Distribute cyclic tasks to multiple processing units;

[0081] Use parallel computing libraries (such as the multiprocessing library in Python) to execute multiple loop tasks simultaneously;

[0082] Collect and merge the results of parallel computing.

[0083] For parallel computing, assuming there are N tasks, the execution time of each task is , the optimized execution time can be obtained by parallelizing the formula:

[0084] Through parallelization, each task can be executed simultaneously on different processing units, reducing the overall execution time.

[0085] In the embodiment of the present application, the training time is reduced by 20% and the model accuracy is improved by about 2% through layered loop optimization. Parallel computing further reduces the execution time to 60% of the original, and the model performance remains stable.

[0086] In an embodiment of the present application, a command execution module is used to receive commands from a neural network control terminal and determine whether the execution of the command is feasible. When the command execution is feasible, the command execution module performs operations according to the command and feeds back the executed information flow. When the command is not executable, the command execution module only feeds back the unexecuted information flow.

[0087] In the embodiment of the present application, a one-way information data flow is established in the command execution module to transmit execution information from the command execution module to the neural network interaction module. The one-way information data flow has a fast transmission speed and can improve the transmission efficiency of the neural network information data.

[0088] In the embodiment of the present application, in the command execution module, a Hash algorithm is used to determine the executability of the command.

[0089] In an embodiment of the present application, the neural network interaction module is used to perform operations based on the execution information of the command execution module, select one or more of building a neural network subset, producing a new neural network, performing a neural network loop, performing neural network acceleration, and performing neural network output, and feed back the final interactive information data stream to the neural network central control end.

[0090] In the embodiment of the present application, in the neural network interaction module, each interactive step in the neural network loop is added with a built-in microinstruction, and the neural network is accelerated in a cyclic progressive manner according to the microinstruction. The microinstructions correspond one-to-one to the steps in the neural network loop, which can ensure the orderliness of the execution of the microinstruction information, and facilitate the determination of the running order of the microinstructions according to the priority when the instruction set is optimized later.

[0091] In an embodiment of the present application, the evaluation module is used to evaluate the feedback information flow in the control terminal of the neural network, determine the operation status of the neural network in the design center system, and finally display the evaluation results in the design center system.

[0092] In an embodiment of the present application, an optimization method applied to a neural network loop is provided, including: acquiring a data signal collected by a central system; performing a feature extraction operation on the data signal to obtain feature extraction data; inputting the feature extraction data into an artificial neural network to perform a data analysis operation to obtain a data analysis result; generating a control microinstruction based on the data analysis result; and performing a loop operation on driving a target neural network based on the control microinstruction. Compared with the prior art, the present application establishes a neural network cycle process regarding the neural network central control end, command execution module, neural network interaction module and evaluation module according to the operation status of the neural network during the operation of the neural network in communication. In this process, reasonable operation is performed according to the microinstructions of the neural network central control end, and then the priority division of the instruction set is used to ensure that the microinstructions with high priority are effectively operated. At the same time, during the operation of the microinstructions, the commands are executed in sequence according to the weight of the priority, and the feasibility of the microinstructions is judged and detected during execution, and the executable commands and feedback execution information are synchronously issued after the detection to form the synchronization of the neural network cycle and the operation of the neural network, and the neural network data is checked in the neural network cycle, so that the neural network cycle can be guaranteed on the premise of ensuring the efficiency of the neural network operation, and the accuracy of the information transmitted by the neural network can be guaranteed. At the same time, through microinstructions and optimized instruction sets, the synchronization of neural network operation and data checking capabilities can be improved; under the premise of efficient operation, the neural network cycle is guaranteed to improve the accuracy of information transmission; priority setting ensures the efficient execution of high-priority instruction sets and improves the acceleration effect of the neural network cycle.

[0093] In some optional implementations of the embodiments of the present application, after step S201, the following steps are further included:

[0094] Performing a preprocessing operation on the data signal to obtain preprocessed data;

[0095] Step S202 specifically includes the following steps:

[0096] Perform feature extraction operation on the preprocessed data to obtain feature extracted data.

[0097] In the embodiment of the present application, the implementation process of the preprocessing operation may be:

[0098] 1. Get data signal

[0099] The analog signal collected by the sensor is converted into a digital signal by the central processor, which is recorded as ,in, Represents the original signal collected by the sensor, which may be the signal value of a pressure sensor or a temperature sensor, such as the value of light intensity.

[0100] 2. Data filtering

[0101] Signal Perform denoising, remove bias, smooth data, and enhance patterns;

[0102] 1) Denoising: Use wavelet transform or low-pass filter to remove noise signals;

[0103] Its formula: ,in, is the original signal, Represents the noise component in the signal.

[0104] 2) Smoothing: Use moving average or Gaussian smoothing to remove noise;

[0105] Its formula: ,in, is the signal of the original signal, It is the selection size, which indicates the time range considered during smoothing.

[0106] 3) Enhanced mode: using interpolation method,

[0107] Its formula: ,

[0108] in, is the interpolated signal value, and are known adjacent time points, and are the signal values ​​at these two time points respectively.

[0109] 3. Feature extraction

[0110] From the preprocessed signal Extract statistical information from the .

[0111] 1) Time domain features: The mean can be used for calculation, and the mean formula is: ,in, is the average value of the signal, the calculation includes all The preprocessed signal at each time point Or use the variance to calculate, the formula is: ,in, is the variance of the signal, considering An unbiased estimate of the sample variance of the total data points.

[0112] 2) Frequency domain conversion: Based on the application of fast Fourier transform (FFT), the formula used is: ,in, It's a signal The frequency domain representation after fast Fourier transform is used to analyze the frequency components in the signal.

[0113] 4. Data Analysis

[0114] For the feature vector Input neural network to generate analysis results .

[0115] Forward propagation formula based on neural network: ,in, is the output of the neural network, is the weight matrix, is the input vector, is the bias vector, is the activation function (e.g. ReLU or Sigmoid).

[0116] The loss function of mean square error (MSE): ,in, is the loss function value, is the number of samples, is the predicted value, is the true value.

[0117] 5. Control and adjust parameters

[0118] According to the output of the neural network Generate control tuning parameters .in, Represents the parameter value of the control adjustment, which may be the result of some algorithm based on the network output.

[0119] 6. Microinstruction classification and sorting

[0120] The generated microinstructions Classify and sort to obtain an optimized instruction set;

[0121] Based on priority or weight , sort the microinstructions, the formula is: ,in, is a sorted set of microinstructions, is the corresponding priority weight.

[0122] 7. Feasibility test

[0123] The parameters for the generation Conduct feasibility testing and generate feasibility information flow. Its feasibility function:

[0124] ,

[0125] in, It is the feasibility judgment function of the microinstruction, and the output The statement is feasible. Indicates that it is not feasible.

[0126] 8. Microinstruction execution and loop operation

[0127] According to the results of the feasibility test, the feasible microinstructions are executed and the loop operation of the neural network is performed; the neural network is fed back and looped to optimize the model parameters. The formula is: ,in, is the updated weight, is the weight before updating, is the learning rate, is the gradient of the loss function with respect to the weights.

[0128] 9. System Implementation

[0129] The above steps are implemented in an actual system, including data storage, signal processing, neural network training and reasoning, etc. Specifically, the memory and processor are used to execute instructions stored on a computer-readable storage medium to complete the system tasks.

[0130] 10. Storage Media

[0131] The instructions for implementing the above method are stored to facilitate system call and execution. Specifically, a conventional storage device (such as SSD) and a compiled program file are used.

[0132] In some optional implementations of the embodiments of the present application, step S205 specifically includes the following steps:

[0133] Performing a feasibility detection operation on the control microinstruction to obtain a feasibility detection result, wherein the feasibility detection result includes a feasible microinstruction and / or an infeasible microinstruction;

[0134] Execute the feasible microinstructions, and record the feasible information flow of the feasible microinstructions, and / or output the infeasible information flow of the infeasible microinstructions;

[0135] The driving target neural network is cyclically operated according to the feasibility information flow.

[0136] In some optional implementations of the embodiments of the present application, after step S205, the following steps are further included:

[0137] Performing classification operations on the control microinstructions to obtain microinstruction classification results;

[0138] Performing a priority sorting operation on the microinstruction classification results to obtain optimized microinstructions;

[0139] The steps of performing a cyclic operation on the target neural network according to the control microinstruction specifically include the following steps:

[0140] The target neural network is driven cyclically according to the optimized microinstructions.

[0141] In some optional implementations of the embodiments of the present application, the microinstruction classification results include a complex instruction set, a reduced instruction set, and an external auxiliary instruction set, and the microinstruction classification results are prioritized to obtain the steps of optimizing the microinstructions, which specifically include the following steps:

[0142] Performing complex classification processing on the complex instruction set to obtain an executable simplified instruction set, an executable internal auxiliary instruction set and an unexecutable instruction set;

[0143] The weight order of the optimized microinstructions is set from high to low as a reduced instruction set, an executable reduced instruction set, an executable internal auxiliary instruction set, an external auxiliary instruction set, and a non-executable instruction set.

[0144] In an embodiment of the present application, the present application provides an instruction set optimization method in the design of a recurrent neural network accelerator with built-in microinstructions. The specific implementation steps of the instruction set optimization method are as follows:

[0145] Step 1: Collect microinstructions and form an instruction set: Collect all microinstructions between the neural network central control terminal, command execution module, neural network interaction module and evaluation module in the design center system and form a microinstruction set.

[0146] Step 2: Create subsets of the instruction set and classify the subsets: according to the complexity of the instruction set, create complex instruction sets, reduced instruction sets, and external auxiliary instruction sets, and select the execution priority of multiple instruction sets.

[0147] Step three: Connect a subset of the classified instruction sets to the neural network control terminal to optimize the neural network loop: Based on the execution priority, ensure that the instruction sets with higher priority are executed first, thereby ensuring the rapid execution of the neural network loop and accelerating the neural network loop. For the instruction sets with lower priority, establish an independent execution chain to reduce the impact on the neural network loop.

[0148] Specifically, in step 2, the complex instruction set is analyzed and divided into an executable simplified instruction set, an executable internal auxiliary instruction set and a non-executable instruction set.

[0149] The priority weight order from high to low is reduced instruction set auxiliary instruction set, executable reduced instruction set, executable internal auxiliary instruction set, external auxiliary instruction set, and non-executable instruction set.

[0150] In some optional implementations of the embodiments of the present application, in the control process of the neural network, the existing method may not effectively classify and prioritize the instruction set, resulting in the situation where low-priority instructions may interfere with high-priority instructions during the execution process, thereby affecting the overall efficiency and accuracy of the neural network. In this regard, the present application provides the following optimization directions:

[0151] (1) Instruction set priority sorting:

[0152] Classify instruction sets into high priority and low priority according to their importance;

[0153] Build an instruction queue based on priority and process high-priority instructions first;

[0154] The instructions in the queue are executed sequentially to ensure that high-priority tasks are processed first.

[0155] Specifically, assuming the instruction set is , corresponding to the priority . Optimized instruction execution order for:

[0156] By priority Execute the instructions after sorting.

[0157] (2) Instruction set classification optimization:

[0158] Categorize instruction sets into common instructions and special instructions;

[0159] Common instructions are executed independently in the main loop, and special instructions are separated into dedicated processing modules for execution;

[0160] Optimize instruction execution efficiency by reducing conflicts between instruction sets.

[0161] Specifically, assuming the instruction set is , the commonly used instruction set is , the special instruction set is . Optimized execution time for:

[0162] in, and Is the time for independent execution.

[0163] In the embodiment of the present application, after the instruction set is optimized, the overall execution speed is increased by 15%, and the delay time of high-priority tasks is reduced by 30%, and the system responds more quickly.

[0164] In some optional implementations of the embodiments of the present application, existing research may not pay enough attention to the preprocessing of input data, resulting in the accuracy of subsequent feature extraction and data analysis results being affected. In large-scale data applications, failure to effectively process noise or abnormal data may lead to error accumulation. In this regard, the present application provides the following optimization directions:

[0165] (1) Automated data cleaning:

[0166] Use statistical methods (such as Z-score or IQR) to detect outliers in the data;

[0167] Remove or correct detected noise to ensure data quality;

[0168] The uniformity of data.

[0169] For detecting outliers, the Z-score method can be used. ,in, is the mean, is the standard deviation, , it is treated as an outlier.

[0170] (2) Data enhancement:

[0171] Generate synthetic data using data augmentation techniques (e.g., random noise addition, data flipping);

[0172] Add synthetic data to the original dataset to increase the diversity of training data;

[0173] Retrain the model using the expanded dataset to improve the model's generalization ability.

[0174] For example, suppose the original data is The enhanced data is , the training set after data enhancement is ,based on , through data enhancement, increase the diversity of training data.

[0175] In the embodiment of the present application, after automated data cleaning, the noise of the training set was reduced by 25%, and the accuracy of the model was improved by about 3%. Data enhancement improved the performance of the model on the test set to nearly 95% accuracy.

[0176] In some optional implementations of the embodiments of the present application, when executing control microinstructions, existing research may not have a sound enough mechanism for detecting the feasibility of instructions, and fail to fully consider the feasibility of microinstructions, resulting in unnecessary computational overhead or errors in the actual execution process. In this regard, the present application provides the following optimization directions:

[0177] (1) Real-time feasibility detection mechanism:

[0178] Monitor the resource status of the current system (such as memory, CPU);

[0179] Before executing the instruction, check whether the resource conditions are met;

[0180] If resources are insufficient, the current instruction is skipped or execution is delayed.

[0181] Specifically, the feasibility detection function: , where if the resource is available, the instruction is executed, otherwise it is skipped.

[0182] (2) Estimation mechanism:

[0183] Build forecasting models based on historical execution data.

[0184] If the estimated result does not meet expectations, choose to skip or optimize the instruction.

[0185] Specifically, the estimation model can use a linear regression model: ,in, is the prediction result, are input features, , are model parameters.

[0186] In the embodiment of the present application, the introduction of the feasibility detection mechanism reduces 30% of invalid calculations, which increases the resource utilization of the system by 20%. At the same time, through the estimation mechanism, the calculation error rate is reduced to 50% of the original.

[0187] In some optional implementations of the embodiments of the present application, the operating environment and data characteristics of the neural network may change dynamically. Existing research may lack the ability to dynamically adjust the neural network during the cycle, resulting in an inability to adapt to changes and requirements in the real-time environment, reducing the flexibility and adaptability of the system. In this regard, the present application provides the following optimization directions:

[0188] (1) Adaptive adjustment algorithm:

[0189] Monitor input data and external environment changes in real time;

[0190] Adjust the parameters of the neural network (e.g., learning rate, number of cycles) according to the changes;

[0191] Continue to optimize and adjust to ensure the adaptability of the model.

[0192] For example, to dynamically adjust the learning rate: ,in, is the initial learning rate, is the attenuation coefficient, is the time step.

[0193] (2) Incremental learning:

[0194] Label the new data and add it to the incremental training set;

[0195] Perform incremental training based on the existing model and gradually update the model parameters;

[0196] Validate model performance on incremental datasets to ensure continuous improvement.

[0197] For example, the model update formula for incremental learning is: ,in, are the current model parameters, is the learning rate, is the loss function, For new data.

[0198] In the embodiment of the present application, the adaptive adjustment algorithm makes the system more stable in different environments, and the response time is shortened to 80%. Under the incremental learning mechanism, the model shows a continuous improvement of 2% on the updated data without affecting the performance of the original data.

[0199] In some optional implementations of the embodiments of the present application, the device support of the existing neural network loop optimization method may be limited, and the hardware resources cannot be fully utilized, which limits the overall performance improvement of the neural network. In this regard, the present application provides the following optimization directions:

[0200] (1) Hardware accelerator integration:

[0201] For example, GPU or TPU, select the appropriate hardware accelerator according to task requirements;

[0202] Integrate hardware accelerators into the computing framework to ensure that computing tasks can be executed on the accelerator;

[0203] Utilize the high parallelism of the accelerator to optimize the distribution of computing tasks.

[0204] For example, the hardware accelerator optimization formula: ,in, is the computation time on the CPU, is the acceleration factor.

[0205] (2) Hybrid architecture optimization:

[0206] Divide the computing task into parts suitable for the CPU and parts suitable for the accelerator;

[0207] Simultaneously utilize CPU and hardware accelerators for heterogeneous computing;

[0208] The results of heterogeneous computing are merged to obtain the final output.

[0209] Through heterogeneous calculation formula: ,in, and are the computation time of CPU and GPU respectively, Merge time for results.

[0210] In the embodiment of the present application, after the hardware accelerator is integrated, the computing speed is increased to 2 times and the energy consumption is reduced by 30%. The cross-platform optimization reduces the efficiency difference executed on different devices to less than 10%, ensuring the consistency of the system.

[0211] The embodiments of the present application can acquire and process relevant data based on artificial intelligence technology. Artificial Intelligence (AI) is the theory, method, technology and application system that uses digital computers or machines controlled by digital computers to simulate, extend and expand human intelligence, perceive the environment, acquire knowledge and use knowledge to obtain the best results.

[0212] AI basic technologies generally include sensors, dedicated AI chips, cloud computing, distributed storage, big data processing technology, operation / interaction systems, mechatronics, etc. AI software technologies mainly include computer vision technology, robotics technology, biometrics technology, speech processing technology, natural language processing technology, and machine learning / deep learning.

[0213] Those skilled in the art can understand that all or part of the processes in the above-mentioned embodiments can be implemented by instructing the relevant hardware through computer-readable instructions, and the computer-readable instructions can be stored in a computer-readable storage medium. When the program is executed, it can include the processes of the embodiments of the above-mentioned methods. Among them, the aforementioned storage medium can be a non-volatile storage medium such as a disk, an optical disk, a read-only memory (ROM), or a random access memory (RAM).

[0214] It should be understood that, although the steps in the flowchart of the accompanying drawings are displayed in sequence as indicated by the arrows, these steps are not necessarily executed in sequence in the order indicated by the arrows. Unless otherwise specified herein, there is no strict order restriction on the execution of these steps, and they can be executed in other orders. Moreover, at least a part of the steps in the flowchart of the accompanying drawings may include multiple sub-steps or multiple stages, and these sub-steps or stages are not necessarily executed at the same time, but can be executed at different times, and their execution order is not necessarily sequential, but can be executed in turn or alternately with other steps or at least a part of the sub-steps or stages of other steps.

[0215] Embodiment 2

[0216] Further references Figure 4 , as a response to the above Figure 2 The present application provides an embodiment of an optimization device for neural network loop, and the device embodiment is similar to Figure 2 Corresponding to the method embodiment shown, the device can be specifically applied to various electronic devices.

[0217] like Figure 4 As shown, the optimization device 200 applied to the neural network loop of the embodiment of the present application includes:

[0218] The signal acquisition module 210 is used to acquire the data signal collected by the central system;

[0219] The feature extraction module 220 is used to perform feature extraction operation on the data signal to obtain feature extraction data;

[0220] The data analysis module 230 is used to input the feature extraction data into the artificial neural network for data analysis operation to obtain data analysis results;

[0221] A microinstruction generation module 240 is used to generate control microinstructions according to the data analysis results;

[0222] The loop operation module 250 is used to perform loop operations on the driving target neural network according to the control microinstructions.

[0223] In an embodiment of the present application, an optimization device 200 applied to a neural network loop is provided, including: a signal acquisition module 210, used to acquire a data signal collected by a central system; a feature extraction module 220, used to perform a feature extraction operation on the data signal to obtain feature extraction data; a data analysis module 230, used to input the feature extraction data into an artificial neural network for data analysis operation to obtain a data analysis result; a microinstruction generation module 240, used to generate a control microinstruction according to the data analysis result; and a loop operation module 250, used to perform a loop operation on driving a target neural network according to the control microinstruction. Compared with the prior art, the present application establishes a neural network cycle process regarding the neural network central control end, command execution module, neural network interaction module and evaluation module according to the operation status of the neural network during the operation of the neural network in communication. In this process, reasonable operation is performed according to the microinstructions of the neural network central control end, and then the priority division of the instruction set is used to ensure that the microinstructions with high priority are effectively operated. At the same time, during the operation of the microinstructions, the commands are executed in sequence according to the weight of the priority, and the feasibility of the microinstructions is judged and detected during execution, and the executable commands and feedback execution information are synchronously issued after the detection to form the synchronization of the neural network cycle and the operation of the neural network, and the neural network data is checked in the neural network cycle, so that the neural network cycle can be guaranteed on the premise of ensuring the efficiency of the neural network operation, and the accuracy of the information transmitted by the neural network can be guaranteed. At the same time, through microinstructions and optimized instruction sets, the synchronization of neural network operation and data checking capabilities can be improved; under the premise of efficient operation, the neural network cycle is guaranteed to improve the accuracy of information transmission; priority setting ensures the efficient execution of high-priority instruction sets and improves the acceleration effect of the neural network cycle.

[0224] In some optional implementations of the embodiments of the present application, the device further includes: a preprocessing module, and the feature extraction module includes: a feature extraction submodule, wherein:

[0225] A preprocessing module, used for performing preprocessing operations on data signals to obtain preprocessed data;

[0226] The feature extraction submodule is used to perform feature extraction operations on the preprocessed data to obtain feature extracted data.

[0227] In some optional implementations of the embodiments of the present application, the cyclic operation module includes:

[0228] A feasibility detection submodule is used to perform a feasibility detection operation on the control microinstruction to obtain a feasibility detection result, wherein the feasibility detection result includes a feasible microinstruction and / or an infeasible microinstruction;

[0229] A microinstruction execution submodule, used for executing feasible microinstructions, and recording the feasibility information flow of the feasible microinstructions, and / or outputting the infeasibility information flow of the infeasible microinstructions;

[0230] The loop operation submodule is used to perform loop operations on the driving target neural network according to the feasibility information flow.

[0231] To solve the above technical problems, the present application also provides a computer device. Figure 5 , Figure 5 This is a basic structural block diagram of a computer device according to an embodiment of the present application.

[0232] The computer device 300 includes a memory 310, a processor 320, and a network interface 330 that are interconnected and communicated through a system bus. It should be noted that the figure only shows a computer device 300 having components 310-330, but it should be understood that it is not required to implement all the components shown, and more or fewer components can be implemented instead. Among them, those skilled in the art can understand that the computer device here is a device that can automatically perform numerical calculations and / or information processing according to pre-set or stored instructions, and its hardware includes but is not limited to microprocessors, application specific integrated circuits (Application Specific Integrated Circuit, ASIC), programmable gate arrays (Field-Programmable Gate Array, FPGA), digital processors (Digital Signal Processor, DSP), embedded devices, etc.

[0233] The computer device may be a computing device such as a desktop computer, a notebook, a PDA, a cloud server, etc. The computer device may interact with a user through a keyboard, a mouse, a remote controller, a touch pad, or a voice control device.

[0234] The memory 310 includes at least one type of readable storage medium, and the readable storage medium includes flash memory, hard disk, multimedia card, card-type memory (for example, SD or DX memory, etc.), random access memory (RAM), static random access memory (SRAM), read-only memory (ROM), electrically erasable programmable read-only memory (EEPROM), programmable read-only memory (PROM), magnetic memory, magnetic disk, optical disk, etc. In some embodiments, the memory 310 can be an internal storage unit of the computer device 300, such as a hard disk or memory of the computer device 300. In other embodiments, the memory 310 can also be an external storage device of the computer device 300, such as a plug-in hard disk equipped on the computer device 300, a smart memory card (Smart Media Card, SMC), a secure digital (Secure Digital, SD) card, a flash card, etc. Of course, the memory 310 can also include both the internal storage unit of the computer device 300 and its external storage device. In the embodiment of the present application, the memory 310 is generally used to store the operating system and various application software installed on the computer device 300, such as computer-readable instructions for the optimization method applied to the neural network loop. In addition, the memory 310 can also be used to temporarily store various data that have been output or are to be output.

[0235] The processor 320 may be a central processing unit (CPU), a controller, a microcontroller, a microprocessor, or other data processing chip in some embodiments. The processor 320 is generally used to control the overall operation of the computer device 300. In the embodiment of the present application, the processor 320 is used to run the computer-readable instructions stored in the memory 310 or process data, such as running the computer-readable instructions of the optimization method applied to the neural network loop.

[0236] The network interface 330 may include a wireless network interface or a wired network interface. The network interface 330 is generally used to establish a communication connection between the computer device 300 and other electronic devices.

[0237] The computer device provided by the present application, under the operation of the neural network in communication, establishes a neural network cycle process about the neural network central control end, command execution module, neural network interaction module and evaluation module according to the operation status of the neural network. In this process, reasonable operation is performed according to the microinstructions of the neural network central control end, and then the priority division of the instruction set is used to ensure that the microinstructions with high priority are effectively operated. At the same time, during the operation of the microinstructions, the commands are executed in sequence according to the weight of the priority, and the feasibility of the microinstructions is judged and detected during execution, and the executable commands and feedback execution information are synchronously issued after the detection, forming the synchronization of the neural network cycle and the operation of the neural network, and the neural network data is checked in the neural network cycle, so that the neural network cycle can be guaranteed on the premise of ensuring the efficiency of the neural network operation, and the accuracy of the information transmitted by the neural network can be guaranteed. At the same time, the synchronization of the neural network operation and the data checking capability can be improved through microinstructions and optimized instruction sets; the neural network cycle is guaranteed on the premise of efficient operation, and the accuracy of information transmission is improved; the priority setting ensures the efficient execution of high-priority instruction sets and improves the acceleration effect of the neural network cycle.

[0238] The present application also provides another embodiment, namely, providing a computer-readable storage medium, which stores computer-readable instructions, and the computer-readable instructions can be executed by at least one processor to enable the at least one processor to perform the steps of the optimization method applied to the neural network loop as described above.

[0239] The computer-readable storage medium provided by the present application establishes a neural network loop process regarding the neural network central control end, the command execution module, the neural network interaction module and the evaluation module according to the operation status of the neural network under the operation of the neural network in communication. In this process, reasonable operation is performed according to the microinstructions of the neural network central control end, and then the priority division of the instruction set is used to ensure that the microinstructions with high priority are effectively operated. At the same time, during the operation of the microinstructions, the commands are executed in sequence according to the weight of the priority, and the feasibility of the microinstructions is judged and detected during execution, and the executable commands and feedback execution information are synchronously issued after the detection to form the synchronization of the neural network loop and the operation of the neural network, and the neural network data is checked in the neural network loop, so that the neural network loop can be guaranteed on the premise of ensuring the efficiency of the neural network operation, and the accuracy of the information transmitted by the neural network can be guaranteed. At the same time, the synchronization of the neural network operation and the data checking capability can be improved through microinstructions and optimized instruction sets; the neural network loop is guaranteed on the premise of efficient operation, and the accuracy of information transmission is improved; the priority setting ensures the efficient execution of high-priority instruction sets and improves the acceleration effect of the neural network loop.

[0240] Through the description of the above implementation methods, those skilled in the art can clearly understand that the above-mentioned embodiment methods can be implemented by means of software plus a necessary general hardware platform, and of course by hardware, but in many cases the former is a better implementation method. Based on such an understanding, the technical solution of the present application, or the part that contributes to the prior art, can be embodied in the form of a software product, which is stored in a storage medium (such as ROM / RAM, a magnetic disk, or an optical disk), and includes a number of instructions for enabling a terminal device (which can be a mobile phone, a computer, a server, an air conditioner, or a network device, etc.) to execute the methods described in each embodiment of the present application.

[0241] Obviously, the embodiments described above are only some embodiments of the present application, rather than all embodiments. The preferred embodiments of the present application are given in the accompanying drawings, but they do not limit the patent scope of the present application. The present application can be implemented in many different forms. On the contrary, the purpose of providing these embodiments is to make the understanding of the disclosure of the present application more thorough and comprehensive. Although the present application is described in detail with reference to the aforementioned embodiments, for those skilled in the art, it is still possible to modify the technical solutions recorded in the aforementioned specific implementation methods, or to replace some of the technical features therein with equivalents. Any equivalent structure made using the contents of the specification and drawings of this application, directly or indirectly used in other related technical fields, is similarly within the scope of patent protection of this application.

Claims

1. An optimization method applied to a neural network loop, characterized in that: The steps include: Obtain data signals collected by the central system; Performing a feature extraction operation on the data signal to obtain feature extraction data; Inputting the feature extraction data into an artificial neural network for data analysis to obtain data analysis results; Generate control microinstructions according to the data analysis results; driving the target neural network to perform a cyclic operation according to the control microinstructions; After the step of generating control microinstructions according to the data analysis results, the following steps are also included: Performing classification operations on the control microinstructions to obtain microinstruction classification results; Performing a priority sorting operation on the microinstruction classification results to obtain optimized microinstructions; The step of driving the target neural network to perform a cyclic operation according to the control microinstruction specifically includes the following steps: The target neural network is driven to perform loop operations according to the optimized microinstructions.

2. The optimization method for neural network loop according to claim 1, characterized in that: After the step of acquiring the data signal collected by the central system, the following steps are also included: Performing a preprocessing operation on the data signal to obtain preprocessed data; The step of performing a feature extraction operation on the data signal to obtain feature extraction data specifically includes the following steps: A feature extraction operation is performed on the preprocessed data to obtain the feature extracted data.

3. The optimization method for neural network loop according to claim 1, characterized in that: The step of driving the target neural network to perform a cyclic operation according to the control microinstruction specifically includes the following steps: Performing a feasibility detection operation on the control microinstruction to obtain a feasibility detection result, wherein the feasibility detection result includes a feasible microinstruction and / or an infeasible microinstruction; Execute the feasible microinstruction, and record the feasible information flow of the feasible microinstruction, and / or output the infeasible information flow of the infeasible microinstruction; The target neural network is driven to perform a cyclic operation according to the feasibility information flow.

4. The optimization method for neural network loop according to claim 1, characterized in that: The microinstruction classification results include a complex instruction set, a reduced instruction set, and an external auxiliary instruction set. The step of performing a priority sorting operation on the microinstruction classification results to obtain optimized microinstructions specifically includes the following steps: Performing complex classification processing on the complex instruction set to obtain an executable simplified instruction set, an executable internal auxiliary instruction set, and a non-executable instruction set; The weight order of the optimized microinstructions is set from high to low as the reduced instruction set, the executable reduced instruction set, the executable internal auxiliary instruction set, the external auxiliary instruction set and the non-executable instruction set.

5. An optimization device for neural network loop, characterized in that: include: A signal acquisition module is used to acquire data signals collected by the central system; A feature extraction module, used to perform a feature extraction operation on the data signal to obtain feature extraction data; A data analysis module, used for inputting the feature extraction data into an artificial neural network for data analysis operation to obtain data analysis results; A microinstruction generation module, used for generating control microinstructions according to the data analysis results; A loop operation module, used for driving the target neural network to perform a loop operation according to the control microinstruction; The device further comprises: an instruction classification module and a priority sorting module, and the loop operation module comprises: a loop operation submodule, wherein: The instruction classification module is used to classify the control microinstructions to obtain microinstruction classification results; The priority sorting module is used to perform a priority sorting operation on the microinstruction classification results to obtain optimized microinstructions; The loop operation submodule is used to drive the target neural network to perform a loop operation according to the optimized microinstruction.

6. The optimization device for neural network loop according to claim 5, characterized in that: The device further comprises: a preprocessing module, and the feature extraction module comprises: a feature extraction submodule, wherein: The preprocessing module is used to perform a preprocessing operation on the data signal to obtain preprocessed data; The feature extraction submodule is used to perform a feature extraction operation on the preprocessed data to obtain the feature extracted data.

7. The optimization device for neural network loop according to claim 6, characterized in that: The cyclic operation module comprises: A feasibility detection submodule, used for performing a feasibility detection operation on the control microinstruction to obtain a feasibility detection result, wherein the feasibility detection result includes a feasible microinstruction and / or an infeasible microinstruction; A microinstruction execution submodule, configured to execute the feasible microinstruction, and record the feasibility information flow of the feasible microinstruction, and / or output the infeasibility information flow of the infeasible microinstruction; The loop operation submodule is used to drive the target neural network to perform a loop operation according to the feasibility information flow.

8. A computer device comprising a memory and a processor, wherein the memory stores computer-readable instructions, and when the processor executes the computer-readable instructions, the steps of the optimization method applied to a neural network loop as described in any one of claims 1 to 4 are implemented.

9. A computer-readable storage medium, characterized in that: The computer-readable storage medium stores computer-readable instructions, which, when executed by a processor, implement the steps of the optimization method applied to a neural network loop as described in any one of claims 1 to 4.

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