A read-write circuit, method, and array

Abstract

The present application provides a read-write circuit, a method and an array, relating to the technical field of integrated circuits. The read-write circuit at least includes a first switching transistor, a second switching transistor, a spin-orbit torque layer, a plurality of magnetic tunnel junctions, a write bit line, a read bit line and a source line; the plurality of magnetic tunnel junctions are arranged in sequence on the spin-orbit torque layer, and the tops of the plurality of magnetic tunnel junctions are connected to the same read bit line; both ends of the spin-orbit torque layer are respectively connected to the write bit line and the source line. The first switching transistor is used to control the write bit line to apply a write voltage to the spin-orbit torque layer; the second switching transistor is used to control the read bit line to apply a read voltage to the plurality of magnetic tunnel junctions; when reading data, by controlling the conduction or cutoff of the first switching transistor and the second switching transistor, two storage data can be obtained, and the specific storage state of the plurality of magnetic tunnel junctions can be obtained based on the two storage data. The present application can provide a technical solution that can obtain a larger number of resistance states without increasing the storage density.

Description

Technical Field

[0001] This application relates to the field of integrated circuit technology, and particularly to a read-write circuit, method, and array. Background Art

[0002] Magnetic Random Access Memory (MRAM) is a memory that stores information based on resistance. The basic storage unit of MRAM is a Magnetic Tunnel Junction (MTJ). A Magnetic Tunnel Junction based on the Spin Orbit Torque (SOT) effect is called an SOT-MTJ, and its structure includes a bottom spin orbit torque layer and a magnetic tunnel junction thereon. Write channels are formed at both ends of the spin orbit torque layer, and a read channel is formed between the top of the magnetic tunnel junction and one end of the spin orbit torque. The storage unit with the MTJ as the core in the spin orbit torque layer needs to set a corresponding Metal-Oxide-Semiconductor Field-Effect Transistor (MOS) to gate its read-write channels.

[0003] Generally, the writing method of SOT-MTJ is bidirectional writing, that is, the resistance state of the MTJ changes with the direction of the writing current. However, in the bidirectional writing method, when the resistance value of the MOS transistor in the write channel is small compared with the resistance value of the SOT layer, the writing voltage is mainly divided on the SOT layer, so that the voltage between the source and drain of the MOS is close. When the writing voltage is large, the voltage difference between the gate and source of the MOS in one of the writing directions is small, affecting its conductivity. And the technical solution of using a transmission gate instead of a single MOS to solve the above problem will increase the MOS area overhead and limit the storage density of MRAM.

[0004] To solve the above problems, those skilled in the art proposed a technical solution of sharing the same spin orbit torque layer by multiple MTJs, that is, NAND-type SOT-MTJ, so that the average number of transistors corresponding to each MTJ can be reduced. In addition, the NAND-type spin orbit torque device can also combine the Voltage Controlled Magnetic Anisotropy (VCMA) writing mechanism to perform random gating and data writing on the MTJ.

[0005] Based on the unit structure of the NAND-type SOT-MTJ, the parallel resistance of multiple MTJs can be read, so that multiple different resistance states can be obtained in a NAND unit, and thus in-memory computing with multiple weight values can be realized. However, in the technical solution of generating multiple weight values using parallel resistors, the result of resistor parallel connection is independent of the position of the MTJ on the SOT and only related to the number of high and low resistance states. Therefore, the number of obtained resistance states is still small. To meet the requirements of data storage, the requirement for the storage density of MRAM needs to be increased. Summary of the Invention

[0006] This application provides a read-write circuit, method, and array, aiming to provide a technical solution that can obtain a larger number of resistance states without increasing the storage density of magnetic storage units.

[0007] In a first aspect, this application provides a read-write circuit, which at least includes a first switch transistor, a second switch transistor, a spin-orbit torque layer, multiple magnetic tunnel junctions, a write bit line, a read bit line, and a source line.

[0008] The multiple magnetic tunnel junctions are arranged in sequence on the spin-orbit torque layer, and the tops of the multiple magnetic tunnel junctions are connected to the same read bit line.

[0009] Both ends of the spin-orbit torque layer are respectively connected to the write bit line and the source line. The first switch transistor is used to control the write bit line to apply a write voltage to the spin-orbit torque layer.

[0010] The second switch transistor is used to control the read bit line to apply a read voltage to the multiple magnetic tunnel junctions.

[0011] When reading data, by controlling the on or off states of the first switch transistor and the second switch transistor, two types of stored data can be obtained, and the specific storage states of the multiple magnetic tunnel junctions can be obtained based on the two types of stored data.

[0012] In an optional implementation manner, the write bit line applies a first write voltage to the spin-orbit torque layer, and the magnetic tunnel junction flips to a first resistance state;

[0013] The write bit line applies a second write voltage in the same direction as the first write voltage to the spin-orbit torque layer again, and the magnetic tunnel junction flips to a second resistance state;

[0014] The second write voltage is greater than twice the first write voltage.

[0015] In an optional implementation manner, along the writing direction of the write voltage, the threshold flip voltages corresponding to the multiple magnetic tunnel junctions gradually increase.

[0016] In an optional implementation manner, the magnetic tunnel junction includes an antiferromagnet, and the magnitude and direction of the leakage magnetic field of the antiferromagnet have a corresponding relationship with the magnitude and direction of the threshold flip voltage required by the magnetic tunnel junction.

[0017] In an optional implementation manner, when reading data, the first switch transistor is turned off and the second switch transistor is turned on. A first read voltage is provided to the multiple magnetic tunnel junctions through the read bit line and the source line to obtain first read data.

[0018] The first read data is used to obtain the first storage state of the multiple magnetic tunnel junctions in the parallel state.

[0019] The first storage state types are N + 1 kinds, where N is the number of magnetic tunnel junctions.

[0020] In a possible implementation, the first read data of some of the first storage states is the same.

[0021] After obtaining the first read data, the first switch transistor and the second switch transistor are turned on, controlling the second read voltage at both ends of the read bit line and the write bit line to be the same, and obtaining the second read data based on the magnitude of the current value at the source line and the position distribution of the magnetic tunnel junctions.

[0022] The second read data is used to obtain the specific storage states of multiple magnetic tunnel junctions when the first read data is the same.

[0023] In a second aspect, the present application also provides a read-write array, including: a plurality of read-write circuits arranged in a matrix and as described in any item of the first aspect;

[0024] Among them, the first switch transistors in several read-write circuits are connected to the same write bit line, and the write voltage is controlled to be applied to the target read-write circuit through the first switch transistor.

[0025] The second switch transistors in several read-write circuits are connected to the same read bit line, and the read voltage is controlled to be applied to the target read-write circuit through the second switch transistor.

[0026] A plurality of read-write circuits can achieve parallel reading.

[0027] In a third aspect, the present application also provides a read-write method, including the following steps:

[0028] When writing data, the second switch transistor is turned on, and a write voltage is applied in the spin-orbit torque layer by controlling the first switch transistor.

[0029] When reading data, by controlling the on or off of the first switch transistor and the second switch transistor, two storage data can be obtained, and the specific storage states of multiple magnetic tunnel junctions can be obtained based on the two storage data.

[0030] In a possible implementation,

[0031] When reading data, the first switch transistor is turned off, the second switch transistor is turned on, and a first read voltage is provided to multiple magnetic tunnel junctions through the read bit line and the source line to obtain the first read data;

[0032] The first read data is used to obtain the first storage state of multiple magnetic tunnel junctions in a parallel state;

[0033] The first storage state types are N + 1 kinds, where N is the number of magnetic tunnel junctions.

[0034] In a possible implementation, the first read data of some of the first storage states is the same.

[0035] After obtaining the first read data, the first switching transistor and the second switching transistor are turned on to control the second read voltages at both ends of the read bit line and the write bit line to be the same, and the second read data is obtained based on the magnitude of the current value at the source line and the position distribution of the magnetic tunnel junctions.

[0036] The second read data is used to obtain the specific storage states of multiple magnetic tunnel junctions when the first read data is the same.

[0037] In the technical solution provided by the present application, during data writing, a write voltage can be applied to the spin-orbit torque layer through the write bit line to flip multiple magnetic tunnel junctions to different resistance states. It should be understood that the present application controls the write bit line to apply a write voltage to the spin-orbit torque layer through the first switching transistor, indicating that the write voltage of the present application is a unidirectional write voltage. In this unidirectional write operation, the second switching transistor can be used to keep the top of each magnetic tunnel junction at equal potential, and there is a potential difference between the bottom and the top of the MTJ to generate the VCMA effect. Under the influence of the VCMA effect in the longitudinal direction of the magnetic tunnel junction, data can be written to multiple magnetic tunnel junctions. Based on this, in the data writing path of the present application, only one first transistor is provided between the write bit line and the spin-orbit torque layer, and one second transistor is provided at the top of the read bit line and multiple magnetic tunnel junctions, without the need to provide a corresponding turn-on transistor for each magnetic tunnel junction. Therefore, the present application reduces the area occupied by the turn-on transistor corresponding to each magnetic tunnel junction and improves the storage density.

[0038] During data reading, the present application can obtain two types of stored data, and based on these two types of stored data, obtain the specific storage states of multiple magnetic tunnel junctions. Compared with the prior art where only the parallel resistance of multiple MTJs is read, and the parallel resistance of these multiple MTJs is only related to the number of high and low resistance states and is independent of the position of the MTJ on the SOT, the specific storage states between multiple magnetic tunnel junctions obtained by the present application are not only related to the number of high and low resistance states but also related to the position of the MTJ on the SOT. Therefore, more storage states can be obtained. Thus, the present application can obtain a larger number of resistance states without increasing the storage density of the magnetic storage unit, meeting the data storage requirements. BRIEF DESCRIPTION OF THE DRAWINGS

[0039] The drawings here are incorporated into the specification and form a part of this specification, showing embodiments consistent with the present application, and are used together with the specification to explain the principles of the present application.

[0040] Figure 1 It is a circuit structure diagram of a read-write circuit provided by an embodiment of the present application;

[0041] Figure 2The relationship between different leakage magnetic fields corresponding to the conversion of a magnetic tunnel junction from the P resistance state to the AP resistance state and the window of the unidirectional write current provided by the embodiments of the present application;

[0042] Figure 3 The relationship between different leakage magnetic fields corresponding to the conversion of a magnetic tunnel junction from the AP resistance state to the P resistance state and the window of the unidirectional write current provided by the embodiments of the present application;

[0043] Figure 4 The relationship between the write voltage and the MTJ resistance state when the SAF net magnetic moment is 0 provided by the embodiments of the present application;

[0044] Figure 5 The relationship between the write voltage and the MTJ resistance state when the SAF net magnetic moment is from P to AP provided by the embodiments of the present application;

[0045] Figure 6 The relationship between the write voltage and the MTJ resistance state when the SAF net magnetic moment is from AP to P provided by the embodiments of the present application;

[0046] Figure 7 The circuit structure diagram for data reading of a NAND-type magnetic storage unit provided by the embodiments of the present application;

[0047] Figure 8 The schematic diagram of the MTJ resistance state distribution corresponding to the first read data provided by the embodiments of the present application;

[0048] Figure 9 The schematic diagram of the MTJ resistance state distribution corresponding to the second read data provided by the embodiments of the present application;

[0049] Figure 10 The circuit schematic diagram for obtaining the second read data provided by the embodiments of the present application;

[0050] Figure 11 The write structure of a NAND-type magnetic storage unit provided by the embodiments of the present application and the corresponding write voltage distribution diagram;

[0051] Figure 12 The schematic diagram of the structure of a read-write array provided by the embodiments of the present application.

[0052] Through the above-mentioned drawings, the clear embodiments of the present application have been shown, and there will be more detailed descriptions hereinafter. These drawings and text descriptions are not intended to limit the scope of the concept of the present application in any way, but to illustrate the concept of the present application to those skilled in the art by referring to specific embodiments. Detailed implementation manners

[0053] Exemplary embodiments will be described in detail herein, and examples thereof are shown in the accompanying drawings. When the following description refers to the accompanying drawings, unless otherwise indicated, the same numbers in different drawings represent the same or similar elements. The embodiments described in the following exemplary embodiments do not represent all embodiments consistent with the present application. On the contrary, they are merely examples of devices and methods consistent with some aspects of the present application as detailed in the appended claims.

[0054] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the technical field to which this application belongs. The terms used in the specification of this application herein are only for the purpose of describing specific embodiments and are not intended to limit this application. It can be understood that the terms "first", "second", etc. used in this application can be used herein to describe various information or data, but these elements are not limited by these terms. These terms are only used to distinguish one piece of information from another. For example, without departing from the scope of this application, the first action information can be referred to as the second action information, and similarly, the second action information can be referred to as the first action information. Both the first action information and the second action information are action information, but they are not the same action information.

[0055] Magnetic Random Access Memory (MRAM) is a memory that stores information based on resistance. The basic storage unit of MRAM is a Magnetic Tunnel Junction (MTJ), and its core structure is a multi-layer film structure composed of ferromagnetic metal / oxide / ferromagnetic metal. The magnetization direction of one ferromagnetic layer is difficult to change and is called the fixed layer; the magnetization direction of the other ferromagnetic layer can be changed by a magnetic field or current and is called the free layer. When the magnetization direction of the free layer is parallel (P state) or anti-parallel (AP state) to the magnetization direction of the fixed layer, the MTJ is in a low-resistance or high-resistance state respectively, and the two resistance states can represent binary data "0" and "1" respectively.

[0056] The SOT-MTJ based on the Spin Orbit Torque (SOT) effect is a three-port device, including the bottom SOT layer and the MTJ thereon, forming a read channel and a write channel. The storage unit with it as the core requires a transistor (MOS) to gate its read and write channels. The selection of the two resistance states of the SOT-MTJ is usually determined by the direction of the write current, that is, bidirectional writing. However, there are currently some problems with the bidirectional writing method: when the resistance value of the write-channel MOS transistor is small compared to the resistance value of the SOT layer, the write voltage division is mainly on the SOT layer, making the MOS source-drain voltage magnitudes close. When the write voltage is large, it will cause the gate-source voltage difference of the MOS in one of the write directions to be small, affecting its conductivity. Currently, some solutions are to use a transmission gate instead of a single MOS, but this will increase the MOS area overhead and limit the storage density of the MRAM.

[0057] Based on this, currently, a NAND-type SOT-MRAM scheme is adopted to make multiple MTJs share the same SOT layer, so as to reduce the average number of transistors corresponding to each MTJ. In addition, the NAND-type spin orbit torque device can also combine the Voltage Controlled Magnetic Anisotropy (VCMA) writing mechanism to perform random gating and data writing on the MTJ.

[0058] Using the structure of the NAND-type SOT-MTJ, the parallel resistance of multiple MTJs can be read, so as to obtain multiple different resistance states within a NAND cell. Using this feature, the NAND-type SOT-MTJ can be used as a computing unit of a deep neural network model to achieve in-memory computing of multiple weight values based on Ohm's law and Kirchhoff's law. However, there are certain problems with the method of generating multiple weight values using parallel resistances: the result of resistance parallel connection has nothing to do with the position of the MTJ on the SOT and is only related to the number of high and low resistance states. Therefore, the number of obtained resistance states is still small, which increases the requirement for the storage density of the MRAM.

[0059] Based on this, the technical concept of this application is: based on the VCMA (Voltage-Controlled Magnetic Anisotropy) effect, use the unidirectional writing method to perform a writing operation on the NAND-type magnetic storage unit, so as to control different resistance states of multiple magnetic tunnel junctions by controlling the magnitude of the write voltage. And in the reading stage, two steps are adopted to read the data. Among them, the application positions of the read voltages in the two reading steps are different, and the resistance states represented by the read data are also different.

[0060] The following uses specific embodiments to elaborate in detail on the technical solution of this application and how the technical solution of this application solves the above technical problems. These several specific embodiments below can be combined with each other, and the same or similar concepts or processes may not be elaborated in some embodiments. The embodiments of this application will be described below in conjunction with the accompanying drawings.

[0061] In a first aspect, referring to Figure 1 , an embodiment of this application provides a read-write circuit, which includes a first switching transistor M1, a second switching transistor M2, a spin-orbit torque layer SOT, and multiple magnetic tunnel junctions (MTJ1 and MTJ2), a write bit line WBL, a read bit line RBL, and a source line SL.

[0062] Among them, the write bit line WBL is used to transmit a write voltage, and this write voltage will generate a spin current in the spin-orbit torque layer, affecting the magnetization direction of the free layer.

[0063] The source line SL is used to provide a reference voltage or current to ensure the stability of the write and read operations. Specifically, in the write operation, the source line SL can provide a stable current path; in the read operation, the source line SL can provide a reference voltage to accurately measure the resistance of the MTJ.

[0064] The read bit line RBL is used to provide a top potential to multiple MTJs during the write process to generate the VCMA effect. In this embodiment, the top of each MTJ maintains an equal potential. The read bit line RBL is also used to read the stored data. In the MRAM, the read bit line RBL can be connected to the MTJ, and the stored data is determined by measuring the resistance value of the MTJ. Specifically, when the magnetization directions of the free layer and the fixed layer in the MTJ are parallel, the MTJ is in the P state with a lower resistance, storing the data "0"; when the magnetization directions of the free layer and the fixed layer are antiparallel, the MTJ is in the AP state with a higher resistance, storing the data "1". By detecting the resistance value, it can be determined whether the data stored in the MTJ is 0 or 1.

[0065] Both ends of the above spin-orbit torque layer SOT are respectively connected to the write bit line WBL and the source line SL, and the first switching transistor M1 is used to control the write bit line WBL to apply a write voltage to the spin-orbit torque layer SOT.

[0066] The second switching transistor M2 is used to control the conduction of the read bit line RBL so that the top of each MTJ maintains an equal potential to generate the VCMA effect; among them, the voltage applied to the read bit line RBL is less than half of the write voltage.

[0067] As a specific example, one end of the above first switching transistor M1 is connected to the write bit line WBL, and the other end is connected to the first end 101 of the spin-orbit torque layer SOT, and the second end 102 of the spin-orbit torque layer SOT is connected to the source line SL.

[0068] The first switching transistor M1 is used to control the write bit line WBL to apply a write voltage to the spin-orbit torque layer SOT, thereby generating a spin current in the spin-orbit torque layer SOT, changing the magnetization direction of the free layer, and further realizing data writing. It should be understood that according to the write voltage, the magnetization direction of the free layer is parallel or anti-parallel to the magnetization direction of the fixed layer, thereby representing binary "0" or "1".

[0069] Specifically, when data needs to be written to the spin-orbit torque layer SOT, the first switching transistor M1 can be controlled to conduct by using an external strobe signal, and the write voltage in the write bit line WBL is applied to the spin-orbit torque layer SOT.

[0070] Exemplarily, the above-mentioned first switching transistor M1 can be any one of a bipolar junction transistor (BJT), a field-effect transistor (FET), an insulated gate bipolar transistor (IGBT), etc., and the embodiments of the present application do not make special limitations on this.

[0071] During data writing, the second switching transistor M2 is used to control the read bit line RBL so that the top of each MTJ maintains equal potential to generate the VCMA effect, and the voltage applied to the read bit line RBL is less than half of the write voltage. Due to the voltage division of the bottom electrode in the SOT layer, the voltage across the magnetic tunnel junctions at different positions is different, and the voltage across the magnetic tunnel junctions closer to the write voltage input end is larger. Since the VCMA effect at the top of the MTJ promotes the flipping of the MTJ, reducing its threshold flipping voltage, and the greater the voltage across the MTJ, the more obvious the promotion effect, the threshold flipping voltages of the magnetic tunnel junctions at different positions are different during the writing process. Specifically, along the writing direction of the write voltage, the threshold flipping voltages corresponding to multiple magnetic tunnel junctions gradually increase.

[0072] During data reading, the second switching transistor M2 is used to control the read bit line RBL to apply a read voltage to multiple magnetic tunnel junctions. Among them, the multiple magnetic tunnel junctions can include at least two magnetic tunnel junctions. For example, Figure 1 MTJ1 and MTJ2 in. The multiple magnetic tunnel junctions can also be magnetic tunnel junctions with other quantities, and the embodiments of the present application do not make special limitations on this.

[0073] One end of the above-mentioned second switching transistor M2 is connected to the read bit line RBL, and the other end is connected to multiple magnetic tunnel junctions. The second switching transistor M2 is used to control the reading operation. When the second switching transistor M2 conducts, the read voltage on the read bit line RBL can flow into multiple magnetic tunnel junctions through the second switching transistor M2, thereby reading the stored data.

[0074] Specifically, when data needs to be read, an external strobe signal can be used to control the conduction of the second switching transistor M2, and a read voltage is applied to multiple magnetic tunnel junctions through a read bit line RBL.

[0075] Exemplarily, the second switching transistor M2 can be any one of a bipolar junction transistor (BJT), a field-effect transistor (FET), an insulated gate bipolar transistor (IGBT), etc. The embodiments of the present application do not make special limitations thereon.

[0076] During data reading, by controlling the conduction or cutoff of the first switching transistor M1 and the second switching transistor M2, two kinds of stored data can be obtained, and the specific storage states of multiple magnetic tunnel junctions can be obtained based on the two kinds of stored data.

[0077] Based on the above description, in the embodiment of the present application, when data is written, a write voltage can be applied to the spin-orbit torque layer SOT through a write bit line WBL to cause multiple magnetic tunnel junctions to flip to different resistance states. It should be understood that in the present application, the write voltage is applied to the spin-orbit torque layer SOT by controlling the first switching transistor M1 for the write bit line WBL, indicating that the write voltage of the present application is a unidirectional write voltage. In this unidirectional write operation, the second switching transistor M2 can be used to keep the top of each magnetic tunnel junction at equal electric potential to generate the VCMA effect. Under the influence of the VCMA effect at the top of the magnetic tunnel junction, data can be written to multiple magnetic tunnel junctions. Based on this, in the data write path of the present application, only a first transistor M1 is provided between the write bit line WBL and the spin-orbit torque layer SOT, and a second transistor M2 is provided at the top of the read bit line RBL and multiple magnetic tunnel junctions, and there is no need to provide a corresponding turn-on transistor for each magnetic tunnel junction. Therefore, the present application reduces the area occupied by the turn-on transistor corresponding to each magnetic tunnel junction and improves the storage density.

[0078] During data reading, the embodiment of the present application can obtain two kinds of stored data, and obtain the specific storage states of multiple magnetic tunnel junctions based on the two kinds of stored data. Compared with the prior art where only the parallel resistance of multiple MTJs is read, the parallel resistance of the multiple MTJs is only related to the number of high and low resistance states and has nothing to do with the position of the MTJs on the SOT. The specific storage states among the multiple magnetic tunnel junctions obtained in the present application are not only related to the number of high and low resistance states but also related to the position of the MTJs on the SOT. Therefore, more storage states can be obtained. Therefore, the present application can obtain a larger number of resistance states without increasing the storage density of the magnetic storage unit, thereby meeting the data storage requirements.

[0079] The above content has described the structure of the read / write circuit and the data read / write process of the embodiment itself as a whole. Next, the data writing and data reading will be described separately.

[0080] First, the data writing is described as follows:

[0081] In one example, when the read / write circuit of the embodiment of the present application performs data writing, it can control the first switching transistor M1 and the second switching transistor M2 to conduct. The first terminal 101 can be in a low potential state through the write bit line WBL, and a write voltage is applied to the second terminal 102 through the source line SL.

[0082] In another example, when the read / write circuit of the embodiment of the present application performs data writing, it can also control the first switching transistor M1 and the second switching transistor M2 to conduct. The second terminal 102 is in a low potential state through the source line SL, and a write voltage is applied to the first terminal 101 through the write bit line WBL.

[0083] During the writing process of the embodiment of the present application, a unidirectional write voltage is applied to the spin-orbit torque layer, and based on this unidirectional write voltage, multiple magnetic tunnel junctions MTJ are flipped to different resistance states. At the same time, the second switching transistor M2 remains in the conducting state, so that the top of each MTJ maintains equal electric potential to generate the VCMA effect, and the voltage applied to the read bit line RBL is less than half of the write voltage. Under the influence of the VCMA effect at the top of the MTJ, the threshold flip voltages of the magnetic tunnel junctions at different positions are different. Specifically, along the writing direction of the write voltage, the threshold flip voltages corresponding to multiple magnetic tunnel junctions gradually increase.

[0084] Therefore, it should be understood that for different write voltages, the resistance states flipped by each magnetic tunnel junction are different.

[0085] Optionally, the write bit line WBL applies a first write voltage to the spin-orbit torque layer SOT, and the magnetic tunnel junction is flipped to a first resistance state. The write bit line WBL applies a second write voltage in the same direction as the first write voltage to the spin-orbit torque layer SOT again, and the magnetic tunnel junction is flipped to a second resistance state. Wherein, the second write voltage is greater than twice the above first write voltage.

[0086] Wherein, the first resistance state can be characterized as the magnetization direction of the free layer being parallel to the magnetization direction of the fixed layer (P state), or can be characterized as the magnetization direction of the free layer being opposite to the magnetization direction of the fixed layer (AP state). Then, the second resistance state can be characterized as the AP state or P state opposite to the first resistance state. That is to say, the magnetization directions of the free layer and the fixed layer corresponding to the first resistance state and the second resistance state are different.

[0087] It should be understood that at the first write voltage, the magnetic tunnel junction is in the first resistance state. When an increasing write voltage is applied again, when the second write voltage is reached, the magnetic tunnel junction flips again and is in the second resistance state. To flip the magnetic tunnel junction from the first resistance state to the second resistance state, not only the voltage required for the resistance state flip but also the voltage required to eliminate the intermediate state is needed. Therefore, the second write voltage needs to be greater than twice the first write voltage so that the magnetic tunnel junction can smoothly flip from the first resistance state to the second resistance state.

[0088] The flip voltage of each magnetic tunnel junction is described above. Next, the flip voltages corresponding to multiple magnetic tunnel junctions are described:

[0089] Optionally, along the write direction of the write voltage, the threshold flip voltages corresponding to multiple magnetic tunnel junctions gradually increase.

[0090] It should be understood that due to the existence of the bottom electrode voltage division in the spin-orbit torque layer (SOT layer), the voltages across the magnetic tunnel junctions at different positions are different. Due to the existence of the VCMA effect, the threshold flip voltages of the magnetic tunnel junctions at different positions are also different during the writing process. Therefore, by controlling the magnitude of the write voltage, the number of magnetic tunnel junctions to be flipped can be controlled. When writing from the source line (SL) to the write bit line (WBL), as the write voltage increases, the magnetic tunnel junctions close to the source line (SL) start to flip in sequence until all the magnetic tunnel junctions are flipped to the same resistance state, such as the first resistance state; then, when an increasing write voltage is applied again, the magnetic tunnel junctions close to the source line (SL) start to flip in the reverse direction in sequence until all the magnetic tunnel junctions are flipped to another resistance state, such as the second resistance state.

[0091] It can be understood that similarly, when writing from the write bit line (WBL) to the source line (SL), as the write voltage increases, the magnetic tunnel junctions close to the write bit line (WBL) start to flip in sequence until all the magnetic tunnel junctions are flipped to the same resistance state, such as the first resistance state; then, when an increasing write voltage is applied again, the magnetic tunnel junctions close to the write bit line (WBL) start to flip in the reverse direction in sequence until all the magnetic tunnel junctions are flipped to another resistance state, such as the second resistance state.

[0092] The above part describes the data writing process. The following part is used to describe the principle of data writing:

[0093] It should be understood that the spin polarization direction of the spin current at the spin-orbit torque layer (SOT) / free layer interface in the magnetic tunnel junction is opposite to the direction of the Oersted field generated by the spin-orbit torque layer current. When the write voltage is small, the interface effect based on the spin-orbit torque layer (SOT) is strong, causing the magnetic tunnel junction to flip in a predetermined direction; when the write voltage is large, the bulk effect of the Oersted field on the free layer grows beyond the interface effect of the spin-orbit torque layer (SOT) current, causing the MTJ to flip in the opposite direction.

[0094] Among them, the magnitude and direction of the threshold switching voltage of the flipped magnetic tunnel junction can be controlled by adjusting the magnitude and direction of the leakage magnetic field of the SAF (Synthetic Antiferromagnet) in the magnetic tunnel junction. Specifically: The SAF usually consists of two magnetic material layers and a non-magnetic material spacer layer, located above the free layer. The two magnetic material layers are coupled together through the non-magnetic spacer layer to form anti-parallel magnetization directions. The leakage magnetic field of the SAF refers to the net magnetic moments of the two magnetic material layers not being completely cancelled out, forming a magnetic field acting on the free layer, thereby affecting the flipping of the magnetic moment of the free layer. Therefore, the magnitude and direction of the leakage magnetic field of the SAF layer will affect the magnitude and direction of the write voltage required for the free layer of the MTJ to flip. Therefore, by adjusting the magnitude and direction of the leakage magnetic field of the SAF, the magnitude and direction of the threshold switching voltage can be affected. The methods for adjusting the leakage magnetic field include: changing the thickness of the magnetic film layer of the SAF layer in the magnetic tunnel junction, changing the shape of the magnetic tunnel junction, etc.

[0095] Refer to Figure 2 and Figure 3 , which respectively show the relationships between different leakage magnetic fields and the window of the unidirectional write current corresponding to the conversion of the magnetic tunnel junction from the P resistance state to the AP resistance state, and from the AP resistance state to the P resistance state. It can be seen that the window of the unidirectional write current decreases as the leakage magnetic field increases. Therefore, by adjusting the appropriate magnitude of the leakage magnetic field, the magnitude of the unidirectional write current can be affected, thereby optimizing the power consumption of writing to the MTJ.

[0096] Refer to Figure 4 , Figure 5 and Figure 6 , which respectively show that when the net magnetic moment of the SAF layer is in different directions, the magnitude and direction of the net magnetic moment correspond to the magnitude and direction of the leakage magnetic field. By adjusting the magnitude and direction of the net magnetic moment, the magnitude and direction of the leakage magnetic field of the device can be adjusted. Refer to Figure 4 , when the SAF net magnetic moment is 0, the applied write voltage is greater than the |-Vc| voltage, and the MTJ is written to the P state. When the applied write voltage is greater than the +Vc voltage, the MTJ is written to the AP state. Refer to Figure 5 , when the direction of the net magnetic moment of the SAF is from P to AP, the applied write voltage is between the -Vc1 and -Vc2 voltages, and the MTJ is written to the P state; when the applied write voltage is greater than the |-Vc2| voltage, the MTJ is written to the AP state. Refer to Figure 6, the direction of the net magnetic moment of the SAF is from AP to P. When the applied write voltage is greater than the +Vc2 voltage, the MTJ is written into the AP state; when the applied write voltage is between the +Vc1 and +Vc2 voltages, the MTJ is written into the P state. It can be seen that when the direction of the leakage magnetic field of the SAF layer is in a certain direction, applying a write voltage greater than the threshold voltage to the magnetic tunnel junction can flip the MTJ to the target resistance state; when the direction of the leakage magnetic field of the SAF layer is the reverse of the above-mentioned certain direction, the write voltage required to write the MTJ into the same target resistance state also needs to be in the opposite direction; and, to overcome the influence of the net magnetic moment on the flipping of the free layer, a larger write voltage is required to flip the free layer to the antiparallel state. Therefore, the direction and magnitude of the leakage magnetic field of the SAF layer will affect the direction and magnitude of the unidirectional write current.

[0097] It should be understood that corresponding to different magnitudes of the write voltage, the number and number of flips of the magnetic tunnel junctions with resistance state flipping are also different. Therefore, the embodiments of the present application can modulate the magnitude of the unidirectional write voltage to control the number of magnetic tunnel junctions with resistance state flipping and the number of flips of each magnetic tunnel junction.

[0098] Based on this, the embodiments of the present application utilize the characteristics of the write voltage to realize the parallel connection of MTJs with different resistances on the NAND-type magnetic storage unit with multiple MTJs, thereby generating stable multiple resistance states.

[0099] Next, the data reading will be described:

[0100] Optionally, referring to Figure 1 , when reading data, the first switching transistor M1 is turned off, the second switching transistor M2 is turned on, and a first read voltage is provided to multiple magnetic tunnel junctions (MTJ1 and MTJ2) through the read bit line RBL and the source line SL to obtain the first read data. It should be understood that the magnetic tunnel junctions in the embodiments of the present application may also include other numbers of magnetic tunnel junctions, and no special limitation is made thereto.

[0101] The first read data is used to obtain the first storage state of multiple magnetic tunnel junctions in the parallel state. The types of the first storage state are N + 1, where N is the number of magnetic tunnel junctions.

[0102] In the embodiments of the present application, a first read voltage can be applied to the common top electrode of the magnetic tunnel junctions. The first switching transistor M1 connected to the first end 101 of the spin-orbit torque layer SOT is turned off, and the second end 102 is in a low potential state. The parallel resistance from its common top electrode to the bottom electrode is measured, and this resistance can characterize the number of resistance values in the parallel state of the MTJ.

[0103] As a specific example, referring to Figure 7 and Figure 8, taking the NAND - type magnetic storage cell with two MTJ structures as an example, the structure for data reading of the NAND - type magnetic storage cell and the resistance states that the first read data can represent are shown. Specifically, referring to Figure 7 , a read voltage V1 is applied from the read bit line RBL to the top electrode layers of MTJ1 and MTJ2. The first switching transistor connected to the write bit line WBL is turned off, the voltage in the source line SL is a low voltage, and the resistance between the read bit line RBL and the source line SL is the result of two MTJs in parallel. Referring to Figure 8 , 2 + 1 resistance states can be obtained according to the number of high - and low - resistance values in the parallel resistors. Among them, 2 is used to represent the number of MTJs, such as the AP / AP state where both MTJs are in the high - resistance state, the AP / P or P / AP state where one of the two MTJs is in the high - resistance state and the other is in the low - resistance state, and the P / P state where both MTJs are in the low - resistance state; among them, since the two MTJs are connected in parallel, the first read data of some first storage states is the same. For example, the parallel resistance values shown by the magnetic storage cell in the AP / P state or the P / AP state are the same.

[0104] After obtaining the first read data, the first switching transistor and the second switching transistor are turned on, the second read voltages at both ends of the read bit line RBL and the write bit line WBL are controlled to be the same, and the second read data is obtained based on the magnitude of the current value at the source line SL and the position distribution of the magnetic tunnel junctions.

[0105] Optionally, in combination with Figure 10 , taking the NAND - type magnetic storage cell with two MTJ structures as an example, Figure 10 a circuit schematic diagram for the magnetic storage cell to obtain the second read data is shown. Among them, I1 is the read current of MTJ1, I2 is the read current of MTJ2, and I0 is the read current of the spin - orbit torque layer SOT. After obtaining the first read data, the first switching transistor and the second switching transistor are controlled to be turned on, and the second read voltage V at both ends of the read bit line RBL and the write bit line WBL is the same. The current flowing out of the source line SL is detected and denoted as I3. Among them, I3 = I0+I2 + I2, and the magnitude of the value of I3 can distinguish the specific states of multiple MTJs with the same parallel resistance value. Specifically, when the value of the current I3 is less than the preset value, the magnetic tunnel junction closer to the source line SL is in the AP state with a higher resistance value, and the magnetic tunnel junction closer to the write bit line WBL is in the P state with a lower resistance value; when the value of the current I3 is greater than the preset value, the magnetic tunnel junction closer to the source line SL is in the P state with a lower resistance value, and the magnetic tunnel junction closer to the write bit line WBL is in the AP state with a higher resistance value; among them, the preset value is the value of the current I3 when all MTJs in the magnetic storage cell are flipped to the AP state. Therefore, the second read data can be obtained based on the magnitude of the current value at the source line SL and the position distribution of the magnetic tunnel junctions.

[0106] The above - mentioned second read data is used to obtain the specific storage states of multiple magnetic tunnel junctions when the first read data is the same.

[0107] Specifically, the same read voltage can be applied to the common top electrode of multiple magnetic tunnel junctions and one of the first end or the second end, and the second end or the first end is in a low potential state, and the resistance of the multiple magnetic tunnel junctions is measured. This resistance can characterize the position distribution of the high and low resistance state MTJs on the bottom electrode, so that storage states with the same resistance value but different position distributions can be obtained.

[0108] Based on this, the embodiments of the present application combine the resistance state distribution of the magnetic tunnel junctions in the NAND-type magnetic storage unit under the unidirectional write voltage, and use two steps to read data. Among them, in the first step, a first read voltage is applied to multiple magnetic tunnel junctions of the NAND-type magnetic storage unit, the first switching transistor is turned off, the second end remains at a low voltage, and the first read data is read from the second end. The first read data is used to obtain the first storage state of the multiple magnetic tunnel junctions in the parallel state. In the second step, a second read voltage is applied to the multiple magnetic tunnel junctions of the NAND-type magnetic storage unit and the first end, the second end remains at a low voltage, and the second read data is read from the second end. The second read data is used to obtain the specific storage state of the multiple magnetic tunnel junctions when the first read data is the same. Therefore, the present application uses a two-step reading method to distinguish different position distribution states of multiple magnetic tunnel junctions under the same parallel resistance, thereby expanding the parallel resistance state of the NAND-type magnetic storage unit.

[0109] Optionally, the above read / write circuit can be applied to a NAND-type magnetic storage unit, and the NAND-type magnetic storage unit includes a spin-orbit torque layer and multiple magnetic tunnel junctions arranged on the spin-orbit torque layer; wherein, the magnetic tunnel junction at least includes a free layer, a barrier layer and a reference layer stacked in sequence, and the free layer is adjacent to the spin-orbit torque layer.

[0110] To further distinguish the specific resistance states of magnetic tunnel junctions with the same resistance value, refer to Figure 7 、and Figure 9 , which shows the structure of the NAND-type magnetic storage unit for the second-step data reading and the resistance states that the second read data can characterize. Specifically, refer to Figure 7 , a read voltage V2 is applied to the NAND-type magnetic storage unit from the read bit line RBL and the write bit line WBL respectively, and the voltage in the source line SL remains at a low voltage. The resistance between the read bit line RBL / write bit line WBL and the source line SL is the result of the parallel connection of N magnetic tunnel junctions and the spin-orbit torque layer SOT. Due to the voltage division on the spin-orbit torque layer SOT, the voltages across different magnetic tunnel junctions are different. Therefore, the current flowing through each magnetic tunnel junction is related to its own resistance value and the position formed on the spin-orbit torque layer. The magnetic tunnel junction closer to the source line SL has a higher influence on the parallel result. Combining the foregoing writing process, among the 2 + 1 resistance states written in the first step, there is a situation where one resistance state has the same resistance value but different magnetic tunnel junction distributions. Therefore, refer to Figure 9, two different-sized resistances (AP / P or P / AP) can be distinguished in the second-step reading. Therefore, 2N resistance states can be obtained through two-step reading, and thus 2N weights can be stored.

[0111] Based on the above description, according to the magnitude of the applied write voltage, the first read data can characterize N + 1 resistance states with different resistance values; the second read data can characterize the specific storage states of N - 1 resistance states with the same resistance value; where N is the number of magnetic tunnel junctions.

[0112] As another specific example, referring to Figure 11 , when a write voltage is applied to the spin-orbit torque layer SOT from left to right, the common top electrode remains in a low-level state, and the bottom voltage of the magnetic tunnel junction MTJ1 is greater than the bottom voltage of the magnetic tunnel junction MTJ2. Due to the existence of the VCMA effect, it promotes the flipping of the magnetic tunnel junction, reduces its threshold flipping voltage, and the greater the voltage across the magnetic tunnel junction, the more obvious the promotion effect. Therefore, the voltage required for the magnetic tunnel junction MTJ1 to flip is less than that of the magnetic tunnel junction MTJ2.

[0113] Before data writing, applying a voltage exceeding Vc4 resets the two magnetic tunnel junctions to the P state, counted as weight 3. When the write voltage is lower than Vc1, the two magnetic tunnel junctions remain in their original states. When the write voltage is between Vc1 and Vc2, the magnetic tunnel junction MTJ1 flips to the AP state, and the magnetic tunnel junction MTJ2 remains in the P state, counted as weight 2. When the write voltage is between Vc2 and Vc3, both the magnetic tunnel junction MTJ1 and the magnetic tunnel junction MTJ2 flip to the AP state, counted as weight 0. When the write voltage is between Vc3 and Vc4, the magnetic tunnel junction MTJ1 flips to the P state, and the magnetic tunnel junction MTJ2 flips to the AP state, counted as weight 1.

[0114] Through the first-step reading, three parallel resistance states of AP / / AP, AP / / P (or P / / AP), and P / / P can be obtained. Through the second-step reading, two resistance states with the same resistance value but different distributions of P / / AP and AP / / P can be further obtained.

[0115] It should be understood that the embodiments of the present application can obtain higher-bit weight results without increasing the number of magnetic tunnel junctions on the spin-orbit torque layer SOT, and the weights can be used in digital or analog in-memory computing arrays.

[0116] In some examples, the above NAND-type magnetic storage unit may further include a common top electrode layer, the common top electrode layer is disposed on the side of the reference layer of the plurality of magnetic tunnel junctions facing away from the barrier layer, and the second switching transistor may be connected to the common top electrode layer to apply a read signal to the plurality of magnetic tunnel junctions through the read bit line.

[0117] It should be understood that the conduction and cutoff of the first switching transistor M1 and the second switching transistor M2 need to be controlled differently at different times. Based on this, the above read-write circuit further includes a first strobe signal line and a second strobe signal line.

[0118] Among them, the first strobe signal line is connected to the control terminal of the first switching transistor, and is used to control the conduction or cutoff of the first switching transistor.

[0119] The second strobe signal line is connected to the control terminal of the second switching transistor, and is used to control the conduction or cutoff of the second switching transistor.

[0120] Optionally, when writing data, the first switching transistor is controlled to conduct through the control signal in the first strobe signal line, and the second switching transistor is controlled to conduct through the control signal in the second strobe signal line, so as to write line data.

[0121] When reading data, first, the first switching transistor is controlled to cutoff through the control signal in the first strobe signal line, and the second switching transistor is controlled to conduct through the control signal in the second strobe signal line. Then, the first switching transistor is controlled to conduct through the control signal in the first strobe signal line to realize data reading.

[0122] In a second aspect, referring to Figure 12 , the present application further provides a read-write array, including a plurality of read-write circuits 20 arranged in a matrix as described in any item of the first aspect.

[0123] Among them, a plurality of first switching transistors M1 can be connected to the same write bit line WBL, and the write voltage is controlled to be introduced into the target read-write circuit through the first switching transistor. The first switching transistor is used to select the target read-write circuit, that is to say, the target read-write circuit corresponds to the read-write circuit where the selected first switching transistor is located. In practice, according to requirements, one target read-write circuit can be selected by the first switching transistor, or at least two target read-write circuits can be selected by the first switching transistor. The embodiments of the present application do not make special limitations on this.

[0124] The second switching transistors M2 in a plurality of read-write circuits 20 can be connected to the same read bit line RBL, and the read voltage is controlled to be introduced into the target read-write circuit through the second switching transistor.

[0125] A plurality of read-write circuits can achieve parallel reading.

[0126] Optionally, the second ends of the NAND-type magnetic storage units in a plurality of read-write circuits 20 are connected to the same source line SL to realize the control of the reading and writing of the selected target read-write circuit.

[0127] Based on this, the structure of the entire read-write array can be simplified.

[0128] In a possible implementation, each read / write circuit includes a first strobe signal line WWL0 and a second strobe signal line RWL0;

[0129] The control signals in the first strobe signal line WWL0 connected to the control terminals of the first switching transistors M1 in a plurality of read / write circuits are different, and the control signals in the second strobe signal line RWL0 connected to the control terminals of the second switching transistors M2 in the plurality of read / write circuits are different.

[0130] Based on this, the present application can control the corresponding first switching transistor M1 to conduct by activating the first strobe signal line WWL0, and write the data on the write bit line WBL into the corresponding NAND-type magnetic storage unit. The first switching transistors M1 of different read / write circuits are connected to different first strobe signal lines RWL0, and specific storage units can be selected for write operations.

[0131] The embodiment of the present application can control the corresponding second switching transistor M2 to conduct by activating the second strobe signal line RWL0, and transfer the data in the corresponding NAND-type magnetic storage unit to the read bit line RBL. The second switching transistors M2 of different read / write circuits are connected to different second strobe signal lines RWL0, so that specific storage units can be selectively activated for read operations.

[0132] It should be understood that since the read / write array includes the above read / write circuits, the read / write array has the beneficial effects of the write circuit provided in the foregoing Figures 1 - 11 embodiment shown, which will not be elaborated here.

[0133] In a third aspect, the embodiment of the present application further provides a read / write method, which can be applied to the read / write circuit of any item in the first aspect. The method includes:

[0134] When writing data, the second switching transistor conducts, and a write voltage is applied in the spin-orbit torque layer by controlling the first switching transistor.

[0135] When reading data, by controlling the conduction or cutoff of the first switching transistor and the second switching transistor, two stored data can be obtained, and the specific storage states of a plurality of magnetic tunnel junctions can be obtained based on the two stored data.

[0136] Further, when reading data, the first switching transistor is cutoff, the second switching transistor conducts, and a first read voltage is provided to a plurality of magnetic tunnel junctions through the read bit line and the source line to obtain first read data.

[0137] The first read data is used to obtain the first storage state of a plurality of magnetic tunnel junctions in a parallel state.

[0138] The types of the first storage state are N + 1, where N is the number of magnetic tunnel junctions.

[0139] The first read data of the partial first storage state is the same;

[0140] After obtaining the first read data, the first switching transistor and the second switching transistor are turned on to control the second read voltage at both ends of the read bit line and the write bit line to be the same, and the second read data is obtained based on the magnitude of the current value at the source line and the position distribution of the magnetic tunnel junctions;

[0141] The second read data is used to obtain the specific storage states of multiple magnetic tunnel junctions when the first read data is the same.

[0142] It should be understood that since the read-write method is applied to the above read-write circuit, the read-write method has the beneficial effects in the write circuit provided in the foregoing Figures 1 - 11 embodiments shown, which will not be elaborated here.

[0143] Finally, it should be noted that: the above embodiments are only used to illustrate the technical solutions of the present application, and are not intended to limit them; although the present application has been described in detail with reference to the foregoing embodiments, those of ordinary skill in the art should understand that: they can still modify the technical solutions described in the foregoing embodiments, or perform equivalent replacements on some or all of the technical features; and these modifications or replacements do not make the essence of the corresponding technical solutions deviate from the scope of the technical solutions of the embodiments of the present application.

Claims

1. A read-write circuit, characterized in that: At least includes a first switch tube, a second switch tube, a spin-orbit moment layer, a plurality of magnetic tunnel junctions, a write bit line, a read bit line and a source line; The plurality of magnetic tunnel junctions are sequentially arranged on the spin-orbit moment layer, and the tops of the plurality of magnetic tunnel junctions are connected to the same read bit line; Two ends of the spin-orbit moment layer are respectively connected to the write bit line and the source line, and the first switch tube is used to control the write bit line to apply a write voltage to the spin-orbit moment layer; The second switch tube is used to control the read bit line to apply a read voltage to the multiple magnetic tunnel junctions; When reading data, two types of storage data can be obtained by controlling the on or off of the first switch tube and the second switch tube, and the specific storage states of the multiple magnetic tunnel junctions are obtained based on the two types of storage data; When data is read, the first switch tube is turned off, the second switch tube is turned on, and a first read voltage is provided to the plurality of magnetic tunnel junctions through the read bit line and the source line to obtain first read data; The first read data is used to obtain a first storage state of the plurality of magnetic tunnel junctions in a parallel state; The first storage state type is N+1, where N is the number of the magnetic tunnel junctions; The first read data of some of the first storage states are the same; After obtaining the first read data, the first switch tube and the second switch tube are turned on, and the second read voltages at both ends of the read bit line and the write bit line are controlled to be the same, and the second read data is obtained based on the current value at the source line and the position distribution of the magnetic tunnel junction; The second read data is used to obtain specific storage states of the plurality of magnetic tunnel junctions when the first read data is the same.

2. The read-write circuit according to claim 1, characterized in that: The write bit line applies a first write voltage to the spin-track moment layer, and the magnetic tunnel junction flips to a first resistance state; The write bit line applies a second write voltage in the same direction as the first write voltage to the spin-orbit moment layer again, and the magnetic tunnel junction flips to a second resistance state; The second write voltage is greater than twice the first write voltage.

3. The read-write circuit according to claim 1, characterized in that: Along the writing direction of the writing voltage, the threshold switching voltages corresponding to the plurality of magnetic tunnel junctions gradually increase.

4. The read-write circuit according to claim 1, characterized in that: The magnetic tunnel junction includes an antiferromagnet, and the magnitude and direction of the threshold switching voltage required to switch the magnetic tunnel junction are regulated by adjusting the magnitude and direction of the leakage magnetic field of the antiferromagnet.

5. A read-write array, characterized in that: A method comprising: comprising: comprising: comprising: providing a plurality of read / write circuits as claimed in any one of claims 1 to 4 arranged in a matrix; The first switch tubes in the plurality of read / write circuits are connected to the same write bit line, and the write voltage is controlled to pass into the target read / write circuit through the first switch tube; The second switch tubes in the plurality of read / write circuits are connected to the same read bit line, and the read voltage is controlled to pass into the target read / write circuit through the second switch tube; Several of the read-write circuits can realize parallel reading.

6. A reading and writing method, characterized in that: Applied to the read / write circuit according to any one of claims 1 to 4, the method comprises: When data is written, the second switch tube is turned on, and a write voltage is applied in the spin-orbit moment layer by controlling the first switch tube; When reading data, two types of storage data can be obtained by controlling the on or off of the first switch tube and the second switch tube, and the specific storage states of the multiple magnetic tunnel junctions can be obtained based on the two types of storage data.

7. The reading and writing method according to claim 6, characterized in that: When data is read, the first switch tube is turned off, the second switch tube is turned on, and a first read voltage is provided to the plurality of magnetic tunnel junctions through the read bit line and the source line to obtain first read data; The first read data is used to obtain a first storage state of the plurality of magnetic tunnel junctions in a parallel state; The number of the first storage state types is N+1, where N is the number of the magnetic tunnel junctions.

8. The reading and writing method according to claim 7, characterized in that: The first read data of some of the first storage states are the same; After obtaining the first read data, the first switch tube and the second switch tube are turned on, and the second read voltages at both ends of the read bit line and the write bit line are controlled to be the same, and the second read data is obtained based on the current value at the source line and the position distribution of the magnetic tunnel junction; The second read data is used to obtain specific storage states of the plurality of magnetic tunnel junctions when the first read data is the same.

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