A method for manufacturing a circuit board and a circuit board

Abstract

The present application provides a method for manufacturing a circuit board, comprising: a first working surface and a second working surface that are far away from each other are provided on a carrier board; N-1 dielectric layers are respectively arranged on one side of the first working surface and the second working surface, and the dielectric layers are connected by pressing; a circuit layer is made between the first working surface / the second working surface and the adjacent dielectric layer, and a circuit layer is made between the adjacent dielectric layers; the carrier board and the adjacent dielectric layers are peeled off to obtain two circuit boards; both peeled sides of the two circuit boards have bonded copper foils, and the copper foils on the two circuit boards are removed to expose the circuit layers adjacent to the copper foils; the dielectric layers are continuously pressed on the circuit layers exposed by etching on the two circuit boards. The present invention allows the dielectric layers to be pressed before and after the carrier board is peeled off, and the number of pressed dielectric layers can be set according to actual requirements, so that circuit boards with any number of layers can be manufactured in the process of producing circuit boards.

Description

Technical Field

[0001] The present application belongs to the technical field of circuit boards, and in particular, relates to a method for manufacturing a circuit board and a circuit board. Background Art

[0002] In the prior art, with the development of miniaturization, thinness and intelligence of mobile devices, on the one hand, the thickness of the finished substrate is constantly decreasing to reduce the thickness of the terminal equipment, and on the other hand, the number of layers of the substrate is constantly increasing to accommodate more circuits. The above two technical requirements conflict with each other, so it is very difficult to produce ultra-thin substrates with high layers.

[0003] Currently, the substrates used to carry chips can be divided into two categories according to whether the finished product has CLL (or core), namely traditional HDI substrates with cores and Coreless substrates without cores. The main difference between the two is the thickness of the finished substrates. The reasons for the thickness difference come from the following two points. (1) The thinnest CCL commonly used at present is 0.035mm (excluding the thickness of the front / back copper foil), while the thinnest prepreg (hereinafter referred to as PP or dielectric layer) is 0.018mm. Since Coreless replaces the core with the prepreg, the thickness of the finished substrate with the same number of layers can be greatly reduced. (2) The manufacturing process of HDI boards is to add layers on both sides of the CCL at the same time, so the number of layers is always a multiple of 2 (for example, 2 / 4 / 6 / 8 layers), and 3-layer boards cannot be made. Therefore, for multi-layer substrates with a finished board thickness of less than 0.1mm, Coreless substrates are the only choice.

[0004] The uneven shrinkage stress of each layer of PP caused by the multiple lamination processes of the multi-layer Coreless carrier causes the board to bend and warp.

[0005] To address the above problems, no effective solution has been proposed yet.

[0006] It should be noted that the above introduction to the technical background is only for the convenience of providing a clear and complete description of the technical solutions of the present invention and for the convenience of understanding by those skilled in the art. It cannot be considered that the above technical solutions are well known to those skilled in the art simply because these solutions are described in the background technology section of the present invention. Summary of the invention

[0007] The purpose of the present application is to provide a method for manufacturing a circuit board and a circuit board, so as to solve the problem of warping and other problems during the production of the circuit board.

[0008] The present application provides a method for manufacturing a circuit board, comprising:

[0009] Providing a carrying plate, wherein the carrying plate has a first working surface and a second working surface that are separated from each other;

[0010] Disposing N-1 dielectric layers on one side of the first working surface and the second working surface respectively, and the dielectric layers are connected by pressing;

[0011] A circuit layer is fabricated between the first working surface / the second working surface and the adjacent dielectric layer, and a circuit layer is fabricated between the adjacent dielectric layers;

[0012] Peeling off the carrier board and the adjacent dielectric layer to obtain two circuit boards;

[0013] Wherein, the peeled side of the two circuit boards both have bonded copper foil, and the copper foil on the two circuit boards is removed to expose the circuit layer adjacent to the copper foil; and the dielectric layer is continuously pressed on the circuit layer etched and exposed on the two circuit boards.

[0014] Preferably, a blind hole is opened on any of the dielectric layers to enable the adjacent circuit layers to be conductive.

[0015] Preferably, the blind hole is formed by laser.

[0016] Preferably, any of the dielectric layers is in contact with the adjacent circuit layer or the dielectric layer.

[0017] Preferably, a first solder resist layer is arranged on a side of the laminated dielectric layer away from the circuit layer, and a second solder resist layer is arranged on a side of the two circuit boards away from the first solder resist layer.

[0018] Preferably, the copper foil is removed by etching.

[0019] Preferably, the circuit board on which the first solder mask layer and the solder mask layer are formed is subjected to surface treatment.

[0020] Preferably, in the process of "continuing to press the dielectric layer onto the circuit layers etched and exposed on the two circuit boards", multiple dielectric layers are continued to be pressed onto the circuit layers etched and exposed on the two circuit boards, and a circuit layer is made between any one of the dielectric layers.

[0021] A circuit board is manufactured using the above-mentioned circuit board manufacturing method to obtain the circuit board.

[0022] Compared with the prior art, the present invention has the following beneficial effects:

[0023] 1. The present invention presses a dielectric layer on one side of the circuit board after the carrier board is peeled off, and generates an opposite force through the dielectric layer, so that the shrinkage force generated by the pressed dielectric layer before the carrier board is peeled off can be offset, thereby avoiding the circuit board from bending. BRIEF DESCRIPTION OF THE DRAWINGS

[0024] In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments recorded in the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative labor.

[0025] Figure 1 A method for manufacturing a circuit board and a structural diagram of a carrier board of the circuit board provided in an embodiment of the present application;

[0026] Figure 2 A method for manufacturing a circuit board and a blind hole structure diagram of the circuit board provided in an embodiment of the present application;

[0027] Figure 3 It is a circuit board manufacturing method and a circuit board carrier plate separation structure diagram provided in an embodiment of the present application;

[0028] Figure 4 A method for manufacturing a circuit board and a circuit board according to an embodiment of the present invention are provided. Figure 3 A magnified view of the structure at center;

[0029] Figure 5 A method for manufacturing a circuit board and a circuit board structure diagram of the circuit board provided in an embodiment of the present application;

[0030] Figure 6 A method for manufacturing a circuit board and a structure diagram of a first solder mask layer and a second solder mask layer of the circuit board are provided in an embodiment of the present application.

[0031] In the figure: 1, carrier board; 11, first working surface; 12, second working surface; 2, circuit layer; 3, dielectric layer; 31, blind hole; 4, copper foil; 5, first solder mask layer; 6, second solder mask layer. DETAILED DESCRIPTION

[0032] In order to enable those skilled in the art to better understand the technical solutions in this application, the technical solutions in the embodiments of this application will be clearly and completely described below in conjunction with the drawings in the embodiments of this application. Obviously, the described embodiments are only part of the embodiments of this application, not all of them. Based on the embodiments in this application, all other embodiments obtained by ordinary technicians in this field without creative work should fall within the scope of protection of this application.

[0033] In the description of the present invention, it should be noted that the orientations or positional relationships indicated by the terms "upper", "middle", "lower", "inner", "outer", "front", "back", etc. are based on the orientations or positional relationships shown in the accompanying drawings, and are only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the device or component referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as limiting the present invention. The terms "first", "second", and "third" are only used for descriptive purposes and cannot be understood as indicating or implying relative importance. For those of ordinary skill in the art, the specific meanings of the above terms in the present invention can be understood according to specific circumstances. The following describes an implementation method of the present invention based on its overall structure.

[0034] Reference Figure 1 As shown, the embodiment of the present application provides a method for manufacturing a circuit board, comprising:

[0035] A carrying plate 1 is provided, wherein the carrying plate 1 has a first working surface 11 and a second working surface 12 which are separated from each other;

[0036] N-1 dielectric layers 3 are respectively arranged on one side of the first working surface 11 and the second working surface 12, and the dielectric layers 3 are connected by pressing;

[0037] A circuit layer 2 is fabricated between the first working surface 11 / the second working surface 12 and the adjacent dielectric layer 3, and a circuit layer 2 is fabricated between the adjacent dielectric layers 3;

[0038] The carrier board 1 and the adjacent dielectric layer 3 are peeled off to obtain two circuit boards;

[0039] The peeled sides of the two circuit boards both have bonded copper foil 4, and the copper foil 4 on the two circuit boards is removed to expose the circuit layer 2 adjacent to the copper foil 4; the dielectric layer 3 is further pressed on the circuit layer 2 etched and exposed on the two circuit boards.

[0040] In the above steps, those skilled in the art may set a first working surface 11 and a second working surface 12 on both sides of the carrier board 1 , and then may set N−1 dielectric layers 3 on the first working surface 11 and the second working surface 12 , respectively.

[0041] That is, those skilled in the art can set N-1 dielectric layers 3 on the first working surface 11, and set N-1 dielectric layers 3 on the second working surface 12. It is understandable that the circuit layer 2 can be made between the first working surface 11 and the second working surface 12 and the adjacent dielectric layer 3. Further, the circuit layer 2 is made on the side away from the first working surface 11 on any dielectric layer 3 on one side of the first working surface 11, and at the same time, the circuit layer 2 is made on the side away from the second working surface 12 on any dielectric layer 3 on one side of the second working surface 12.

[0042] In the above-mentioned setting, specifically, a person skilled in the art can make a circuit layer 2 on the first working surface 11 and the second working surface 12. After making the circuit layer 2, the first dielectric layer 3 is pressed, and then the circuit layer 2 can be continued to be made on the side of the first dielectric layer 3 away from the first working surface 11 or the second working surface 12, and further, the second dielectric layer 3 is continued to be pressed on the side of the first dielectric layer 3 away from the first working surface 11 or the second working surface 12, and so on, and N-1 dielectric layers 3 are pressed.

[0043] In the above steps, those skilled in the art may alternately manufacture the circuit layer 2 and laminate the dielectric layer 3 , that is, manufacture N-1 layers of circuit layer 2 and laminate N-1 layers of dielectric layer 3 .

[0044] After the above steps are completed, a person skilled in the art peels off the bonding portion between the first working surface 11 and the second working surface 12 on the carrier board 1. That is, the carrier board 1 is separated from the adjacent circuit layers 2. The above steps can separate the carrier board 1 to obtain two circuit boards.

[0045] Furthermore, the skilled person in the art continues to manufacture the circuit layer on the circuit board. It is understandable that the peeled side of the two circuit boards both have the bonded copper foil 4, and the copper foil 4 on the two circuit boards is removed to expose the circuit layer 2 adjacent to the copper foil 4.

[0046] On the basis of the above, the dielectric layer 3 can be further pressed onto the exposed circuit layers 2 on the two circuit boards, so that two circuit boards with N-1 circuit layers and N dielectric layers can be obtained.

[0047] It is understandable that in the above steps, technicians in this field can press the dielectric layer before or after the carrier board 1 is peeled off, and the number of pressed dielectric layers can be set according to actual requirements, so that circuit boards with any number of layers can be produced in the process of producing circuit boards.

[0048] In the above process, by pressing the dielectric layer on the side of the circuit board after the carrier plate 1 is peeled off, the opposite force is generated by the aforementioned dielectric layer, so that the contraction force generated by the dielectric layer 3 pressed before the carrier plate 1 is peeled off can be offset, thereby avoiding the circuit board from bending.

[0049] In the above steps, preferably, a blind hole 31 is opened on any dielectric layer 3 to allow adjacent circuit layers 2 to be conductive. That is, a person skilled in the art can make the blind hole 31 after laminating a dielectric layer 3. More preferably, the blind hole 31 is formed by laser.

[0050] Specifically, after laminating the dielectric layer 3 on the first working surface 11 and the second working surface 12 of the carrier board 1, the blind hole 31 is continuously made by laser. After the blind hole 31 is made, the circuit layer 2 is continuously made. After the circuit layer 2 is made, the dielectric layer is continuously laminarized on the side of the dielectric layer 3 away from the carrier board 1. The aforementioned steps are repeated, so that the blind hole can be made at the same time in the step of laminating N-1 dielectric layers 3, thereby realizing the conduction of multiple circuit layers 2 on the circuit board.

[0051] It is understandable that after the carrier board 1 is peeled off, the above steps of making the blind hole 31 are repeated on the dielectric layer 3 pressed on one side of the carrier board 1 to complete the conduction between all the circuit layers 2 on the circuit board.

[0052] In the circuit board obtained in the above steps, preferably, any dielectric layer 3 is in contact with the adjacent circuit layer 2 or dielectric layer 3, thereby forming a stable circuit board structure.

[0053] Further, in the arrangement of the circuit board, preferably, a first solder resist layer 5 is arranged on the side of the laminated dielectric layer 3 away from the circuit layer 2, and a second solder resist layer 6 is arranged on the side of the two circuit boards away from the first solder resist layer 5. That is, after the carrier board 1 is peeled off, two identical circuit boards are formed, and the first solder resist layer 5 and the second solder resist layer 6 are respectively arranged on the two sides away from each other of the two identical circuit boards.

[0054] According to the above configuration, the structure of the circuit board can be made more stable by providing the first solder resist layer 5 and the second solder resist layer 6 .

[0055] In the above steps, preferably, the copper foil 4 is removed by etching. That is, after peeling off the carrier board 1, those skilled in the art can remove the copper foil 4 by etching to expose the circuit layer 2.

[0056] Preferably, the circuit board on which the first solder mask layer and the second solder mask layer are formed is subjected to surface treatment.

[0057] Preferably, in the process of "continuing to laminate the dielectric layer on the circuit layer exposed by etching on the two circuit boards", multiple dielectric layers 3 are continuously laminated on the circuit layer 2 exposed by etching on the two circuit boards, and a circuit layer 2 is formed between any dielectric layer 3 and any dielectric layer 3. In an optional embodiment, after the carrier board 1 is peeled off, the dielectric layer 3 is continuously laminated on the peeled side, that is, multiple dielectric layers 3 can be laminated.

[0058] The embodiment of the present application also provides a circuit board, which is manufactured using the above-mentioned circuit board manufacturing method to obtain a circuit board. Through the above-mentioned method, those skilled in the art can obtain a circuit board with any number of layers, so that it can be used in a variety of situations.

[0059] Although different specific embodiments are mentioned in the content of this application, this application is not limited to the situations described in the industry standards or embodiments, etc. Some industry standards or slightly modified implementation plans based on the implementation of the custom methods or embodiments can also achieve the same, equivalent or similar, or predictable implementation effects after deformation of the above embodiments. The embodiments of data acquisition, processing, output, judgment methods, etc. after these modifications or deformations can still fall within the scope of the optional implementation plans of this application.

[0060] Although the present application has been described through embodiments, those skilled in the art will appreciate that there are many modifications and changes to the present application without departing from the spirit of the present application. It is intended that the attached embodiments include these modifications and changes without departing from the present application.

Claims

1. A method for manufacturing a circuit board, characterized in that: include: Providing a carrying plate, wherein the carrying plate has a first working surface and a second working surface that are separated from each other; Simultaneously manufacturing a first circuit layer on the first working surface and the second working surface; Simultaneously forming a first dielectric layer on the outer walls of the two first circuit layers, and the dielectric layers are connected by lamination; Continue to form a second circuit layer on the outer walls of the two first dielectric layers, and continue to form a second dielectric layer on the outer walls of the two second circuit layers; In the above steps, the circuit layers are alternately made and the dielectric layers are laminated until the N-1th dielectric layer and the N-1th circuit layer are completed; Peeling off the carrier board and the adjacent dielectric layer to obtain two circuit boards; Wherein, the peeled sides of the two circuit boards both have bonded copper foils; The copper foils on the two circuit boards are etched to expose the first circuit layer adjacent to the copper foil; the dielectric layer is continuously laminated on the first circuit layer etched and exposed on the two circuit boards to form N layers of the dielectric layer and N-1 layers of the circuit layer on the circuit boards.

2. The method for manufacturing a circuit board according to claim 1, characterized in that: After any one of the dielectric layers is pressed together, a blind hole is opened to allow the adjacent circuit layers to be conductive.

3. The method for manufacturing a circuit board according to claim 2, characterized in that: The blind holes are formed by laser.

4. The method for manufacturing a circuit board according to claim 1, characterized in that: Any of the dielectric layers is in contact with the adjacent circuit layer or the dielectric layer.

5. The method for manufacturing a circuit board according to claim 1, characterized in that: After the step of "continuing to press the dielectric layer on the first circuit layer exposed by etching on the two circuit boards" is completed, a first solder mask is set on the side of the N-1 dielectric layer away from the N-1 circuit layer, and a second solder mask is set on the side of the two circuit boards away from the first solder mask.

6. The method for manufacturing a circuit board according to claim 5, characterized in that: The circuit board on which the first solder resist layer and the second solder resist layer are formed is subjected to surface treatment.

7. A circuit board, characterized in that: The circuit board is manufactured using the circuit board manufacturing method described in any one of claims 1 to 6 to obtain the circuit board.

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