Overvoltage protection control circuit, voltage converter and switching power supply

Abstract

The present application is applicable to the technical field of switching power supply, and provides an overvoltage protection control circuit, a voltage converter and a switching power supply. The overvoltage protection control circuit includes a logic module, a first drive module and a second drive module. When the output voltage of the voltage converter is greater than a preset value, the first drive module receives an overvoltage protection signal and drives the first switch tube to disconnect according to the overvoltage protection signal, the logic module receives a clock signal and a pulse width modulation signal, and outputs a first logic signal when the clock signal is a rising edge, and outputs a second logic signal when the pulse width modulation signal is a rising edge, the second drive module drives the second switch tube to turn on according to the first logic signal, and the second drive module also drives the second switch tube to disconnect according to the second logic signal. The overvoltage protection control circuit provided in the embodiment of the present application can use the clock signal and the pulse width modulation signal to control the conduction and disconnection of the second switch tube. Thereby avoiding excessive negative current of the inductor and improving the reliability of the circuit.

Description

Technical Field

[0001] The present application belongs to the technical field of switching power supplies, and in particular relates to an overvoltage protection control circuit, a voltage converter and a switching power supply. Background Art

[0002] With the rapid development of science and technology, DC-DC switching power supplies are widely used in various electronic devices due to their high efficiency and flexibility, including consumer electronic products AMOLED (Active-Matrix Organic Light-Emitting Diode). Boost circuit is an important component module of AMOLED. Figure 1 This is the basic schematic diagram of the Boost circuit. When the first switch tube is turned on, the inductor current increases and the inductor stores energy. When the second switch tube is turned on, the inductor releases energy and continues to supply power to the load. However, when the load current quickly switches from heavy load to light load, the output voltage will have a large overshoot. If the output voltage is higher than the preset value, the switch tube may be damaged. Therefore, an overvoltage protection control circuit is generally provided in the Boost circuit. When an overvoltage occurs, the existing overvoltage protection control circuit controls the first switch tube to be continuously disconnected and controls the second switch tube to be continuously turned on. When the inductor is discharged, the current will be reversed through the second switch tube. If the overvoltage lasts for a long time, it may cause the inductor negative current to be too large, thereby affecting the reliability of the circuit. Summary of the invention

[0003] The embodiments of the present application provide an overvoltage protection control circuit, a voltage converter and a switching power supply, which can solve the problem that the existing overvoltage protection control circuit may cause excessive negative current in the inductor when the overvoltage time is long.

[0004] In a first aspect, an embodiment of the present application provides an overvoltage protection control circuit, which is applied to a voltage converter. The overvoltage protection control circuit includes a logic module, a first driving module, and a second driving module. The logic module is electrically connected to the first driving module and the second driving module respectively. The first driving module is used to be electrically connected to a first switch tube in the voltage converter, and the second driving module is used to be electrically connected to a second switch tube in the voltage converter.

[0005] When the output voltage of the voltage converter is greater than a preset value, the first driving module is used to receive an overvoltage protection signal and output a first driving signal to the first switch tube according to the overvoltage protection signal to drive the first switch tube to be disconnected; the logic module is used to receive a clock signal and a pulse width modulation signal, and output a first logic signal when the clock signal is a rising edge, and output a second logic signal when the pulse width modulation signal is a rising edge; the second driving module is used to output a second driving signal to the second switch tube according to the first logic signal to drive the second switch tube to be turned on, and the second driving module is also used to output a third driving signal to the second switch tube according to the second logic signal to drive the second switch tube to be disconnected.

[0006] In a possible implementation manner of the first aspect, the logic module includes a first logic unit and a second logic unit, the first logic unit is electrically connected to the second logic unit, the first driving module, and the second driving module respectively, and the second logic unit is electrically connected to the first driving module and the second driving module respectively;

[0007] The first logic unit is used to output a logic signal according to the clock signal and the level signal output by the second logic unit, and the second logic unit is used to output the level signal according to the pulse width modulation signal and the logic signal, wherein the logic signal includes the first logic signal and the second logic signal.

[0008] In a possible implementation of the first aspect, the first logic unit includes a first NOR gate, wherein the first input end of the first NOR gate is used to receive the clock signal, the second input end of the first NOR gate is electrically connected to the second logic unit for receiving the level signal, and the output end of the first NOR gate is electrically connected to the second logic unit, the first driving module and the second driving module, respectively, for outputting the logic signal.

[0009] In a possible implementation of the first aspect, the second logic unit includes a second NOR gate, a first input end of the second NOR gate is used to receive the pulse width modulation signal, a second input end of the second NOR gate is electrically connected to the first logic unit, the first driving module and the second driving module respectively, for receiving the logic signal, and an output end of the second NOR gate is electrically connected to the first logic unit, for outputting the level signal.

[0010] In a possible implementation of the first aspect, the logic module includes a logic control chip, a first input end of the logic control chip is used to receive the clock signal, a second input end of the logic control chip is used to receive the pulse width modulation signal, and an output end of the logic control chip is electrically connected to the first driving module and the second driving module respectively; the logic control chip is used to output the first logic signal when the clock signal is a rising edge, and is also used to output the second logic signal when the pulse width modulation signal is a rising edge.

[0011] In a possible implementation of the first aspect, the first driving module includes a first NAND gate, a first inverter, and a second inverter, the input end of the first inverter is used to receive the overvoltage protection signal, the output end of the first inverter is electrically connected to the first input end of the first NAND gate, the second input end of the first NAND gate is used to receive an enable signal, the third input end of the first NAND gate is electrically connected to the logic module and the second driving module respectively, the output end of the first NAND gate is electrically connected to the input end of the second inverter, and the output end of the second inverter is used to be electrically connected to the first switch tube.

[0012] In a possible implementation of the first aspect, the second driving module includes a third NOR gate, a third inverter and a fourth inverter, the input end of the third inverter is used to receive an enable signal, the output end of the third inverter is electrically connected to the first input end of the third NOR gate, the second input end of the third NOR gate is electrically connected to the logic module and the first driving module respectively, the output end of the third NOR gate is electrically connected to the input end of the fourth inverter, and the output end of the fourth inverter is used to be electrically connected to the second switch tube.

[0013] In the second aspect, an embodiment of the present application provides a voltage converter, comprising a first switch tube, a second switch tube and the overvoltage protection control circuit described in any one of the first aspects, wherein the gate of the first switch tube is electrically connected to the first driving module in the overvoltage protection control circuit, the drain of the first switch tube is electrically connected to the source of the second switch tube, the source of the first switch tube is grounded, the gate of the second switch tube is electrically connected to the second driving module in the overvoltage protection control circuit, and the drain of the second switch tube is used to be electrically connected to a load.

[0014] In a possible implementation of the second aspect, the voltage converter also includes a first inductor and a first capacitor, the first end of the first inductor is used to be electrically connected to a power supply, the second end of the first inductor is respectively electrically connected to the drain of the first switching tube and the source of the second switching tube, the first end of the first capacitor is respectively electrically connected to the drain of the second switching tube and the load, and the second end of the first capacitor is grounded.

[0015] In a third aspect, an embodiment of the present application provides a switching power supply, comprising the voltage converter described in any one of the second aspects.

[0016] Compared with the prior art, the embodiments of the present invention have the following beneficial effects:

[0017] The overvoltage protection control circuit provided in the embodiment of the present application includes a logic module, a first driving module and a second driving module. When the output voltage of the voltage converter is greater than the preset value, that is, when overvoltage occurs, the first driving module can receive the overvoltage protection signal and drive the first switch tube to be disconnected according to the overvoltage protection signal. The logic module can receive the clock signal and the pulse width modulation signal, and output the first logic signal when the clock signal is a rising edge, and the second driving module drives the second switch tube to be turned on according to the first logic signal. The logic module also outputs the second logic signal when the pulse width modulation signal is a rising edge, and the second driving module drives the second switch tube to be turned off according to the second logic signal. It can be seen that when overvoltage occurs, the overvoltage protection control circuit provided in the embodiment of the present application can ensure that the first switch tube is continuously in the disconnected state, and at the same time, the clock signal and the pulse width modulation signal can also be used to control the conduction and disconnection of the second switch tube. When the second switch tube is turned on, the first inductor releases energy, and when the second switch tube is disconnected, the first inductor stores energy. In this way, the reverse current of the inductor can be maintained within a stable and controllable range, thereby avoiding the problem of excessive negative current of the inductor caused by the continuous conduction of the second switch tube when the overvoltage lasts for a long time in the existing overvoltage protection control circuit, thereby improving the reliability of the circuit. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative labor.

[0019] Figure 1 This is the basic schematic diagram of the Boost circuit;

[0020] Figure 2 It is a circuit connection diagram of an existing overvoltage protection control circuit;

[0021] Figure 3 is a principle block diagram of an overvoltage protection control circuit provided in an embodiment of the present application;

[0022] Figure 4 is a circuit connection diagram of an overvoltage protection control circuit provided in an embodiment of the present application;

[0023] Figure 5 is a circuit connection diagram of an overvoltage protection control circuit provided by another embodiment of the present application;

[0024] Figure 6 It is a principle block diagram of a voltage converter provided in one embodiment of the present application.

[0025] In the figure, 10, overvoltage protection control circuit; 101, logic module; 1011, first logic unit; 1012, second logic unit; 102, first drive module; 103, second drive module. DETAILED DESCRIPTION

[0026] In the following description, specific details such as specific system structures, technologies, etc. are provided for the purpose of illustration rather than limitation, so as to provide a thorough understanding of the embodiments of the present application. However, it should be clear to those skilled in the art that the present application may also be implemented in other embodiments without these specific details. In other cases, detailed descriptions of well-known systems, devices, circuits, and methods are omitted to prevent unnecessary details from obstructing the description of the present application.

[0027] It should be understood that when used in the present specification and the appended claims, the term "comprising" indicates the presence of described features, wholes, steps, operations, elements and / or components, but does not exclude the presence or addition of one or more other features, wholes, steps, operations, elements, components and / or combinations thereof.

[0028] It should also be understood that the term “and / or” used in the specification and appended claims refers to any and all possible combinations of one or more of the associated listed items, and includes these combinations.

[0029] As used in the specification and appended claims of this application, the term "if" can be interpreted as "when" or "uponce" or "in response to determining" or "in response to detecting", depending on the context. Similarly, the phrase "if it is determined" or "if [described condition or event] is detected" can be interpreted as meaning "uponce it is determined" or "in response to determining" or "uponce [described condition or event] is detected" or "in response to detecting [described condition or event]", depending on the context.

[0030] In addition, in the description of the present application specification and the appended claims, the terms "first", "second", "third", etc. are only used to distinguish the descriptions and cannot be understood as indicating or implying relative importance.

[0031] References to "one embodiment" or "some embodiments" etc. described in the specification of this application mean that one or more embodiments of the present application include specific features, structures or characteristics described in conjunction with the embodiment. Therefore, the statements "in one embodiment", "in some embodiments", "in some other embodiments", "in some other embodiments", etc. that appear in different places in this specification do not necessarily refer to the same embodiment, but mean "one or more but not all embodiments", unless otherwise specifically emphasized in other ways. The terms "including", "comprising", "having" and their variations all mean "including but not limited to", unless otherwise specifically emphasized in other ways.

[0032] The basic schematic diagram of the Boost circuit is as follows Figure 1 As shown in FIG. 1 , when the first switch tube N1 is turned on, the current of the first inductor L increases, and the first inductor L stores energy. When the second switch tube P1 is turned on, the first inductor L releases energy and continues to supply power to the load Rload. However, when the current of the load Rload is quickly switched from heavy load to light load, the output voltage VOUT will have a large overshoot. If the output voltage VOUT is higher than the preset value, the switch tube may be damaged. Therefore, an overvoltage protection control circuit is generally provided in the Boost circuit, such as Figure 2 As shown. When overvoltage occurs, that is, the OVP signal is a high-level signal, at this time, NOR1 outputs a low-level signal. Then, after the logic operation of NOR3 and INV1, a low-level signal is output to turn on the second switch tube P1. After the logic operation of NAND1 and INV2, a low-level signal is output to turn off the first switch tube N1. Therefore, when overvoltage occurs, the existing overvoltage protection control circuit controls the first switch tube N1 to be continuously disconnected and controls the second switch tube P1 to be continuously turned on. When the first inductor L is discharged, the current will be reversed through the second switch tube P1. If the overvoltage lasts for a long time, it may cause the negative current of the first inductor L to be too large, thereby affecting the reliability of the circuit.

[0033] It should be noted that the first switch tube N1 is an NMOS tube, and the second switch tube P1 is a PMOS tube.

[0034] Based on the above problems, the overvoltage protection control circuit provided by the embodiment of the present application includes a logic module, a first driving module and a second driving module. When the output voltage of the voltage converter is greater than the preset value, that is, when overvoltage occurs, the first driving module can receive the overvoltage protection signal and drive the first switch tube to be disconnected according to the overvoltage protection signal. The logic module can receive the clock signal and the pulse width modulation signal, and output the first logic signal when the clock signal is a rising edge, and the second driving module drives the second switch tube to be turned on according to the first logic signal. The logic module also outputs the second logic signal when the pulse width modulation signal is a rising edge, and the second driving module drives the second switch tube to be turned off according to the second logic signal. It can be seen that when overvoltage occurs, the overvoltage protection control circuit provided by the embodiment of the present application can ensure that the first switch tube is continuously in the disconnected state, and at the same time, the clock signal and the pulse width modulation signal can also be used to control the conduction and disconnection of the second switch tube. When the second switch tube is turned on, the first inductor releases energy, and when the second switch tube is disconnected, the first inductor stores energy. In this way, the reverse current of the inductor can be maintained within a stable and controllable range, thereby avoiding the problem of excessive negative current of the inductor caused by the continuous conduction of the second switch tube when the overvoltage lasts for a long time in the existing overvoltage protection control circuit, thereby improving the reliability of the circuit.

[0035] In order to illustrate the technical solution described in this application, a specific embodiment is provided below for illustration.

[0036] Figure 3 FIG. 1 shows a principle block diagram of an overvoltage protection control circuit 10 provided in an embodiment of the present application. Figure 3 As shown, the overvoltage protection control circuit 10 includes a logic module 101, a first driving module 102 and a second driving module 103. The logic module 101 is electrically connected to the first driving module 102 and the second driving module 103 respectively. The first driving module 102 is used to be electrically connected to the gate of the first switch tube N1 in the voltage converter, and the second driving module 103 is used to be electrically connected to the gate of the second switch tube P1 in the voltage converter.

[0037] Specifically, when the output voltage VOUT of the voltage converter is greater than the preset value, that is, when overvoltage occurs, the first driving module 102 can receive the overvoltage protection signal OVP and drive the first switch tube N1 to disconnect according to the overvoltage protection signal OVP. The logic module 101 can receive the clock signal CLK and the pulse width modulation signal PWM, and output the first logic signal when the clock signal CLK is a rising edge, and the second driving module 103 drives the second switch tube P1 to turn on according to the first logic signal. The logic module 101 also outputs the second logic signal when the pulse width modulation signal PWM is a rising edge, and the second driving module 103 drives the second switch tube P1 to turn off according to the second logic signal. It can be seen that when overvoltage occurs, the overvoltage protection control circuit 10 provided in the embodiment of the present application can ensure that the first switch tube N1 is continuously in the disconnected state, and at the same time, the clock signal CLK and the pulse width modulation signal PWM can also be used to control the conduction and disconnection of the second switch tube P1. When the second switch tube P1 is turned on, the first inductor L releases energy, and when the second switch tube P1 is disconnected, the first inductor L stores energy. In this way, the reverse current of the first inductor L can be maintained within a stable and controllable range, thereby avoiding the problem of excessive negative current in the first inductor L caused by continuous conduction of the second switch tube P1 when the overvoltage lasts for a long time in the existing overvoltage protection control circuit 10, thereby improving the reliability of the circuit.

[0038] It should be noted that the first driving module 102 is also used to receive the enable signal EN and the first logic signal / second logic signal output by the logic module 101, and output the first driving signal according to the overvoltage protection signal OVP, the enable signal EN and the first logic signal to drive the first switch tube N1 to disconnect. The first driving module 102 is also used to output the first driving signal according to the overvoltage protection signal OVP, the enable signal EN and the second logic signal to drive the first switch tube N1 to disconnect. The second driving module 103 is also used to receive the enable signal EN, and drive the second switch tube P1 to turn on according to the first logic signal and the enable signal EN. The second driving module 103 is also used to drive the second switch tube P1 to disconnect according to the second logic signal and the enable signal EN.

[0039] It should be noted that, due to the long duration of overvoltage, the existing overvoltage protection control circuit will cause the reverse current of the first inductor L to reach the ampere level, thereby damaging the switch tube. At the same time, when the overvoltage is released, the large current will also cause a large drop in the output voltage VOUT. The overvoltage protection control circuit 10 provided in the embodiment of the present application uses the clock signal CLK and the pulse width modulation signal PWM to control the conduction and disconnection of the second switch tube P1, that is, the conduction or disconnection of the second switch tube P1 is controlled by the loop, and the reverse current of the first inductor L can be maintained within a stable and controllable range. When the overvoltage is released, the output voltage VOUT will not change too much and can quickly enter a normal working state. At the same time, when the load Rload current quickly switches from heavy load to light load, the overvoltage protection control circuit 10 also limits the maximum overshoot, which can improve the system's load Rload transient response to a certain extent.

[0040] It should be noted that the output voltage VOUT of the voltage converter is transmitted to the error amplifier after voltage division. The error amplifier compares the output voltage VOUT after voltage division with the reference voltage and outputs a reference signal. The comparator outputs a pulse width modulation signal PWM according to the reference signal. It can be seen that there is a certain corresponding relationship between the pulse width modulation signal PWM and the output voltage VOUT. When the output voltage VOUT changes, the duty cycle of the pulse width modulation signal PWM will change, thereby adjusting the on and off time of the second switch tube P1.

[0041] In one embodiment of the present application, Figure 4 As shown, the logic module 101 includes a first logic unit 1011 and a second logic unit 1012. The first logic unit 1011 is electrically connected to the second logic unit 1012, the first driving module 102 and the second driving module 103 respectively. The second logic unit 1012 is electrically connected to the first driving module 102 and the second driving module 103 respectively.

[0042] Specifically, the first logic unit 1011 can receive the clock signal CLK and the level signal output by the second logic unit 1012, and output the logic signal (the first logic signal and the second logic signal) according to the clock signal CLK and the level signal. The second logic unit 1012 can receive the pulse width modulation signal PWM and the logic signal, and output the level signal according to the pulse width modulation signal PWM and the logic signal. It can be seen that the output end of the first logic unit 1011 serves as the input end of the second logic unit 1012, and the output end of the second logic unit 1012 serves as the input end of the first logic unit 1011, that is, the first logic unit 1011 and the second logic unit 1012 can feed back their output signals to each other, so that the output signal can be latched until another input signal changes. This design ensures the accuracy of the logic signal and improves the reliability of the overvoltage protection control circuit 10.

[0043] In one embodiment of the present application, Figure 4 As shown, the first logic unit 1011 includes a first NOR gate NOR1, a first input end of the first NOR gate NOR1 is used to receive a clock signal CLK, a second input end of the first NOR gate NOR1 is electrically connected to the second logic unit 1012, and is used to receive a level signal, and an output end of the first NOR gate NOR1 is electrically connected to the second logic unit 1012, the first driving module 102 and the second driving module 103, respectively, and is used to output a logic signal.

[0044] Specifically, the first NOR gate NOR1 receives the clock signal CLK and the level signal, performs an NOR operation on the clock signal CLK and the level signal, that is, the clock signal CLK and the level signal are firstly ORed, and then the result after the OR operation is NORed, and finally the corresponding logic signal is output. The specific operation logic of the NOR operation is: only when the clock signal CLK and the level signal are both low level, the output end of the first NOR gate NOR1 outputs a high level, otherwise, the output end of the first NOR gate NOR1 outputs a low level. It can be seen that when the clock signal CLK is a rising edge, the first logic signal outputted from the output end of the first NOR gate NOR1 is a low level signal. The second driving module 103 outputs a second driving signal according to the first logic signal (low level signal) and the enable signal EN, thereby controlling the second switch tube P1 to be turned on.

[0045] In one embodiment of the present application, Figure 4 As shown, the second logic unit 1012 includes a second NOR gate NOR2, a first input end of the second NOR gate NOR2 is used to receive a pulse width modulation signal PWM, a second input end of the second NOR gate NOR2 is electrically connected to the first logic unit 1011, the first driving module 102 and the second driving module 103 respectively, for receiving a logic signal, and an output end of the second NOR gate NOR2 is electrically connected to the first logic unit 1011, for outputting a level signal.

[0046] Specifically, the second NOR gate NOR2 receives the pulse width modulation signal PWM and the logic signal, performs an NOR operation on the pulse width modulation signal PWM and the logic signal, that is, the pulse width modulation signal PWM and the logic signal are firstly performed an OR operation, and then the result after the OR operation is performed a NOR operation, and finally the corresponding level signal is output. The specific operation logic of the NOR operation is: only when the pulse width modulation signal PWM and the logic signal are both low level, the output end of the second NOR gate NOR2 outputs a high level, otherwise, the output end of the second NOR gate NOR2 outputs a low level. It can be seen that when the pulse width modulation signal PWM is a rising edge, the level signal output by the output end of the second NOR gate NOR2 is a low level signal. At this time, the second logic signal output by the output end of the first NOR gate NOR1 is a high level signal, and the second driving module 103 outputs a third driving signal according to the second logic signal (high level signal) and the enable signal EN, thereby controlling the second switch tube P1 to be disconnected.

[0047] It should be noted that the cross-coupled first NOR gate NOR1 and the second NOR gate NOR2 form an RS latch, which has a bistable characteristic, that is, the RS latch has two stable states, which can keep one output high and the other output low until other input signals change its state. At the same time, the use of the RS latch can also prevent the circuit from frequently jittering between switch states due to slight fluctuations or short changes in the signal.

[0048] It should be noted that the present application only shows one element as the first logic unit 1011 and the second logic unit 1012, which does not mean that only this element can realize the functions of the first logic unit 1011 and the second logic unit 1012. Other elements that can realize the functions can also be replaced, and are not limited to this.

[0049] In one embodiment of the present application, the logic module 101 includes a logic control chip, a first input end of the logic control chip is used to receive a clock signal CLK, a second input end of the logic control chip is used to receive a pulse width modulation signal PWM, and an output end of the logic control chip is electrically connected to the first drive module 102 and the second drive module 103 respectively.

[0050] Specifically, the logic control chip integrates the overall control logic in the logic module 101, that is, the logic control chip has at least two input terminals and at least one output terminal, the first input terminal is used to receive the clock signal CLK, the second input terminal is used to receive the pulse width modulation signal PWM, and can output the first logic signal when the clock signal CLK is a rising edge, and can also output the second logic signal when the pulse width modulation signal PWM is a rising edge. The overall control logic in the logic module 101 is integrated with a logic control chip, which can reduce the area and complexity of the circuit board. At the same time, the logic control chip can be programmed or configured to adapt to different logic functions and actual circuit requirements, so that the overvoltage protection control circuit 10 is more flexible in design and has strong applicability.

[0051] In one embodiment of the present application, Figure 4 As shown, the first driving module 102 includes a first NAND gate NAND1, a first inverter INV1 and a second inverter INV2, the input end of the first inverter INV1 is used to receive the overvoltage protection signal OVP, the output end of the first inverter INV1 is electrically connected to the first input end of the first NAND gate NAND1, the second input end of the first NAND gate NAND1 is used to receive the enable signal EN, the third input end of the first NAND gate NAND1 is electrically connected to the logic module 101 and the second driving module 103 respectively, the output end of the first NAND gate NAND1 is electrically connected to the input end of the second inverter INV2, and the output end of the second inverter INV2 is electrically connected to the gate of the first switch tube N1.

[0052] Specifically, after the first inverter INV1 receives the overvoltage protection signal OVP, it inverts and outputs the overvoltage protection signal OVP, that is, when overvoltage occurs, when the overvoltage protection signal OVP is at a high level, the XOVP signal output by the first inverter INV1 is a low level signal. The first NAND gate NAND1 receives the XOVP signal, the enable signal EN and the logic signal, and performs a NAND operation on the XOVP signal, the enable signal EN and the logic signal, that is, the XOVP signal, the enable signal EN and the logic signal are firstly ANDed, and then the result after the AND operation is NOT operated, and finally the NAND logic signal is output. After the second inverter INV2 receives the NAND logic signal, it inverts and outputs the signal. The specific operation logic of the NAND operation is: only when the XOVP signal, the enable signal EN and the logic signal are all at a high level, the output end of the first NAND gate NAND1 outputs a low level, otherwise, the output end of the first NAND gate NAND1 outputs a high level. It can be seen that when overvoltage occurs, the XOVP signal transmitted to the first NAND gate NAND1 is low level, the first NAND gate NAND1 outputs a high level signal, and then after being inverted by the second inverter INV2, the first drive signal is output, thereby controlling the first switch tube N1 to be disconnected. At the same time, the first inverter INV1 and the second inverter INV2 are also used for filtering, which can ensure the accuracy of the XOVP signal and the first drive signal.

[0053] It should be noted that the first driving module 102 uses the first NAND gate NAND1 and the second inverter INV2, that is, the design of first performing a NAND operation and finally performing an inversion operation can ensure the stability of the output first driving signal and achieve more accurate control of the first switch tube N1. At the same time, the design of using the first NAND gate NAND1 and the second inverter INV2 can also shorten the response time and speed up the response speed.

[0054] It should be noted that, in the present application, only one element is shown as the first driving module 102, which does not mean that only this element can realize the function of the first driving module 102. Other elements that can realize the function can also be replaced, and are not limited to this. For example, the first driving module 102 can include only one NAND gate, and a NAND gate is used to replace the design of the first NAND gate NAND1 and the second inverter INV2, thereby simplifying the circuit structure.

[0055] In one embodiment of the present application, Figure 4As shown, the second driving module 103 includes a third NOR gate NOR3, a third inverter INV3 and a fourth inverter INV4, the input end of the third inverter INV3 is used to receive an enable signal EN, the output end of the third inverter INV3 is electrically connected to the first input end of the third NOR gate NOR3, the second input end of the third NOR gate NOR3 is electrically connected to the logic module 101 and the first driving module 102 respectively, the output end of the third NOR gate NOR3 is electrically connected to the input end of the fourth inverter INV4, and the output end of the fourth inverter INV4 is electrically connected to the gate of the second switch tube P1.

[0056] Specifically, after the third inverter INV3 receives the enable signal EN, it inverts the enable signal EN and outputs it, that is, when the enable signal EN is at a high level, the XEN signal output by the third inverter INV3 is a low level signal. The third NOR gate NOR3 receives the XEN signal and the logic signal, and performs an NOR operation on the XEN signal and the logic signal, that is, the XEN signal and the logic signal are firstly ORed, and then the result after the OR operation is NORed, and finally the NOR logic signal is output. After the fourth inverter INV4 receives the NOR logic signal, it inverts the signal and outputs it. The specific operation logic of the NOR operation is: only when the XEN signal and the logic signal are both at a low level, the output end of the third NOR gate NOR3 outputs a high level, otherwise, the output end of the third NOR gate NOR3 outputs a low level. It can be seen that when overvoltage occurs, since the XEN signal transmitted to the third NOR gate NOR3 is at a low level, the level state of the NOR logic signal output from the output end of the third NOR gate NOR3 is determined by the level state of the logic signal transmitted to the third NOR gate NOR3. When the logic signal transmitted to the third NOR gate NOR3 is the first logic signal (low level signal), the third NOR gate NOR3 outputs a high level signal, and then after being inverted by the fourth inverter INV4, the second drive signal is output, thereby controlling the second switch tube P1 to be turned on. When the logic signal transmitted to the third NOR gate NOR3 is the second logic signal (high level signal), the third NOR gate NOR3 outputs a low level signal, and then after being inverted by the fourth inverter INV4, the third drive signal is output, thereby controlling the second switch tube P1 to be turned off. At the same time, the third inverter INV3 and the fourth inverter INV4 are also used for filtering, which can ensure the accuracy of the XEN signal and the second drive signal and the third drive signal.

[0057] It should be noted that the second driving module 103 adopts the third NOR gate NOR3 and the fourth inverter INV4, that is, the design of first performing NOR operation and finally performing inversion operation can eliminate the burrs or noise between the signals, thereby generating a more stable second driving signal or a third driving signal, and realizing more accurate control of the second switch tube P1. At the same time, the design of adopting the third NOR gate NOR3 and the fourth inverter INV4 can also shorten the response time and speed up the response speed.

[0058] It should be noted that, in the present application, only one element as the second driving module 103 is shown, which does not mean that only this element can realize the function of the second driving module 103. Other elements that can realize the function can also be replaced, and are not limited to this. For example, the second driving module 103 can include only one NOR gate, and one NOR gate is used to replace the design of the third NOR gate NOR3 and the fourth inverter INV4, thereby simplifying the circuit structure.

[0059] In order to Figure 2 The existing overvoltage protection control circuit is shown in sharp contrast. Figure 4 The control logic of the overvoltage protection control circuit 10 shown in FIG. 1 can be used to design a circuit structure of another embodiment as shown in FIG. Figure 5 Specifically, relative to Figure 4 In terms of Figure 5 The first inverter INV1 is deleted from the first driving module 102, and the first driving module 102 includes a first NAND gate NAND1 and a second inverter INV2. The first NAND gate NAND1 is used to receive the XOVP signal, the enable signal EN and the logic signal. The third inverter INV3 is deleted from the second driving module 103, and the second driving module 103 includes a third NOR gate NOR3 and a fourth inverter INV4. The third NOR gate NOR3 is used to receive the XEN signal and the logic signal. Figure 5 The operation logic and Figure 4 The operation logic is basically the same, and will not be elaborated here.

[0060] It should be noted that in Figure 2In the overvoltage protection control circuit shown, the overvoltage protection signal OVP affects the output state of the latch, thereby affecting the output state of the overvoltage protection control circuit, thereby controlling the on and off of the first switch tube N1 and the on and off of the second switch tube P1. This design prolongs the response time of the overvoltage protection control circuit and has low reaction efficiency. In the embodiment of the present application, the XOVP signal (or overvoltage protection signal OVP) is directly transmitted to the first driver module 102, so that the first driver module 102 can immediately perform logical operations and output the first drive signal to control the first switch tube N1 to disconnect. Therefore, in the overvoltage protection control circuit 10 of the present application, when an overvoltage occurs, the overvoltage protection signal OVP can more quickly and directly affect the output state of the overvoltage protection control circuit 10, especially the control of the disconnection state of the first switch tube N1 is more timely. The intermediate links are reduced, and the response speed can be accelerated when dealing with overvoltage conditions, and the reaction efficiency of the overvoltage protection control circuit 10 is improved. At the same time, in the design of the present application, the overvoltage protection signal OVP has a higher priority. If overvoltage occurs, the first driving module 102 can immediately receive the overvoltage protection signal OVP to trigger the protection action without waiting for the state change of the latch. This ensures the priority response capability of the overvoltage protection in the circuit, so that the entire circuit can respond immediately when overvoltage occurs, avoiding delays in protection actions due to the state of the latch, and also avoiding interference with the driving signal due to changes in the state of the latch.

[0061] The present application also discloses a voltage converter, such as Figure 6 As shown, the voltage converter includes a first switch tube N1, a second switch tube P1 and the above-mentioned overvoltage protection control circuit 10, the gate of the first switch tube N1 is electrically connected to the first driving module 102 in the overvoltage protection control circuit 10, the drain of the first switch tube N1 is electrically connected to the source of the second switch tube P1, the source of the first switch tube N1 is grounded, the gate of the second switch tube P1 is electrically connected to the second driving module 103 in the overvoltage protection control circuit 10, and the drain of the second switch tube P1 is used to be electrically connected to the load Rload.

[0062] Specifically, the voltage converter uses an overvoltage protection control circuit 10 to control the on and off of the first switch tube N1 and the second switch tube P1, and can quickly control the first switch tube N1 to be turned off when an overvoltage occurs, and use a loop to control the on and off of the second switch tube P1. In this way, precise control of the first switch tube N1 and the second switch tube P1 is achieved, and the conversion efficiency of the voltage converter is improved.

[0063] In one embodiment of the present application, Figure 6As shown, the voltage converter also includes a first inductor L and a first capacitor Cout, the first end of the first inductor L is electrically connected to the power supply VIN, the second end of the first inductor L is electrically connected to the drain of the first switch tube N1 and the source of the second switch tube P1 respectively, the first end of the first capacitor Cout is electrically connected to the drain of the second switch tube P1 and the load Rload respectively, and the second end of the first capacitor Cout is grounded.

[0064] Specifically, the first inductor L is used as an energy storage device to store and release energy. When overvoltage occurs, the first switch tube N1 is continuously disconnected. When the second switch tube P1 is turned on, the first inductor L releases energy. When the second switch tube P1 is disconnected, the first inductor L stores energy. The first capacitor Cout is connected in parallel at both ends of the load Rload for filtering, so that the output voltage VOUT of the voltage converter is more stable and reliable.

[0065] The present application also discloses a switching power supply, including the above-mentioned voltage converter. The switching power supply adopts the above-mentioned voltage converter to improve the working efficiency of the switching power supply and enhance the reliability and applicability of the switching power supply.

[0066] Since the processing and functions implemented by the voltage converter and the switching power supply in this embodiment basically correspond to the embodiments, principles and examples of the aforementioned overvoltage protection control circuit, for the details not described in this embodiment, please refer to the relevant descriptions in the aforementioned embodiments and will not be repeated here.

[0067] The embodiments described above are only used to illustrate the technical solutions of the present application, rather than to limit them. Although the present application has been described in detail with reference to the aforementioned embodiments, a person skilled in the art should understand that the technical solutions described in the aforementioned embodiments may still be modified, or some of the technical features may be replaced by equivalents. Such modifications or replacements do not deviate the essence of the corresponding technical solutions from the spirit and scope of the technical solutions of the embodiments of the present application, and should all be included in the protection scope of the present application.

Claims

1. An overvoltage protection control circuit, applied to a BOOST voltage converter, characterized in that: The overvoltage protection control circuit includes a logic module, a first driving module and a second driving module, wherein the logic module is electrically connected to the first driving module and the second driving module respectively, the first driving module is used to be electrically connected to the gate of the first switch tube in the BOOST voltage converter, and the second driving module is used to be electrically connected to the gate of the second switch tube in the BOOST voltage converter; the drain of the first switch tube is electrically connected to the source of the second switch tube, the source of the first switch tube is grounded, and the drain of the second switch tube is used to be electrically connected to the load; When the output voltage of the BOOST voltage converter is greater than a preset value, the first driving module is used to receive an overvoltage protection signal and output a first driving signal to the first switch tube according to the overvoltage protection signal to drive the first switch tube to be disconnected; the logic module is used to receive a clock signal and a pulse width modulation signal, and output a first logic signal when the clock signal is a rising edge, and output a second logic signal when the pulse width modulation signal is a rising edge; the second driving module is used to output a second driving signal to the second switch tube according to the first logic signal to drive the second switch tube to be turned on, and the second driving module is also used to output a third driving signal to the second switch tube according to the second logic signal to drive the second switch tube to be disconnected.

2. The overvoltage protection control circuit according to claim 1, characterized in that: The logic module includes a first logic unit and a second logic unit, the first logic unit is electrically connected to the second logic unit, the first driving module and the second driving module respectively, and the second logic unit is electrically connected to the first driving module and the second driving module respectively; The first logic unit is used to output a logic signal according to the clock signal and the level signal output by the second logic unit, and the second logic unit is used to output the level signal according to the pulse width modulation signal and the logic signal, wherein the logic signal includes the first logic signal and the second logic signal.

3. The overvoltage protection control circuit according to claim 2, characterized in that: The first logic unit includes a first NOR gate, wherein the first input end of the first NOR gate is used to receive the clock signal, the second input end of the first NOR gate is electrically connected to the second logic unit for receiving the level signal, and the output end of the first NOR gate is electrically connected to the second logic unit, the first driving module and the second driving module respectively for outputting the logic signal.

4. The overvoltage protection control circuit according to claim 2, characterized in that: The second logic unit includes a second NOR gate, a first input end of the second NOR gate is used to receive the pulse width modulation signal, a second input end of the second NOR gate is electrically connected to the first logic unit, the first driving module and the second driving module respectively, for receiving the logic signal, and an output end of the second NOR gate is electrically connected to the first logic unit, for outputting the level signal.

5. The overvoltage protection control circuit according to claim 1, characterized in that: The logic module includes a logic control chip, a first input end of the logic control chip is used to receive the clock signal, a second input end of the logic control chip is used to receive the pulse width modulation signal, and an output end of the logic control chip is electrically connected to the first driving module and the second driving module respectively; the logic control chip is used to output the first logic signal when the clock signal is a rising edge, and is also used to output the second logic signal when the pulse width modulation signal is a rising edge.

6. The overvoltage protection control circuit according to claim 1, characterized in that: The first driving module includes a first NAND gate, a first inverter and a second inverter, the input end of the first inverter is used to receive the overvoltage protection signal, the output end of the first inverter is electrically connected to the first input end of the first NAND gate, the second input end of the first NAND gate is used to receive an enable signal, the third input end of the first NAND gate is electrically connected to the logic module and the second driving module respectively, the output end of the first NAND gate is electrically connected to the input end of the second inverter, and the output end of the second inverter is used to be electrically connected to the first switch tube.

7. The overvoltage protection control circuit according to claim 1, characterized in that: The second driving module includes a third NOR gate, a third inverter and a fourth inverter, the input end of the third inverter is used to receive an enable signal, the output end of the third inverter is electrically connected to the first input end of the third NOR gate, the second input end of the third NOR gate is electrically connected to the logic module and the first driving module respectively, the output end of the third NOR gate is electrically connected to the input end of the fourth inverter, and the output end of the fourth inverter is used to be electrically connected to the second switch tube.

8. A voltage converter, characterized in that: It includes a first switch tube, a second switch tube and the overvoltage protection control circuit according to any one of claims 1 to 7, the gate of the first switch tube is electrically connected to the first driving module in the overvoltage protection control circuit, the drain of the first switch tube is electrically connected to the source of the second switch tube, the source of the first switch tube is grounded, the gate of the second switch tube is electrically connected to the second driving module in the overvoltage protection control circuit, and the drain of the second switch tube is used to be electrically connected to a load.

9. The voltage converter according to claim 8, characterized in that: The voltage converter also includes a first inductor and a first capacitor, wherein the first end of the first inductor is used to be electrically connected to a power supply, the second end of the first inductor is respectively electrically connected to the drain of the first switching tube and the source of the second switching tube, the first end of the first capacitor is respectively electrically connected to the drain of the second switching tube and the load, and the second end of the first capacitor is grounded.

10. A switching power supply, characterized in that: Comprising the voltage converter as claimed in claim 8 or 9.

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