An information processing system for an inertial measurement device
By implementing the inertial measurement device information processing system inside an FPGA and replacing the DSP processor with a MicroBlaze soft-core processor, the problems of large size, high power consumption, and resource waste in the inertial measurement device information processing system are solved. This achieves miniaturization and low power consumption design of the system, reduces manufacturing costs, and improves reliability.
Patent Information
- Application Number
- CN202411111077.6
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2024-08-14
- Publication Date
- 2025-12-02
- Estimated Expiration
- 2044-08-14
AI Technical Summary
Existing inertial measurement device information processing systems suffer from problems such as large size, high power consumption, resource waste, high design cost, and low reliability.
All functions of the inertial measurement device's information processing system are implemented within the FPGA. The DSP processor is replaced by Xilinx's MicroBlaze soft-core processor, and the modules are connected via the AXI bus and APB bus to achieve information exchange and interrupt management between processors, thereby reducing hardware size and power consumption.
This resulted in an 84% reduction in the size of the information processing system, a 66% reduction in power consumption, a simple and reliable design, and lower manufacturing costs.
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Figure CN119024743B_ABST
Abstract
Description
Technical Field
[0001] This invention belongs to the field of aircraft control technology, specifically relating to an inertial measurement device information processing system. Background Technology
[0002] Currently, in aircraft control systems with high real-time control requirements, the information processing system (hereinafter referred to as the information processing system) of the inertial measurement unit is generally based on a "DSP+FPGA" information processing architecture. The DSP chip is the main processor chip, used for fixed-point and floating-point operations on high-performance complex models; the FPGA chip is the coprocessor chip, used for coprocessing functions such as communication control and logic operations.
[0003] The functional block diagram of the current information processing system architecture is as follows: Figure 1 As shown, the current information processing system architecture is generally a "DSP+FPGA" high-speed information processing architecture. The DSP processor implements system initialization, comprehensive management of information processing flow, filtering of data acquired by inertial devices, compensation of data acquired by inertial devices, calibration and testing of inertial devices, and communication with the FPGA coprocessor. The FPGA coprocessor is responsible for the data acquisition buffers of the three-axis gyroscope and the three-axis accelerometer, digital communication processing of the test system, digital communication processing of the flight control computer, and other basic functions such as timing and interrupts.
[0004] In each aircraft control cycle, the FPGA coprocessor sends inertial data acquisition commands to the gyroscope and accelerometer via a digital communication interface. Upon receiving the commands, the gyroscope and accelerometer return raw angular velocity (gyroscope), raw acceleration (accelerometer), and temperature information to the FPGA coprocessor. The FPGA coprocessor decodes these raw angular velocity, acceleration, and temperature information and stores them in a buffer. The DSP reads these raw angular velocity, acceleration, and temperature information via the EMIF bus based on an interrupt flag. The DSP processor filters the raw angular velocity and acceleration values and compensates for parameters such as temperature based on the inertial device compensation model. The DSP processor then sends the compensated angular velocity and acceleration values to the test system via the test system digital communication module in the FPGA chip and to the flight control computer via the flight control computer digital communication module.
[0005] The current information processing system using "DSP+FPGA" has the following shortcomings:
[0006] 1) The large size of the information processing system makes it unsuitable for the miniaturization design of inertial measurement units. For example, the size of the existing information processing system is approximately 70mm × 60mm × 8mm.
[0007] 2) The high power consumption of the information processing system makes it difficult to design low-power and heat dissipation systems for the entire inertial measurement equipment. Currently, the power consumption of the information processing system is about 3W, and the power consumption of a typical series of inertial measurement equipment is 10W, which accounts for a high proportion of the total power consumption of the equipment.
[0008] 3) Waste of DSP processor resources and performance. The DSP chip is an embedded general-purpose processor, but the inertial measurement device only uses <50% of its computing performance and <20% of its interface resources.
[0009] 4) Multiprocessor (DSP processor, FPGA coprocessor) design increases design and manufacturing costs and reduces reliability. Summary of the Invention
[0010] To address the aforementioned technical problems, this invention provides an inertial measurement device information processing system, comprising a system management processor, an X processor, a Y processor, a Z processor, a gyroscope information acquisition cache module, an accelerometer information acquisition cache module, a test system digital communication module, and a flight control computer digital communication module. Each processor is equipped with an independent program memory for storing instructions and data. Each processor is connected to an AXI matrix module via an AXI bus. The AXI matrix module connects each processor to an AXI interrupt controller, a BRAM controller, and multiple AXI-APBs. The bridge connects the processors, and each processor accesses the shared BRAM memory space via the AXI bus to achieve inter-processor information exchange. The AXI interrupt controller manages the interrupt signals sent to each processor. The gyroscope information acquisition and buffer module is used to acquire and buffer the gyroscope output data, including an X-axis gyroscope information acquisition and buffer module, a Y-axis gyroscope information acquisition and buffer module, for use by the X, Y, and Z processors. After reset, the gyroscope information acquisition and buffer module first initializes and configures the digital gyroscope, and then sends a gyroscope data read command to the digital gyroscope every cycle, and saves the raw angular velocity and temperature returned by the gyroscope. The information includes: an accelerometer information acquisition and caching module for acquiring and caching accelerometer data, comprising an X-axis accelerometer information acquisition and caching module, a Y-axis accelerometer information acquisition and caching module, and a Z-axis accelerometer information acquisition and caching module for use by the X processor, Y processor, and Z processor, respectively; after reset, the accelerometer information acquisition and caching module first initializes and configures the digital accelerometer, then sends an accelerometer data read command to the digital accelerometer in each cycle, and saves the raw acceleration and temperature information returned by the accelerometer; a test system digital communication module for protocol parsing and communication data caching for digital communication between the inertial measurement device and the test system, connected to the AXI-APB Bridge via the APB bus; and a flight control computer digital communication module for protocol parsing and communication data caching for digital communication between the inertial measurement device and the flight control computer, connected to the AXI-APB Bridge via the APB bus.
[0011] Furthermore, it also includes basic functional modules for generating high-precision timer pulse signals, generating operating clocks for each module, and generating reset signals for each module.
[0012] Furthermore, after each module in the inertial measurement device information processing system is reset, the system management processor runs the system management software to configure the operating parameters of the system management processor, the AXI interrupt controller, the basic function modules, the test system digital communication module, and the flight control computer digital communication module; the X processor configures the X-axis gyroscope information acquisition cache module and the X-axis accelerometer information acquisition cache module; the Y processor configures the Y-axis gyroscope information acquisition cache module and the Y-axis accelerometer information acquisition cache module; and the Z processor configures the Z-axis gyroscope information acquisition cache module and the Z-axis accelerometer information acquisition cache module.
[0013] Furthermore, after the initial configuration is completed, the inertial measurement device information processing system waits to read the test mode command from the test system. If the test system's digital communication module receives the test mode command, the inertial measurement device information processing system enters the test working mode; if no correct test mode command is received, the inertial measurement device information processing system enters the flight working mode.
[0014] Furthermore, after the inertial measurement device information processing system enters the flight working mode, the timer module in the basic functional module sends a timed interrupt signal to the X-axis gyroscope information acquisition cache module, the Y-axis gyroscope information acquisition cache module, the Z-axis gyroscope information acquisition cache module, the X-axis accelerometer information acquisition cache module, the Y-axis accelerometer information acquisition cache module, and the Z-axis accelerometer information acquisition cache module every cycle. After receiving the timed interrupt signal, the six information acquisition cache modules send a data read command to the gyroscope and accelerometer, and save the returned raw angular velocity, raw acceleration, and temperature information.
[0015] Furthermore, after the six information acquisition and caching modules complete the data saving for this cycle, the timer module sets a data ready flag. Upon detecting the flag, the X processor, Y processor, and Z processor read data from the X-axis gyroscope information acquisition and caching module; the Y processor reads data from the Y-axis gyroscope information acquisition and caching module; and the Z processor reads data from the Z-axis gyroscope information acquisition and caching module. The X processor filters the raw X-axis angular velocity and X-axis acceleration values, while the Y processor and Z processor simultaneously filter the raw Y-axis angular velocity and Y-axis acceleration values. The X, Y, and Z processors write temperature information into the BRAM and set a temperature information ready flag for the system management processor to query. Upon receiving the temperature ready flag, the system management processor... After the flag is prepared, temperature information is read from the BRAM, and the temperature information is used to correct the inertial compensation parameters. The corrected parameters are written to a designated area in the BRAM, and a data ready flag is set for querying by the X, Y, and Z processors. After the X, Y, and Z processors find the data ready flag, they read the corrected inertial compensation parameters. The X processor calculates the X-axis angular velocity and X-axis acceleration, the Y processor calculates the Y-axis angular velocity and Y-axis acceleration, and the Z processor calculates the Z-axis angular velocity and Z-axis acceleration. After the X, Y, and Z processors complete the compensation calculation, they write the obtained angular velocity and acceleration data to a designated location in the BRAM and set a compensation data ready flag for querying by the system management processor. After receiving the compensation data ready flag, the system management processor reads the compensation data and frames the compensation data and other data according to the communication protocol required by the flight control system, and sends the data to the flight control computer through the flight control computer's digital communication module.
[0016] Furthermore, after the inertial measurement device information processing system enters the test working mode, the system management processor sends data to the test system through the test system digital communication module.
[0017] This invention addresses the shortcomings of inertial measurement device information processing systems, such as large hardware size, high power consumption, wasted processing resources, high design and manufacturing costs, and low reliability, and has the following advantages:
[0018] (1) All information processing functions of the information processing system of the present invention are implemented inside the FPGA, and the size is reduced by about 84% compared with the existing information processing system;
[0019] (2) The power consumption of the information processing system of the present invention is about 1W, which is about 66% less than that of the existing information processing system;
[0020] (3) The main chips include only FPGA chips, FLASH chips, crystal oscillators, reset chips, etc. The electrical connection design is simple and reliable, and the design and manufacturing cost is low. Attached Figure Description
[0021] Figure 1 This is a diagram of the current inertial measurement unit's information processing system.
[0022] Figure 2 This is a diagram of the information processing system of the inertial measurement device of the present invention. Detailed Implementation
[0023] To better understand the purpose, technical solution, and function of this invention, the invention will be described in further detail below with reference to the accompanying drawings. However, this invention can be implemented in many different ways as defined and covered by the claims. The accompanying drawings, which constitute a part of this application, are used to provide a further understanding of the invention. The illustrative embodiments of the invention and their descriptions are used to explain the invention and do not constitute an improper limitation of the invention.
[0024] To address the shortcomings in the design of existing inertial measurement device (IMM) information processing systems, this invention implements all information processing functions within an FPGA chip: it uses the Xilinx MicroBlaze IP soft core as a processor instead of a DSP processor. The MicroBlaze processor is connected to the original FPGA internal modules via the chip's internal buses AXI and APB, thereby realizing the IMM information processing functions.
[0025] like Figure 2 As shown, the information processing system of this invention uses four MicroBlaze soft cores as processors: a system management processor (MicroBlaze SYSTEM), an X processor (MicroBlaze X), a Y processor (MicroBlaze Y), and a Z processor (MicroBlaze Z). Each processor is equipped with independent local memory for storing instructions and data.
[0026] The four processors are connected to the AXI matrix module (AXI Interconnect) via the AXI bus. The AXI matrix module is responsible for connecting the four processors (AXI bus masters) and multiple functional modules (AXI interrupt controller, BRAM controller, AXI-APB Bridge) to enable data communication between the master and slave devices.
[0027] All four MicroBlaze processors can access the BRAM memory space via the AXI bus, enabling inter-processor communication through shared memory. The AXI interrupt controller, configured via the AXI interface, manages interrupt signals sent to the processors. Timers and other basic functional modules are used to generate high-precision timer pulse signals, generate operating clocks for each module, and generate reset signals for each module.
[0028] The gyroscope information acquisition and caching module (including X, Y, and Z modules) is used to acquire and cache gyroscope output data for use by the MicroBlaze processor. After reset, the gyroscope information acquisition and caching module first initializes and configures the digital gyroscope, and then sends a gyroscope data read command to the digital gyroscope every cycle, and saves the raw angular velocity and temperature information returned by the gyroscope.
[0029] The accelerometer data acquisition and caching module (comprising X, Y, and Z modules) is used to acquire and cache accelerometer data for use by the MicroBlaze processor. Upon reset, the accelerometer data acquisition and caching module first initializes and configures the digital accelerometer. Then, each cycle, it sends an accelerometer data read command to the digital accelerometer and saves the raw acceleration and temperature information returned by the accelerometer.
[0030] The test system's digital communication module is used for protocol parsing and data buffering for digital communication between the inertial measurement unit (IMU) and the test system. The flight control computer's digital communication module is used for protocol parsing and data buffering for digital communication between the IMU and the flight control computer.
[0031] After all modules of the inertial measurement unit information processing system have been reset, the four MicroBlaze processors begin initialization configuration: the system management processor runs the system management software to configure its own operating parameters, AXI interrupt controller, timers and other basic function modules, test system digital communication module, and flight control computer digital communication module; the X processor configures the X-axis gyroscope information acquisition cache module and the X-axis accelerometer information acquisition cache module; the Y processor configures the Y-axis gyroscope information acquisition cache module and the Y-axis accelerometer information acquisition cache module; and the Z processor configures the Z-axis gyroscope information acquisition cache module and the Z-axis accelerometer information acquisition cache module.
[0032] After initialization and configuration, the inertial measurement unit (IMU) information processing system waits to read the test mode command from the test system. If the test system's digital communication module receives the test mode command, the IMU information processing system enters the test working mode; otherwise, it enters the flight working mode.
[0033] After the inertial measurement unit (IMU) information processing system enters flight mode, the timer module in the basic functional module sends a timer interrupt signal to the X-axis gyroscope information acquisition cache module, Y-axis gyroscope information acquisition cache module, Z-axis gyroscope information acquisition cache module, X-axis accelerometer information acquisition cache module, Y-axis accelerometer information acquisition cache module, and Z-axis accelerometer information acquisition cache module every cycle. Upon receiving the timer interrupt signal, the six information acquisition cache modules send data read commands to the gyroscopes and accelerometers, and save the returned raw angular velocity, raw acceleration, and temperature information. Once the six information acquisition cache modules have completed saving the data for the current cycle, the timer module sets a data ready flag. After the X, Y, and Z processors detect the flag, the X processor reads data from the X-axis gyroscope information acquisition cache module and the X-axis accelerometer information acquisition cache module; the Y processor reads data from the Y-axis gyroscope information acquisition cache module and the Y-axis accelerometer information acquisition cache module; and the Z processor reads data from the Z-axis gyroscope information acquisition cache module and the Z-axis accelerometer information acquisition cache module. The X processor filters the raw X-axis angular velocity and X-axis acceleration values, while the Y processor filters the raw Y-axis angular velocity and Y-axis acceleration values, and the Z processor filters the raw Z-axis angular velocity and Z-axis acceleration values. The X, Y, and Z processors write temperature information into the BRAM memory and set a temperature information readiness flag for the system management processor to query. Upon receiving the temperature readiness flag, the system management processor reads the temperature information from the BRAM memory and uses it to correct the inertial compensation parameters. The corrected parameters are written to a designated area in the BRAM memory, and a data readiness flag is set for the X, Y, and Z processors to query. After the X, Y, and Z processors detect the data readiness flag, they read the corrected inertial compensation parameters. The X processor calculates the X-axis angular velocity and X-axis acceleration, the Y processor calculates the Y-axis angular velocity and Y-axis acceleration, and the Z processor calculates the Z-axis angular velocity and Z-axis acceleration. After the X, Y, and Z processors complete their compensation calculations, they write the calculated angular velocity and acceleration data to a designated location in the BRAM memory and set a compensation data readiness flag for the system management processor to query. After receiving the compensation data ready flag, the system management processor reads the compensation data and frames it together with other data according to the communication protocol required by the flight control system. The data is then sent to the flight control computer through the flight control computer's digital communication module.
[0034] The inertial measurement unit's information processing system enters the test working mode similarly to the flight working mode, with the main differences being: the system management processor no longer sends data to the flight control computer, but instead sends data to the test system through the test system's digital communication module; the data framing information sent to the ground test system is in accordance with the test system's requirements, including more inertial measurement information.
[0035] The information processing system of this invention's inertial measurement device is implemented entirely within an FPGA. The system measures 35mm × 25mm × 6mm, a reduction of approximately 84% in size compared to existing information processing systems based on a "DSP+FPGA" processing architecture. The FPGA inertial measurement device information processing system consumes approximately 1W, a reduction of approximately 66% compared to existing systems. The circuit design of the information processing system includes only an FPGA chip, a configuration FLASH chip, a crystal oscillator, and a reset chip, resulting in a simple and reliable electrical connection design. The FPGA's internal processing architecture is designed according to the characteristics of the inertial measurement device's algorithm, using three computing processors (X processor, Y processor, and Z processor) and a system manager, integrating seamlessly with the six-axis inertial measurement device's algorithm.
[0036] In this embodiment, the MicroBlaze soft core inside the FPGA is used to replace the DSP processor function to realize the information processing of the inertial measurement device. According to the characteristics of the software algorithm of the inertial measurement device, four MicroBlaze soft cores are instantiated inside the FPGA, and each soft core is assigned to perform specific information processing tasks according to the algorithm characteristics. The AXI bus inside the FPGA is used to replace the EMIF bus between the DSP and the FPGA.
[0037] The above embodiments are merely preferred embodiments of the present invention. Therefore, all equivalent changes or modifications made to the structure, features and principles described in the claims of this patent application are included within the scope of this patent application.
Claims
1. An information processing system for an inertial measurement device, characterized in that, This includes a system management processor, an X processor, a Y processor, a Z processor, a gyroscope information acquisition and buffer module, an accelerometer information acquisition and buffer module, a test system digital communication module, and a flight control computer digital communication module. Each processor is equipped with an independent program memory for storing instructions and data. Each processor is connected to an AXI matrix module via an AXI bus. The AXI matrix module connects each processor to an AXI interrupt controller, a BRAM controller, and multiple AXI-APB Bridges. Each processor accesses a shared BRAM memory space via the AXI bus to enable inter-processor information exchange. The AXI interrupt controller manages the interrupt signals sent to each processor. The gyroscope information acquisition and caching module is used to acquire and cache the gyroscope output data. It includes an X-axis gyroscope information acquisition and caching module, a Y-axis gyroscope information acquisition and caching module, and a Z-axis gyroscope information acquisition and caching module for use by the X processor, Y processor, and Z processor. After reset, the gyroscope information acquisition and caching module first initializes and configures the digital gyroscope. Then, it sends a gyroscope data read command to the digital gyroscope every cycle and saves the original angular velocity and temperature information returned by the gyroscope. The accelerometer information acquisition and caching module is used to acquire and cache accelerometer data. It includes an X-axis accelerometer information acquisition and caching module, a Y-axis accelerometer information acquisition and caching module, and a Z-axis accelerometer information acquisition and caching module for use by the X processor, Y processor, and Z processor. After reset, the accelerometer information acquisition and caching module first initializes and configures the digital accelerometer. Then, it sends an accelerometer data read command to the digital accelerometer in each cycle and saves the raw acceleration and temperature information returned by the accelerometer. The digital communication module of the test system is used for protocol parsing and communication data buffering for digital communication between the inertial measurement device and the test system, and is connected to the AXI-APB Bridge via the APB bus; The flight control computer digital communication module is used for protocol parsing and communication data buffering for digital communication between the inertial measurement unit and the flight control computer, and is connected to the AXI-APB Bridge via the APB bus.
2. The inertial measurement device information processing system according to claim 1, characterized in that, It also includes basic functional modules for generating high-precision timer pulse signals, generating working clocks for each module, and generating reset signals for each module.
3. The inertial measurement device information processing system according to claim 2, characterized in that, After all modules in the inertial measurement unit information processing system are reset, the system management processor runs the system management software to configure the operating parameters of the system management processor, the AXI interrupt controller, the basic function modules, the test system digital communication module, and the flight control computer digital communication module; the X processor configures the X-axis gyroscope information acquisition cache module and the X-axis accelerometer information acquisition cache module; the Y processor configures the Y-axis gyroscope information acquisition cache module and the Y-axis accelerometer information acquisition cache module. The Z processor is configured with the Z-axis gyroscope information acquisition cache module and the Z-axis accelerometer information acquisition cache module.
4. The inertial measurement device information processing system according to claim 3, characterized in that, After initialization and configuration, the inertial measurement device information processing system waits to read the test mode command from the test system. If the test system's digital communication module receives the test mode command, the inertial measurement device information processing system enters the test working mode; otherwise, if the correct test mode command is not received, the inertial measurement device information processing system enters the flight working mode.
5. The inertial measurement device information processing system according to claim 4, characterized in that, After the inertial measurement device information processing system enters the flight working mode, the timer module in the basic functional module sends a timed interrupt signal to the X-axis gyroscope information acquisition cache module, the Y-axis gyroscope information acquisition cache module, the Z-axis gyroscope information acquisition cache module, the X-axis accelerometer information acquisition cache module, the Y-axis accelerometer information acquisition cache module, and the Z-axis accelerometer information acquisition cache module every cycle. After receiving the timed interrupt signal, the six information acquisition cache modules send a data read command to the gyroscope and accelerometer, and save the returned raw angular velocity, raw acceleration, and temperature information.
6. The inertial measurement device information processing system according to claim 5, characterized in that, After the six information acquisition and caching modules complete the data saving for this cycle, the timer module sets a data ready flag. Upon detecting the flag, the X processor, Y processor, and Z processor read data from the X-axis gyroscope information acquisition and caching module; the Y processor reads data from the Y-axis gyroscope information acquisition and caching module; the Z processor reads data from the Z-axis gyroscope information acquisition and caching module; the X processor filters the raw X-axis angular velocity and X-axis acceleration values, as do the Y processor and Z processor; and finally, the X, Y, and Z processors write the temperature information into the BRAM. A temperature information readiness flag is set for querying by the system management processor. Upon receiving the temperature readiness flag, the system management processor reads the temperature information from the BRAM and uses the temperature information to perform temperature compensation correction on the inertial compensation parameters. The corrected parameters are written into a designated area in the BRAM, and a data readiness flag is set for querying by the X, Y, and Z processors. After the X, Y, and Z processors find the data readiness flag, they read the corrected inertial compensation parameters. The X processor calculates the X-axis angular velocity and X-axis acceleration, the Y processor calculates the Y-axis angular velocity and Y-axis acceleration, and the Z processor calculates the Z-axis angular velocity and Z-axis acceleration. After the X, Y, and Z processors complete the compensation calculation, they write the obtained angular velocity and acceleration data into a designated location in the BRAM and set a compensation data readiness flag for querying by the system management processor. After receiving the compensation data ready flag, the system management processor reads the compensation data and frames it together with other data according to the communication protocol required by the flight control system. The data is then sent to the flight control computer through the flight control computer's digital communication module.
7. The inertial measurement device information processing system according to claim 4, characterized in that, After the inertial measurement device information processing system enters the test working mode, the system management processor sends data to the test system through the test system digital communication module.
Citation Information
Patent Citations
Lower computer coordinative control SoC chip for spacecraft
CN105137864A
Methods for attitude and heading reference system to mitigate vehicle acceleration effects
US20170146347A1