Pixel module, photoelectric sensing module and camera

Abstract

The present disclosure provides a pixel module, a photosensor module and a camera. The pixel module comprises a collection circuit, a detection circuit and a comparison circuit; an input end of the detection circuit is electrically connected with an output end of the collection circuit, a first output end of the detection circuit is electrically connected with a first input end of the comparison circuit, and a second output end of the detection circuit is electrically connected with a second input end of the comparison circuit; the collection circuit is used for converting a sampling voltage according to a light signal sensed in each detection period; the detection circuit is used for processing the sampling voltage of two adjacent detection periods respectively to obtain a first sensing voltage of a previous detection period and a second sensing voltage of a current detection period in the two adjacent detection periods; and the comparison circuit is used for generating a detection event after comparing the first sensing voltage and the second sensing voltage. The pixel module in the embodiment can work independently, can reduce the detection range, and is suitable for constituting cameras with different areas.

Description

TECHNICAL FIELD

[0001] The present disclosure relates to the technical field of sensors, and in particular to a pixel module, a photosensitive sensor module and a camera. BACKGROUND

[0002] An event camera, also known as an event-based camera, is a new type of vision sensor, which does not output images at a fixed frame rate, but outputs "events" of changes in pixel brightness. The event camera has the advantages of high dynamic range, high temporal resolution, low power consumption and anti-motion blur, and is suitable for high-speed motion estimation, high dynamic range mapping and other scenes. SUMMARY

[0003] The present disclosure provides a pixel module, a photosensitive sensor module and a camera to solve the above technical problems.

[0004] According to a first aspect of the present disclosure, a pixel module is provided, comprising a collection circuit, a detection circuit and a comparison circuit; an input end of the detection circuit is electrically connected to an output end of the collection circuit, a first output end of the detection circuit is electrically connected to a first input end of the comparison circuit, and a second output end of the detection circuit is electrically connected to a second input end of the comparison circuit.

[0005] The collection circuit is configured to convert a sampling voltage from a light signal sensed in each detection period and transmit the sampling voltage to the input end of the detection circuit through the output end of the collection circuit.

[0006] The detection circuit is configured to process the sampling voltage of two adjacent detection periods respectively to obtain a first sensing voltage of a previous detection period and a second sensing voltage of a current detection period in the two adjacent detection periods, and transmit the first sensing voltage from the first output end of the detection circuit to the first input end of the comparison circuit and transmit the second sensing voltage from the second output end of the detection circuit to the second input end of the comparison circuit.

[0007] The comparison circuit is configured to generate a detection event after comparing the first sensing voltage and the second sensing voltage; the detection event includes a positive event and a negative event, the positive event represents that the brightness of the current detection period is enhanced compared with the brightness of the previous detection period, and the difference between them is greater than or equal to a first preset threshold, and the negative event represents that the brightness of the current detection period is weakened compared with the brightness of the previous detection period, and the difference between them is greater than or equal to a second preset threshold.

[0008] Optionally, the acquisition circuit comprises a photosensitive unit, a reset unit, a first amplification unit, a switch unit and an integration unit; the reset unit is electrically connected with the photosensitive unit and the first amplification unit respectively; the switch unit is electrically connected with the first amplification unit and the integration unit respectively;

[0009] The photosensitive unit is configured to convert the optical signal sensed in each detection period into a photoelectric current.

[0010] The first amplification unit is configured to amplify the photoelectric current during the period when the first amplification unit is not reset in each detection period, to obtain an amplified photoelectric current.

[0011] The reset unit is configured to reset the first amplification unit before the first amplification unit amplifies the photoelectric current in each detection period.

[0012] The switch unit is configured to turn on or turn off the electrical connection between the first amplification unit and the integration unit.

[0013] The integration unit is configured to integrate the amplified photoelectric current when the switch unit is in the on state, to obtain the sampling voltage.

[0014] Optionally, the reset unit comprises a first switch device; a first end of the first switch device is electrically connected with an output end of the photosensitive unit and a control end of the first amplification unit respectively; a second end of the first switch device is grounded; and a control end of the first switch device is configured to receive a first control signal.

[0015] The first switch device is configured to switch to the on state when the first control signal is received, so that the output end of the photosensitive unit and the control end of the first amplification unit are grounded; and switch to the off state when the first control signal is not received, so that the output end of the photosensitive unit and the control end of the first amplification unit are electrically connected.

[0016] Optionally, the first amplification unit comprises a second switch device; a first end of the second switch device is electrically connected with a first power supply; a second end of the second switch device is electrically connected with an input end of the switch unit; and a control end of the second switch device is electrically connected with a control end of the first amplification unit.

[0017] The second switch device is configured to amplify the received photoelectric current to obtain an amplified photoelectric current; and transmit the amplified photoelectric current to an output end of the first amplification unit.

[0018] Optionally, the switch unit comprises a third switch device; a first end of the third switch device is electrically connected with the input end of the switch unit, a second end of the third switch device is electrically connected with the output end of the switch unit, and a control end of the third switch device is used for receiving a second control signal;

[0019] The third switch device is used for turning on the output end of the first amplification unit and the input end of the integration unit after receiving the second control signal.

[0020] Optionally, the integration unit comprises a first capacitor; a first end of the first capacitor is electrically connected with the output end of the switch unit and the input end of the acquisition circuit respectively, and a second end of the first capacitor is grounded.

[0021] Optionally, the detection circuit comprises a write unit, a second amplification unit and a storage unit; an input end of the write unit is electrically connected with the input end of the detection circuit, a first output end of the write unit is electrically connected with the input end of the second amplification unit, a second output end of the write unit is electrically connected with the output end of the second amplification unit and the input end of the storage unit respectively; a first output end of the storage unit is electrically connected with the first output end of the detection circuit, and a second output end of the storage unit is electrically connected with the second output end of the detection circuit.

[0022] The write unit is used for writing the sampling voltage and transmitting the sampling voltage to the second amplification unit.

[0023] The second amplification unit is used for amplifying the sampling voltage and writing a sensing amplification voltage to the storage unit.

[0024] The storage unit is used for storing the sensing amplification voltage as the first sensing voltage in a previous detection period and storing the sensing amplification voltage as the second sensing voltage in a current detection period.

[0025] Optionally, the write unit comprises a fourth switch device, a fifth switch device, a sixth switch device, a second capacitor and a third capacitor;

[0026] A first end of the fourth switch device is electrically connected with the output end of the acquisition circuit, a second end of the fourth switch device is electrically connected with a first end of the second capacitor and a first end of the fifth switch device respectively, and a control end of the fourth switch device is used for receiving a first clock signal.

[0027] A second end of the fifth switch device is grounded, and a control end of the fifth switch device is used for receiving a second clock signal.

[0028] The second end of the second capacitor is electrically connected with the first output end of the write unit, the first end of the third capacitor and the first end of the sixth switch device respectively;

[0029] The second end of the sixth switch device is electrically connected with the second end of the third capacitor and the second output end of the write unit respectively, and the control end of the sixth switch device is used for receiving a third clock signal.

[0030] Optionally, the second amplification unit comprises a current source, a first amplification sub-unit and a second amplification sub-unit;

[0031] The input end of the current source is electrically connected with a second power supply, the first output end of the current source is electrically connected with the first input end of the first amplification sub-unit, and the second output end of the current source is electrically connected with the first input end of the second amplification sub-unit;

[0032] The second input end of the first amplification sub-unit is electrically connected with the input end of the second amplification unit, the third input end of the first amplification sub-unit is electrically connected with a third power supply, and the output end of the first amplification sub-unit is electrically connected with the second input end of the second amplification sub-unit;

[0033] The third input end of the second amplification sub-unit is electrically connected with the third power supply, and the output end of the second amplification sub-unit is electrically connected with the output end of the second amplification unit.

[0034] Optionally, the current source comprises a seventh switch device, an eighth switch device and a ninth switch device;

[0035] The first end of the seventh switch device, the first end of the eighth switch device and the first end of the ninth switch device are electrically connected with the input end of the current source respectively;

[0036] The second end of the seventh switch device is electrically connected with the control end of the seventh switch device, the control end of the eighth switch device and the control end of the ninth switch device respectively;

[0037] The second end of the eighth switch device is electrically connected with the first output end of the current source;

[0038] The second end of the ninth switch device is electrically connected with the second output end of the current source.

[0039] Optionally, the first amplification sub-unit comprises a tenth switch device, an eleventh switch device, a twelfth switch device and a thirteenth switch device;

[0040] The first end of the tenth switch device is electrically connected with the first input end of the first amplification sub-unit, the second end of the tenth switch device is electrically connected with the first end and the control end of the twelfth switch device respectively, and the control end of the tenth switch device is electrically connected with the input end of the second amplification unit;

[0041] The first end of the eleventh switch device is electrically connected with the first input end of the first amplification sub-unit, the second end of the eleventh switch device is electrically connected with the output end of the first amplification sub-unit and the first end of the thirteenth switch device respectively, and the control end of the eleventh switch device is grounded.

[0042] The second end of the twelfth switch device is electrically connected with the second end of the thirteenth switch device and the third input end of the first amplification sub-unit respectively.

[0043] The control end of the thirteenth switch device is electrically connected with the control end of the twelfth switch device.

[0044] Optionally, the second amplification sub-unit comprises a fourteenth switch device and a fourth capacitor.

[0045] The first end of the fourteenth switch device is electrically connected with the first input end of the second amplification sub-unit, the second end of the fourteenth switch device is electrically connected with a third power supply, and the control end of the fourteenth switch device is electrically connected with the second input end of the second amplification sub-unit.

[0046] The first end of the fourth capacitor is electrically connected with the first end of the fourteenth switch device, and the second end of the fourth capacitor is electrically connected with the control end of the fourteenth switch device.

[0047] Optionally, the storage unit comprises a fifteenth switch device, a sixteenth switch device, a fifth capacitor and a sixth capacitor.

[0048] The first end of the fifteenth switch device is electrically connected with the input end of the storage unit, the second end of the fifteenth switch device is electrically connected with the second end of the fifth capacitor and the first output end of the storage unit respectively, and the control end of the fifteenth switch device is used for receiving a fourth clock signal; the first end of the fifth capacitor is grounded.

[0049] The first end of the sixteenth switch device is electrically connected with the input end of the storage unit, the second end of the sixteenth switch device is electrically connected with the first end of the sixth capacitor and the second output end of the storage unit respectively, and the control end of the sixteenth switch device is used for receiving a fifth clock signal; the second end of the sixth capacitor is grounded.

[0050] Optionally, the comparison circuit comprises a first operational amplifier, a second operational amplifier and a third operational amplifier.

[0051] The inverting input terminal of the first operational amplifier is electrically connected with the first input terminal of the comparison circuit, the non-inverting input terminal of the first operational amplifier is electrically connected with the second input terminal of the comparison circuit, and the output terminal of the first operational amplifier is electrically connected with the non-inverting input terminal of the second operational amplifier and the non-inverting input terminal of the third operational amplifier respectively;

[0052] The inverting input terminal of the second operational amplifier receives a first preset voltage value, and the output terminal of the second operational amplifier is electrically connected with the first output terminal of the detection circuit; the output terminal of the second operational amplifier is used for outputting a positive event in the detection event;

[0053] The inverting input terminal of the third operational amplifier receives a second preset voltage value, and the output terminal of the third operational amplifier is electrically connected with the second output terminal of the detection circuit; the output terminal of the third operational amplifier is used for outputting a negative event in the detection event.

[0054] According to a second aspect of the present disclosure, there is provided an optoelectronic sensing module, comprising a glass substrate and a plurality of pixel modules according to any one of the first aspect; the plurality of pixel modules are arranged on the glass substrate.

[0055] According to a third aspect of the present disclosure, there is provided a camera, comprising an optoelectronic sensing module according to the second aspect and a processor; the processor is electrically connected with the optoelectronic sensing module.

[0056] The processor is used for acquiring a detection event output by the optoelectronic sensing module; the detection event comprises a positive event and a negative event, the positive event represents an event that the brightness of a current detection period is enhanced compared with the brightness of a previous detection period, and the difference between the two is greater than or equal to a first preset threshold value; the negative event represents an event that the brightness of the current detection period is weakened compared with the brightness of the previous detection period, and the difference between the two is greater than or equal to a second preset threshold value;

[0057] The processor is further used for mapping the positive event as first pixel data and / or mapping the negative event as second pixel data when the positive event and / or the negative event is acquired;

[0058] The processor is further used for generating an event frame image of the current detection period according to the first pixel data and / or the second pixel data.

[0059] The technical solutions provided by the embodiments of the present disclosure can have the following beneficial effects:

[0060] The pixel module provided by the scheme of the embodiment comprises a collection circuit, a detection circuit and a comparison circuit; an input end of the detection circuit is electrically connected with an output end of the collection circuit, a first output end of the detection circuit is electrically connected with a first input end of the comparison circuit, and a second output end of the detection circuit is electrically connected with a second input end of the comparison circuit; the collection circuit is used for converting a sampling voltage from a light signal sensed in each detection period and transmitting the sampling voltage to the input end of the detection circuit through an output end of the collection circuit; the detection circuit is used for processing sampling voltages of two adjacent detection periods respectively to obtain a first sensing voltage of a previous detection period and a second sensing voltage of a current detection period in the two adjacent detection periods; and the first sensing voltage is transmitted from the first output end of the detection circuit to the first input end of the comparison circuit, and the second sensing voltage is transmitted from the second output end of the detection circuit to the second input end of the comparison circuit; the comparison circuit is used for generating a detection event after comparing the first sensing voltage and the second sensing voltage; the detection event comprises a positive event and a negative event, the positive event represents that the brightness of the current detection period is enhanced compared with the brightness of the previous detection period, and the difference between the two is greater than or equal to a first preset threshold value, and the negative event represents that the brightness of the current detection period is weakened compared with the brightness of the previous detection period, and the difference between the two is greater than or equal to a second preset threshold value. In this way, the pixel module in the embodiment can work independently, the detection range can be reduced, and the pixel module is suitable for constituting cameras with different areas; and the data processing amount of the camera can be reduced.

[0061] It should be understood that the foregoing general description and the following detailed description are only exemplary and explanatory, and cannot limit the present disclosure. BRIEF DESCRIPTION OF DRAWINGS

[0062] Figure 1 A structural block diagram of a pixel module of an embodiment of the present disclosure.

[0063] Figure 2 A block diagram of a collection circuit of an embodiment of the present disclosure.

[0064] Figure 3 A circuit diagram of a collection circuit of an embodiment of the present disclosure.

[0065] Figure 4 A block diagram of a detection circuit of an embodiment of the present disclosure.

[0066] Figure 5 A circuit diagram of a detection circuit of an embodiment of the present disclosure.

[0067] Figure 6 A circuit diagram of a second amplification unit of an embodiment of the present disclosure.

[0068] Figure 7 A circuit diagram of a comparison circuit for an embodiment of the present disclosure.

[0069] Figure 8 A circuit diagram of a pixel module for an embodiment of the present disclosure.

[0070] Figure 9 A power-down timing diagram of a pixel driving circuit for an embodiment of the present disclosure. DETAILED DESCRIPTION

[0071] The exemplary embodiments will be described in detail herein with reference to the attached drawings. In the following description, the same numbers are used to indicate the same or similar elements, unless otherwise represented. The embodiments described in the following exemplary embodiments do not represent all the embodiments consistent with the present disclosure. Rather, they are merely examples of apparatuses consistent with some aspects of the present disclosure, as detailed in the appended claims.

[0072] Embodiments of the present disclosure provide a pixel module, a photosensitive module and a camera. The camera can include a photosensitive module and a processor; the processor is electrically connected with the photosensitive module; the photosensitive module is configured to output at least one detection event, the detection event including a positive event and / or at least one negative event; the processor is configured to acquire the detection event output by the photosensitive module, which can include a positive event and a negative event. The positive event represents that the brightness of the current detection period is enhanced compared with the brightness of the previous detection period, and the difference between the two is greater than or equal to a first preset threshold; the negative event represents that the brightness of the current detection period is weakened compared with the brightness of the previous detection period, and the difference between the two is greater than or equal to a second preset threshold. The processor maps the positive event as first pixel data (such as red) and / or maps the negative event as second pixel data (such as blue) when the positive event and / or the negative event is acquired; then, the processor can generate an event frame image of the current detection period according to the first pixel data and / or the second pixel data. In an example, when there is a background image, the processor can superimpose the background image and the event frame image to generate a fusion image, the event image including a red region and / or a blue region, facilitating the user to focus on the change region. In another example, when there is no background image, the processor can display at least one frame of event frame image, facilitating the observation of the detected dynamic object.

[0073] The camera in the embodiment can be applied to the fields of industry, unmanned aerial vehicle, robot, security monitoring, medical treatment, scientific research measurement and game, and can also be applied to the fields of eye movement tracking and gesture recognition. It should be noted that a person skilled in the art can adjust the video frame image according to the application scene and the application principle of the event frame image, for example, at least one frame of event frame image can be superimposed on the basis of the background image in the game scene to form a fusion image including the motion track of the game object, so as to improve the visual effect. It can be understood that the corresponding scheme falls within the protection scope of the present disclosure.

[0074] In the embodiment, the photoelectric sensing module includes a glass substrate and a plurality of pixel modules arranged on the glass substrate, and the inventive concept is that all or part of the devices in the pixel module can be built by using a TFT circuit, so that the power consumption of the pixel module can be reduced. The TFT material can be realized by using a-si, LTPS, LTPO and the like.

[0075] Since the photoelectric sensing module includes a plurality of pixel modules, the working principles of the pixel modules are the same, and a subsequent embodiment is described with reference to one pixel module.

[0076] Referring to Figure 1 A pixel module includes a collection circuit 11, a detection circuit 12 and a comparison circuit 13. The input end of the detection circuit 12 is electrically connected to the output end of the collection circuit 11, the first output end 124 of the detection circuit 12 is electrically connected to the first input end 132 of the comparison circuit 13, and the second output end 125 of the detection circuit 12 is electrically connected to the second input end 134 of the comparison circuit 13.

[0077] The collection circuit 11 is configured to convert the light signal sensed in each detection period into a sampling voltage and transmit the sampling voltage to the input end of the detection circuit 12 through the output end of the collection circuit 11.

[0078] The detection circuit 12 is configured to process the sampling circuits of two adjacent detection periods respectively to obtain a first sensing voltage of a previous detection period and a second sensing voltage of a current detection period in the two adjacent detection periods, and transmit the first sensing voltage from the first output end 124 of the detection circuit 12 to the first input end 132 of the comparison circuit 13 and transmit the second sensing voltage from the second output end 125 of the detection circuit 12 to the second input end 134 of the comparison circuit 13.

[0079] The comparison circuit 13 is configured to generate a detection event after comparing the first sensing voltage and the second sensing voltage.

[0080] In the embodiment, the detection event includes a positive event and a negative event. The positive event represents that the luminance of the current detection period is enhanced compared with the luminance of the previous detection period, and the difference between the two is greater than or equal to a first preset threshold. The negative event represents that the luminance of the current detection period is weakened compared with the luminance of the previous detection period, and the difference between the two is greater than or equal to a second preset threshold.

[0081] It can be understood that the first preset threshold and the second preset threshold can be set according to specific scenes, for example, 0.1-10 nit. In the case that the luminance of the region where the pixel module is located can be distinguished, the corresponding scheme falls within the protection scope of the present disclosure.

[0082] In an embodiment, referring to Figure 2 The acquisition circuit 11 includes a light sensing unit 111, a reset unit 112, a first amplification unit 113, a switch unit 114, and an integration unit 115. The reset unit 112 is electrically connected to the light sensing unit 111 and the first amplification unit 113 respectively. The switch unit 114 is electrically connected to the first amplification unit 113 and the integration unit 115 respectively.

[0083] The light sensing unit 111 is configured to convert the light signal sensed in each detection period to a photoelectric current. The reset unit 112 is configured to perform a reset process on the first amplification unit 113 before the first amplification unit 113 amplifies the photoelectric current in each detection period. The first amplification unit 113 is configured to amplify the photoelectric current during the period when it is not reset in each detection period to obtain an amplified photoelectric current. The switch unit 114 is configured to turn on or turn off the electrical connection between the first amplification unit 113 and the integration unit 115. The integration unit 115 is configured to integrate the amplified photoelectric current when the switch unit 114 is in the on state to obtain a sampling voltage.

[0084] In the embodiment, the integration unit 115 integrates the amplified photoelectric current to obtain an integrated electric quantity. It is considered that the equivalent capacitance of the integration unit 115 is known, and it is difficult to measure the electric quantity. In the embodiment, the sampling voltage can be obtained by detecting the voltage value to represent the integrated electric quantity. It can be understood that the relationship between the electric quantity, the capacitance value and the voltage value is Q=CV. In the case that the equivalent capacitance value is constant, the sampling voltage and the integrated electric quantity can represent each other without affecting the accuracy of the present disclosure.

[0085] In an example, referring to Figure 3The photosensitive unit 111 can be disposed on a glass substrate and can be implemented using methods such as PIN photodiodes, avalanche photodiodes (APDs), Schottky photodiodes (SBDs), phototransistors, photomultiplier tubes (PMTs), silicon photodiodes, germanium photodiodes, gallium arsenide (GaAs) photodiodes, or organic photodiodes (OPDs). Such implementations fall within the scope of this disclosure. In one example, the photosensitive unit 111 is implemented using a photodiode D1.

[0086] In one example, see [link to example]. Figure 3 The reset unit 112 includes a first switching device S1, which can be made of a TFT transistor. The first terminal of the first switching device S1 ( Figure 3 The upper end shown is electrically connected to the output terminal of the photosensitive unit 111 and the control terminal of the first amplification unit 113, respectively, and the second end of the first switching device S1 ( Figure 3 The lower end shown is grounded to GND, and the control terminal of the first switching device S1 (as shown) Figure 3 The left end shown is used to receive the first control signal Trst; the first switching device S1 is used to switch to the on state when the first control signal Trst is received, so as to ground the control terminal of the first amplification unit 113 and the output terminal of the photosensitive unit to GND, that is, to reset the first amplification unit 113; and to switch to the off state when the first control signal Trst is not received, so that the control terminal of the first amplification unit 113 is not grounded to GND, that is, the first amplification unit 113 is not reset, and at this time the output terminal of the photosensitive unit is electrically connected to the control terminal of the first amplification unit 113. In this way, resetting the first amplification unit 113 in this example can release the charge stored in the parasitic capacitance and other components in the first amplification unit 113, thereby achieving the effect of accurately amplifying the optical power source.

[0087] In one example, see [link to example]. Figure 3 The first amplification unit 113 includes a second switching device S2; the first terminal of the second switching device S2 is electrically connected to the first power supply AP, the second terminal of the second switching device S2 is electrically connected to the first terminal of the switching unit 114, and the control terminal of the second switching device S2 is electrically connected to the control terminal of the first amplification unit 113. The second switching device is used to amplify the received photocurrent to obtain an amplified photocurrent; and transmit the amplified photocurrent to the output terminal of the first amplification unit 113, i.e., to the first terminal of the switching unit 114. Thus, in this example, the first amplification unit 113 can amplify the weak photocurrent to obtain an amplified photocurrent, which is beneficial to improving the accuracy of the detection results.

[0088] In one example, see [link to example]. Figure 3 The switching unit 114 includes a third switching device S3; the first terminal of the third switching device S3 is connected to the input terminal of the switching unit 114.Figure 3 The left end shown in the diagram is electrically connected, and the second end of the third switching device S3 is connected to the output end of the switching unit 114. Figure 3 The left end (shown in the diagram) is electrically connected, and the control terminal of the third switching device S3 is used to receive the second control signal Gate. The third switching device Gate is used to connect the output terminal of the first amplification unit 113 and the input terminal of the integration unit 115 after receiving the second control signal Gate. Thus, in this example, the third switching device S3 can transmit the amplified photocurrent to the integration unit 115 upon receiving the second control signal Gate, achieving the effect of storing charge. Furthermore, in this example, the second control signal Gate is the scan signal of the row or column where the pixel module is located, achieving the purpose of detecting the light signal according to the control cycle.

[0089] In one example, see [link to example]. Figure 3 The integrating unit 115 includes a first capacitor C1. The first terminal of the first capacitor C1 ( Figure 3 The upper end shown is electrically connected to the output terminal of the switching unit 114 and the input terminal of the acquisition circuit 11, respectively. The second end of the second capacitor C2 ( Figure 3 The lower end (as shown in the diagram) is grounded to GND. In this example, the first capacitor C1 can store the amplified photocurrent, achieving the effect of converting the amplified photocurrent into a sampling voltage (Vin*C1).

[0090] In one embodiment, see Figure 4The detection circuit 12 includes a writing unit 121, a second amplification unit 122, and a storage unit 123. The input terminal of the writing unit 121 is electrically connected to the input terminal of the detection circuit 12. The first output terminal of the writing unit 121 is electrically connected to the input terminal 122a of the second amplification unit 122. The second output terminal 1212 of the writing unit 121 is electrically connected to the output terminal 122b of the second amplification unit 122 and the input terminal 1231 of the storage unit 123, respectively. The first output terminal 1232 of the storage unit 123 is electrically connected to the first output terminal 124 of the detection circuit 12, and the second output terminal 1233 of the storage unit 123 is electrically connected to the second output terminal 125 of the detection circuit 12. The writing unit 121 is used to write the sampled voltage and... The sampled voltage of each detection cycle is transmitted to the second amplification unit 122. The second amplification unit 122 amplifies the sampled voltage of each detection cycle and writes the amplified sensing voltage into the storage unit 123. The storage unit 123 stores the amplified sensing voltage as a first sensing voltage in the previous detection cycle and stores the amplified sensing voltage as a second sensing voltage in the current detection cycle; or, the storage unit 123 stores the amplified sensing voltage as a second sensing voltage in the current detection cycle and stores the amplified sensing voltage as a first sensing voltage for the next detection cycle. In this way, the detection circuit in this embodiment can convert the sampled voltage into a first sensing voltage of the previous detection cycle and a second sensing voltage of the current detection cycle, achieving the effect of obtaining the sensing voltage of two adjacent cycles.

[0091] See one example. Figure 5 The writing unit 121 includes a fourth switching device S4, a fifth switching device S5, a sixth switching device S6, a second capacitor C2, and a third capacitor C3.

[0092] The first terminal of the fourth switching device S4 ( Figure 5 The left end shown is electrically connected to the output terminal of the acquisition circuit 11, and the second end of the fourth switching device S4 (shown on the left) is electrically connected to the output terminal of the acquisition circuit 11. Figure 5 The right end shown is respectively connected to the first end of the second capacitor C2. Figure 5 The left end shown) and the first end of the fifth switching device S5 (shown) Figure 5 The upper end shown is electrically connected, and the control terminal of the fourth switching device S4 is used to receive the first clock signal CLK1;

[0093] The second terminal of the fifth switching device S5 ( Figure 5 The lower end shown is grounded to GND, and the control terminal of the fifth switching device S5 is ( Figure 5 The left end shown is used to receive the second clock signal CLK2;

[0094] The second terminal of the second capacitor C2 ( Figure 5the left end of the figure) and a first end of the sixth switching device S6 (the left end of the figure) are electrically connected to a first output end 1211 of the writing unit 121, a first end of the third capacitor C3 (the left end of the figure), and a first end of the sixth switching device S6 (the left end of the figure), respectively; Figure 5 the left end of the figure) and a first end of the sixth switching device S6 (the left end of the figure) are electrically connected to a first output end 1211 of the writing unit 121, a first end of the third capacitor C3 (the left end of the figure), and a first end of the sixth switching device S6 (the left end of the figure), respectively; Figure 5 the left end of the figure) and a first end of the sixth switching device S6 (the left end of the figure) are electrically connected to a first output end 1211 of the writing unit 121, a first end of the third capacitor C3 (the left end of the figure), and a first end of the sixth switching device S6 (the left end of the figure), respectively;

[0095] a second end of the sixth switching device S6 (the left end of the figure) is electrically connected to a second end of the third capacitor C3 (the left end of the figure) and a second output end 1212 of the writing unit 121, respectively; Figure 5 a second end of the sixth switching device S6 (the left end of the figure) is electrically connected to a second end of the third capacitor C3 (the left end of the figure) and a second output end 1212 of the writing unit 121, respectively; Figure 5 a second end of the sixth switching device S6 (the left end of the figure) is electrically connected to a second end of the third capacitor C3 (the left end of the figure) and a second output end 1212 of the writing unit 121, respectively; Figure 6 a control end (the lower end of the figure) of the sixth switching device S6 is used for receiving a third clock signal CLK3.

[0096] In the example, when the fourth switching device S4 and the sixth switching device S6 are switched to the conducting state, and the fifth switching device S5 is switched to the non-conducting state, the sampling voltage Vin*C1 can be written into the second capacitor C2, and at this time, the voltage of the second capacitor C2 is Vin*C1 / C2. It can be understood that the sixth switching device S6 can be connected across the third capacitor C3 when it is conducting, so as to reset. When the fourth switching device S4 and the sixth switching device S6 are switched to the non-conducting state, and the fifth switching device S5 is switched to the conducting state, the voltage Vin*C1 / C2 of the second capacitor C2 can be written into the third capacitor C3. Due to the resetting effect of the sixth switching device S6, the two ends of the third capacitor C3 will become Vin*C1 / C2 for a certain period of time. In this way, the writing unit 121 can store the sampling voltage and write it into the second amplifying unit 122 in the example.

[0097] In an example, referring to Figure 6 , the second amplifying unit includes a current source 1221, a first amplifying sub-unit 1222, and a second amplifying sub-unit 1223.

[0098] an input end of the current source 1221 is electrically connected to the second power supply VCC, a first output end of the current source 1221 is electrically connected to a first input end of the first amplifying sub-unit 1222, and a second output end of the current source 1221 is electrically connected to a first input end of the second amplifying sub-unit 1223;

[0099] a second input end of the first amplifying sub-unit 1222 is electrically connected to an input end of the second amplifying sub-unit 1223, a third input end of the first amplifying sub-unit 1222 is electrically connected to the third power supply VEE, and an output end of the first amplifying sub-unit 1222 is electrically connected to a second input end of the second amplifying sub-unit 1223;

[0100] a third input end of the second amplifying sub-unit 1223 is electrically connected to the third power supply VEE, and an output end of the second amplifying sub-unit 1223 is electrically connected to an output end of the second amplifying unit 122.

[0101] In an example, continuing to refer to Figure 6 The current source 1221 includes a seventh switch device S7, an eighth switch device S8, and a ninth switch device S9. The first ends of the seventh switch device S7, the eighth switch device S8, and the ninth switch device S9 are electrically connected to the input end of the current source 1221, i.e., the second power supply VCC. The second end of the seventh switch device S7 is electrically connected to the control end of the seventh switch device S7, the control end of the eighth switch device S8, and the control end of the ninth switch device S9. The second end of the eighth switch device S8 is electrically connected to the first output end of the current source 1221. The second end of the ninth switch device S9 is electrically connected to the second output end of the current source 1221. In this way, the seventh switch device S7, the eighth switch device S8, and the ninth switch device S9 constitute a multi-path power source, which provides current to the first amplification subunit and the second amplification subunit, respectively.

[0102] In an example, continuing to refer to Figure 6 The first amplification subunit 1222 includes a tenth switch device S10, an eleventh switch device S11, a twelfth switch device S12, and a thirteenth switch device S13. The first end of the tenth switch device S10 is electrically connected to the first input end of the first amplification subunit 1222. The second end of the tenth switch device S10 is electrically connected to the first end and the control end of the twelfth switch device S12. The control end of the tenth switch device S10 is electrically connected to the input end of the second amplification subunit 122. The first end of the eleventh switch device S11 is electrically connected to the first input end (label 1) of the first amplification subunit 1222. The second end of the eleventh switch device S11 is electrically connected to the output end of the first amplification subunit 1222 and the first end of the thirteenth switch device S13. The control end (label 4) of the eleventh switch device S11 is grounded GND. The second end of the twelfth switch device S12 is electrically connected to the second end of the thirteenth switch device S13 and the third input end (label 3) of the first amplification subunit 1222. The control end of the thirteenth switch device S13 is electrically connected to the control end of the twelfth switch device S12. In this example, the tenth switch device S10, the eleventh switch device S11, the twelfth switch device S12, and the thirteenth switch device S13 constitute a first-stage amplification circuit, which amplifies the voltage Vin*C1 / C2 of the second capacitor C2.

[0103] In an example, continuing to refer to Figure 6The second amplification subunit 1223 includes a fourteenth switch device S14. A first end of the fourteenth switch device S14 is electrically connected with the first input end of the second amplification subunit 1223, i.e., a second end of the ninth switch device S9, a second end of the fourteenth switch device S14 is electrically connected with the third power supply VEE, and a control end of the fourteenth switch device S14 is electrically connected with the second input end of the second amplification subunit 1223, i.e., a second end of the eleventh switch device S11. A first end of the fourth capacitor C4 is electrically connected with the first end of the fourteenth switch device S14, and a second end of the fourth capacitor C4 is electrically connected with the control end of the fourteenth switch device S14. In the example, the fourteenth switch device constitutes a second-stage amplification circuit, and the fourth capacitor C4 plays a role of phase compensation.

[0104] It should be noted that the voltage Vin*C1 / C2 can be written to the second end of the third capacitor C3 after being amplified by the first amplification subunit 1222 and the second amplification subunit 1223, and at this time, there is a voltage difference between the second end and the first end of the third capacitor C3.

[0105] In an example, continuing to refer to Figure 7 The storage unit 123 includes a fifteenth switch device S15, a sixteenth switch device S16, a fifth capacitor C5, and a sixth capacitor C6. A first end of the fifteenth switch device S15 is electrically connected with the input end of the storage unit 123, a second end of the fifteenth switch device S15 is respectively electrically connected with a second end of the fifth capacitor C5 and a first output end of the storage unit 123, and a control end of the fifteenth switch device S15 is configured to receive a fourth clock signal CLK4; a first end of the fifth capacitor C5 is grounded GND. A first end of the sixteenth switch device S16 is electrically connected with the input end of the storage unit 123, a second end of the sixteenth switch device S16 is respectively electrically connected with a first end of the sixth capacitor C6 and a second output end of the storage unit 123, and a control end of the sixteenth switch device S16 is configured to receive a fifth clock signal CLK5; a second end of the sixth capacitor C6 is grounded GND. In this way, in the embodiment, the fifteenth switch device S15 can be controlled to charge the fifth capacitor C5, so as to achieve the effect of storing the second sensing voltage of the current detection period, and the sixteenth switch device S16 can be controlled to charge the fourth capacitor C6, so as to achieve the effect of storing the first sensing voltage of the previous detection period.

[0106] In an embodiment, referring to Figure 7 The comparison circuit 13 includes a first operational amplifier A1, a second operational amplifier A2, and a third operational amplifier A3.

[0107] The inverting input terminal of the first operational amplifier A1 is electrically connected with the first input terminal of the comparison circuit 13, the non-inverting input terminal of the first operational amplifier A1 is electrically connected with the second input terminal of the comparison circuit 13, and the output terminal of the first operational amplifier A1 is electrically connected with the non-inverting input terminal of the second operational amplifier A2 and the non-inverting input terminal of the third operational amplifier A3 respectively;

[0108] The inverting input terminal of the second operational amplifier A2 receives a first preset voltage value Thres1, and the output terminal of the second operational amplifier A2 is electrically connected with the first output terminal of the storage unit 123; the output terminal of the second operational amplifier A2 is used for outputting a positive event in the detection event;

[0109] The inverting input terminal of the third operational amplifier A3 receives a second preset voltage value Thres2, and the output terminal of the third operational amplifier A3 is electrically connected with the second output terminal of the storage unit 123; the output terminal of the third operational amplifier A3 is used for outputting a negative event in the detection event.

[0110] It should be noted that, Figure 8 The block diagram of the first operational amplifier A1, the second operational amplifier A2 and the third operational amplifier A3 is shown in the above examples, and a plurality of TFT tubes can be used to realize each operational amplifier on the glass substrate, and the corresponding circuit falls within the protection scope of the present disclosure in the case of being able to realize the comparison function.

[0111] In the case of the above examples, the present disclosure provides a pixel module as Figure 9 shown in the examples. Each switching device in the pixel module is realized by an NMOS TFT. In combination with the working timing shown in ​ , the working process of the pixel module includes:

[0112] (1) Current-voltage conversion stage

[0113] The first control signal Trst becomes high level, at this time, the first switching device S1 is switched to the conducting state, and the control end of the third switching device S3 is reset. At this time, the charges on the circuit of the pixel module are cleared.

[0114] The first control signal Trst changes from high level to low level and the second control signal Gate becomes high level, at this time, the third switching device S3 is switched to the conducting state, and the current path is formed between the photodiode D1 and the first capacitor, and the first capacitor C1 stores the charges, at this time, the voltage of the first capacitor C1 is Vin*C1.

[0115] (2) Previous time detection stage

[0116] The first clock signal CLK1 and the third clock signal CLK3 have the same timing, when CLK1 and CLK3 are both high, the capacitor C1, the fourth switch device S3, the capacitor C2 and the sixth switch device S6 form a charge path, at this time the charge in the first capacitor C1 is transferred to the second capacitor C2, and the voltage of the second capacitor C2 is Vin*C1 / C2.

[0117] When CLK1 and CLK3 change from high to low, and the second clock signal CLK2 changes to high, the second capacitor C2 and the third capacitor C3 are connected in series, that is, the charge of the second capacitor C2 is transferred to the third capacitor C3, and the amplification factor is C3 / C2. When C2 / C3=1, the second capacitor C2 and the third capacitor C3 form a follower amplifier.

[0118] During the period when the second clock signal CLK2 is high, the fifth clock signal CLK5 changes to high, at this time the sixteenth switch device S16 is switched to the on state, and the amplified voltage can be written to the sixth capacitor C6. The voltage value of the sixth capacitor C6 is used as the first sensing voltage.

[0119] (3) Current cycle detection stage

[0120] The (1) current-voltage conversion stage and the (2) previous moment detection stage before CLK5 changes to high in the current cycle are executed.

[0121] When the second clock signal CLK2 changes to high, the fourth clock signal CLK4 changes to high at the same time, at this time the fifteenth switch device is switched to the on state, and the amplified voltage can be written to the fifth capacitor C5. The voltage value of the fifth capacitor C5 is used as the second sensing voltage.

[0122] After the fourth clock signal CLK changes from the on state to the off state, the fifth clock signal can be switched to the on state, at this time the sixteenth switch device S16 is switched to the on state, and the amplified voltage can be written to the sixth capacitor C6. The voltage value of the sixth capacitor C6 is used as the first sensing voltage of the next detection cycle. Or, the current detection cycle is the previous detection cycle of the next detection cycle, and the sensing voltage of the current detection cycle is used as the first sensing voltage of the next detection cycle; that is, in one detection cycle, the second sensing voltage of the current detection cycle and the first sensing voltage of the next detection cycle are collected.

[0123] The camera provided in the embodiment comprises the photoelectric sensing module and the processor. The photoelectric sensing module can be implemented on a glass substrate, for example, a pixel module is built on the glass substrate by using a TFT device. The number of the pixel module can be adjusted to design photoelectric sensors of different sizes according to the function of the camera. Then, a TFT circuit is generated on the glass substrate by using a manufacturing process, which can improve the reliability of the camera. Moreover, each pixel of the camera works independently, and no event is generated in a static state. Only when the brightness changes, event information is output. The processor acquires detection events output by the photoelectric sensing module, maps the first pixel data when a positive event is acquired and / or maps the second pixel data when a negative event is acquired, and then generates an event frame image of a current detection period according to the first pixel data and / or the second pixel data. Finally, a fusion image is generated according to the event frame image and a background image, or a video is generated. In the embodiment, the camera has a small amount of calculation, which can effectively reduce the data transmission throughput and the computing power, and improve the rate. Moreover, all events are asynchronous, and have a sparse feature in space, which can reduce power consumption. In addition, the traditional image sensor is affected by the light intensity in the scene, and has a blur degree and a low dynamic range. However, the camera can improve the blur degree and the dynamic range.

[0124] The terms used in the present disclosure are merely for the purpose of describing particular embodiments and are not intended to limit the present disclosure. Unless otherwise defined, technical terms or scientific terms used in the present disclosure should be understood as having the same meaning as those commonly understood by one of ordinary skill in the art to which the present disclosure belongs. The use of "one" or "a" or similar referents in the specification and claims of the present disclosure does not denote a singular entity or quantity but indicates the existence of at least one. "Multiple" means at least two. "Including" or "containing" and similar terms are meant to encompass the elements listed after "including" or "containing" and equivalents thereof as well as additional elements. "Connected" or "connected" and similar terms are not limited to physical or mechanical connections, but can include electrical connections, whether direct or indirect. The singular forms "a", "an" and "the" used in the specification and appended claims of the present disclosure are intended to include plural forms, unless the context clearly indicates otherwise. It should also be understood that the term "and / or" used herein means and includes any or all possible combinations of one or more associated listed items.

[0125] For the method embodiment, since it basically corresponds to the device embodiment, the relevant part is described in the device embodiment. The method embodiment and the device embodiment are complementary to each other.

[0126] The above merely provides preferred embodiments of the present disclosure, and is not used to limit the present disclosure. Any modification, equivalent replacement, improvement, and the like made within the spirit and principle of the present disclosure shall be included in the scope of protection of the present disclosure.

Claims

1. A pixel module, characterized by, The pixel module comprises a collection circuit, a detection circuit and a comparison circuit; an input end of the detection circuit is electrically connected with an output end of the collection circuit, a first output end of the detection circuit is electrically connected with a first input end of the comparison circuit, and a second output end of the detection circuit is electrically connected with a second input end of the comparison circuit; The collection circuit is used for converting a light signal sensed in each detection period into a sampling voltage and transmitting the sampling voltage to the input end of the detection circuit through an output end of the collection circuit; The detection circuit is used for processing sampling voltages of two adjacent detection periods respectively to obtain a first sensing voltage of a previous detection period and a second sensing voltage of a current detection period in the two adjacent detection periods; The first sensing voltage is transmitted from the first output end of the detection circuit to the first input end of the comparison circuit, and the second sensing voltage is transmitted from the second output end of the detection circuit to the second input end of the comparison circuit; The comparison circuit is used for generating a detection event after comparing the first sensing voltage and the second sensing voltage; the detection event comprises a positive event and a negative event; the positive event represents that the brightness of the current detection period is enhanced compared with the brightness of the previous detection period, and the difference between the two is greater than or equal to a first preset threshold value; The negative event represents that the brightness of the current detection period is weakened compared with the brightness of the previous detection period, and the difference between the two is greater than or equal to a second preset threshold value; The detection circuit comprises a writing unit, a second amplification unit and a storage unit; An input end of the writing unit is electrically connected with an input end of the detection circuit, a first output end of the writing unit is electrically connected with an input end of the second amplification unit, a second output end of the writing unit is electrically connected with an output end of the second amplification unit and an input end of the storage unit respectively, a first output end of the storage unit is electrically connected with a first output end of the detection circuit, and a second output end of the storage unit is electrically connected with a second output end of the detection circuit; The writing unit is used for writing the sampling voltage and transmitting the sampling voltage to the second amplification unit; The second amplification unit is used for amplifying the sampling voltage and writing a sensing amplified voltage to the storage unit; The storage unit is used for storing the sensing amplified voltage as the first sensing voltage in the previous detection period and storing the sensing amplified voltage as the second sensing voltage in the current detection period.

2. The pixel module according to claim 1, characterized in that The collection circuit comprises a photosensitive unit, a reset unit, a first amplification unit, a switching unit and an integration unit; the reset unit is electrically connected with the photosensitive unit and the first amplification unit respectively; the switching unit is electrically connected with the first amplification unit and the integration unit respectively; The photosensitive unit is used for converting a light signal sensed in each detection period into a photocurrent; The first amplification unit is used for amplifying the photocurrent during a period not being reset in each detection period to obtain an amplified photocurrent; The reset unit is used for performing reset processing on the first amplification unit before the first amplification unit amplifies the photocurrent in each detection period; The switch unit is configured to turn on or turn off the electrical connection between the first amplification unit and the integration unit. The integration unit is configured to integrate the amplified photocurrent to obtain the sampling voltage when the switch unit is in the on state.

3. The pixel module according to claim 2, characterized in that The reset unit comprises a first switch device; a first end of the first switch device is electrically connected with an output end of the light-sensing unit and a control end of the first amplification unit respectively, a second end of the first switch device is grounded, and a control end of the first switch device is configured to receive a first control signal; The first switch device is configured to switch to an on state when the first control signal is received, so that the output end of the light-sensing unit and the control end of the first amplification unit are grounded; and switch to an off state when the first control signal is not received, so that the output end of the light-sensing unit and the control end of the first amplification unit are electrically connected.

4. The pixel module of claim 2, wherein, The first amplification unit comprises a second switch device; a first end of the second switch device is electrically connected with a first power supply, a second end of the second switch device is electrically connected with an input end of the switch unit, and a control end of the second switch device is electrically connected with the control end of the first amplification unit; The second switch device is configured to amplify the received photocurrent to obtain an amplified photocurrent; and transmit the amplified photocurrent to an output end of the first amplification unit.

5. The pixel module of claim 2, wherein, The switch unit comprises a third switch device; a first end of the third switch device is electrically connected with an input end of the switch unit, a second end of the third switch device is electrically connected with an output end of the switch unit, and a control end of the third switch device is configured to receive a second control signal; The third switch device is configured to turn on the output end of the first amplification unit and the input end of the integration unit after receiving the second control signal.

6. The pixel module of claim 2, wherein, The integration unit comprises a first capacitor; a first end of the first capacitor is electrically connected with an output end of the switch unit and an input end of the acquisition circuit respectively, and a second end of the first capacitor is grounded.

7. The pixel module of claim 1, wherein, The write unit comprises a fourth switch device, a fifth switch device, a sixth switch device, a second capacitor and a third capacitor; A first end of the fourth switch device is electrically connected with an output end of the acquisition circuit, a second end of the fourth switch device is electrically connected with a first end of the second capacitor and a first end of the fifth switch device respectively, and a control end of the fourth switch device is configured to receive a first clock signal; A second end of the fifth switch device is grounded, and a control end of the fifth switch device is configured to receive a second clock signal; A second end of the second capacitor is electrically connected with a first output end of the write unit, a first end of the third capacitor and a first end of the sixth switch device respectively; A second end of the sixth switch device is electrically connected with a second end of the third capacitor and a second output end of the write unit respectively, and a control end of the sixth switch device is configured to receive a third clock signal.

8. The pixel module of claim 1, wherein, The second amplification unit comprises a current source, a first amplification sub-unit and a second amplification sub-unit; An input terminal of the current source is electrically connected with a second power supply, a first output terminal of the current source is electrically connected with a first input terminal of the first amplification subunit, and a second output terminal of the current source is electrically connected with a first input terminal of the second amplification subunit; A second input terminal of the first amplification subunit is electrically connected with an input terminal of the second amplification unit, a third input terminal of the first amplification subunit is electrically connected with a third power supply, and an output terminal of the first amplification subunit is electrically connected with a second input terminal of the second amplification subunit; A third input terminal of the second amplification subunit is electrically connected with the third power supply, and an output terminal of the second amplification subunit is electrically connected with an output terminal of the second amplification unit.

9. The pixel module according to claim 8, characterized in that, The current source comprises a seventh switching device, an eighth switching device, and a ninth switching device; First terminals of the seventh switching device, the eighth switching device, and the ninth switching device are electrically connected with an input terminal of the current source, respectively; A second terminal of the seventh switching device is electrically connected with a control terminal of the seventh switching device, a control terminal of the eighth switching device, and a control terminal of the ninth switching device, respectively; A second terminal of the eighth switching device is electrically connected with a first output terminal of the current source; A second terminal of the ninth switching device is electrically connected with a second output terminal of the current source.

10. The pixel module of claim 8, wherein, The first amplification subunit comprises a tenth switching device, an eleventh switching device, a twelfth switching device, and a thirteenth switching device; A first terminal of the tenth switching device is electrically connected with a first input terminal of the first amplification subunit, and a second terminal of the tenth switching device is electrically connected with a first terminal and a control terminal of the twelfth switching device, respectively; A first terminal of the eleventh switching device is electrically connected with the first input terminal of the first amplification subunit, a second terminal of the eleventh switching device is electrically connected with an output terminal of the first amplification subunit and a first terminal of the thirteenth switching device, respectively, and a control terminal of the eleventh switching device is grounded; A second terminal of the twelfth switching device is electrically connected with a second terminal of the thirteenth switching device and a third input terminal of the first amplification subunit, respectively; A control terminal of the thirteenth switching device is electrically connected with a control terminal of the twelfth switching device.

11. The pixel module of claim 8, wherein, The second amplification subunit comprises a fourteenth switching device and a fourth capacitor; A first terminal of the fourteenth switching device is electrically connected with a first input terminal of the second amplification subunit, a second terminal of the fourteenth switching device is electrically connected with a third power supply, and a control terminal of the fourteenth switching device is electrically connected with a second input terminal of the second amplification subunit; A first terminal of the fourth capacitor is electrically connected with the first terminal of the fourteenth switching device, and a second terminal of the fourth capacitor is electrically connected with the control terminal of the fourteenth switching device.

12. The pixel module of claim 8, wherein, The storage unit comprises a fifteenth switching device, a sixteenth switching device, a fifth capacitor, and a sixth capacitor; A first end of the fifteenth switch device is electrically connected with an input end of the storage unit, a second end of the fifteenth switch device is electrically connected with a second end of the fifth capacitor and a first output end of the storage unit respectively, and a control end of the fifteenth switch device is used for receiving a fourth clock signal; a first end of the fifth capacitor is grounded. A first end of the sixteenth switch device is electrically connected with the input end of the storage unit, a second end of the sixteenth switch device is electrically connected with a first end of the sixth capacitor and a second output end of the storage unit respectively, and a control end of the sixteenth switch device is used for receiving a fifth clock signal; a second end of the sixth capacitor is grounded.

13. The pixel module of claim 1, wherein, The comparison circuit comprises a first operational amplifier, a second operational amplifier and a third operational amplifier; A non-inverting input end of the first operational amplifier is electrically connected with a first input end of the comparison circuit, a non-inverting input end of the first operational amplifier is electrically connected with a second input end of the comparison circuit, and an output end of the first operational amplifier is electrically connected with a non-inverting input end of the second operational amplifier and a non-inverting input end of the third operational amplifier respectively; A non-inverting input end of the second operational amplifier receives a first preset voltage value, and an output end of the second operational amplifier is electrically connected with a first output end of the detection circuit; the output end of the second operational amplifier is used for outputting a positive event in a detection event; A non-inverting input end of the third operational amplifier receives a second preset voltage value, and an output end of the third operational amplifier is electrically connected with a second output end of the detection circuit; the output end of the third operational amplifier is used for outputting a negative event in a detection event.

14. A photoelectric sensing module, characterized in that, The photoelectric sensing module comprises a glass substrate and a plurality of pixel modules as claimed in any one of claims 1-13; the plurality of pixel modules are arranged on the glass substrate.

15. A camera, comprising: The photoelectric sensing module comprises a glass substrate and a plurality of pixel modules as claimed in any one of claims 1-13; the plurality of pixel modules are arranged on the glass substrate. The processor is used for acquiring a detection event output by the photoelectric sensing module; the detection event comprises a positive event and a negative event, the positive event represents that the brightness in a current detection period is enhanced compared with the brightness in a previous detection period, and the difference between the two is greater than or equal to a first preset threshold value; The negative event represents that the brightness in a current detection period is weakened compared with the brightness in a previous detection period, and the difference between the two is greater than or equal to a second preset threshold value; The processor is further used for mapping as first pixel data when the positive event is acquired and / or mapping as second pixel data when the negative event is acquired; The processor is further used for generating an event frame image of a current detection period according to the first pixel data and / or the second pixel data.

Images