A PWM dimming method, dimming device, storage medium and stage light

Abstract

The invention relates to a PWM dimming method, a dimming device, a storage medium and a stage light, which include the following steps: step S1, setting a modulus value range, a grayscale level range, and linearizing the modulus value and the voltage value; step S2, setting a corresponding relationship between a sequence of the modulus value range and the grayscale level number; step S3, narrowing the modulus value range; step S4, setting a valid value judgment interval for the modulus value; step S5, judging whether the modulus value is within the valid value judgment interval, if the modulus value is within the valid value judgment interval, outputting the grayscale level number corresponding to the modulus value sequence; otherwise, the modulus value is not processed. The invention only needs to collect data once to complete the effective output of data, sets the modulus value range of each sequence to be narrowed, increases the difference between the critical values ​​of adjacent sequences, reduces the uncertainty when the modulus value collected is at the critical value, and thus improves the precise output of the dimming brightness by the dimming device.

Description

Technical Field

[0001] The invention relates to the technical field of stage lamp dimming, and in particular to a PWM dimming method, a dimming device, a storage medium and a stage lamp. Background Art

[0002] In the prior art, the dimming device mainly includes an MCU, an analog-to-digital converter and a push-rod type voltage adjustment circuit. The external analog-to-digital converter is used to collect the voltage signal of the voltage adjustment circuit and convert the voltage signal into a digital signal and transmit it to the MCU. The MCU outputs a PWM signal according to the digital signal to control the brightness of the lamp.

[0003] The existing dimming methods mainly include average value filtering method or majority filtering method:

[0004] The average value filtering method is that when the push rod is pushed to a certain position, the analog-to-digital converter collects the voltage signal of the voltage regulating circuit multiple times and converts each collected voltage signal into a digital signal. At this time, the MCU performs arithmetic averaging on the multiple collected digital signals and finally obtains the average value as the output for controlling the brightness of the lamp.

[0005] The majority filtering method is that the MCU also collects digital signals multiple times and takes the majority as the output to control the brightness of the lamp.

[0006] The above method requires the analog-to-digital converter to collect data multiple times to obtain the result, which is obviously inefficient; in addition, if the average value of the result output is the critical value of the analog-to-digital range, the brightness of the light source will be unstable, and the light source may flicker.

[0007] Therefore, the present invention proposes a high-efficiency and high-stability PWM dimming method based on the prior art. Summary of the invention

[0008] The present invention is to solve one of the above-mentioned technical problems and provide a high-efficiency PWM dimming method, a dimming device using the dimming method, a computer-readable storage medium storing a program for implementing the PWM dimming method when loaded and executed by a processor, and a stage light for adjusting brightness using the dimming device.

[0009] In order to solve the above technical problems, the present invention provides the following technical solutions:

[0010] A PWM dimming method comprises the following steps:

[0011] Step S1, according to the n-bit precision value of the analog-to-digital conversion of the processor and the m-bit grayscale level of the PWM, the analog value range is set to 0 to 2 n -1 and grayscale levels ranging from 0 to 2m -1, where n>m, and n and m are positive integers;

[0012] Step S2, set the modulus value range from 0 to 2 n -1 is divided equally into 2 from small to large m Sequences are sorted from small to large, and a one-to-one correspondence is established between each sequence and each gray level number;

[0013] Step S3, the second to the second m -1 The range of each modulus value in the sequence is uniformly reduced;

[0014] Step S4, setting the effective value judgment interval of the modulus value, taking the modulus value range of the first sequence as the first judgment interval, and taking the modulus value range of the second sequence as the second judgment interval. m The modulus value range of the sequence is used as the second judgment interval, and the range from the 2nd to the 2nd m -1 Select any one of the modulus values ​​in the sequence and divide it by 2 after the critical value is reduced. n-m , a numerical range formed by the remainders of the two critical values ​​is used as a third judgment interval;

[0015] Step S5, determining whether the modulus value is within the valid value determination interval, if the modulus value is within the valid value determination interval, outputting the gray level number corresponding to the modulus value sequence; otherwise, the modulus value is not processed.

[0016] It is further defined that in step S3, the maximum critical value of the modulus value range in the first sequence is reduced to reduce the modulus value range of the sequence.

[0017] Further defined, in step S3, the second m The minimum critical value of the modulus value range in a sequence is enlarged to reduce the modulus value range of the sequence.

[0018] It is further defined that in step S1, the modulus value and the collected voltage value are linearized.

[0019] A dimming device, comprising a voltage regulating circuit and a processor capable of executing the PWM dimming method;

[0020] The voltage regulating circuit controls the voltage output by adjusting the resistance value change of the resistor;

[0021] The processor converts the voltage signal received from the voltage regulating circuit into a digital signal, and the processor adjusts the brightness of the lamp according to the grayscale number of PWM converted from the digital signal.

[0022] It is further defined that the voltage range of the voltage regulator circuit output is 0-3.3V.

[0023] It is further defined that the processor model is STM32G474RBT3.

[0024] It is further defined that the voltage regulating circuit includes a sliding rheostat, a capacitor C1, a capacitor C2, a capacitor C3 and a capacitor C4, one end of the capacitor C1 and the capacitor C2 connected in parallel is divided into two paths, one is connected to the A end of the sliding rheostat, and the other is grounded; the other end of the capacitor C1 and the capacitor C2 connected in parallel is also divided into two paths, one is connected to the processor, and the other is connected to the P end of the sliding rheostat; one end of the capacitor C3 and the capacitor C4 connected in parallel is divided into two paths, one is connected to the B end of the sliding rheostat, and the other is connected to +3.3v, and the other end of the capacitor C3 and the capacitor C4 connected in parallel is grounded.

[0025] A computer-readable storage medium includes a program that can be loaded and executed by a processor to implement the PWM dimming method.

[0026] A stage lamp comprises a light source and a dimming device, wherein the dimming device is used to adjust the brightness of the light source.

[0027] After adopting the above technical scheme, the invention has at least the following beneficial effects: compared with the average value filtering method and the majority filtering method in the prior art, the present invention can complete the effective output of data by collecting data only once, setting the modulus value range of each sequence to be narrowed, increasing the difference between the critical values ​​of adjacent sequences, and reducing the uncertainty when the collected modulus value is at the critical value, thereby improving the precise output of the dimming brightness by the dimming device. BRIEF DESCRIPTION OF THE DRAWINGS

[0028] Figure 1 It is a flowchart of the present invention;

[0029] Figure 2 It is a framework principle diagram of the present invention;

[0030] Figure 3 is the circuit diagram of the processor;

[0031] Figure 4 This is the schematic diagram of the voltage regulating circuit. DETAILED DESCRIPTION

[0032] It should be noted that, in the absence of conflict, the embodiments in the present application and the features described in the embodiments may be combined with each other. The present application is further described in detail below in conjunction with the drawings and specific embodiments.

[0033] As attached Figures 1 to 4As shown, the present invention provides a PWM dimming method, a dimming device, a storage medium and a stage light. The PWM dimming method is implemented based on the dimming device, wherein the dimming device includes a voltage regulating circuit and a processor; the voltage regulating circuit controls the voltage output range to be 0-3.3v by adjusting the resistance value change of the resistor; the processor, whose model is STM32G474RBT3, is integrated with an analog-to-digital conversion function, so there is no need for an external analog-to-digital converter, and the voltage signal of the voltage regulating circuit is directly received by the processor and converted into a digital signal. The processor adjusts the brightness of the lamp according to the grayscale number of PWM converted from the digital signal; the storage medium stores a program that implements the PWM dimming method when loaded and executed by the processor, and the light source brightness of the stage light is controlled by the dimming device executing the PWM dimming method steps.

[0034] A PWM dimming method includes the following steps:

[0035] Step S1, according to the n-bit precision value of the analog-to-digital conversion of the processor and the m-bit grayscale level of the PWM, the analog value range is set to 0 to 2 n -1 and grayscale levels ranging from 0 to 2 m -1, wherein n>m, and n and m are positive integers; preferably, n=12, then the modulus value range is 0 to 4095; m=8, then the grayscale level number range is 0 to 255, and the modulus value (0-4095) and the voltage value (0-3.3) are linearized to obtain a linear relationship between the voltage value and the modulus value. The above n value of 12 and m value of 8 are not the only limitation, but are only described as a preferred embodiment. Of course, n can also be 8, 10, 16 and other higher precision values, and m can be 7, 6 and the like.

[0036] Step S2, set the modulus value range from 0 to 2 n -1 is divided equally into 2 from small to large m Sequences are sorted from small to large, and a one-to-one correspondence is established between each sequence and each grayscale level number; the modulus value range of 0 to 4095 is evenly divided into 256 sequences, the modulus value range of 0 to 15 corresponds to the first sequence, the modulus value range of 16 to 31 corresponds to the second sequence, the modulus value range of 32 to 47 corresponds to the third sequence, and so on, until the modulus value range of 4080 to 4095 corresponds to the 256th sequence.

[0037] Step S3, the second to the second m-1 sequences are uniformly reduced. The uniformity can be understood as the minimum critical value in each sequence being enlarged by the same difference, while the maximum critical value being reduced by the same difference. For example, the modulus value range of the second sequence is reduced to 18 to 29, the modulus value range of the third sequence is reduced to 34 to 45, and so on.

[0038] In addition, the maximum critical value of the modulus value range in the first sequence is reduced to reduce the modulus value range of the sequence, that is, the modulus value range is 0 to 13; m The minimum critical value of the modulus value range in a sequence is enlarged to narrow the modulus value range of the sequence, that is, the modulus value range is 4082 to 4095; the reduction of the modulus value range can effectively reduce the uncertainty when the collected modulus value is at the critical value. It can be understood that if the modulus value range is not reduced, when the manual sliding resistor pushes the critical value position, due to the small difference between the critical values ​​of adjacent sequences, the data collected by the processor may be 15 or 16, which may easily cause the dimming device to appear dim and bright when adjusting the brightness. In order to prevent this situation from happening, the modulus value of each sequence is reduced in a certain range to increase the difference between the critical values ​​of adjacent sequences.

[0039] Step S4, setting the effective value judgment interval of the modulus value, taking the modulus value range of the first sequence as the first judgment interval (i.e., 0 to 13), and taking the modulus value range of the second sequence as the first judgment interval (i.e., 0 to 13). m The modulus value range of the sequence is used as the second judgment interval (i.e., 4082 to 4095), and the range from the 2nd to the 2nd m -1 Select any one of the modulus values ​​in the sequence and divide it by 2 after the critical value is reduced. n-m The numerical range formed by the remainder of the two critical values ​​is used as the third judgment interval (i.e., 2 to 13), without the need to m -1, the modulus value ranges in the sequence are judged one by one, and the set remainder range can quickly judge whether the modulus value is valid; after the processor collects a certain modulus value, it judges the first judgment interval, the third judgment interval and the second judgment interval in turn for the modulus value.

[0040] Step S5, determine whether the modulus value is within the valid value judgment interval. If the modulus value is within the valid value judgment interval (a modulus value is within any one of the first judgment interval, the second judgment interval and the third judgment interval, it can be determined that the modulus value is a valid value), then output the gray level number corresponding to the modulus value sequence, that is, the modulus value divided by 2 n-m The obtained quotient is used as the grayscale level number; otherwise, the modulus value is not processed and the original modulus value is output.

[0041] The specific related value settings are as follows:

[0042]

[0043] Compared with the average value filtering method and the majority filtering method in the prior art, the present invention can complete the effective output of data by collecting data only once, setting the modulus value range of each sequence to be narrowed, increasing the difference between the critical values ​​of adjacent sequences, and reducing the uncertainty when the collected modulus value is at the critical value, thereby improving the precise output of the dimming brightness by the dimming device.

[0044] Specifically, the circuit diagram of the voltage regulating circuit is as follows: the voltage regulating circuit includes a manual sliding rheostat, a capacitor C1, a capacitor C2, a capacitor C3 and a capacitor C4, one end of the capacitor C1 and the capacitor C2 connected in parallel is divided into two paths, one is connected to the A end of the sliding rheostat, and the other is grounded; the other end of the capacitor C1 and the capacitor C2 connected in parallel is also divided into two paths, one is connected to the processor, and the other is connected to the P end of the sliding rheostat; one end of the capacitor C3 and the capacitor C4 connected in parallel is divided into two paths, one is connected to the B end of the sliding rheostat, and the other is connected to +3.3v, and the other end of the capacitor C3 and the capacitor C4 connected in parallel is grounded.

[0045] Although the embodiments of the present invention have been shown and described, it will be appreciated by those skilled in the art that various equivalent changes, modifications, substitutions and variations may be made to the embodiments without departing from the principles and spirit of the present invention, and that the scope of the present invention is defined by the appended claims and their equivalents.

Claims

1. A PWM dimming method, characterized in that: The steps include: Step S1, according to the n-bit precision value of the analog-to-digital conversion of the processor and the m-bit grayscale level of the PWM, the analog value range is set to 0 to 2 n -1 and grayscale levels ranging from 0 to 2 m -1, where n>m, and n and m are positive integers; Step S2, set the modulus value range from 0 to 2 n -1 is divided equally into 2 from small to large m Sequences are sorted from small to large, and a one-to-one correspondence is established between each sequence and each gray level number; Step S3, the second to the second m -1 The range of each modulus value in the sequence is uniformly reduced; Step S4, setting the effective value judgment interval of the modulus value, taking the modulus value range of the first sequence as the first judgment interval, and taking the modulus value range of the second sequence as the second judgment interval. m The modulus value range of the sequence is used as the second judgment interval, and the range from the 2nd to the 2nd m -1 Select any one of the modulus values ​​in the sequence and divide it by 2 after the critical value is reduced. n-m , a numerical range formed by the remainders of the two critical values ​​is used as a third judgment interval; Step S5, determining whether the modulus value is within the valid value determination interval, if the modulus value is within the valid value determination interval, outputting the gray level number corresponding to the modulus value sequence; otherwise, the modulus value is not processed.

2. The PWM dimming method according to claim 1, characterized in that: In step S3, the maximum critical value of the modulus value range in the first sequence is reduced to reduce the modulus value range of the sequence.

3. The PWM dimming method according to claim 1, characterized in that: In step S3, the second m The minimum critical value of the modulus value range in a sequence is enlarged to reduce the modulus value range of the sequence.

4. The PWM dimming method according to claim 1, characterized in that: In step S1, the modulus value and the collected voltage value are linearized.

5. A dimming device, characterized in that: A processor comprising a voltage regulating circuit and capable of executing the PWM dimming method according to any one of claims 1 to 4; The voltage regulating circuit controls the voltage output by adjusting the resistance value change of the resistor; The processor converts the voltage signal received from the voltage regulating circuit into a digital signal, and the processor adjusts the brightness of the lamp according to the grayscale number of PWM converted from the digital signal.

6. The dimming device according to claim 5, characterized in that: The voltage range of the voltage regulator circuit output is 0-3.3V.

7. The dimming device according to claim 5, characterized in that: The model of the processor is STM32G474RBT3.

8. The dimming device according to claim 5, characterized in that: The voltage regulating circuit includes a sliding rheostat, a capacitor C1, a capacitor C2, a capacitor C3 and a capacitor C4. One end of the capacitor C1 and the capacitor C2 connected in parallel is divided into two paths, one path is connected to the A end of the sliding rheostat, and the other path is grounded; the other end of the capacitor C1 and the capacitor C2 connected in parallel is also divided into two paths, one path is connected to the processor, and the other path is connected to the P end of the sliding rheostat; one end of the capacitor C3 and the capacitor C4 connected in parallel is divided into two paths, one path is connected to the B end of the sliding rheostat, and the other path is connected to +3.3v. The other end of the capacitor C3 and the capacitor C4 connected in parallel is grounded.

9. A computer-readable storage medium, characterized in that: The invention comprises a program capable of implementing the PWM dimming method as claimed in any one of claims 1 to 4 when being loaded and executed by a processor.

10. A stage light, characterized in that: It comprises a light source and a dimming device as claimed in any one of claims 5 to 8, wherein the dimming device is used to adjust the brightness of the light source.

Images