A through-hole vertical structure LED chip and its manufacturing method

Abstract

The present invention provides a through-hole vertical structure LED chip and a manufacturing method thereof, wherein the through-hole vertical structure LED chip is provided with a metal bonding layer, an insulating layer, an ohmic contact layer, a reflective structure and an epitaxial stack on one side of a conductive substrate; wherein a patterned adhesion structure is provided on the surface of a dielectric film layer on the side facing away from the epitaxial stack, and the adhesion structure is also connected to the metal reflective layer and the ohmic contact layer. The patterned adhesion structure can improve the adhesion effect between the dielectric film layer, the metal reflective layer and the ohmic contact layer without affecting the light output effect, avoid the problem of epitaxial shedding caused by poor adhesion between the metal reflector and the dielectric film layer, and can be used to improve the reliability and stability of the chip, thereby improving the yield rate of the LED chip. The manufacturing process is simple and convenient, and is easy to produce.

Description

Technical Field

[0001] The present invention relates to the technical field of light emitting diodes, and more particularly to a through-hole vertical structure LED chip and a manufacturing method thereof. Background Art

[0002] Existing light-emitting diodes include horizontal and vertical types. The vertical type of light-emitting diode is obtained by transferring the semiconductor structure to another substrate with better electrical conductivity and thermal conductivity, and removing the original epitaxially grown substrate. The semiconductor structure includes at least a first-type semiconductor layer, an active area, and a second-type semiconductor layer stacked in sequence. Compared with the horizontal type, it can effectively improve the technical problems of light absorption, current crowding, or poor heat dissipation caused by the epitaxial growth substrate. The transfer of the substrate generally adopts a bonding process, and the bonding is mainly through metal-metal high-temperature and high-pressure bonding, that is, a metal bonding layer is formed between one side of the semiconductor structure and the conductive substrate. The other side of the semiconductor structure serves as the light-emitting side, and the light-emitting side is provided with a wire electrode to provide current injection or outflow. The conductive substrate under the semiconductor structure provides current outflow or inflow, thereby forming a light-emitting diode in which the current passes vertically through the semiconductor structure.

[0003] To improve light extraction efficiency, a reflective structure is typically designed on one side of the metal bonding layer, such as a metal reflector or an omni-directional reflector (ODR) formed by combining a metal reflector with a dielectric layer. This structure reflects light from one side of the metal bonding layer to the light-exiting side, improving light extraction efficiency. However, the adhesion between the metal reflector and the dielectric layer is poor. Stress release during laser stripping of the growth substrate or other process steps can cause cracks between the metal reflector and the dielectric layer, leading to epitaxial shedding, compromising chip reliability and stability, and ultimately reducing LED chip yield. Summary of the Invention

[0004] In view of this, the present invention provides a through-hole vertical structure LED chip and a manufacturing method thereof to solve the problem in the prior art that the adhesion between the metal reflector and the dielectric layer of the through-hole vertical structure LED chip is poor, affecting the reliability and stability of the chip, thereby leading to a reduction in the yield of the LED chip.

[0005] To achieve the above object, the technical solution adopted by the present invention is as follows:

[0006] A through-hole vertical structure LED chip, characterized by comprising:

[0007] Conductive substrate;

[0008] a metal bonding layer, an insulating layer, an ohmic contact layer, a reflective structure, and an epitaxial stack disposed on one side of the conductive substrate; wherein the epitaxial stack comprises at least a second-type semiconductor layer, an active region, and a first-type semiconductor layer stacked in sequence along a first direction, and a surface of the epitaxial stack facing the conductive substrate is provided with a groove extending toward the first-type semiconductor layer and exposing a portion of the surface of the first-type semiconductor layer, and the first direction is perpendicular to the conductive substrate and points from the conductive substrate to the epitaxial stack;

[0009] The reflective structure includes a dielectric film layer and a metal reflective layer, wherein the dielectric film layer is disposed on a surface of the second-type semiconductor layer facing away from the active region and extends to a sidewall of the groove, and the dielectric film layer includes a dielectric through hole, wherein the dielectric through hole exposes the second-type semiconductor layer; the metal reflective layer is disposed on a surface of the dielectric film layer facing away from the epitaxial stack and is electrically connected to the second-type semiconductor layer through the dielectric through hole;

[0010] The ohmic contact layer covers the exposed surface of the metal reflective layer and extends to a portion of the surface of the dielectric film layer, and the side of the ohmic contact layer facing the epitaxial stack has an exposed surface for external electrical connection;

[0011] A patterned adhesion structure is provided on a surface of the dielectric film layer on a side facing away from the epitaxial stack, and the adhesion structure is also connected to the metal reflective layer and the ohmic contact layer;

[0012] The insulating layer covers the exposed surface of the ohmic contact layer facing the conductive substrate, and the insulating layer is bonded to the dielectric film layer, and exposes the bottom of the groove to form a first through hole;

[0013] The metal bonding layer is stacked on a side surface of the insulating layer away from the epitaxial stack and is electrically connected to the first type semiconductor layer through the first through hole, and the conductive substrate is stacked on a side surface of the metal bonding layer away from the epitaxial stack.

[0014] Preferably, the adhesion structure includes a first adhesion structure and a second adhesion structure, the first adhesion structure is arranged in the edge area between the dielectric film layer and the metal reflective layer, and the second adhesion structure is arranged in the middle area between the dielectric film layer and the metal reflective layer.

[0015] Preferably, the second adhesive structure is evenly distributed in the middle area between the dielectric film layer and the metal reflective layer, and the light emitting area of ​​the epitaxial stack is M1, the total area of ​​the vertical projection of the reflective structure on the plane where the conductive substrate is located is M2, and the total area of ​​the vertical projection of the second adhesive structure on the plane where the conductive substrate is located is M3, then, 4 / 5M1 <M2<M1,1 / 2M2<M3<M2。

[0016] Preferably, the metal reflective layer includes a metal opening, the metal opening exposes the second adhesion structure, the ohmic contact layer is connected to the second adhesion structure through the metal opening, and the second adhesion structure includes a reflective structure.

[0017] Preferably, the second adhesion structure includes a first adhesion sublayer, an intermediate layer and a second adhesion sublayer stacked in sequence along a direction away from the epitaxial stack, and the thickness of the first adhesion sublayer is less than the thickness of the second adhesion sublayer, wherein the first adhesion sublayer and the second adhesion sublayer both include one or more of ITO, IZO, Al2O3, TiO2, In2O3, SnO2, and the intermediate layer is a metal material with high reflectivity, including one or more of Ag, Al, Au, and Rh.

[0018] Preferably, a surface of the dielectric film layer facing away from the second-type semiconductor layer is A, a surface of the ohmic contact layer facing away from the second-type semiconductor layer is B, a surface of the first adhesive structure facing away from the dielectric film layer is C1, and a surface of the second adhesive structure facing away from the dielectric film layer is C2;

[0019] Then, the horizontal planes of C1 and C2 are between A and B, wherein C1 and C2 are at the same horizontal plane, or C1 and C2 are not at the same horizontal plane.

[0020] The present invention also provides a method for manufacturing a through-hole vertical structure LED chip, characterized in that it is used to manufacture any of the through-hole vertical structure LED chips described above, and the manufacturing method comprises the following steps:

[0021] Step S01, providing a growth substrate;

[0022] Step S02: forming an epitaxial stack on one side surface of the growth substrate, wherein the epitaxial stack includes a first-type semiconductor layer, an active region, and a second-type semiconductor layer sequentially stacked along a growth direction;

[0023] Step S03: etching along a portion of the upper surface of the second-type semiconductor layer to expose a portion of the first-type semiconductor layer to form a groove;

[0024] Step S04: preparing a dielectric film layer to cover the exposed surface of the second-type semiconductor layer, the sidewalls of the groove, and the bottom of the groove, and patterning the dielectric film layer to form a dielectric through hole, wherein the dielectric through hole exposes a portion of the second-type semiconductor layer;

[0025] Step S05: preparing a patterned adhesion structure on the surface of the dielectric film layer;

[0026] Step S06: preparing a metal reflective layer to cover a portion of the adhesion structure and to cover the exposed second-type semiconductor layer through the dielectric through-hole, wherein the dielectric film layer and the metal reflective layer constitute a reflective structure;

[0027] Step S07: forming an ohmic contact layer to cover the exposed surface of the metal reflective layer and the adhesive structure, and extending to a portion of the surface of the dielectric film layer;

[0028] Step S08: preparing an insulating layer to cover the exposed surface of the ohmic contact layer, bonding the insulating layer to the dielectric film layer, and patterning the insulating layer to expose the bottom of the groove to form a first through hole;

[0029] Step S09, evaporating a metal bonding layer, wherein the metal bonding layer is stacked on a surface of the insulating layer facing away from the epitaxial stack and is electrically connected to the first-type semiconductor layer through the first through-hole;

[0030] Step S10: fixing the chip structure formed in step S09 to a conductive substrate through a bonding process, wherein the conductive substrate is formed on a surface of the metal bonding layer that is away from the epitaxial stack;

[0031] Step S11, peeling off the growth substrate to expose the first-type semiconductor layer;

[0032] Step S12: etching a portion of the epitaxial stack to form an opening for external electrical connection by exposing a portion of the surface of the ohmic contact layer.

[0033] Preferably, the adhesion structure includes a first adhesion structure and a second adhesion structure, the first adhesion structure is arranged in the edge area between the dielectric film layer and the metal reflective layer, and the second adhesion structure is arranged in the middle area between the dielectric film layer and the metal reflective layer.

[0034] Preferably, the metal reflective layer includes a metal opening, the metal opening exposes the second adhesion structure, the ohmic contact layer is connected to the second adhesion structure through the metal opening, and the second adhesion structure includes a reflective structure.

[0035] Preferably, the second adhesion structure includes a first adhesion sublayer, an intermediate layer and a second adhesion sublayer stacked in sequence along a direction away from the epitaxial stack, and the thickness of the first adhesion sublayer is less than the thickness of the second adhesion sublayer, wherein the first adhesion sublayer and the second adhesion sublayer both include one or more of ITO, IZO, Al2O3, TiO2, In2O3, SnO2, and the intermediate layer is a metal material with high reflectivity, including one or more of Ag, Al, Au, and Rh.

[0036] Through the above technical solution, the following effects are achieved:

[0037] 1. The present invention provides a through-hole vertical structure LED chip. A metal bonding layer, an insulating layer, an ohmic contact layer, a reflective structure, and an epitaxial stack are disposed on one side of a conductive substrate. The reflective structure includes a dielectric film layer and a metal reflective layer. A patterned adhesive structure is provided on the surface of the dielectric film layer facing away from the epitaxial stack. The adhesive structure is also connected to the metal reflective layer and the ohmic contact layer. The patterned adhesive structure improves the adhesion between the dielectric film layer, the metal reflective layer, and the ohmic contact layer without affecting light emission. Furthermore, the ohmic contact layer covers the exposed surface of the metal reflective layer and extends to a portion of the surface of the dielectric film layer, further improving the tightness among the dielectric film layer, the metal reflective layer, and the ohmic contact layer. This prevents stress release during laser lift-off of the growth substrate or other processes due to poor adhesion between the metal reflector and the dielectric film layer, which can cause cracks between the metal reflector and the dielectric layer and lead to epitaxial shedding. This improves the chip's reliability and stability, thereby increasing the yield of the LED chip.

[0038] 2. Furthermore, an adhesion structure is provided including a first adhesion structure and a second adhesion structure. The first adhesion structure is provided in the edge region between the dielectric film layer and the metal reflective layer, and the second adhesion structure is provided in the middle region between the dielectric film layer and the metal reflective layer. The first adhesion structure is located in the edge region between the dielectric film layer and the metal reflective layer, which is more likely to fall off. The middle region between the dielectric film layer and the metal reflective layer is reinforced in combination with the second adhesion structure, which can further improve the adhesion between the dielectric film layer, the metal reflective layer and the ohmic contact layer.

[0039] 3. Further, by arranging the second adhesion structure to be uniformly distributed in the intermediate region between the dielectric film layer and the metal reflection layer, and the light-emitting area of the epitaxial stack is M1, the total area of the vertical projection of the reflection structure on the plane where the conductive substrate is located is M2, and the total area of the vertical projection of the second adhesion structure on the plane where the conductive substrate is located is M3, then, 4 / 5M1 < M2 < M1, 1 / 2M2 < M3 < M2. By setting the area relationship of the epitaxial stack, the reflection structure and the second adhesion structure, while enabling the second adhesion structure to have an adhesion effect, the light output brightness of the LED chip can also be ensured.

[0040] 4. Further, by arranging the metal reflection layer to include metal openings that expose the second adhesion structure, and the ohmic contact layer is connected to the second adhesion structure through the metal openings, the contact surface between the ohmic contact layer and the second adhesion layer can be increased to improve the adhesion, and the second adhesion structure includes a reflection structure, which not only avoids the second adhesion structure from absorbing light, but also reflects the light incident on the second adhesion structure to the light output side, improving the reflectivity.

[0041] 5. The manufacturing method of a through-hole type vertical structure LED chip provided by the present invention, while achieving the beneficial effects of the above-mentioned LED chip, has a simple and convenient process and is convenient for industrial production. BRIEF DESCRIPTION OF THE DRAWINGS

[0042] In order to more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the following will briefly introduce the drawings required for use in the description of the embodiments or the prior art. Obviously, the drawings in the following description are only the embodiments of the present invention. For those of ordinary skill in the art, without creative efforts, other drawings can also be obtained based on the provided drawings.

[0043] Figure 1 It is a schematic structural diagram of a through-hole type vertical structure LED chip provided by an embodiment of the present invention;

[0044] Figure 2 It is a schematic structural diagram of another through-hole type vertical structure LED chip provided by an embodiment of the present invention;

[0045] Figure 3 It is a schematic distribution diagram of a first adhesion structure and a second adhesion structure provided by an embodiment of the present invention;

[0046] Figure 4 It is a schematic distribution diagram of another first adhesion structure and a second adhesion structure provided by an embodiment of the present invention;

[0047] Figure 5 It is a schematic structural diagram of another through-hole type vertical structure LED chip provided by an embodiment of the present invention;

[0048] Figure 6 A schematic structural diagram of another through-hole vertical structure LED chip provided by an embodiment of the present invention;

[0049] Figure 7 A schematic structural diagram of another through-hole vertical structure LED chip provided by an embodiment of the present invention;

[0050] Figures 8 to 21 This is a structural schematic diagram corresponding to each step of a method for manufacturing a through-hole vertical structure LED chip provided by an embodiment of the present invention.

[0051] Explanation of symbols in the figure:

[0052] 01, growth substrate; 02, photoresist; K, dielectric through hole; T, first through hole; J, metal opening;

[0053] 1. Conductive substrate; 2. Epitaxial stack; 21. First-type semiconductor layer; 22. Active region; 23. Second-type semiconductor layer; 24. Groove; 3. Reflective structure; 31. Dielectric film layer; 32. Metal reflective layer; 4. Adhesion structure; 41. First adhesion structure; 42. Second adhesion structure; 5. Ohmic contact layer; 6. Insulating layer; 7. Metal bonding layer; 8. Passivation layer; 9. Transparent conductive layer. DETAILED DESCRIPTION

[0054] To make the content of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments in the present invention, all other embodiments obtained by ordinary technicians in this field without making creative efforts are within the scope of protection of this application.

[0055] In the following description, many specific details are set forth to facilitate a full understanding of the present application. However, the present application may also be implemented in other ways different from those described herein. Those skilled in the art may make similar generalizations without violating the connotation of the present application. Therefore, the present application is not limited to the specific embodiments disclosed below.

[0056] Secondly, this application is described in detail with reference to schematic diagrams. When describing the embodiments of this application, for ease of explanation, cross-sectional views of device structures may be partially enlarged and not to scale. Furthermore, these schematic diagrams are merely illustrative and should not limit the scope of protection of this application. Furthermore, in actual production, three-dimensional dimensions, including length, width, and depth, should be included.

[0057] As described in the background, to improve light extraction efficiency, a reflective structure is typically designed on one side of the metal bonding layer, such as a metal reflector or an omnidirectional reflector formed by combining a metal reflector with a dielectric layer. This structure reflects light from one side of the metal bonding layer to the light-exiting side, thereby improving light extraction efficiency. However, the adhesion between the metal reflector and the dielectric layer is poor. Stress release during laser stripping of the growth substrate or other process steps can cause cracks to form between the metal reflector and the dielectric layer, leading to epitaxial shedding, affecting chip reliability and stability, and thus reducing the yield of LED chips.

[0058] The inventors have discovered that in the prior art, when preparing a metal reflector, an adhesion layer is first deposited as the starting layer of the metal reflector to increase the adhesion between the dielectric film and the metal reflector. However, the adhesion layer is usually made of light-absorbing materials such as ITO, IZO, and TiO2, and the area of ​​the adhesion layer is consistent with that of the metal reflector, which will affect the light output efficiency of the LED chip.

[0059] In view of this, the embodiment of the present application provides a through-hole vertical structure LED chip, such as Figure 1 Shown, including:

[0060] Conductive substrate 1;

[0061] A metal bonding layer 7, an insulating layer 6, an ohmic contact layer 5, a reflective structure 3, and an epitaxial stack 2 are provided on one side of a conductive substrate 1; wherein the epitaxial stack 2 includes at least a second-type semiconductor layer 23, an active region 22, and a first-type semiconductor layer 21 stacked in sequence along a first direction, and a groove 24 is provided on a surface of the epitaxial stack 2 facing the conductive substrate 1, extending toward the first-type semiconductor layer 21 and exposing a portion of the surface of the first-type semiconductor layer 21. The first direction is perpendicular to the conductive substrate 1 and points from the conductive substrate 1 to the epitaxial stack 2;

[0062] The reflective structure 3 includes a dielectric film layer 31 and a metal reflective layer 32. The dielectric film layer 31 is disposed on a surface of the second-type semiconductor layer 23 facing away from the active region 22 and extends to the sidewall of the groove 24. The dielectric film layer 31 includes a dielectric through hole K, which exposes the second-type semiconductor layer 23. The metal reflective layer 32 is disposed on a surface of the dielectric film layer 31 facing away from the epitaxial stack 2 and is electrically connected to the second-type semiconductor layer 23 through the dielectric through hole K.

[0063] The ohmic contact layer 5 covers the exposed surface of the metal reflective layer 32 and extends to a portion of the surface of the dielectric film layer 31 , and the side of the ohmic contact layer 5 facing the epitaxial stack 2 has an exposed surface for external electrical connection;

[0064] A patterned adhesive structure 4 is provided on the surface of the dielectric film layer 31 facing away from the epitaxial stack 2, and the adhesive structure 4 is also connected to the metal reflective layer 32 and the ohmic contact layer 5;

[0065] The insulating layer 6 covers the exposed surface of the ohmic contact layer 5 facing the conductive substrate 1 , and the insulating layer 6 is bonded to the dielectric film layer 31 , and the bottom of the exposed groove 24 is formed into a first through hole T;

[0066] The metal bonding layer 7 is stacked on the side of the insulating layer 6 away from the epitaxial stack 2 and is electrically connected to the first-type semiconductor layer 21 through the first through hole T. The conductive substrate 1 is stacked on the side of the metal bonding layer 7 away from the epitaxial stack 2.

[0067] In this embodiment, the specific doping types of the first-type semiconductor layer 21 and the second-type semiconductor layer 23 are not limited. The doping types of the first-type semiconductor layer 21 and the second-type semiconductor layer 23 are opposite. The first-type semiconductor layer 21 can be a P-type semiconductor layer or an N-type semiconductor layer. The materials of the N-type semiconductor layer and the P-type semiconductor layer can be GaN.

[0068] The dielectric film layer 31 in this embodiment is made of an insulating material. Optionally, in this embodiment, the dielectric film layer 31 is made of an insulating material with a low refractive index, including but not limited to a stack of one or more of SiO 2 and MgF 2 .

[0069] In one embodiment of the present application, the vertical projection of the adhesion structure 4 on the conductive substrate 1 is located within the vertical projection range of the dielectric film layer 31 on the conductive substrate 1 .

[0070] In one embodiment of the present application, the thickness of the dielectric film layer 31 ranges from 1000 Å to 6000 Å, including end points.

[0071] In one embodiment of the present application, the metal reflective layer 32 is made of a metal material with high reflectivity, including but not limited to a stack of one or more of gold, silver, aluminum, magnesium, nickel, titanium, and ITO.

[0072] In one embodiment of the present application, the ohmic contact layer 5 includes but is not limited to a stack of one or more of chromium, titanium, nickel, and gold.

[0073] In one embodiment of the present application, the metal bonding layer 7 includes but is not limited to one or more alloys of nickel, tin, gold, and indium.

[0074] In another embodiment of the present application, reference Figure 1 As shown, a passivation layer 8 is also included. The passivation layer 8 covers the exposed surface of the first-type semiconductor layer 21 and extends to the sidewall of the epitaxial stack 2 to connect with the dielectric film layer 31 .

[0075] In another embodiment of the present application, Figure 2As shown, the adhesion structure 4 includes a first adhesion structure 41 and a second adhesion structure 42 . The first adhesion structure 41 is arranged in the edge area between the dielectric film layer 31 and the metal reflective layer 32 , and the second adhesion structure 42 is arranged in the middle area between the dielectric film layer 31 and the metal reflective layer 32 .

[0076] In another embodiment of the present application, the first adhesive structure 41 is disposed around the second adhesive structure 42 .

[0077] It should be noted that the specific number, distribution and shape of the first adhesive structure 41 and the second adhesive structure 42 are not limited in this embodiment and can be selected according to needs as long as they ensure the light emitting effect and the adhesion effect. Figure 3 As shown, the first adhesive structure 41 includes a discontinuous structure, or as shown in FIG. Figure 4 As shown, the first adhesive structure 41 includes a continuous structure. Optionally, in one embodiment of the present application, the second adhesive structure 42 includes a dot-shaped structure, a strip-shaped structure, or a mesh-shaped structure.

[0078] Optionally, in this embodiment, the shape of the second adhesive structure 42 includes but is not limited to one or more of a cylinder, a cube, a cuboid, and a trapezoid.

[0079] In another embodiment of the present application, reference Figure 2 As shown, the metal reflective layer 32 exposes a portion of the first adhesive structure 41 and covers the second adhesive structure 42 .

[0080] In another embodiment of the present application, the second adhesive structure 42 is evenly distributed in the middle area between the dielectric film layer 31 and the metal reflective layer 32, and the light emitting area of ​​the epitaxial stack 2 is M1, the total area of ​​the vertical projection of the reflective structure 3 on the plane where the conductive substrate 1 is located is M2, and the total area of ​​the vertical projection of the second adhesive structure 42 on the plane where the conductive substrate 1 is located is M3. Then, 4 / 5M1 <M2<M1,1 / 2M2<M3<M2。

[0081] In another embodiment of the present application, Figure 5 As shown, the metal reflective layer 32 includes a metal opening J, the metal opening J exposes the second adhesive structure 42, the ohmic contact layer 5 is connected to the second adhesive structure 42 through the metal opening J, and the second adhesive structure 42 includes a reflective structure.

[0082] Optionally, in this embodiment, refer to Figure 5 As shown, the metal reflective layer 32 covers the first adhesive structure 41 and exposes a portion of the second adhesive structure 42;

[0083] or, as Figure 6As shown, the metal reflective layer 32 exposes a portion of the first adhesive structure 41 and a portion of the second adhesive structure 42 .

[0084] It should be noted that, in this embodiment, several configurations of the first adhesive structure 41 and the second adhesive structure 42 can be selected according to actual needs; wherein, the metal reflective layer 32 exposes a portion of the first adhesive structure 41 so that the first adhesive structure 41 is connected to the dielectric film layer 31, the metal reflective layer 32, and the ohmic contact layer 5; and the metal reflective layer 32 exposes a portion of the second adhesive structure 42 so that the second adhesive structure 42 is connected to the dielectric film layer 31, the metal reflective layer 32, and the ohmic contact layer 5.

[0085] In another embodiment of the present application, the second adhesion structure 42 includes a first adhesion sublayer, an intermediate layer and a second adhesion sublayer stacked in sequence along a direction away from the epitaxial stack 2, and the thickness of the first adhesion sublayer is less than the thickness of the second adhesion sublayer, wherein the first adhesion sublayer and the second adhesion sublayer both include but are not limited to one or more of ITO, IZO, Al2O3, TiO2, In2O3, SnO2, and the intermediate layer is a metal material with high reflectivity, including but not limited to one or more of Ag, Al, Au, and Rh.

[0086] It should be noted that the first adhesion sublayer in this embodiment is close to the epitaxial stack, and its thickness is set to be smaller to reduce light absorption. The middle layer is a metal material with high reflectivity that can reflect light to the light-emitting side, and is combined with a thicker second adhesion sublayer to increase the adhesion effect.

[0087] In another embodiment of the present application, the thickness range of the starting layer is 20A-200A, including the endpoint values; the thickness range of the middle layer is 800A-2000A, including the endpoint values; and the thickness range of the ending layer is 20A-2000A, including the endpoint values.

[0088] In another embodiment of the present application, the first adhesion structure 41 includes but is not limited to a stack of one or more of ITO, IZO, Al 2 O 3 , TiO 2 , In 2 O 3 , and SnO 2 .

[0089] In another embodiment of the present application, a surface of the dielectric film layer 31 facing away from the second-type semiconductor layer 23 is designated A, a surface of the ohmic contact layer 5 facing away from the second-type semiconductor layer 23 is designated B, a surface of the first adhesive structure 41 facing away from the dielectric film layer is designated C1, and a surface of the second adhesive structure 42 facing away from the dielectric film layer is designated C2.

[0090] Then, the horizontal planes of C1 and C2 are between A and B, wherein C1 and C2 are at the same horizontal plane, or C1 and C2 are not at the same horizontal plane.

[0091] In another embodiment of the present application, Figure 7As shown, in order to improve the current spreading effect of the LED chip, a transparent conductive layer 9 is further included. The transparent conductive layer 9 is disposed on a portion of the surface of the second-type semiconductor layer 23 away from the active area 22 .

[0092] Optionally, in this embodiment, the metal reflective layer 32 is electrically connected to the second-type semiconductor layer 23 through the transparent conductive layer 9 .

[0093] Optionally, in this embodiment, the thickness of the transparent conductive layer 9 ranges from 50 Å to 500 Å, including endpoint values.

[0094] An embodiment of the present invention further provides a method for manufacturing a through-hole vertical structure LED chip, which is used to manufacture any of the above-mentioned through-hole vertical structure LED chips, and the manufacturing method comprises the following steps:

[0095] Step S01: Figure 8 As shown, a growth substrate 01 is provided.

[0096] In an embodiment of the present application, the provided growth substrate 01 may be a substrate made of sapphire or other materials, and this embodiment of the present invention does not impose any specific limitation on this.

[0097] Step S02: Figure 9 As shown, an epitaxial stack 2 is formed on one side surface of a growth substrate 01 , and the epitaxial stack 2 includes a first-type semiconductor layer 21 , an active region 22 , and a second-type semiconductor layer 23 sequentially stacked along a growth direction.

[0098] In this embodiment, the specific doping types of the first-type semiconductor layer 21 and the second-type semiconductor layer 23 are not limited. The doping types of the first-type semiconductor layer 21 and the second-type semiconductor layer 23 are opposite. The first-type semiconductor layer 21 can be a P-type semiconductor layer or an N-type semiconductor layer. The materials of the N-type semiconductor layer and the P-type semiconductor layer can be GaN.

[0099] In one embodiment of the present application, the light-emitting layer provided by the embodiment of the present invention may be a multi-quantum well layer.

[0100] Step S03: Figure 10 As shown, etching is performed along a portion of the upper surface of the second-type semiconductor layer 23 to expose a portion of the first-type semiconductor layer 21 to form a groove 24 .

[0101] Step S04: Figure 11 As shown, a dielectric film layer 31 is prepared to cover the exposed surface of the second-type semiconductor layer 23 , the sidewalls of the groove 24 and the bottom of the groove 24 , and the dielectric film layer is patterned to form a dielectric through hole K, which partially exposes the second-type semiconductor layer 23 .

[0102] The dielectric film layer 31 in this embodiment is made of an insulating material. Optionally, in this embodiment, the dielectric film layer 31 is made of an insulating material with a low refractive index, including but not limited to a stack of one or more of SiO 2 and MgF 2 .

[0103] In one embodiment of the present application, the thickness of the dielectric film layer 31 ranges from 1000 Å to 6000 Å, including end points.

[0104] Step S05: Figure 12 As shown, a patterned adhesion structure 4 is prepared on the surface of the dielectric film layer 31 .

[0105] In one embodiment of the present application, the vertical projection of the adhesion structure 4 on the conductive substrate 1 is located within the vertical projection range of the dielectric film layer 31 on the conductive substrate 1 .

[0106] In one embodiment of the present application, step S05 specifically includes the following steps:

[0107] Step S05.1: Figure 13 As shown, a photoresist 02 is coated on the upper surface of the dielectric film layer 31, and the photoresist 02 in the preset area of ​​the adhesion structure is removed by exposure and development processes to expose the dielectric film layer 31 at the corresponding position;

[0108] Step S05.2: Figure 14 As shown, an adhesion structure 4 is prepared on the exposed dielectric film layer 31 by evaporation or sputtering process;

[0109] Step S05.3, reference Figure 12 As shown, the photoresist 02 and the adhesion structure 4 on the surface area of ​​the photoresist 02 are removed.

[0110] Step S06: Figure 15 As shown, a metal reflective layer 32 is prepared to cover a portion of the adhesion structure 4 and to cover the exposed second-type semiconductor layer 23 through the dielectric through hole K. The dielectric film layer 31 and the metal reflective layer 32 constitute a reflective structure 3 .

[0111] In one embodiment of the present application, the metal reflective layer 32 may be formed by first performing coating, exposure, and development, and then adopting an evaporation or sputtering process.

[0112] In one embodiment of the present application, the metal reflective layer 32 is made of a metal material with high reflectivity, including but not limited to a stack of one or more of gold, silver, aluminum, magnesium, nickel, titanium, and ITO.

[0113] Step S07: Figure 16 As shown, the ohmic contact layer 5 is formed to cover the exposed surface of the metal reflective layer 32 and the adhesive structure 4 and extend to a portion of the surface of the dielectric film layer 31 .

[0114] In one embodiment of the present application, the ohmic contact layer 5 includes but is not limited to a stack of one or more of chromium, titanium, nickel, and gold.

[0115] Step S08: Figure 17 As shown, an insulating layer 6 is prepared to cover the exposed surface of the ohmic contact layer 5 , and the insulating layer 6 is bonded to the dielectric film layer 31 . The insulating layer 6 is patterned to form a first through hole T at the bottom of the exposed groove 24 .

[0116] Step S09: Figure 18 As shown, a metal bonding layer 7 is evaporated and stacked on a surface of the insulating layer 6 facing away from the epitaxial stack 2 , and is electrically connected to the first-type semiconductor layer 21 through a first through hole T.

[0117] In one embodiment of the present application, the metal bonding layer 7 includes but is not limited to one or more alloys of nickel, tin, gold, and indium.

[0118] Step S10: Figure 19 As shown, the chip structure formed in step S09 is fixed to the conductive substrate 1 through a bonding process, and the conductive substrate 1 is formed on a surface of the metal bonding layer 7 facing away from the epitaxial stack 2 .

[0119] Step S11: Figure 20 As shown, the growth substrate 01 is peeled off to expose the first-type semiconductor layer 21 .

[0120] Step S12: Figure 21 As shown, a portion of the epitaxial stack 2 is etched to form an opening for external electrical connection by exposing a portion of the surface of the ohmic contact layer 5 .

[0121] In another embodiment of the present application, reference Figure 1 As shown, a passivation layer 8 is also included. The passivation layer 8 covers the exposed surface of the first-type semiconductor layer 21 and extends to the sidewall of the epitaxial stack 2 to connect with the dielectric film layer 31 .

[0122] In another embodiment of the present application, reference Figure 2 As shown, the adhesion structure 4 includes a first adhesion structure 41 and a second adhesion structure 42 . The first adhesion structure 41 is arranged in the edge area between the dielectric film layer 31 and the metal reflective layer 32 , and the second adhesion structure 42 is arranged in the middle area between the dielectric film layer 31 and the metal reflective layer 32 .

[0123] In another embodiment of the present application, the first adhesive structure 41 is disposed around the second adhesive structure 42 .

[0124] It should be noted that the specific number, distribution and shape of the first adhesive structure 41 and the second adhesive structure 42 are not limited in this embodiment and can be selected according to needs as long as they ensure the light emitting effect and the adhesion effect. Figure 3 As shown, the first adhesive structure 41 includes a discontinuous structure, or a reference Figure 4 As shown, the first adhesive structure 41 includes a continuous structure. Optionally, in one embodiment of the present application, the second adhesive structure 42 includes a dot-shaped structure, a strip-shaped structure, or a mesh-shaped structure.

[0125] Optionally, in this embodiment, the shape of the second adhesive structure 42 includes but is not limited to one or more of a cylinder, a cube, a cuboid, and a trapezoid.

[0126] In another embodiment of the present application, reference Figure 2 As shown, the metal reflective layer 32 exposes a portion of the first adhesive structure 41 and covers the second adhesive structure 42 .

[0127] In another embodiment of the present application, the second adhesive structure 42 is evenly distributed in the middle area between the dielectric film layer 31 and the metal reflective layer 32, and the light emitting area of ​​the epitaxial stack 2 is M1, the total area of ​​the vertical projection of the reflective structure 3 on the plane where the conductive substrate 1 is located is M2, and the total area of ​​the vertical projection of the second adhesive structure 42 on the plane where the conductive substrate 1 is located is M3. Then, 4 / 5M1 <M2<M1,1 / 2M2<M3<M2。

[0128] In another embodiment of the present application, reference Figure 5 As shown, the metal reflective layer 32 includes a metal opening J, the metal opening J exposes the second adhesive structure 42, the ohmic contact layer 5 is connected to the second adhesive structure 42 through the metal opening J, and the second adhesive structure 42 includes a reflective structure.

[0129] Optionally, in this embodiment, refer to Figure 5 As shown, the metal reflective layer 32 covers the first adhesive structure 41 and exposes a portion of the second adhesive structure 42;

[0130] Or, refer to Figure 6 As shown, the metal reflective layer 32 exposes a portion of the first adhesive structure 41 and a portion of the second adhesive structure 42 .

[0131] It should be noted that, in this embodiment, several configurations of the first adhesive structure 41 and the second adhesive structure 42 can be selected according to actual needs; wherein, the metal reflective layer 32 exposes a portion of the first adhesive structure 41 so that the first adhesive structure 41 is connected to the dielectric film layer 31, the metal reflective layer 32, and the ohmic contact layer 5; and the metal reflective layer 32 exposes a portion of the second adhesive structure 42 so that the second adhesive structure 42 is connected to the dielectric film layer 31, the metal reflective layer 32, and the ohmic contact layer 5.

[0132] In another embodiment of the present application, the second adhesion structure 42 includes a first adhesion sublayer, an intermediate layer and a second adhesion sublayer stacked in sequence along a direction away from the epitaxial stack 2, and the thickness of the first adhesion sublayer is less than the thickness of the second adhesion sublayer, wherein the first adhesion sublayer and the second adhesion sublayer both include but are not limited to one or more of ITO, IZO, Al2O3, TiO2, In2O3, SnO2, and the intermediate layer is a metal material with high reflectivity, including but not limited to one or more of Ag, Al, Au, and Rh.

[0133] It should be noted that the first adhesion sublayer in this embodiment is close to the epitaxial stack, and its thickness is set to be smaller to reduce light absorption. The middle layer is a metal material with high reflectivity that can reflect light to the light-emitting side, and is combined with a thicker second adhesion sublayer to increase the adhesion effect.

[0134] In another embodiment of the present application, the thickness range of the starting layer is 20A-200A, including the endpoint values; the thickness range of the middle layer is 800A-2000A, including the endpoint values; and the thickness range of the ending layer is 20A-2000A, including the endpoint values.

[0135] In another embodiment of the present application, the first adhesion structure 41 includes but is not limited to a stack of one or more of ITO, IZO, Al 2 O 3 , TiO 2 , In 2 O 3 , and SnO 2 .

[0136] In another embodiment of the present application, a surface of the dielectric film layer 31 facing away from the second-type semiconductor layer 23 is designated A, a surface of the ohmic contact layer 5 facing away from the second-type semiconductor layer 23 is designated B, a surface of the first adhesive structure 41 facing away from the dielectric film layer is designated C1, and a surface of the second adhesive structure 42 facing away from the dielectric film layer is designated C2.

[0137] Then, the horizontal planes of C1 and C2 are between A and B, wherein C1 and C2 are at the same horizontal plane, or C1 and C2 are not at the same horizontal plane.

[0138] In another embodiment of the present application, reference Figure 7As shown, in order to improve the current spreading effect of the LED chip, a transparent conductive layer 9 is further included. The transparent conductive layer 9 is disposed on a portion of the surface of the second-type semiconductor layer 23 away from the active area 22 .

[0139] Optionally, in this embodiment, the metal reflective layer 32 is electrically connected to the transparent conductive layer 9 through the transparent conductive layer 9 .

[0140] Optionally, in this embodiment, the thickness of the transparent conductive layer 9 ranges from 50 Å to 500 Å, including endpoint values.

[0141] In summary, through the above technical solution, the following effects are achieved:

[0142] 1. This embodiment provides a through-hole vertical structure LED chip. A metal bonding layer, an insulating layer, an ohmic contact layer, a reflective structure, and an epitaxial stack are disposed on one side of a conductive substrate. The reflective structure includes a dielectric film layer and a metal reflective layer. A patterned adhesive structure is provided on the surface of the dielectric film layer facing away from the epitaxial stack. The adhesive structure is also connected to the metal reflective layer and the ohmic contact layer. The patterned adhesive structure improves the adhesion between the dielectric film layer, the metal reflective layer, and the ohmic contact layer without affecting light extraction. The ohmic contact layer covers the exposed surface of the metal reflective layer and extends to a portion of the surface of the dielectric film layer, further improving the adhesion between the dielectric film layer, the metal reflective layer, and the ohmic contact layer. This prevents stress release during laser lift-off of the growth substrate or other processes due to poor adhesion between the metal reflector and the dielectric film layer, which can cause cracks between the metal reflector and the dielectric layer and lead to epitaxial shedding. This improves the chip's reliability and stability, thereby increasing the yield of the LED chip.

[0143] 2. Furthermore, an adhesion structure is provided including a first adhesion structure and a second adhesion structure. The first adhesion structure is provided in the edge region between the dielectric film layer and the metal reflective layer, and the second adhesion structure is provided in the middle region between the dielectric film layer and the metal reflective layer. The first adhesion structure is located in the edge region between the dielectric film layer and the metal reflective layer, which is more likely to fall off. The middle region between the dielectric film layer and the metal reflective layer is reinforced in combination with the second adhesion structure, which can further improve the adhesion between the dielectric film layer, the metal reflective layer and the ohmic contact layer.

[0144] 3. Further, by arranging the second adhesion structure to be uniformly distributed in the middle area between the dielectric film layer and the metal reflection layer, and the light-emitting area of the epitaxial stack is M1, the total area of the vertical projection of the reflection structure on the plane where the conductive substrate is located is M2, and the total area of the vertical projection of the second adhesion structure on the plane where the conductive substrate is located is M3, then, 4 / 5M1 < M2 < M1, 1 / 2M2 < M3 < M2. By setting the area relationship of the epitaxial stack, the reflection structure and the second adhesion structure, the second adhesion structure can not only have an adhesion effect, but also ensure the light-emitting brightness of the LED chip.

[0145] 4. Further, by arranging the metal reflection layer to include metal openings, the metal openings expose the second adhesion structure, and the ohmic contact layer is connected to the second adhesion structure through the metal openings, the contact surface between the ohmic contact layer and the second adhesion layer can be increased to improve the adhesion, and the second adhesion structure includes a reflection structure, which not only avoids the second adhesion structure from absorbing light, but also reflects the light emitted to the second adhesion structure to the light-emitting side, improving the reflectivity.

[0146] 6. The manufacturing method of a through-hole type vertical structure LED chip provided in this embodiment, while achieving the beneficial effects of the above-mentioned LED chip, has a simple and convenient process and is convenient for industrial production.

[0147] Those skilled in the art should understand that in the disclosure of the present invention, the orientation or positional relationship indicated by the terms "lateral", "longitudinal", "upper", "lower", etc. is based on the orientation or positional relationship shown in the drawings. It is only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation. Therefore, the above terms should not be construed as limiting the present invention.

[0148] It should be noted that each embodiment in this specification is described in a progressive manner, and the key point of each embodiment is the difference from other embodiments. The same or similar parts among the embodiments can be referred to each other.

[0149] The above description of the disclosed embodiments enables those skilled in the art to implement or use the present invention. Various modifications to these embodiments will be obvious to those skilled in the art, and the general principles defined herein can be implemented in other embodiments without departing from the spirit or scope of the present invention. Therefore, the present invention will not be limited to the embodiments shown herein, but will be accorded the widest scope consistent with the principles and novel features disclosed herein.

Claims

1. A through-hole vertical structure LED chip, characterized in that: include: Conductive substrate; a metal bonding layer, an insulating layer, an ohmic contact layer, a reflective structure, and an epitaxial stack disposed on one side of the conductive substrate; wherein the epitaxial stack comprises at least a second-type semiconductor layer, an active region, and a first-type semiconductor layer stacked in sequence along a first direction, and a surface of the epitaxial stack facing the conductive substrate is provided with a groove extending toward the first-type semiconductor layer and exposing a portion of the surface of the first-type semiconductor layer, and the first direction is perpendicular to the conductive substrate and points from the conductive substrate to the epitaxial stack; The reflective structure includes a dielectric film layer and a metal reflective layer, wherein the dielectric film layer is disposed on a surface of the second-type semiconductor layer facing away from the active region and extends to a sidewall of the groove, and the dielectric film layer includes a dielectric through hole, wherein the dielectric through hole exposes the second-type semiconductor layer; the metal reflective layer is disposed on a surface of the dielectric film layer facing away from the epitaxial stack and is electrically connected to the second-type semiconductor layer through the dielectric through hole; The ohmic contact layer covers the exposed surface of the metal reflective layer and extends to a portion of the surface of the dielectric film layer, and the side of the ohmic contact layer facing the epitaxial stack has an exposed surface for external electrical connection; A patterned adhesion structure is provided on a surface of the dielectric film layer on a side facing away from the epitaxial stack, and the adhesion structure is also connected to the metal reflective layer and the ohmic contact layer; The adhesive structure includes a first adhesive structure and a second adhesive structure, wherein the first adhesive structure is arranged in an edge region between the dielectric film layer and the metal reflective layer, and the second adhesive structure is arranged in an intermediate region between the dielectric film layer and the metal reflective layer; The metal reflective layer includes a metal opening, the metal opening exposes the second adhesion structure, the ohmic contact layer is connected to the second adhesion structure through the metal opening, and the second adhesion structure includes a reflective structure; The second adhesion structure includes a first adhesion sublayer, an intermediate layer, and a second adhesion sublayer stacked in sequence in a direction away from the epitaxial stack, wherein the intermediate layer is made of a metal material with high reflectivity, including one or more of Ag, Al, Au, and Rh; The insulating layer covers the exposed surface of the ohmic contact layer facing the conductive substrate, and the insulating layer is bonded to the dielectric film layer, and exposes the bottom of the groove to form a first through hole; The metal bonding layer is stacked on a side surface of the insulating layer away from the epitaxial stack and is electrically connected to the first type semiconductor layer through the first through hole, and the conductive substrate is stacked on a side surface of the metal bonding layer away from the epitaxial stack.

2. The through-hole vertical structure LED chip according to claim 1, characterized in that: The second adhesive structure is evenly distributed in the middle area between the dielectric film layer and the metal reflective layer, and the light-emitting area of ​​the epitaxial stack is M1, the total area of ​​the vertical projection of the reflective structure on the plane where the conductive substrate is located is M2, and the total area of ​​the vertical projection of the second adhesive structure on the plane where the conductive substrate is located is M3, then, 4 / 5M1 <M2<M1,1 / 2M2<M3<M2。 3. The through-hole vertical structure LED chip according to claim 1, characterized in that: The thickness of the first adhesion sublayer is less than that of the second adhesion sublayer, wherein both the first adhesion sublayer and the second adhesion sublayer include one or more of ITO, IZO, Al2O3, TiO2, In2O3, and SnO2.

4. The through-hole vertical structure LED chip according to claim 1, characterized in that: The surface of the dielectric film layer facing away from the second-type semiconductor layer is A, the surface of the ohmic contact layer facing away from the second-type semiconductor layer is B, the surface of the first adhesive structure facing away from the dielectric film layer is C1, and the surface of the second adhesive structure facing away from the dielectric film layer is C2; Then, the horizontal planes of C1 and C2 are between A and B, wherein C1 and C2 are at the same horizontal plane, or C1 and C2 are not at the same horizontal plane.

5. A method for manufacturing a through-hole vertical structure LED chip, characterized in that: The production method comprises the following steps: Step S01, providing a growth substrate; Step S02: forming an epitaxial stack on one side surface of the growth substrate, wherein the epitaxial stack includes a first-type semiconductor layer, an active region, and a second-type semiconductor layer sequentially stacked along a growth direction; Step S03: etching along a portion of the upper surface of the second-type semiconductor layer to expose a portion of the first-type semiconductor layer to form a groove; Step S04: preparing a dielectric film layer to cover the exposed surface of the second-type semiconductor layer, the sidewalls of the groove, and the bottom of the groove, and patterning the dielectric film layer to form a dielectric through hole, wherein the dielectric through hole exposes a portion of the second-type semiconductor layer; Step S05: preparing a patterned adhesion structure on the surface of the dielectric film layer; Step S06: preparing a metal reflective layer to cover a portion of the adhesion structure and to cover the exposed second-type semiconductor layer through the dielectric through-hole, wherein the dielectric film layer and the metal reflective layer constitute a reflective structure; Step S07: forming an ohmic contact layer to cover the exposed surface of the metal reflective layer and the adhesive structure, and extending to a portion of the surface of the dielectric film layer; Step S08: preparing an insulating layer to cover the exposed surface of the ohmic contact layer, bonding the insulating layer to the dielectric film layer, and patterning the insulating layer to expose the bottom of the groove to form a first through hole; Step S09, evaporating a metal bonding layer, wherein the metal bonding layer is stacked on a surface of the insulating layer facing away from the epitaxial stack and is electrically connected to the first-type semiconductor layer through the first through-hole; Step S10: fixing the chip structure formed in step S09 to a conductive substrate through a bonding process, wherein the conductive substrate is formed on a surface of the metal bonding layer that is away from the epitaxial stack; Step S11, peeling off the growth substrate to expose the first-type semiconductor layer; Step S12, etching a portion of the epitaxial stack to form an opening for external electrical connection by exposing a portion of the surface of the ohmic contact layer; The adhesive structure includes a first adhesive structure and a second adhesive structure, wherein the first adhesive structure is arranged in an edge region between the dielectric film layer and the metal reflective layer, and the second adhesive structure is arranged in an intermediate region between the dielectric film layer and the metal reflective layer; The metal reflective layer includes a metal opening, the metal opening exposes the second adhesion structure, the ohmic contact layer is connected to the second adhesion structure through the metal opening, and the second adhesion structure includes a reflective structure; The second adhesion structure includes a first adhesion sublayer, an intermediate layer and a second adhesion sublayer stacked in sequence in a direction away from the epitaxial stack, wherein the intermediate layer is a metal material with high reflectivity, including one or more of Ag, Al, Au, and Rh.

6. The method for manufacturing a through-hole vertical structure LED chip according to claim 5, wherein the thickness of the first adhesive sublayer is less than the thickness of the second adhesive sublayer, wherein: The first adhesion sublayer and the second adhesion sublayer both include one or more of ITO, IZO, Al2O3, TiO2, In2O3, and SnO2.

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