Anti-crosstalk micro-display light-emitting pixel
By employing a through-groove structure and inorganic compound semiconductor materials in the luminescent pixels of a microdisplay, the optical crosstalk problem between luminescent pixels in a microdisplay is solved, improving display quality and reliability, and meeting the fabrication requirements of small-sized pixels.
Patent Information
- Application Number
- CN202422668572.9
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Priority Date
- 2023-12-29
- Filing Date
- 2024-11-01
- Publication Date
- 2025-11-07
- Estimated Expiration
- 2034-11-01
AI Technical Summary
In existing technologies, crosstalk between light-emitting pixels and light emission distribution issues in microdisplays lead to a decrease in display quality. Especially when pixel size is miniaturized, the black matrix and microlens solutions lack sufficient temperature resistance, mechanical strength, and reliability, and cannot effectively isolate optical crosstalk.
A through-groove structure is used to surround the light-emitting unit, filled with metal material and combined with inorganic compound semiconductor material. The light-emitting angle is customized by the depth of the trench structure, and further optical isolation is achieved with microlenses.
It achieves better optical crosstalk isolation, improves the temperature resistance and mechanical strength of microdisplay luminescent pixels, ensures reliability and mass production, and meets the needs of small-sized pixels.
Smart Images

Figure CN223528439U_ABST
Abstract
Description
[0001] The present application claims priority to the Chinese Patent Application No. 202311840767.0, filed on December 29, 2023, and entitled "Anti-crosstalk micro display light emitting pixel and manufacturing method thereof, and micro display screen", the entire contents of which are incorporated herein by reference. TECHNICAL FIELD
[0002] The utility model relates to the technical field of semiconductor, especially to an anti-crosstalk micro display light emitting pixel. BACKGROUND
[0003] In the field of semiconductor technology, crosstalk between micro display light emitting pixels and light emitting distribution have important influence on display quality and efficiency of coupling into light waveguide, such as light emitting diode (LED) chip of normal vertical structure with light emitting angle of about ±55°.
[0004] In related technologies, black matrix (BM) between pixels or micro lens (MicroLens) manufacturing technical solutions are often used to realize the constraint of crosstalk between micro display light emitting pixels and light emitting distribution. In the black matrix scheme, the black matrix is an organic material system, which has insufficient temperature resistance and mechanical strength, and has defects in reliability, and the black matrix absorbs light, which will cause overall brightness loss. In the micro lens scheme, the prepared micro lens belongs to an organic material system, which has insufficient temperature resistance and mechanical strength, and has defects in reliability, and complete optical isolation between pixels cannot be achieved, and when the pixel size continues to be miniaturized, the light emitting angle of ±55° will appear before entering the micro lens, that is, the problem of adjacent pixel crosstalk will occur.
[0005] Therefore, there is an urgent need to provide a new micro display light emitting pixel preparation scheme that can avoid the above-mentioned defects. UTILITY MODEL CONTENTS
[0006] The utility model aims at providing an anti-crosstalk micro display light emitting pixel, which realizes better optical crosstalk isolation through the through groove structure for light emitting constraint.
[0007] To achieve the above-mentioned utility model purposes, the utility model provides the following technical scheme:
[0008] On the one hand, an anti-crosstalk micro display light emitting pixel is provided, which comprises a driving backplate and a display device layer above the driving backplate, wherein the display device layer comprises a light emitting unit, an insulating layer and a groove structure.
[0009] The P-type ohmic contact layer in the light emitting unit and the driving backplate have a bonding layer therebetween;
[0010] The insulating layer fills the groove structure formed outside the light emitting unit;
[0011] The groove structure penetrates the insulating layer and surrounds the light emitting unit, the groove structure is filled with metal material, the light emitting unit is inorganic compound semiconductor, and the top height of the groove structure is not less than the top height of the light emitting unit.
[0012] In a possible implementation, a surface of an N-type ohmic contact layer in the light emitting unit is covered with a partial cathode layer, and one end of the groove structure is connected with the cathode layer.
[0013] In a possible implementation, the cathode layer is further covered on a surface of the driving back plate and a sidewall of the light emitting unit;
[0014] The bottom of the groove structure is connected with a side of the cathode layer away from the driving back plate.
[0015] In a possible implementation, a passivation layer is further covered between the cathode layer and the sidewall of the light emitting unit and the surface of the driving back plate.
[0016] In a possible implementation, the cathode layer is further covered on a side surface of the insulating layer away from the driving back plate;
[0017] One end of the groove structure is connected with a side of the cathode layer close to the driving back plate.
[0018] In a possible implementation, a passivation layer is further covered on the sidewall of the light emitting unit and the surface of the driving back plate.
[0019] In a possible implementation, the bonding layer is connected with an anode contact in the driving back plate, and the light emitting unit is connected with the anode contact in the driving back plate through the bonding layer.
[0020] In a possible implementation, the groove structures corresponding to adjacent light emitting units are connected with each other.
[0021] Or,
[0022] The groove structures corresponding to adjacent light emitting units are isolated from each other by an insulating medium.
[0023] In a possible implementation, the groove structure corresponds to a groove pattern viewed from above, and the groove pattern comprises:
[0024] One of a circle, a rectangle, a hexagon and an octagon.
[0025] In a possible implementation, the display device layer further comprises a microlens.
[0026] The microlens is arranged on the light emitting unit and the groove structure.
[0027] In a possible implementation, the metal material filled in the groove structure comprises:
[0028] Aluminum, nickel vanadium and copper deposited vertically in sequence;
[0029] Or, aluminum deposited;
[0030] Or, tungsten deposited.
[0031] Compared with the prior art, the utility model has the following beneficial effects:
[0032] By etching the groove structure in the display module of the micro display light emitting pixel and filling the metal material in the groove structure, better optical crosstalk isolation is realized through the through groove structure, the light emitting angle can be constrained through the depth of the groove structure, and the design process of the groove structure is relatively mature, and the yield is guaranteed.
[0033] Further, the light emitting unit and the groove structure in the display module belong to an inorganic material system, have good temperature resistance and mechanical strength, and have guaranteed reliability.
[0034] Further, the back groove structure design idea, the back groove structure design idea and the front and back groove structure combination design idea are provided, and different schemes can be freely selected according to needs. BRIEF DESCRIPTION OF DRAWINGS
[0035] Figure 1 is a schematic diagram of the optical crosstalk phenomenon corresponding to the related art;
[0036] Figure 2 is a structural schematic diagram of a micro display light emitting pixel provided in the embodiment of the application;
[0037] Figure 3 is a structural schematic diagram of a micro display light emitting pixel provided in the embodiment of the application;
[0038] Figure 4 is a structural schematic diagram of a micro display light emitting pixel provided in the embodiment of the application;
[0039] Figure 5 is a structural schematic diagram of a micro display light emitting pixel provided in the embodiment of the application;
[0040] Figure 6 is a circuit schematic diagram of a driving circuit provided in the embodiment of the application;
[0041] Figure 7 is a schematic diagram of the optical crosstalk phenomenon corresponding to the embodiment of the application;
[0042] Figure 8 is a structural schematic diagram of a micro-display light-emitting pixel with a microlens provided in an embodiment of the present application;
[0043] Figure 9 is a structural schematic diagram of a micro-display light-emitting pixel with a microlens provided in an embodiment of the present application;
[0044] Figure 10 is a schematic diagram of a groove pattern provided in an embodiment of the present application;
[0045] Figure 11 is a schematic diagram of light emission constraint provided in an embodiment of the present application;
[0046] Figure 12 is a schematic diagram of light emission constraint provided in an embodiment of the present application;
[0047] Figure 13 is a method flowchart of a preparation method of a micro-display light-emitting pixel provided in an embodiment of the present application;
[0048] Figure 14 is a structural schematic diagram of a drive backplate provided in an embodiment of the present application;
[0049] Figure 15 is a structural schematic diagram of an inorganic compound semiconductor provided in an embodiment of the present application;
[0050] Figure 16 is a structural schematic diagram of an inorganic compound semiconductor with a bonding layer prepared provided in an embodiment of the present application;
[0051] Figure 17 is a structural schematic diagram of a drive backplate with a bonding layer prepared provided in an embodiment of the present application;
[0052] Figure 18 is a structural schematic diagram of an inorganic compound semiconductor combined with a drive backplate provided in an embodiment of the present application;
[0053] Figure 19 is a structural schematic diagram of a bonding structure after step etching provided in an embodiment of the present application;
[0054] Figure 20 is a structural schematic diagram of a light-emitting unit covered with a passivation layer and a cathode layer provided in an embodiment of the present application;
[0055] Figure 21 is a structural schematic diagram of a bonding structure after step filling provided in an embodiment of the present application;
[0056] Figure 22Fig. 3 is a structural schematic diagram of a bonding structure after groove structure preparation according to an embodiment of the present application;
[0057] Figure 23 Fig. 4 is a structural schematic diagram of a bonding structure after step filling according to an embodiment of the present application;
[0058] Figure 24 Fig. 3 is a structural schematic diagram of a bonding structure after groove structure preparation according to an embodiment of the present application.
[0059] Reference signs:
[0060] 10 - driving back plate, 11 - anode contact, 20 - display module, 23 - display device layer, 32 - light emitting unit, 321 - P-type ohmic contact layer, 322 - bonding layer, 323 - N-type ohmic contact layer, 324 - substrate, 325 - active quantum well layer, 43 - groove structure, 50 - microlens, 63 - insulating layer, 70 - cathode layer, 80 - passivation layer. DETAILED DESCRIPTION
[0061] In order to make the purpose, technical scheme and advantages of the present application more clear, the technical scheme in the embodiments of the present application will be described clearly and completely in combination with the drawings in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, but not all the embodiments. Based on the embodiments in the present application, all the other embodiments obtained by the person skilled in the art without making creative efforts are within the protection scope of the present application.
[0062] In the description of the present application, it should be understood that the terms "vertical", "upper", "lower", "top", "side", "inner", "outer" and the like indicate the orientation or positional relationship based on the orientation or positional relationship shown in the drawings, and are only for the convenience of describing the present application and simplifying the description, and do not indicate or imply that the device or element indicated must have a particular orientation, be constructed and operated in a particular orientation, and therefore cannot be understood as a limitation of the present application. In addition, the terms "first", "second" are only for the purpose of description, and cannot be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Therefore, the features limited by "first", "second" can explicitly or implicitly include one or more features. In the description of the present application, unless otherwise specified, the meaning of "a plurality of" is two or more.
[0063] In the description of the utility model, it is necessary to explain that, unless there is definite stipulation and limitation, the terms "mount", "connect", "connect" should be understood in a broad sense, for example, it can be fixed connection, can also be detachable connection, or integrally connected, can be mechanical connection, can also be electrical connection, can be directly connected, can also be indirectly connected through intermediate medium, can be the communication inside two elements. For ordinary skilled in the art, the specific meaning of the above terms in the utility model can be understood according to the specific circumstances.
[0064] The conventional anti-crosstalk design scheme of micro display light emitting pixel has many defects, such as:
[0065] For the anti-crosstalk design scheme of preparing microlens, the microlens prepared by the scheme belongs to an organic material system, and the temperature resistance and mechanical strength are not enough, and the reliability has defects, and complete optical isolation between pixels cannot be achieved, and when the pixel size continues to be micro-sized, when the light-emitting angle is ± 55°, the problem of adjacent pixel crosstalk before entering the microlens occurs. Figure 1 As an example, taking a 4um pixel size, 2um light-emitting unit GaN Micro LED vertical structure device as an example, its vertical structure has the smallest light-emitting angle ± 55° of conventional LED device, which is lower than the light-emitting angle ± 60~70° of horizontal structure and flip chip structure LED device. When the light-emitting angle is ± 55°, the optical crosstalk between adjacent pixels cannot be completely isolated, because the light emitted by the active light-emitting area will pass through the entire light-emitting unit to become a multi-surface out of the relationship, and the actual light angle will be larger than ± 55°. Figure 1 It is more complex because the light is refracted and reflected multiple times in the light-emitting unit, and the optical crosstalk between pixels will be more serious.
[0066] For the anti-crosstalk design scheme using black matrix, the black matrix is light shielding through the light absorption characteristics of black matrix material to realize the optical crosstalk isolation between pixels, and the black matrix is an organic material system, and the temperature resistance and mechanical strength are not enough, and the reliability has defects, and the black matrix absorbs light, which will cause the overall brightness loss. In some schemes, a trapezoidal structure similar to the black matrix is formed by metal patterning deposition to form a tear gold method to avoid reliability problems, but neither the black matrix nor the metal patterning tear gold scheme can adapt to very small pixel size, such as when the pixel size is less than 5um, the resolution of the black matrix and the photoresist mask peeling problem of the metal patterning tear gold scheme all bring challenges to yield and mass production capacity.
[0067] In order to avoid the above problems, in the embodiment of the application, a technical scheme for realizing better optical crosstalk isolation by penetrating groove structure for light emission constraint is proposed.
[0068] Firstly, the specific structure of the micro display light emitting pixel proposed in the application is described.
[0069] The embodiment of the present application provides a crosstalk prevention micro display light emitting pixel (hereinafter referred to as micro display light emitting pixel), as shown in the figure, the micro display light emitting pixel comprises: Figure 2 to Figure 5 As shown in the figure, the micro display light emitting pixel comprises:
[0070] The driving backboard 10, the display device layer 23 above the driving backboard 10, the display device layer 23 comprising: the light emitting unit 32, the insulating layer 63, the groove structure 43; the P-type ohmic contact layer 321 in the light emitting unit 32 and the driving backboard 10 have the bonding layer 322; the insulating layer 63 fills the outside formed in the light emitting unit 32; the groove structure 43 penetrates in the insulating layer, and surrounds the light emitting unit 32, the groove structure 43 is filled with metal material, the light emitting unit 32 is inorganic compound semiconductor, and the top height of the groove structure 43 is not less than the top height of the light emitting unit 32.
[0071] Wherein, the driving backboard 10 is one or more of thin film transistor (TFT), low temperature polysilicon (LTPS), CMOS integrated circuit, high mobility transistor (HEMT) and the like in combination. Specifically, the driving backboard 10 is provided with a driving circuit, and the driving circuit is provided with at least one anode. As shown in the figure, the circuit structure of the driving circuit is exemplified. Figure 6 It should be noted that the driving circuit in the embodiment is an active driving, and the circuit diagram shown in the embodiment is only a simple schematic diagram. The driving circuit can include an active, passive or semi-passive control circuit. All anodes included in the driving circuit can be linearly arranged or arrayed, and any anode can be located in the middle or edge of the driving backboard 10, which is not limited in the embodiment.
[0072] Wherein, the display device layer 23 is designed with a through groove structure 43, the groove structure 43 surrounds the light emitting unit 32 in the display device layer 23 and is filled with metal material, and the light emitting unit 32 is inorganic compound semiconductor, and the whole display device layer 23 is a pure inorganic structure, which has high reliability. As shown in the figure, the design of the groove structure 43 (i.e. TI structure in the figure) can constrain the light emitting angle, thereby preventing optical crosstalk between adjacent micro display light emitting pixels. Figure 7
[0073] Further, as shown in the figure, the display device layer 23 further comprises: a microlens 50; the microlens 50 is arranged on the light emitting unit 32 and the groove structure 43. The microlens 50 can be arranged on the top of the display device layer 23, the light emitting unit 32 emits light, and the light is further optically isolated by the microlens 50. Wherein, the material of the microlens 50 can be compound semiconductor, and can be dielectric material such as silicon oxide and silicon nitride deposited subsequently. Figure 8 to Figure 9 Further, as shown in the figure, the display device layer 23 further comprises: a microlens 50; the microlens 50 is arranged on the light emitting unit 32 and the groove structure 43. The microlens 50 can be arranged on the top of the display device layer 23, the light emitting unit 32 emits light, and the light is further optically isolated by the microlens 50. Wherein, the material of the microlens 50 can be compound semiconductor, and can be dielectric material such as silicon oxide and silicon nitride deposited subsequently.
[0074] Further, the light emitting unit 32 in the display device layer 23 is an inorganic compound semiconductor, usually a wafer or a region of appropriate size cut from the wafer. Taking the wafer as an example, the wafer refers to a compound formed by two or more elements in a certain atomic ratio, and has certain semiconductor properties such as a certain band gap width and energy band structure. Specifically, it can be a crystalline inorganic compound (such as a III-V group, II-VI group compound semiconductor), and then a layer for forming an electrical contact is prepared on the surface of the compound, and the compound can be stacked in any combination in the subsequent process. In the embodiment, the light emitting unit 32 involves ultraviolet light, green light, blue light AlGaN, InGaN ternary material system, and the substrate material can be GaN, Si, SiC, sapphire, etc., and long wave such as red light and infrared. The red light can be a ternary InGaN material system or a quaternary AlGaInP red light compound LED epitaxial on a GaAs substrate, and the infrared mainly includes InP, GaAs, AlGaAs, etc. In addition, the embodiment does not limit the corresponding shape of the light emitting unit 32 from the top view, which can be circular or other polygons such as rectangular, hexagonal, octagonal, etc.
[0075] In an embodiment, when the light emitting unit 32 includes a red light compound epitaxial, the red light compound epitaxial can be a quaternary AlGaInP or a ternary InGaN material, which can be based on a GaAs, Si, sapphire, Ga2O3, etc. substrate. The following Table 1 is a brief structure example, in which P-GaAs can be replaced by P-GaP and P-AlGaAs:
[0076] Table 1
[0077] Layer Name Material Layer Name Material P-type Ohmic Contact Layer P-GaAs P-type Ohmic Contact Layer P-GaN Active Quantum Well Layer AIGaInP Active Quantum Well Layer InGaN & GaN N-type Ohmic Contact Layer N-GaAs N-type Ohmic Contact Layer N-GaN Etch Stop Layer N-AIGaInP Etch Stop Layer AIN & GaN Substrate N-GaAs Substrate Si
[0078] In an embodiment, when the light emitting unit 32 includes a blue light, green light compound semiconductor, the blue light, green light compound semiconductor is a ternary InGaN compound, which can be based on a Si, sapphire, Ga2O3, etc. substrate. The structure example is as follows Table 2:
[0079] Table 2
[0080] Layer Name Material Layer Name Material P-type Ohmic Contact Layer P-GaN P-type Ohmic Contact Layer P-GaN Active Quantum Well Layer InGaN & GaN Active Quantum Well Layer InGaN & GaN N-type Ohmic Contact Layer N-GaN N-type Ohmic Contact Layer N-GaN Etch Stop Layer InGaN Etch Stop Layer AIN & GaN Substrate GaN Substrate Si
[0081] In an embodiment, when the light emitting unit 32 includes an ultraviolet light compound semiconductor, the ultraviolet light compound semiconductor is a ternary AlGaN compound, which can be based on a Si, sapphire, SiC, etc. substrate. The structure example is as follows Table 3:
[0082] Table 3
[0083] Layer Name Material Layer Name Material P-type Ohmic Contact Layer P-GaN P-type Ohmic Contact Layer P-GaN Active Quantum Well Layer AIGaN & InGaN Active Quantum Well Layer AIGaN & InGaN N-type Ohmic Contact Layer N-GaN N-type Ohmic Contact Layer N-GaN Buffer Layer AIN & AIGaN Buffer Layer AIN & GaN Substrate Si Substrate Sapphire
[0084] In one embodiment, when the light emitting unit 32 comprises an infrared compound semiconductor, the infrared compound semiconductor is an AlGaAs ternary compound, which can be based on a GaAs, InP, or the like substrate, and the structure thereof is shown in Table 4 below:
[0085] Table 4
[0086] Layer Name Material Layer Name Material P-type Ohmic Contact Layer P-GaAs P-type Ohmic Contact Layer P-AIGaAs Active Quantum Well Layer AIGaAs & GaAs Active Quantum Well Layer AIGaAs & GaAs N-type Ohmic Contact Layer N-GaAs N-type Ohmic Contact Layer N-AIGaAs Etch Stop Layer AIGaInP Etch Stop Layer AIGaInP Substrate GaAs Substrate GaAs
[0087] As shown in Tables 1 to 4 above, by selecting different compound materials to prepare the device, light emitting devices of different wavelengths can be obtained, and according to different compound characteristics, different materials can be selected as the P-type and N-type ohmic contact layer materials. For example, the P-type ohmic contact layer can be an ITO transparent conductive thin film, and the N-type ohmic contact layer can be a metal In+ITO transparent conductive thin film, which can be used as a general ohmic contact material. In particular, the P-type ohmic contact layer of GaN can be a single layer or a stack of Ni, Au, Ag, Al, or the like metal, and the N-type ohmic contact layer can be a single layer or a stack of Ti, Cr, Ni, Al, or the like metal. The P-type ohmic contact layer of GaAs can be a single layer, an alloy, or a stack of Au, Be, Zn, or the like metal, and the N-type ohmic contact layer can be a single layer, an alloy, or a stack of Au, Ge, Ni, Pt, In, or the like metal.
[0088] Further, the metal material filled in the trench structure 43 comprises: aluminum (Al), nickel vanadium (NiV), and copper (Cu) deposited vertically in sequence; or aluminum deposited; or tungsten (W) deposited. In the trench structure 43, the metal material filled therein can be seed layer Al, NiV deposited by plasma vapor deposition, followed by electroplating Cu, wherein Al can serve as a reflective metal to improve brightness, and Al can also serve as the N-type ohmic contact metal of the N-type ohmic contact layer to realize N connection, NiV serves as an adhesion layer and a barrier layer for adhering Al and Cu and blocking migration of Al, and Cu is used for electroplating. Further, NiV can be replaced by any one of Ni, Ti, and TiN; the metal material can also be a metal such as Al or W deposited by plasma vapor deposition at room temperature or thermal deposition. Further, TIN metal deposition can be performed before Al or W deposition.
[0089] Further, the corresponding trench pattern in the plan view of the trench structure 43 comprises one of a circle, a rectangle, a hexagon, and an octagon. In the plan view of the micro display light emitting pixel, the trench pattern surrounding the light emitting unit can be a circle, a rectangle, a hexagon, an octagon, or the like, which is not limited in the present embodiment.
[0090] Further, the groove structures 43 corresponding to the adjacent light emitting units are connected to each other; or, the groove structures 43 corresponding to the adjacent light emitting units are isolated from each other by the insulating medium. The groove structure 43 can realize the pattern as shown in Figure 10 connecting the pixels, or realize the pattern as shown in Figure 10 inside the pixel, Figure 10 which are only exemplarily described taking the circular and rectangular groove patterns as examples.
[0091] In the structure design corresponding to the preparation process, the display device layer 23 is combined with the driving back plate 10, and then the groove structure 43 is prepared in the display device layer 23.
[0092] The bonding layer 322 can be a single layer or multiple layers of opaque metal materials such as Au, Sn, Al, Cu, W, etc., or transparent metal oxide materials such as ITO, ZnO, etc.
[0093] Further, the bonding layer 322 is connected to the anode contact in the driving back plate 10, and the light emitting unit 32 is connected to the anode contact in the driving back plate 10 through the bonding layer 322.
[0094] The insulating layer 63 can be a single layer or a stack of dielectric layers such as silicon oxide, silicon nitride, SIC, SICN, Ti3O5, Ni2O5, etc. It can be understood that the thickness of the insulating layer 63 and the depth of the groove structure 43 are greater than or equal to the thickness of the light emitting unit 32, and the depth of the groove structure 43 can be set to any value greater than or equal to the thickness of the light emitting unit 32. For example, based on the structure as shown in Figure 2 , when the depth of the groove structure 43 is equal to the height of the light emitting unit 32, as shown in Figure 11 , the light emitting angle is reduced from the initial ±55° to ±45°; based on the structure as shown in Figure 3 , when the depth of the groove structure 43 is 2 times the height of the second light emitting unit 32 or more, as shown in Figure 12 , the light emitting angle is reduced from the initial ±55° to ±17°.
[0095] The surface of the N-type ohmic contact layer 323 in the light emitting unit 32 is covered with part of the cathode layer 70, and one end of the groove structure 43 is connected to the cathode layer 70.
[0096] In one possible design, as shown in Figure 2 , Figure 3As shown, the cathode layer 70 is also disposed on the sidewall of the light emitting unit 32 and the surface of the driving back plate 10; the bottom of the groove structure 43 is connected with the side of the cathode layer 70 away from the driving back plate 10. The cathode layer 70 disposed on the surface of the insulating layer 63 and the cathode layer 70 disposed on the surface of the N-type ohmic contact layer 323 are connected in common.
[0097] Further, as shown in Figure 2 , Figure 3 , the sidewall of the light emitting unit 32 and the surface of the driving back plate 10 are disposed with a passivation layer 80. The passivation layer 80 can be a single layer or a stack of layers of dielectric layers such as Al2O3, SiO2, Si3N4, etc. The passivation layer 80 insulates and protects the light emitting unit 32 and the driving back plate 10, and the cathode layer disposed on the sidewall of the passivation layer 80 and the cathode layer disposed on the surface of the N-type ohmic contact layer 323 are connected in common.
[0098] In another possible design, as shown in Figure 4 , Figure 5 , the cathode layer 70 is also disposed on the side surface of the insulating layer 63 away from the driving back plate 10; one end of the groove structure 43 is connected with the side of the cathode layer 70 close to the driving back plate 10. The cathode layer 70 disposed on the surface of the insulating layer 63 and the cathode layer 70 disposed on the surface of the N-type ohmic contact layer 323 are connected in common.
[0099] Further, as shown in Figure 5 , in the case where part of the cathode layer 70 is disposed on the side surface of the insulating layer 63 away from the driving back plate 10, the sidewall of the light emitting unit 32 and the surface of the driving back plate 10 are also disposed with a passivation layer 80. The passivation layer 80 can be a single layer or a stack of layers of dielectric layers such as Al2O3, SiO2, Si3N4, etc. That is, the insulating layer 63 can be directly connected to the surface of the driving back plate 10 as shown in Figure 4 , without a passivation layer 80 between the insulating layer 63 and the driving back plate 10, and the dielectric layer on the driving back plate 10 is used to withstand over-etching; or a passivation layer 80 can be provided between the insulating layer 63 and the driving back plate 10 as shown in Figure 5 , and the passivation layer 80 is used as an etching stop layer to insulate and protect the light emitting unit 32 and the driving back plate 10.
[0100] Further, a microlens 50 can be provided on the display device layer 23. For example, the structure shown in Figure 8 corresponds to adding a microlens 50 on the structure shown in Figure 3 , Figure 9 corresponds to adding a microlens 50 on the structure shown in Figure 5 .
[0101] In summary, the micro display light emitting pixel provided by the embodiment of the application can realize better optical crosstalk isolation through the through-type groove structure, can constrain the light emitting angle through the depth of the groove structure, and the design process of the groove structure is relatively mature, and the mass production and yield are guaranteed.
[0102] Further, the light emitting unit and the groove structure in the display module belong to an inorganic material system, have good temperature resistance and mechanical strength, and have guaranteed reliability.
[0103] Next, the preparation method of the micro display light emitting pixel described in the above embodiment is described. The method is used for preparing the micro display light emitting pixel described in the above embodiment. As shown in the method can include the following steps: Figure 13
[0104] S1: preparing a driving back plate.
[0105] Exemplarily, the cross-sectional structure of the single pixel of the driving back plate is as shown in the figure. The driving back plate 10 includes a through-type anode contact 11, and an insulating medium is arranged around the anode contact 11. Figure 14
[0106] S2: preparing a display device layer combined on the driving back plate. The display device layer includes a light emitting unit and a groove structure. The light emitting unit is in conduction with the anode contact in the driving back plate. The groove structure surrounds the light emitting unit and penetrates the vertical area where the display device layer is located. The groove structure is filled with a metal material. The light emitting unit is an inorganic compound semiconductor.
[0107] Exemplarily, the cross-sectional structure of the inorganic compound semiconductor is as shown in the figure. The inorganic compound semiconductor includes at least the following layers stacked from bottom to top: a substrate 324, an N-type ohmic contact layer 323, an active quantum well layer 325, and a P-type ohmic contact layer 321. Figure 15
[0108] In a possible implementation, after S2, the method further includes the following step: preparing a microlens on the light emitting unit and the groove structure. The microlens can be prepared by etching, and the microlens material can be a compound semiconductor or a dielectric material such as silicon oxide and silicon nitride deposited subsequently.
[0109] For the back groove structure design idea in the above embodiment, S2 can specifically include the following steps:
[0110] S221: combining the inorganic compound semiconductor prepared with the bonding layer and the driving back plate prepared with the bonding layer through a hybrid bonding process. When combined, the inorganic compound semiconductor is in conduction with the anode contact in the driving back plate through the bonding layer.
[0111] Specifically, as shown in Figure 16 , Figure 17 , a bonding layer 322 is prepared on the inorganic compound semiconductor, and also on the driving backplane 10, and the combined structure is as shown in Figure 18 . The bonding layer 322 is conductive, and can be opaque metal materials such as single or multiple layers of Au, Sn, Al, Cu, W, etc., or transparent metal oxide materials such as ITO, ZnO, etc. Further, Cr, Ni, Ti, TiN, etc. can be used as an adhesion layer between the inorganic compound semiconductor / driving backplane and the bonding layer 322 to increase adhesion between the two. Further, as shown in Figure 18 , after the inorganic compound semiconductor is integrated with the driving backplane 10 through the bonding process, the substrate of the inorganic compound semiconductor can be removed for subsequent device preparation.
[0112] S222: Step etching is performed on the inorganic compound semiconductor and the bonding layer to prepare a light emitting unit.
[0113] Specifically, as shown in Figure 19 , a patterned etching scheme such as plasma dry etching is used for step etching to complete the preparation of the light emitting unit 32 and the patterning of the bonding layer 322.
[0114] S223a: A passivation layer is coated on the surface of the light emitting unit and the surface of the driving backplane; a portion of the passivation layer on the top surface of the light emitting unit is removed using a patterning process to expose the N-type ohmic contact layer in the light emitting unit; a cathode layer is coated on the surface of the N-type ohmic contact layer and the surface of the passivation layer; an insulating material is used to step fill the light emitting unit to form an insulating layer; the insulating layer is etched to form a trench structure around the light emitting unit; and a metal material is used to fill the trench structure.
[0115] In step S223a, the common cathode is connected before the trench process. The micro display light emitting pixel prepared through this step is as shown in Figure 2 , Figure 3 . Specifically, after passivation and patterning opening, the N-type ohmic contact layer in the light emitting unit is exposed for contact preparation, and then the cathode layer is prepared. The structure after the preparation of the cathode layer is as shown in Figure 20As shown, the cathode layer 70 is connected to the transparent conductive film in common cathode, which can be a single layer or multiple layers of transparent conductive film such as ITO, ZnO, etc., and in some embodiments, the transparent conductive film can be doped with metals such as Au, Ag, Al, etc. to optimize the resistance and transmittance of the transparent conductive film. Then, by further growing a medium layer, using plasma deposition process such as silicon glass, etc., an insulating layer is prepared, which is planarized and then etched to form a trench structure, and after etching, metal filling is performed, such as: sequentially depositing metal Al, NiV, Cu in the trench structure; or, depositing metal Al in the trench structure; or, depositing metal W in the trench structure. Further, after filling is completed, CMP can be used to remove excess metal on the surface of the filled metal material and planarize the surface. Further, during the trench structure preparation process, IO and the peripheral common cathode can be simultaneously filled with metal to achieve perfect function.
[0116] S223b: filling the light emitting unit with insulating material to form an insulating layer; etching the insulating layer to form a trench structure around the light emitting unit; filling the trench structure with metal material; using a patterning process to remove part of the insulating layer on the top surface of the light emitting unit to expose the N-type ohmic contact layer in the light emitting unit; and covering the surface of the N-type ohmic contact layer and the surface of the insulating layer away from the driving backplate with a cathode layer.
[0117] In step S223b, the trench process is performed before the common cathode is connected. The micro display light emitting pixel prepared by this step is as shown in Figure 4 Specifically, after the light emitting unit is prepared, an insulating layer is directly introduced, and by further growing a medium layer, using plasma deposition process such as silicon glass, etc., an insulating layer is prepared. The structure after the insulating layer is introduced is as shown in Figure 21 Then, the insulating layer is planarized and etched to form a trench structure, and the medium layer on the driving backplate is used to withstand over-etching. After etching, metal filling is performed, such as: sequentially depositing metal Al, NiV, Cu in the trench structure; or, depositing metal Al in the trench structure; or, depositing metal W in the trench structure. The structure after metal filling is completed is as shown in Figure 22 Further, after filling is completed, CMP can be used to remove excess metal on the surface of the filled metal material and planarize the surface. Then, a patterning opening is performed to expose the N-type ohmic contact layer in the light emitting unit for contact preparation, and then connect the cathode layer.
[0118] In one possible implementation, in S223b, before the light emitting unit is filled with insulating material to form an insulating layer, the following step is further included: covering a passivation layer on the surface of the light emitting unit and the surface of the driving backplate. That is, the passivation layer is used as the etching stop layer for trench preparation. The structure after step filling is as shown in Figure 23As shown, the structure after trench etching and metal filling is as shown in Figure 24 As shown, the micro display light emitting pixel made through the step is as shown in Figure 5
[0119] It can be understood that, if the above-mentioned back trench structure design idea is adopted, the advantage is that the light emitting unit has not been defined pattern during bonding, and the precision requirement is very low when combined with the driving back plate, and the depth of the trench structure can be flexibly customized by adjusting the thickness of the insulating layer.
[0120] In summary, the preparation method of the micro display light emitting pixel provided by the embodiment of the application, by etching a trench structure in the display module of the micro display light emitting pixel and filling metal material in the trench structure, through the through-type trench structure, better optical crosstalk isolation is achieved, the light emitting angle can be customized by the depth of the trench structure, and the design process of the trench structure is relatively mature, and the yield is guaranteed.
[0121] Further, the preparation method adopts a semiconductor process, which can be compatible to nanoscale work, and is more suitable for the preparation of micro pixel size.
[0122] All the optional technical solutions described above can be combined to form optional embodiments of the present application, that is, any number of embodiments can be combined to obtain the needs of different application scenarios, which are all within the protection scope of the present application, and will not be described one by one here.
[0123] It should be noted that the above-mentioned is only the preferred embodiment of the present application, and is not used to limit the present application, and any modification, equivalent replacement, improvement, etc. made within the spirit and principles of the present application shall be included in the protection scope of the present application.
Claims
1. A microdisplay light emitting pixel that is immune to cross-talk, characterized by, The micro display light emitting pixel comprises: a driving back plate, a display device layer above the driving back plate, the display device layer comprising: a light emitting unit, an insulating layer, a trench structure; The P-type ohmic contact layer in the light emitting unit and the driving back plate have a bonding layer therebetween; The insulating layer fills the space formed outside the light emitting unit; The trench structure penetrates the insulating layer and surrounds the light emitting unit, the trench structure being filled with a metal material, the light emitting unit being an inorganic compound semiconductor, the top height of the trench structure not being less than the top height of the light emitting unit.
2. The micro display light emitting pixel according to claim 1, wherein: The surface of the N-type ohmic contact layer in the light emitting unit is covered with a partial cathode layer, and one end of the trench structure is connected with the cathode layer.
3. The micro display light emitting pixel according to claim 2, wherein: The cathode layer is further covered on the sidewall of the light emitting unit and the surface of the driving back plate; The bottom of the trench structure is connected with the side of the cathode layer away from the driving back plate.
4. The micro display light emitting pixel according to claim 3, wherein: A passivation layer is further covered between the cathode layer and the sidewall of the light emitting unit and the surface of the driving back plate.
5. The micro display light emitting pixel according to claim 2, wherein: The cathode layer is further covered on the side surface of the insulating layer away from the driving back plate; One end of the trench structure is connected with the side of the cathode layer close to the driving back plate.
6. The micro display light emitting pixel according to claim 5, wherein: A passivation layer is further covered on the sidewall of the light emitting unit and the surface of the driving back plate.
7. The micro display light emitting pixel according to claim 1, wherein: The bonding layer is connected with an anode contact in the driving back plate, and the light emitting unit is in conduction with the anode contact in the driving back plate through the bonding layer.
8. The micro display light emitting pixel according to claim 1, wherein: The trench structures corresponding to adjacent light emitting units are in communication with each other; or, The trench structures corresponding to adjacent light emitting units are isolated from each other by an insulating medium. The trench structure corresponds to a trench pattern in plan view, comprising:
9. The microdisplay light emitting pixel of claim 1, wherein, One of a circle, a rectangle, a hexagon and an octagon. The display device layer further comprises: a microlens; 10. The microdisplay light emitting pixel of claim 1, wherein, The microlens is arranged above the light emitting unit and the trench structure. The metal material filled in the trench structure comprises:
11. The microdisplay light emitting pixel of claim 1, wherein, Aluminum, nickel vanadium and copper deposited vertically in sequence; Or, aluminum deposited; Or, tungsten deposited.
Citation Information
Cited By
Anti-crosstalk micro-display light-emitting pixel and manufacturing method therefor
WO2025140487A1