Method for manufacturing semiconductor structure
CN119072117BActive Publication Date: 2025-09-26CHANGXIN MEMORY TECH INC
Patent Information
- Application Number
- CN202310618975.X
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2023-05-25
- Publication Date
- 2025-09-26
- Estimated Expiration
- 2043-05-25
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Figure CN119072117B_ABST
Abstract
The present disclosure provides a method for fabricating a semiconductor structure, comprising: providing a substrate, the substrate including an active area, and having spaced bit lines formed thereon; forming a contact material layer filling between adjacent bit lines, the contact material layer covering at least a portion of the active area between the adjacent bit lines; etching away a portion of the contact material layer to form discrete contact plugs between the adjacent bit lines, the contact plugs being in contact with the active area; forming an isolation material layer filling between the adjacent contact plugs and covering the top surfaces of the contact plugs; and etching away a portion of the isolation material layer to expose the top surfaces of the contact plugs. By reducing the steps of depositing dielectric material and etching dielectric material, and changing the process sequence of the contact plugs and isolation material layer, the present disclosure reduces the consumption of the insulating sidewalls of the bit lines, reduces the risk of bit line bending, reduces the possibility of disconnection between the contact plugs and the active area, and reduces the possibility of air gaps being generated during the formation of the contact plugs.
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Citation Information
Patent Citations
Semiconductor structure, memory structure and manufacturing method thereof
CN108933136A
KR20230011204A