Method for enhancing data stability of flash memory medium and related equipment

Abstract

The embodiment of the present application provides a method for enhancing the data stability of a flash memory medium and related equipment, the method comprising obtaining an initial flash memory type of the flash memory medium and determining M data pages corresponding to the initial flash memory type; obtaining a target flash memory type of the flash memory medium and obtaining N groups of user data according to the target flash memory type; generating redundant data corresponding to the N groups of user data based on a preset operation rule; writing the N groups of user data into any N data pages respectively, and writing the redundant data into the remaining data pages of the M data pages; performing offset correction processing on 2^M initial read voltages corresponding to the initial flash memory type to obtain 2^N target read voltages, so as to read the user data in the N data pages according to the 2^N target read voltages, which can effectively increase the threshold voltage interval between different charge states, and there is no need to use a reread command to repeatedly adjust the read voltage, thereby reducing read delay and effectively improving data stability.

Description

Technical Field

[0001] The embodiments of the present application relate to the technical field of flash memory data storage, and in particular to a method for enhancing data stability of a flash memory medium and related equipment. Background Art

[0002] With the development of storage technology, Tlc (triple-layer cell) type flash memory has been widely used in the consumer electronics market due to its high density and cost advantages. However, compared with SLC (single-layer cell) and MLC (multi-layer cell) types, Tlc type flash memory is more prone to bit errors and has relatively low data stability because each storage cell needs to distinguish more charge states (8 states).

[0003] In actual use, TLC-type flash memory often faces the challenges of high and low temperature environments and long-term data preservation, which will cause the number of flash memory error bits to increase significantly. In order to cope with these challenges, the usual practice is to use the ReadRetry technology to improve the success probability of data error correction; however, the reread command will significantly increase the time of the read operation, which may cause a read timeout, and the reread command requires the setting of a suitable offset read voltage, which is usually unknown, thus affecting the effectiveness of the reread command. When the threshold voltage distribution of the flash memory cell deteriorates to a certain extent, even the reread technology cannot recover the data, which seriously affects the data stability of the flash memory. Summary of the invention

[0004] The embodiments of the present application provide a method for enhancing the data stability of a flash memory medium and related equipment, which can effectively increase the threshold voltage interval between different charge states without the need to use a reread command to repeatedly adjust the read voltage, thereby reducing read delays and effectively improving data stability.

[0005] To achieve the above-mentioned purpose, the first aspect of an embodiment of the present application provides a method for enhancing the data stability of a flash memory medium, comprising: obtaining an initial flash memory type of the flash memory medium, and determining M data pages corresponding to the initial flash memory type; obtaining a target flash memory type of the flash memory medium, and obtaining N groups of user data according to the target flash memory type; generating redundant data corresponding to the N groups of user data based on preset operation rules; writing the N groups of user data into any N of the data pages respectively, and writing the redundant data into the remaining data pages of the M data pages; performing offset correction processing on 2^M initial read voltages corresponding to the initial flash memory type to obtain 2^N target read voltages, so as to read the user data in the N data pages according to the 2^N target read voltages.

[0006] In some embodiments, the M is greater than the N, the initial flash memory type includes Tlc, and the target flash memory type includes Mlc.

[0007] In some embodiments, the step of writing the N groups of user data into any N data pages respectively, and writing the redundant data into the remaining data pages of the M data pages, includes: writing 2 groups of user data into any 2 data pages respectively, and writing the redundant data into 1 data page remaining of the 3 data pages.

[0008] In some embodiments, the step of writing two groups of user data into any two of the data pages respectively, and writing the redundant data into the remaining one of the three data pages, includes: writing two groups of user data into LSB and MSB respectively, and writing the redundant data into CSB.

[0009] In some embodiments, the offset correction processing is performed on the 2^M initial read voltages corresponding to the initial flash memory type to obtain 2^N target read voltages, including: obtaining 8 initial read voltages corresponding to the initial flash memory type: ER, A, B, C, D, E, F and G; offsetting the read voltage corresponding to the LSB to the center point of Er and B and the center point of D and F, respectively obtaining the target read voltages A and E corresponding to the LSB; offsetting the read voltage corresponding to the MSB to the center point of B and D and the outside of F, respectively obtaining the target read voltages C and G corresponding to the MSB.

[0010] In some embodiments, writing the N groups of user data into any N data pages respectively, and writing the redundant data into the remaining data pages of the M data pages, includes: within a preset data range, writing the N groups of user data into any N data pages respectively, and writing the redundant data into the remaining data pages of the M data pages; wherein the preset data range includes a single word line, an entire block, or an entire chip.

[0011] In some embodiments, the preset operation rule includes an XOR operation or an XOR operation.

[0012] A second aspect of an embodiment of the present application provides a data stability enhancement device for a flash memory medium, comprising: a type determination module, used to obtain an initial flash memory type of the flash memory medium, and determine M data pages corresponding to the initial flash memory type; a data acquisition module, used to obtain a target flash memory type of the flash memory medium, and obtain N groups of user data according to the target flash memory type; a data generation module, used to generate redundant data corresponding to the N groups of user data based on preset operation rules; a data writing module, used to write the N groups of user data into any N of the data pages respectively, and write the redundant data into the remaining data pages of the M data pages; a read voltage adjustment module, which performs offset correction processing on 2^M initial read voltages corresponding to the initial flash memory type to obtain 2^N target read voltages, so as to read the user data in the N data pages according to the 2^N target read voltages.

[0013] A third aspect of an embodiment of the present application provides a computer-readable storage medium storing computer-executable instructions, wherein the computer-executable instructions are used to execute the method for enhancing data stability of a flash memory medium as described in any one of the first aspects.

[0014] A fourth aspect of an embodiment of the present application provides a computer program product, including a computer program, which, when executed by a processor, implements the method for enhancing data stability of a flash memory medium as described in any one of the first aspects.

[0015] According to the embodiment of the present application, a method for enhancing the data stability of a flash memory medium and a related device thereof are provided, which have at least the following beneficial effects: the embodiment of the present application can obtain the initial flash memory type of the flash memory medium, and determine the M data pages corresponding to the initial flash memory type; obtain the target flash memory type of the flash memory medium, and obtain N groups of user data according to the target flash memory type; generate redundant data corresponding to the N groups of user data based on a preset operation rule; write the N groups of user data to any N data pages respectively, and write the redundant data to the remaining data pages of the M data pages; perform offset correction processing on the 2^M initial read voltages corresponding to the initial flash memory type to obtain 2^N target read voltages, so as to read N data according to the 2^N target read voltages; According to the user data in the page, it can be understood that the redundant data generated based on the preset operation rules is used to assist in verifying and recovering the user data, which essentially improves the redundancy between the threshold states of the flash memory unit, thereby improving the reliability of the flash memory unit, and by adjusting the read voltage, the present application can convert the original 8-state Tlc flash memory into 4-state Mlc flash memory, thereby improving the stability of the data. The adjusted read voltage maximizes the interval between the states. Even if the threshold voltage changes under extreme conditions, confusion between the states is not easy to occur. The threshold voltage interval between different charge states can be effectively increased, and there is no need to use a reread command to repeatedly adjust the read voltage, thereby reducing the read delay and effectively improving data stability. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] Figure 1 A flowchart of a method for enhancing data stability of a flash memory medium provided by an embodiment of the present application;

[0017] Figure 2 A flow chart of writing user data into the data page in a method for enhancing data stability of a flash memory medium provided by an embodiment of the present application;

[0018] Figure 3 Another flow chart of writing user data into the data page in the method for enhancing data stability of a flash memory medium provided by an embodiment of the present application;

[0019] Figure 4 A flow chart of obtaining a target read voltage in a method for enhancing data stability of a flash memory medium provided in an embodiment of the present application;

[0020] Figure 5 A flowchart of writing redundant data in a method for enhancing data stability of a flash memory medium provided in an embodiment of the present application;

[0021] Figure 6 A schematic diagram of a Tlc flash memory in a method for enhancing data stability of a flash memory medium provided in an embodiment of the present application;

[0022] Figure 7 A schematic diagram of converting a Tlc flash memory into an Mlc type in a method for enhancing data stability of a flash memory medium provided in an embodiment of the present application;

[0023] Figure 8 A schematic diagram of voltage offset correction in a method for enhancing data stability of a flash memory medium provided in an embodiment of the present application;

[0024] Fig. 9 A schematic diagram of the structure of an electronic device provided in one embodiment of the present application. DETAILED DESCRIPTION

[0025] In order to make the purpose, technical solution and advantages of the present application more clearly understood, the present application is further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present application and are not used to limit the present application.

[0026] In some embodiments, although the functional units are divided in the system schematic diagram and the logical order is shown in the flowchart, in some cases, the steps shown or described may be performed in a different order than the unit division in the system or the order in the flowchart. The terms first, second, etc. in the specification, claims, and the above drawings are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence.

[0027] In addition, unless otherwise clearly specified and limited, the term "connected" should be understood in a broad sense. For example, it can be a fixed connection or a movable connection, a detachable connection or a non-detachable connection, or an integral connection; it can be a mechanical connection, an electrical connection, or the two can communicate with each other; it can be a direct connection or an indirect connection through an intermediate medium.

[0028] In the description of the embodiments of the present application, the description of reference terms "one embodiment / implementation", "another embodiment / implementation" or "certain embodiments / implementations", "in the above embodiments / implementations", etc. means that the specific features, structures, materials or characteristics described in combination with the implementation or example are included in at least two embodiments or implementations disclosed in the present application. In the disclosure of this application, the schematic representation of the above terms does not necessarily refer to the same embodiment or implementation. It should be noted that although the logical order is shown in the flowchart, in some cases, the steps shown or described may be performed in an order different from that in the flowchart.

[0029] With the development of storage technology, TLC (triple-layer cell) type flash memory has been widely used in the consumer electronics market due to its high density and cost advantages. However, compared with SLC (single-layer cell) and MLC (multi-layer cell) types, TLC type flash memory is more prone to bit errors and has relatively low data stability because each storage cell needs to distinguish more charge states (8 states). In actual use, TLC type flash memory often faces the challenges of high and low temperature environments and long-term data preservation, which will cause the number of flash memory error bits to increase significantly. In order to cope with these challenges, the usual practice is to use the ReadRetry technology to increase the success probability of data error correction; however, the reread command will significantly increase the time of the read operation, which may cause a read timeout, and the reread command requires the setting of a suitable offset read voltage, which is usually unknown, so it will affect the effectiveness of the reread command. When the threshold voltage distribution of the flash memory cell deteriorates to a certain extent, even the reread technology cannot recover the data, which seriously affects the data stability of the flash memory.

[0030] Based on this, the embodiments of the present application provide a method for enhancing the data stability of a flash memory medium and related equipment, which can effectively increase the threshold voltage interval between different charge states without the need to use a reread command to repeatedly adjust the read voltage, thereby reducing read delays and effectively improving data stability.

[0031] The present application will be further described below in conjunction with the accompanying drawings.

[0032] refer to Figure 1 , Figure 1 A flowchart of a method for enhancing data stability of a flash memory medium provided by an embodiment of the present application; a first aspect of an embodiment of the present application provides a method for enhancing data stability of a flash memory medium, including but not limited to the following steps:

[0033] Step S110, obtaining an initial flash memory type of the flash memory medium, and determining M data pages corresponding to the initial flash memory type;

[0034] Step S120, obtaining a target flash memory type of the flash memory medium, and obtaining N groups of user data according to the target flash memory type;

[0035] Step S130, generating redundant data corresponding to N groups of user data based on a preset operation rule;

[0036] Step S140, writing N groups of user data into any N data pages respectively, and writing redundant data into the remaining data pages of the M data pages;

[0037] Step S150 , performing offset correction processing on 2^M initial read voltages corresponding to the initial flash memory type to obtain 2^N target read voltages, so as to read user data in N data pages according to the 2^N target read voltages.

[0038] In some embodiments, M is greater than N, the initial flash memory type includes Tlc, and the target flash memory type includes Mlc.

[0039] In some embodiments, the flash memory medium refers to a non-volatile storage device for storing data, which can retain data after power failure. The initial flash memory type refers to the current working mode or state of the flash memory medium. In this embodiment, the initial flash memory type can be Tlc (three-layer cell), that is, each storage cell can store three bits of data; the target flash memory type refers to the new working mode or state that you hope to convert to by some means. In this embodiment, the target flash memory type can be Mlc, that is, each storage cell stores two bits of data; M data pages refer to the number of storage pages contained in the Tlc flash memory. In Tlc, M=3, namely LSB (least significant bit), CSB (center significant bit) and MSB (most significant bit); N groups of user data refer to the number of data groups that need to be stored. In this embodiment, N=2, namely two groups of data, corresponding to two data pages converted from Tlc to Mlc; redundant data: additional data generated to improve data stability, generated by XOR or XOR operations; 2^M initial read voltages refer to the number of voltages required to read each data page in the original Tlc state. In Tlc, M=3, so there are 2^3=8 initial read voltages; 2^N target read voltages refer to the number of read voltages required in the converted target state. In this embodiment, N=2, so there are 2^2=4 target read voltages.

[0040] It can be understood that by reducing the states of the Tlc flash memory from 8 to 4 (from Tlc to Mlc), the threshold voltage interval between different states is increased. In this way, after experiencing some common failure scenarios, such as temperature changes or long-term data retention, the number of error bits of the data will not increase significantly, thereby improving the stability of the data; and because traditional reread technology will increase the read delay, the method of the present invention pre-adjusts the read voltage to the center of the threshold voltage interval, thereby avoiding multiple read attempts and significantly reducing the read delay.

[0041] It can be understood that the method of the present invention can not only be used for a single wordline, but also can be extended to the entire block or even the entire chip, and has high flexibility. In addition, the method can not only convert Tlc into Mlc for use, but also convert Tlc into SLC for use according to the same principle, thereby enhancing the versatility and applicability of the technical solution; the method of the present invention directly generates redundant data through mathematical operations (such as XOR operations) before data is written, and these redundant data do not need to be scrambled or LDPC / CRC encoded, thereby simplifying the processing flow and saving time.

[0042] In summary, the flash memory medium data stability enhancement method provided by the present invention can not only improve the stability of data under harsh conditions, but also effectively reduce read delay and has wide applicability.

[0043] In some embodiments, step S110 of the present application also includes a dynamic adjustment process. After obtaining the initial flash type of the flash medium and determining the M data pages corresponding to the initial flash type, the system will dynamically select the most suitable conversion type according to the health status and usage of the current flash memory. The specific steps are as follows: regularly evaluate the health status of the flash memory through the built-in flash memory status monitoring module, including indicators such as the number of erases and writes, error bit rate, etc.; analyze the current flash memory usage mode, such as read and write frequency, data type, etc.; dynamically select the most suitable conversion type according to the health status and usage, such as from TLC to MLC, from TLC to SLC, or keep TLC unchanged; according to the selected conversion type, perform corresponding data conversion and redundant data generation operations.

[0044] In some embodiments, step S130 of the present application also includes a process of optimizing a redundant data generation algorithm. When generating redundant data corresponding to N groups of user data based on preset operation rules, a more complex redundant data generation algorithm, such as Reed-Solomon encoding or BCH encoding, can be used. The specific steps are as follows: according to the importance and application scenario of the data, select a suitable encoding algorithm, such as Reed-Solomon encoding; use the selected encoding algorithm to generate redundant data to ensure that the data has a stronger error correction capability; write the generated redundant data to the remaining data pages of the M data pages and store them together with the user data; dynamically adjust the redundant data generation strategy according to the importance and frequency of use of the data, such as adding more redundant information to key data.

[0045] In some embodiments, step S150 of the present application also includes a process of intelligent read voltage adjustment: when performing offset correction processing on the 2^M initial read voltages corresponding to the initial flash memory type, the 2^M initial read voltages corresponding to the initial flash memory type can also be offset corrected to obtain 2^N target read voltages, and then the read voltage is automatically adjusted based on the machine learning algorithm using external reading software. The specific steps are as follows: collect historical read data and current environmental parameters such as temperature, humidity, etc. through external reading software, use the collected data to train the machine learning model, predict the optimal read voltage offset, and when reading data, adjust the read voltage in real time according to the prediction results of the machine learning model to achieve the optimal reading effect, and continuously optimize the machine learning model according to the accuracy of the reading results to improve the accuracy of the read voltage adjustment.

[0046] In some embodiments, in the process of reading user data in N data pages according to 2^N target read voltages, if there is a read failure, the reliability and integrity of the data can be ensured through a multi-level data recovery mechanism. The specific steps are as follows: when reading user data in N data pages according to 2^N target read voltages, if the first read fails, you can try to use a simple reread (ReadRetry) technology to adjust the read voltage to re-read the data; further, if the reread still fails, use a more complex error correction algorithm, such as BCH decoding or Reed-Solomon decoding, to try to recover the data; further, if the error correction algorithm still cannot recover the data, use redundant data for recovery to ensure the integrity and accuracy of the data; in addition, you can also predict the possible data error types and locations based on historical data, take preventive measures in advance, and reduce the frequency and time of data recovery.

[0047] In some embodiments, when N groups of user data are written to any N data pages respectively in step S130, and redundant data is written to the remaining data pages of the M data pages, multiple data pages can be written in parallel based on the N groups of user data, taking advantage of multi-threading or multi-core processors to improve the writing speed, and during the writing process, the user data is first pre-written into a buffer mechanism, the data is temporarily stored in a cache, and then written into the flash memory in batches, so as to reduce the wear caused by frequent writing, reduce unnecessary erasing operations, and improve writing efficiency.

[0048] refer to Figure 2 , Figure 2 In the data stability enhancement method of the flash memory medium provided in one embodiment of the present application, a flowchart of writing user data into the data page is provided; in some embodiments, writing N groups of user data into any N data pages respectively, and writing redundant data into the remaining data pages of the M data pages, including but not limited to the following steps:

[0049] Step S210: write two groups of user data into any two data pages respectively, and write redundant data into the remaining one of the three data pages.

[0050] In some embodiments, first, two sets of user data need to be written into any two data pages respectively, and redundant data needs to be written into the remaining one data page. It is assumed here that the initial flash memory type is Tlc, so there are a total of three data pages (LSB, CSB, MSB). The specific steps are: write two sets of user data into any two data pages, such as LSB and MSB respectively. Write the redundant data generated by logical operations (such as LIKE or XOR) into the remaining one data page, namely CSB.

[0051] refer to Figure 3 , Figure 3 Another flow chart of writing user data into the data page in the data stability enhancement method of the flash memory medium provided in one embodiment of the present application; in some embodiments, writing two groups of user data into any two data pages respectively, and writing redundant data into the remaining one data page of the three data pages, including but not limited to the following steps:

[0052] Step S310, write two groups of user data into the LSB and MSB respectively, and write redundant data into the CSB.

[0053] In some embodiments, step S210 is further refined, specifically: two groups of user data are written into LSB (least significant bit) and MSB (most significant bit) respectively, and redundant data generated by logical operation (such as XOR or XOR) is written into CSB (center significant bit).

[0054] It can be understood that the redundant data generated based on the preset operation rules is used to assist in verifying and recovering user data, which essentially improves the redundancy between the threshold states of the flash memory unit, thereby improving the reliability of the flash memory unit, and by adjusting the read voltage, the present application can convert the original 8-state Tlc flash memory into 4-state Mlc flash memory, thereby improving the stability of the data. The adjusted read voltage maximizes the interval between the states. Even if the threshold voltage changes under extreme conditions, confusion between the states is not easy to occur. The threshold voltage interval between different charge states can be effectively increased, and there is no need to use a reread command to repeatedly adjust the read voltage, thereby reducing the read delay and effectively improving data stability.

[0055] refer to Figure 4 , Figure 4A flow chart of obtaining a target read voltage in a method for enhancing data stability of a flash memory medium provided in an embodiment of the present application; in some embodiments, performing offset correction processing on 2^M initial read voltages corresponding to an initial flash memory type to obtain 2^N target read voltages includes but is not limited to the following steps:

[0056] Step S410, obtaining eight initial read voltages corresponding to the initial flash memory type: ER, A, B, C, D, E, F, and G;

[0057] Step S420, shifting the read voltage corresponding to the LSB to the center point of Er and B and the center point of D and F, respectively obtaining the target read voltages A and E corresponding to the LSB;

[0058] Step S430 , shifting the read voltage corresponding to the MSB to the center point of B and D and the outside of F, to obtain target read voltages C and G corresponding to the MSB respectively.

[0059] In some embodiments, step S410 obtains eight initial read voltages corresponding to the initial flash memory type, namely ER, A, B, C, D, E, F and G, and these eight voltages represent the threshold voltage levels of different states in the flash memory; step S420 for the LSB (least significant bit) page, it is necessary to shift the read voltage to the center point of Er and B and the center point of D and F, so that the target read voltages A and E corresponding to the LSB page can be obtained, which means that the new read voltage A will be located in the middle of the Er and B voltages, and the new read voltage E will be located in the middle of the D and F voltages; step S430 for the MSB (most significant bit) page, the read voltage needs to be shifted to the center point of B and D and the outside of the F voltage. Therefore, the target read voltages C and G corresponding to the MSB page can be obtained, which means that the new read voltage C will be located in the middle of the B and D voltages, and the new read voltage G will be located on the right side of the F voltage, and a certain margin is ensured.

[0060] refer to Figure 5 , Figure 5 A flowchart of writing redundant data in a method for enhancing data stability of a flash memory medium provided in an embodiment of the present application; in some embodiments, writing N groups of user data to any N data pages respectively, and writing redundant data to the remaining data pages of the M data pages, includes:

[0061] Step S510, within a preset data range, write N groups of user data into any N data pages respectively, and write redundant data into the remaining data pages of the M data pages; wherein the preset data range includes a single word line, an entire block or an entire chip.

[0062] In some embodiments, step S510 writes N groups of user data into any N data pages within a preset data range (a single word line, an entire block, or an entire chip), and writes redundant data into the remaining data pages of the M data pages. Specifically: first, prepare two copies of write data, denoted as DATA0 and DATA1, with a length of the Tlc page size. Perform an XOR operation on DATA0 and DATA1 to obtain DATA2. Then, the data of DATA0, DATA1, and DATA2 are written into the LSB, MSB, and CSB (central significant bit) pages corresponding to a wordline of Tlcblock, respectively. It can be understood that the data of LSB and MSB are retained, and the data of CSB is most suitable as XOR data because the read delay of reading LSB and MSB is better than that of CSB page.

[0063] Through the above steps, the present invention can significantly improve the stability and data reliability of flash memory products, not only reducing the number of states, but also increasing the voltage interval between states, so as to maintain a high data safety margin in various failure scenarios. In addition, the present application also reduces read latency because there is no need to repeatedly adjust the read voltage as in traditional methods.

[0064] refer to Figures 6 to 8 , Figure 6 A schematic diagram of a Tlc flash memory in a method for enhancing data stability of a flash memory medium provided in an embodiment of the present application, Figure 7 A schematic diagram of converting a Tlc flash memory into an Mlc type in a method for enhancing data stability of a flash memory medium provided in an embodiment of the present application, Figure 8 A schematic diagram of voltage offset correction in a method for enhancing data stability of a flash memory medium provided in an embodiment of the present application; in some embodiments, Figure 6 The schematic diagram of TLC flash memory is shown, which contains three data bits (LSB, CSB and MSB), each of which has 8 possible states. Figure 7 The schematic diagram of converting Tlc flash memory to Mlc type is shown, where MSB is the exclusive OR result of LSB and CSB, so Figure 7 Only four states are retained, namely Er, B, D and F. The flash memory type conversion can be achieved by merging the LSB and MSB data, and CSB is used as redundant data to improve data stability.

[0065] like Figure 8, which shows how to improve data stability through offset correction. In the figure, you can see the 8 initial read voltages (Er, A, B, C, D, E, F, and G) corresponding to the initial flash type, and the 4 target read voltages (A, E, C, and G) obtained after offset correction. The read voltage A of the LSB page is adjusted to the center point of Er and B, so that the data in the Er and B states can be distinguished more accurately. The read voltage E of the LSB page is adjusted to the center point of D and F to distinguish the data in the D and F states. The read voltage C of the MSB page is adjusted to the center point of B and D, so that the data in the B and D states can be distinguished more accurately. The read voltage G of the MSB page is adjusted to the right side of F, and a certain margin is ensured to avoid the data in the F state from being misjudged.

[0066] It is understandable that the threshold voltage interval has changed due to the reduction of the Tlc state to the Mlc state. Therefore, the original read voltage is no longer the optimal read voltage. If the original read voltage continues to be used, it may lead to a higher error rate because these voltages may no longer be suitable for the new threshold voltage distribution. The present application adjusts the read voltage to the center point of the new threshold voltage interval to improve the accuracy of the reading and ensure the stability of the data; therefore, after the correction is completed, the adjusted read voltage is used to read the data of the LSB page and the MSB page. Through such an adjustment, it can be ensured that even after the data has experienced a typical failure scenario, the data can still be read correctly, avoiding the problems of increased error rate and insufficient read voltage margin.

[0067] A second aspect of an embodiment of the present application provides a data stability enhancement device for a flash memory medium, comprising: a type determination module, used to obtain an initial flash memory type of the flash memory medium, and determine M data pages corresponding to the initial flash memory type; a data acquisition module, used to obtain a target flash memory type of the flash memory medium, and obtain N groups of user data according to the target flash memory type; a data generation module, used to generate redundant data corresponding to the N groups of user data based on preset operation rules; a data writing module, used to write the N groups of user data into any N data pages respectively, and write the redundant data into the remaining data pages of the M data pages; a read voltage adjustment module, which performs offset correction processing on 2^M initial read voltages corresponding to the initial flash memory type to obtain 2^N target read voltages, so as to read the user data in the N data pages according to the 2^N target read voltages.

[0068] Some embodiments of the present application provide an electronic device, Fig. 9 A schematic diagram of the structure of an electronic device provided in an embodiment of the present application, referring to Fig. 9The electronic device includes a memory, a processor, and a computer program stored in the memory and executable on the processor. When the processor executes the computer program, the method for enhancing the data stability of the flash memory medium of any one of the above embodiments is implemented, for example, the method described above is executed. Figure 1 Steps S110 to S150 of the method, Figure 2 In the method step S210, Figure 3 Step S310 of the method, Figure 4 Steps S410 to S430 of the method, Figure 5 Method step S510 in .

[0069] The electronic device 900 of the embodiment of the present application includes one or more processors 910 and a memory 920. Fig. 9 In the figure, a processor 910 and a memory 920 are taken as an example.

[0070] The processor 910 and the memory 920 may be connected via a bus or other means. Fig. 9 The example of connecting through bus is taken in the following.

[0071] The memory 920, as a non-transitory computer-readable storage medium, can be used to store non-transitory software programs and non-transitory computer executable programs. In addition, the memory 920 may include a high-speed random access memory, and may also include a non-transitory memory, such as at least one disk storage device, a flash memory device, or other non-transitory solid-state storage device. In some embodiments, the memory 920 may optionally include a memory 920 remotely disposed relative to the processor 910, and these remote memories may be connected to the electronic device 900 via a network. At the same time, examples of the above-mentioned network include but are not limited to the Internet, an intranet, a local area network, a mobile communication network, and a combination thereof.

[0072] In some embodiments, when the processor executes the computer program, the method for enhancing data stability of the flash memory medium of any one of the above embodiments is executed at preset intervals.

[0073] Those skilled in the art will understand that Fig. 9 The device structure shown in the figure does not constitute a limitation on the electronic device 900, and may include more or less components than shown in the figure, or combine certain components, or arrange the components differently.

[0074] exist Fig. 9 In the electronic device 900 shown, the processor 910 can be used to call the data stability enhancement method of the flash memory medium stored in the memory 920, thereby implementing the data stability enhancement method of the flash memory medium.

[0075] Based on the hardware structure of the above-mentioned electronic device 900, various embodiments of the multi-agent interaction system of the present application are proposed. At the same time, the non-transient software programs and instructions required to implement the data stability enhancement method of the flash memory medium of the above-mentioned embodiment are stored in the memory. When executed by the processor, the data stability enhancement method of the flash memory medium of the above-mentioned embodiment is executed.

[0076] The present application also provides a computer program product, which includes a computer program stored in a computer-readable storage medium. A processor of a computer device reads the computer program from the computer-readable storage medium, and the processor executes the computer program, so that the computer device executes the data stability enhancement method of the flash memory medium according to any one of the above embodiments, for example, the above described method is executed. Figure 1 Steps S110 to S150 of the method, Figure 2 In the method step S210, Figure 3 Step S310 of the method, Figure 4 Steps S410 to S430 of the method, Figure 5 Method step S510 in .

[0077] The device embodiments described above are merely illustrative, and the units described as separate components may or may not be physically separated, that is, they may be located in one place or distributed on multiple network nodes. Some or all of the units may be selected according to actual needs to achieve the purpose of the solution of this embodiment.

[0078] It will be appreciated by those skilled in the art that all or some of the steps and systems in the methods disclosed above may be implemented as software, firmware, hardware, and appropriate combinations thereof. Some or all physical components may be implemented as software executed by a processor, such as a central processing unit, a digital signal processor, or a microprocessor, or as hardware, or as an integrated circuit, such as an application-specific integrated circuit. Such software may be distributed on a computer-readable medium, which may include a computer-readable storage medium (or non-transitory medium) and a communication medium (or transient medium). As known to those skilled in the art, the term computer-readable storage medium includes volatile and non-volatile, removable and non-removable media implemented in any method or technology for storing information (such as computer-readable instructions, data structures, program units, or other data). Computer-readable storage media include, but are not limited to, RAM, ROM, EEPROM, flash memory or other memory technology, CD to ROM, digital versatile disk (DVD) or other optical disk storage, magnetic cassettes, magnetic tapes, disk storage or other magnetic storage devices, or any other medium that can be used to store desired information and can be accessed by a computer. Furthermore, it is well known to those skilled in the art that communication media generally contain computer readable instructions, data structures, program elements, or other data in a modulated data signal such as a carrier wave or other transport mechanism, and may include any information delivery media.

[0079] The above is a specific description of the preferred implementation of the present application, but the present application is not limited to the above implementation mode. Technical personnel familiar with the field can also make various equivalent modifications or substitutions without violating the spirit of the present application. These equivalent modifications or substitutions are all included in the scope defined by the claims of the present application.

Claims

1. A method for enhancing data stability of a flash memory medium, characterized in that: include: Obtaining an initial flash memory type of the flash memory medium, and determining M data pages corresponding to the initial flash memory type; Acquire a target flash memory type of the flash memory medium, and acquire N groups of user data according to the target flash memory type; Generating redundant data corresponding to the N groups of user data based on a preset operation rule; Writing the N groups of user data into any N of the data pages respectively, and writing the redundant data into the remaining data pages of the M data pages; Performing offset correction processing on 2^M initial read voltages corresponding to the initial flash memory type to obtain 2^N target read voltages, so as to read user data in the N data pages according to the 2^N target read voltages; Wherein, the M is greater than the N, the initial flash memory type includes Tlc, and the target flash memory type includes Mlc; The step of writing the N groups of user data into any N data pages respectively, and writing the redundant data into the remaining data pages of the M data pages, comprises: writing two groups of user data into any two data pages respectively, and writing the redundant data into one data page remaining of the three data pages; The step of writing the two sets of user data into any two of the data pages, and writing the redundant data into the remaining one of the three data pages, comprises: writing the two sets of user data into the LSB and the MSB, and writing the redundant data into the CSB; The offset correction processing is performed on 2^M initial read voltages corresponding to the initial flash memory type to obtain 2^N target read voltages, including: obtaining 8 initial read voltages corresponding to the initial flash memory type: ER, A, B, C, D, E, F and G; offsetting the read voltage corresponding to the LSB to the center point of Er and B and the center point of D and F, respectively obtaining the target read voltages A and E corresponding to the LSB; offsetting the read voltage corresponding to the MSB to the center point of B and D and the outside of F, respectively obtaining the target read voltages C and G corresponding to the MSB.

2. The method for enhancing data stability of a flash memory medium according to claim 1, characterized in that: The step of writing the N groups of user data into any N data pages respectively, and writing the redundant data into the remaining data pages of the M data pages, comprises: Within a preset data range, the N groups of user data are written into any N of the data pages respectively, and the redundant data are written into the remaining data pages of the M data pages; The preset data range includes a single word line, an entire block or an entire chip.

3. The method for enhancing data stability of a flash memory medium according to claim 1, characterized in that: The preset operation rule includes an XOR operation or an XOR operation.

4. A device for enhancing data stability of a flash memory medium, characterized in that: include: A type determination module, used to obtain an initial flash memory type of the flash memory medium and determine M data pages corresponding to the initial flash memory type; A data acquisition module, used to acquire a target flash memory type of the flash memory medium, and acquire N groups of user data according to the target flash memory type; A data generation module, used for generating redundant data corresponding to the N groups of user data based on a preset operation rule; A data writing module, used for writing the N groups of user data into any N of the data pages respectively, and writing the redundant data into the remaining data pages of the M data pages; a read voltage adjustment module, performing offset correction processing on 2^M initial read voltages corresponding to the initial flash memory type to obtain 2^N target read voltages, so as to read user data in the N data pages according to the 2^N target read voltages; Wherein, the M is greater than the N, the initial flash memory type includes Tlc, and the target flash memory type includes Mlc; The step of writing the N groups of user data into any N data pages respectively, and writing the redundant data into the remaining data pages of the M data pages, comprises: writing two groups of user data into any two data pages respectively, and writing the redundant data into one data page remaining of the three data pages; The step of writing the two sets of user data into any two of the data pages, and writing the redundant data into the remaining one of the three data pages, comprises: writing the two sets of user data into the LSB and the MSB, and writing the redundant data into the CSB; The offset correction processing is performed on 2^M initial read voltages corresponding to the initial flash memory type to obtain 2^N target read voltages, including: obtaining 8 initial read voltages corresponding to the initial flash memory type: ER, A, B, C, D, E, F and G; offsetting the read voltage corresponding to the LSB to the center point of Er and B and the center point of D and F, respectively obtaining the target read voltages A and E corresponding to the LSB; offsetting the read voltage corresponding to the MSB to the center point of B and D and the outside of F, respectively obtaining the target read voltages C and G corresponding to the MSB.

5. A computer-readable storage medium storing computer-executable instructions, characterized in that: The computer executable instructions are used to execute the method for enhancing data stability of a flash memory medium as described in any one of claims 1 to 3.

6. A computer program product comprising a computer program, characterized in that When the computer program is executed by a processor, the method for enhancing data stability of a flash memory medium as claimed in any one of claims 1 to 3 is implemented.

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