Bytecode optimization method, device and electronic equipment for executable file

Abstract

The present application relates to the technical field of computer, and discloses a bytecode optimization method and device for executable files and electronic equipment.The method comprises the following steps: dividing the bytecode of the functions of the executable file into blocks to obtain a plurality of program blocks; when a register assignment constant instruction is searched in the program block, judging whether the register in the subsequent instruction of the register assignment constant instruction is replaced by a preset assignment constant; if yes, judging whether there is an instruction taking the first register as a source register or a target register after the register assignment constant instruction in the program block to obtain a preliminary deletion optimization judgment result; judging whether there is an instruction branching out of the program block after the register assignment constant instruction in the program block; if yes, judging whether there is an instruction taking the first register as a source register in the program block jumped to; if yes, marking the register assignment constant instruction as an instruction that cannot be deleted and optimized, otherwise marking the register assignment constant instruction as a target instruction that can be deleted and optimized; and traversing each program block until the judgment on each register assignment constant instruction is completed and the register assignment constant instruction marked as the target instruction that can be deleted and optimized is deleted.The present application directly optimizes the compiled bytecode by performing the deletion and optimization of the register assignment constant instruction on the bytecode of each function, thereby reducing the size of the executable file and improving the execution speed.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of computer, and particularly relates to a bytecode optimization method and device of an executable file and electronic equipment. BACKGROUND

[0002] The instruction set of a computer or a virtual machine is sometimes modified to adapt to different use scenarios. For example, the instruction set of the Dalvik virtual machine of Android is generally run on a mobile phone processor, and if the Dalvik virtual machine is to be run on an MCU chip with limited memory resources and computing capacity, the instruction set of the Dalvik virtual machine needs to be modified.

[0003] For example, the Dalvik virtual machine has an instruction of the type "if-test vA, vB, +CCCC", which compares the registers vA and vB to determine whether to jump. In the source code of an application, the write-up is often to compare a variable with a constant, such as "if (var == 3) {...}". When the compiler generates the bytecode of the Dalvik virtual machine, a register assignment constant instruction is first used to assign the constant 3 to a register (assuming register v1), and then the "if-test vA, vB, +CCCC" type instruction is used to compare the register (assuming v0) in which the variable var is located and v1. In this example, the following two instructions can be generated: const / 4 v1, 0x3 (v1 register is assigned 3), if-ne v0, v1, :xxxx (if the value of v0 is not equal to the value of v1, then jump to xxxx). In order to reduce the size of the bytecode generated by the application compilation, the instruction in the above example can be optimized as follows: a new type of instruction is added to compare the value of a register and a constant, so that the instruction for assigning a constant to a register is omitted, and only one instruction "if-ne v0, 3, :xxxx (if the value of v0 is not equal to 3, then jump to xxxx)" is needed to achieve the same function as the previous two instructions. Of course, if the program source code itself compares two variables, the previous instruction type is still used.

[0004] After the above optimizations, the application's bytecode becomes smaller, saving storage space. The virtual machine also executes fewer instructions. Directly accessing constants in the bytecode is more efficient than accessing values ​​in registers, improving program execution speed. In addition to the comparison jump instructions mentioned above, other similar instruction types can also be optimized in this way. For example: 1. When accessing an element of an array, the array index is often a constant in the source code. The index register in the array access instruction "arrayop vAA, vBB, vCC" can be modified to a constant. 2. When calling a method, the parameters passed are often constants. The parameter register in the method call instruction can be modified to a constant. This instruction set optimization method is very effective in reducing application size and saving memory resources, and is a widely used method.

[0005] After the instruction set is optimized, the compiler must also be modified accordingly to generate optimized application bytecode. However, modifying the compiler is difficult, and sometimes compilers are not open source, limiting the scope of modification. Furthermore, for previously compiled application bytecode, the source code is often unavailable, making it useless even with a modified compiler. Furthermore, it is difficult to directly optimize and modify already compiled application bytecode. Summary of the Invention

[0006] The main purpose of the present invention is to provide a bytecode optimization method, device and electronic device for executable files, aiming to solve the problem that it is difficult to directly optimize the bytecode of an already compiled application.

[0007] To achieve the above object, the present invention provides a bytecode optimization method for an executable file, comprising:

[0008] Obtaining a function of an executable file and dividing the bytecode of the function into blocks to obtain a plurality of program blocks;

[0009] When a register assignment constant instruction is searched in the program block, determining whether a register in a subsequent instruction of the register assignment constant instruction is replaced with a preset assignment constant;

[0010] If replacement is required, determining in the program block whether there is an instruction using the first register as a source register or a target register after the register assignment constant instruction, and obtaining a preliminary deletion optimization determination result;

[0011] Determining within the program block whether there is an instruction for branching out of the program block after the register assignment constant instruction;

[0012] If so, determining whether there is an instruction using the first register as a source register in the program block to be jumped to;

[0013] If there is an instruction in the program block jumped to that takes the first register as a source register, the register assignment constant instruction is marked as a non-erasable optimization instruction, otherwise the register assignment constant instruction is marked as a target erasable optimization instruction;

[0014] Each of the program blocks is traversed until the determination for each of the register assignment constant instructions is completed and the register assignment constant instructions marked as the target erasable optimization instructions are deleted.

[0015] In some embodiments, the function of the executable file is obtained and the bytecodes of the function are blocked to obtain a plurality of program blocks, including:

[0016] A function of an executable file is obtained and bytecodes of the function are blocked to obtain a plurality of program blocks.

[0017] Each of the instruction bytecodes of the function is traversed to obtain X jump target addresses of the instruction bytecodes with jump branches; wherein X is a positive integer.

[0018] The X jump target addresses are sorted in ascending order.

[0019] A plurality of program blocks are determined according to the first instruction of the function and the sorted X jump target addresses.

[0020] In some embodiments, the plurality of program blocks are determined according to the first instruction of the function and the sorted X jump target addresses, including:

[0021] When X is equal to 1, the instructions between the first instruction of the function and the first jump target address are taken as a first program block; wherein the first program block includes the first instruction and does not include the instruction at the first jump target address.

[0022] The instruction at the first jump target address and the last instruction of the function are taken as a second program block; wherein the second program block includes the instruction at the first jump target address and the last instruction of the function.

[0023] In some embodiments, the plurality of program blocks are determined according to the first instruction of the function and the sorted X jump target addresses, including:

[0024] When X is greater than 1, the instructions between the first instruction of the function and the first jump target address are taken as a first program block; wherein the first program block includes the first instruction and does not include the instruction at the first jump target address.

[0025] The instructions between the (X-1)th jump target address and the Xth jump target address are the Xth program block; wherein the Xth program block comprises the instruction at the (X-1)th jump target address and excludes the instruction at the Xth jump target address;

[0026] The instruction at the Xth jump target address and the last instruction of the function are the (X+1)th program block; wherein the (X+1)th program block comprises the instruction at the Xth jump target address and the last instruction of the function.

[0027] In some embodiments, the searching for the first register assignment constant instruction in the program block, and determining whether the register in the subsequent instruction of the register assignment constant instruction is replaced by the preset assignment constant comprises:

[0028] The searching starts from the first instruction in the program block;

[0029] When the register assignment constant instruction is searched, the first register corresponding to the register assignment constant instruction is determined;

[0030] It is determined whether there is a subsequent instruction using the first register after the register assignment constant instruction; wherein the subsequent instruction and the register assignment constant instruction are in the same program block;

[0031] If there is, it is determined whether the subsequent instruction has an equivalent instruction of replacing the first register with a constant; if there is, the first register in the instruction is replaced by the preset assignment constant.

[0032] In some embodiments, the determining, in the program block, whether there is an instruction using the first register as a source register or a target register after the register assignment constant instruction to obtain a preliminary deletion optimization determination result comprises:

[0033] The register corresponding to the register assignment constant instruction is taken as the first register, and the subsequent instruction is traversed; when the value of the first register has been modified, the searching is stopped;

[0034] The determining, in the program block, whether there is an instruction using the first register as a source register or a target register after the register assignment constant instruction to obtain a preliminary deletion optimization determination result.

[0035] In some embodiments, the determining, in the program block, whether there is an instruction using the first register as a source register or a target register after the register assignment constant instruction to obtain a preliminary deletion optimization determination result comprises:

[0036] determining whether there is a subsequent instruction using the first register as a source register after the register assignment constant instruction in the program block;

[0037] if there is a subsequent instruction using the first register as a source register, marking the register assignment constant instruction as a non-removable optimization instruction;

[0038] if there is no subsequent instruction using the first register as a source register, marking the register assignment constant instruction as a preliminary removal optimization instruction;

[0039] determining whether the subsequent instruction uses the first register as a target register, and if the subsequent instruction uses the first register as a target register, ending the search and taking the preliminary removal optimization instruction as a preliminary removal optimization determination result.

[0040] In some embodiments, after the iteration of each program block until the determination of each register assignment constant instruction is completed and the register assignment constant instruction marked as the target removal optimization instruction is removed, the method further comprises:

[0041] iterating through each program block and modifying a target address of a branch jump instruction based on remaining instructions in each program block.

[0042] In addition, to achieve the above object, the present application further provides a bytecode optimization device for an executable file, comprising:

[0043] a function blocking module configured to obtain a function of an executable file and block bytecodes of the function to obtain a plurality of program blocks;

[0044] a constant replacement module configured to, when a register assignment constant instruction is searched in the program block, determine whether a register in a subsequent instruction of the register assignment constant instruction is replaced by a preset assignment constant;

[0045] an instruction preliminary marking module configured to, if the register is replaced, determine whether there is an instruction using a first register as a source register or a target register after the register assignment constant instruction in the program block to obtain a preliminary removal optimization determination result;

[0046] a jump determination module configured to determine whether there is an instruction branching out of the program block after the register assignment constant instruction in the program block;

[0047] a source register determination module configured to, if there is, determine whether there is an instruction using the first register as a source register in a program block jumped to;

[0048] The target marking module is configured to mark the register assignment constant instruction as an instruction that cannot be deleted if there is an instruction that uses the first register as a source register in the program block to which the jump is made, and otherwise mark the register assignment constant instruction as a target instruction that can be deleted.

[0049] The deletion optimization module is configured to traverse each of the program blocks until the judgment on each of the register assignment constant instructions is completed, and delete the register assignment constant instruction that is marked as the target instruction that can be deleted.

[0050] In addition, to achieve the above object, the application further provides an electronic device, which comprises a memory, a processor, and a bytecode optimization program of an executable file stored in the memory and executable on the processor, and the bytecode optimization program of the executable file is configured to implement the bytecode optimization method of the executable file as described above.

[0051] The application provides a bytecode optimization method of an executable file, which comprises the following steps: obtaining a function of an executable file and blockizing bytecodes of the function to obtain a plurality of program blocks; when a register assignment constant instruction is searched in the program block, judging whether a register in a subsequent instruction of the register assignment constant instruction is replaced by a preset assignment constant; if yes, judging whether there is an instruction that uses a first register as a source register or a target register after the register assignment constant instruction in the program block to obtain a preliminary deletion optimization judgment result; judging whether there is an instruction that branches out of the program block after the register assignment constant instruction in the program block; if yes, judging whether there is an instruction that uses the first register as a source register in a program block to which the jump is made; if there is an instruction that uses the first register as a source register in the program block to which the jump is made, marking the register assignment constant instruction as an instruction that cannot be deleted, and otherwise marking the register assignment constant instruction as a target instruction that can be deleted; and traversing each of the program blocks until the judgment on each of the register assignment constant instructions is completed and the register assignment constant instruction that is marked as the target instruction that can be deleted is deleted. In the application, the deletion optimization of the register assignment constant instruction is performed on the bytecodes of each function in units of function, so that the register assignment constant instruction in the executable file is optimized and deleted, the already compiled application bytecodes are directly optimized and reformed, the size of the executable file is reduced, the execution speed of the executable file is improved, and the problem that the already compiled application bytecodes are difficult to be directly optimized and reformed is solved. BRIEF DESCRIPTION OF DRAWINGS

[0052] Figure 1 A structural schematic diagram of an electronic device related to a hardware running environment of an embodiment of the application;

[0053] Figure 2 a flowchart of an embodiment of the bytecode optimization method for the executable file of the present application;

[0054] Figure 3 a block diagram of a function involved in the embodiment of the present application;

[0055] Figure 4 a flowchart of the judgment search of step b in the program block involved in the embodiment of the present application;

[0056] Figure 5 a block diagram of an embodiment of the bytecode optimization device for the executable file of the present application.

[0057] The implementation, functional features and advantages of the present application will be further described with reference to the embodiments and the accompanying drawings. DETAILED DESCRIPTION

[0058] The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, rather than all the embodiments of the present application. Based on the embodiments in the present application, all the other embodiments obtained by those skilled in the art without creative work fall within the protection scope of the present application.

[0059] It should be noted that all the directionality indications (such as up, down, left, right, front, back, etc.) in the embodiments of the present application are only used to explain the relative position relationship, movement condition, etc. between the components in a certain posture (as shown in the accompanying drawings), and if the certain posture changes, the directionality indications also change accordingly.

[0060] In addition, the descriptions of “first”, “second” and the like in the present application are only for the purpose of description, and cannot be understood as indicating or implying the relative importance of the indicated technical features or implicitly indicating the number of the indicated technical features. Therefore, the features limited by “first”, “second” can explicitly or implicitly include at least one of the features. In addition, the technical solutions of each embodiment can be combined with each other, but it must be based on the realization of those skilled in the art, and when the combination of technical solutions appears contradictory or unachievable, it should be considered that the combination of technical solutions does not exist, and is not within the protection scope of the present application. It should be understood that the specific embodiments described herein are only used to explain the present application, and are not used to limit the present application.

[0061] Reference Figure 1 , Figure 1 a structural schematic diagram of an electronic device involved in the hardware running environment of the embodiment of the present application.

[0062] As Figure 1As shown, the electronic device can include a processor 1001, such as a central processing unit (CPU), a communication bus 1002, a user interface 1003, a network interface 1004, and a memory 1005. The communication bus 1002 is used to realize the connection and communication between the components. The user interface 1003 can include a display, an input unit such as a keyboard, and can also include a standard wired interface, a wireless interface. The network interface 1004 can optionally include a standard wired interface, a wireless interface (such as a wireless fidelity (Wi-Fi) interface). The memory 1005 can be a high-speed random access memory (RAM memory), and can also be a stable non-volatile memory (NVM), such as a disk memory. The memory 1005 can also be a storage device independent of the aforementioned processor 1001.

[0063] Those skilled in the art can understand that the structure shown in the above embodiment is not a limitation on the electronic device, and the electronic device can include more or fewer components than the structure shown, or combine certain components, or different component arrangements. Figure 1

[0064] As shown, the memory 1005 as a storage medium can include an operating system, a network communication module, a user interface module, and a bytecode optimization program of an executable file. Figure 1

[0065] In the electronic device shown, the network interface 1004 is mainly used for data communication with a network server; the user interface 1003 is mainly used for data interaction with a user; the processor 1001 and the memory 1005 in the electronic device of the present application can be arranged in the electronic device, and the bytecode optimization program of the executable file stored in the memory 1005 is called by the processor 1001, and the bytecode optimization method of the executable file provided by the embodiment of the present application is executed. Figure 1 The present application provides a bytecode optimization method of an executable file, a device and an electronic device.

[0066] The embodiment of the present application provides a bytecode optimization method of an executable file, and the bytecode optimization method of the executable file is described in detail below with reference to the accompanying drawings.

[0067] Figure 2 Figure 2 The bytecode optimization method of the executable file provided by the embodiment of the present application is described in detail below with reference to the accompanying drawings.

[0068] As shown, the bytecode optimization method of the executable file provided by the embodiment of the present application is described in detail below with reference to the accompanying drawings. Figure 2 ​​​​As shown, the bytecode optimization method of the executable file comprises:

[0069] Step S100: obtaining functions of an executable file and block the bytecodes of the functions to obtain a plurality of program blocks;

[0070] Step S200: when a register assignment constant instruction is searched in the program block, judging whether the register in the subsequent instruction of the register assignment constant instruction is replaced by a preset assignment constant;

[0071] Step S300: if replaced, judging whether there is an instruction taking the first register as a source register or a target register after the register assignment constant instruction in the program block to obtain a preliminary deletion optimization judgment result;

[0072] Step S400: judging whether there is an instruction branching out of the program block after the register assignment constant instruction in the program block;

[0073] Step S500: if there is, judging whether there is an instruction taking the first register as a source register in the program block jumped to;

[0074] Step S600: if there is an instruction taking the first register as a source register in the program block jumped to, marking the register assignment constant instruction as an un-deletable optimization instruction, otherwise marking the register assignment constant instruction as a target deletable optimization instruction;

[0075] Step S700: traversing each of the program blocks until the judgment of each of the register assignment constant instructions is completed and the register assignment constant instructions marked as the target deletable optimization instructions are deleted.

[0076] It should be noted that the execution subject in the embodiment can be an electronic device, which can be a computer device with a data processing function, and can also be other devices that can realize the same or similar functions, and the embodiment does not limit this. In the embodiment, the computer device is taken as an example for description.

[0077] In the embodiment, the bytecode optimization method of the executable file can perform deletion optimization of the register assignment constant instruction on the bytecode of the executable file, reduce the size of the executable file, and improve the execution speed of the executable file. The specific process of the method will be described below with reference to the accompanying drawings.

[0078] In one embodiment, obtaining a function of an executable file and dividing the bytecode of the function into blocks to obtain multiple program blocks includes: obtaining an executable file and a function in the executable file; traversing each instruction bytecode of the function to obtain X jump target addresses of the instruction bytecode having a jump branch; where X is a positive integer; sorting the X jump target addresses in ascending order; and determining multiple program blocks based on the first instruction of the function and the sorted instructions of the X jump target addresses.

[0079] It is understandable that in this embodiment, the bytecode of each function is optimized by removing register assignment constant instructions based on the function. The optimization steps for a function include:

[0080] Step 1: Divide the bytecode of the function into blocks, each block is called a program block;

[0081] Step 2: Search backward from the first instruction of the program block. After finding the register assignment constant instruction (assuming that register v1 is assigned to the constant 3), proceed according to steps a, b, and c until all register assignment constant instructions in each program block are marked.

[0082] Step 3: According to the deletion optimization mark made in step 2, delete all register assignment constant instructions marked as optimized for deletion. After deletion, the addresses of some remaining instructions will change, and the target addresses of branch jump instructions must be modified accordingly.

[0083] Specifically, in step 1, the bytecode of the function is divided into blocks, each block is called a program block, and the specific block division process is as follows:

[0084] In one embodiment, a plurality of program blocks are determined based on the first instruction of the function and the sorted instructions of the X jump target addresses, including: when X is equal to 1, the instructions between the first instruction of the function and the first jump target address are taken as the first program block; wherein the first program block includes the first instruction and does not include the instruction at the first jump target address; the instructions at the first jump target address to the last instruction of the function are taken as the second program block; wherein the second program block includes the instruction at the first jump target address and the last instruction of the function.

[0085] In one embodiment, multiple program blocks are determined based on the first instruction of the function and the sorted instructions of the X jump target addresses, including: when X is greater than 1, the instructions between the first instruction of the function and the first jump target address are taken as the first program block; wherein the first program block includes the first instruction and does not include the instruction at the first jump target address; the instructions between the X-1th jump target address and the Xth jump target address are taken as the Xth program block; wherein the Xth program block includes the instruction at the X-1th jump target address and does not include the instruction at the Xth jump target address; the instruction at the Xth jump target address to the last instruction of the function are taken as the X+1th program block; wherein the X+1th program block includes the instruction at the Xth jump target address and the last instruction of the function.

[0086] Specifically, each instruction bytecode of the function is traversed, and the jump target addresses of all instruction bytecodes with jump branches are counted, and the jump target addresses are arranged in order (for example, from small to large). The instructions between the first instruction of the function and the first jump target address are the first program block (the first program block includes the first instruction, but does not include the instruction at the first jump target address), and the instructions between the first jump target address and the second jump target address are the second program block (the second program block includes the instruction at the first jump target address, but does not include the instruction at the second jump target address). And so on, the bytecode of the function is divided into blocks to obtain all the program blocks.

[0087] For example, Figure 3 The following is a diagram showing an example of a program block of a function. The function includes instructions 1 to 100. The X jump target addresses of the instruction bytecodes with jump branches are sorted in ascending order. The instructions between the first instruction of the function and the first jump target address are the first program block. The first program block is Figure 3 The program block 1 shown in FIG. 1 includes the first instruction (i.e., instruction 1), and does not include the instruction at the first jump target (i.e., instruction 4). The instructions between the first jump target address and the second jump target address are the second program block. The second program block is Figure 3 As shown in the program block 2, the program block 2 includes the instruction at the first jump target (i.e., instruction 4), and the program block 2 does not include the instruction at the second jump target (i.e., instruction 8). And so on, the instruction at the Xth jump target address to the last instruction of the function is taken as the X+1th program block, and the X+1th program block is Figure 3The program block n includes the instruction at the Xth jump target address (i.e., instruction 96) and the last instruction of the function (i.e., instruction 100). The bytecode of the function is divided into blocks, i.e., n blocks.

[0088] It should be noted that after the program is divided into blocks according to the above-mentioned block rule, the instruction execution in the program block has the following characteristics: the currently executed instruction must be sequentially executed from the first instruction of the program block, and the case of starting execution from the middle of the program block by jumping from other places does not occur. For example, if instruction 6 is currently executed, the last executed instruction must be instruction 5, and the instruction executed before instruction 5 must be instruction 4. The instruction executed before instruction 4 is not necessarily instruction 3, but may be instruction 8, for example, which is executed and then jumps to instruction 4. This characteristic is determined by the program block rule of the present embodiment. Figure 3 Taking the program block diagram shown as an example, if instruction 6 is currently executed, the last executed instruction must be instruction 5, and the instruction executed before instruction 5 must be instruction 4. The instruction executed before instruction 4 is not necessarily instruction 3, but may be instruction 8, for example, which is executed and then jumps to instruction 4. This characteristic is determined by the program block rule of the present embodiment.

[0089] Specifically, in the second step, the first instruction of the program block is searched from the first instruction of the program block, and after a register assignment constant instruction is found (for example, it is assumed that the register v1 is assigned to the constant 3), the following steps a, b and c are performed:

[0090] In an embodiment, when the first register assignment constant instruction is searched in the program block, it is determined whether the register in the subsequent instruction of the register assignment constant instruction is replaced by a preset assignment constant, including: searching from the first instruction in the program block; when the register assignment constant instruction is searched, determining the first register corresponding to the register assignment constant instruction; determining whether there is a subsequent instruction using the first register after the register assignment constant instruction; wherein the subsequent instruction and the register assignment constant instruction are located in the same program block; if there is, it is determined whether the subsequent instruction has an equivalent instruction of replacing the first register with a constant, and if there is, the first register in the instruction is replaced by a preset assignment constant.

[0091] Specifically, step a: continue searching for subsequent instructions of this register assignment constant instruction (for example, the register assignment constant instruction is to assign register v1 to the constant 3) within this program block. If an instruction that uses register v1 and can be replaced with a constant is found, such as the instruction "if-ne v0,v1,:xxxx", replace the instruction "if-ne v0,v1,:xxxx" with "if-ne v0,3,:xxxx". When traversing subsequent instructions, if it is found that the value of register v1 has been modified and it is no longer the constant 3, stop searching and jump to step b. It should be noted that the processing here is limited to the program block, because after crossing the program block, it cannot be ensured that the value of register v1 is still 3, so the instruction cannot be replaced with the constant 3 across the program block.

[0092] For example, Figure 3 For example, in the diagram shown, if instruction 5 in block 2 assigns register v1 to 3, and instruction 7 is "if-ne v0,v1,:xxxx," then v1 in instruction 7 can be replaced with 3. However, if instruction 8 is "if-ne v0,v1,:xxxx," register v1 in instruction 8 cannot be replaced with 3 because instruction 8 may have jumped from somewhere else when it was executed, and the value of register v1 at this time is not the constant 3. In other words, the instructions that assign constants to registers and the instructions that replace registers with constants must be located in the same block.

[0093] In one embodiment, determining within the program block whether there is an instruction using the first register as a source register or a target register after the register assignment constant instruction to obtain a preliminary deletion optimization judgment result includes: taking the register corresponding to the register assignment constant instruction as the first register, traversing subsequent instructions, and stopping the search when the value of the first register has been modified; and jumping to determining within the program block whether there is an instruction using the first register as a source register or a target register after the register assignment constant instruction to obtain a preliminary deletion optimization judgment result.

[0094] Among them, jumping to judging whether there is an instruction using the first register as the source register or the target register after the register assignment constant instruction in the program block, and obtaining a preliminary deletion optimization judgment result, including: judging whether there is a subsequent instruction using the first register as the source register after the register assignment constant instruction in the program block; if there is a subsequent instruction using the first register as the source register, marking the register assignment constant instruction as an instruction that cannot be deleted for optimization; if there is no subsequent instruction using the first register as the source register, marking the register assignment constant instruction as a preliminary deletion optimization instruction; judging whether the subsequent instruction uses the first register as the target register, if the subsequent instruction uses the first register as the target register, ending the search and using the preliminary deletion optimization instruction as the preliminary deletion optimization judgment result.

[0095] Specifically, step b: after completing step a, determine whether there are any instructions in this program block that use the v1 register as a source register after the register assignment constant instruction (for example, the v1 register assignment constant). During the judgment search, once an instruction that uses the v1 register as the target register is found, the search judgment can be ended and the processing of step c can be continued; once an instruction that uses v1 as the source register is found, then this register assignment constant instruction is determined to be unable to be optimized and deleted, and the next register assignment constant instruction is searched for, and the judgment of step 2 is restarted. It can be understood that using it as a source register means using the value of this register, and the opposite is called the target register, which is the register whose value is to be modified. It should be noted that the instructions that have been determined to be replaced with constants in step a are not included in the judgment of this step (step b).

[0096] For example, Figure 4 The flowchart of step b shown in the figure starts from the register assignment constant instruction and fetches the next instruction until the end condition is met or all instructions of this program block are fetched. Figure 4As shown, the next instruction of the register assignment constant instruction is determined whether it uses the v1 register as a source register (the instruction that has marked the v1 register as a constant is not included in the determination). If the next instruction uses the v1 register as a source register, the register assignment constant instruction is marked as a non-removable optimization, and the next register assignment constant instruction is searched to repeat the process of step 2. If the next instruction does not use the v1 register as a source register, it is determined whether the next instruction uses the v1 register as a target register. If the next instruction uses the v1 register as a target register, it is determined that the register assignment constant instruction in the program block can be removed (the register assignment constant instruction is marked as an initial removal optimization instruction), and the determination of step c is continued to finally determine whether the register assignment constant instruction can be removed. If the next instruction does not use the v1 register as a target register, it is determined whether there is a next instruction in the program block. If there is no next instruction, it is determined that the register assignment constant instruction in the program block can be removed (the register assignment constant instruction is marked as an initial removal optimization instruction), and the determination of step c is continued to finally determine whether the register assignment constant instruction can be removed. If there is a next instruction, the process continues Figure 4 The determination process is shown.

[0097] Specifically, step c: continue to determine whether the subsequent instructions of the register assignment constant instruction in the program block, the instructions of other program blocks that can be executed through branch jumps, use the v1 register as a source register. If so, it is determined that the register assignment constant instruction cannot be optimized and removed. Otherwise, it is marked as being able to be optimized and removed (i.e., the register assignment constant instruction is marked as a target removal optimization instruction).

[0098] It can be understood that the above-mentioned step 2 is repeated until each register assignment constant instruction in each program block is processed, i.e., each program block is traversed until each register assignment constant instruction is determined.

[0099] Specifically, step 3, based on the removal optimization marks made in step 2, all register assignment constant instructions marked as being able to be optimized and removed are deleted:

[0100] In an embodiment, after traversing each of the program blocks until each of the register assignment constant instructions is determined and the register assignment constant instruction marked as the target removal optimization instruction is deleted, the method further comprises: traversing each of the program blocks, and modifying the target address of a branch jump instruction based on the remaining instructions in each of the program blocks.

[0101] It should be noted that the above step 2 is repeatedly performed until each register assignment constant instruction in each program block is processed, and all register assignment constant instructions with the optimization mark deleted are obtained. According to the deletion optimization mark processed in the above step 2, all register assignment constant instructions marked as being able to be optimized and deleted are deleted, that is, all register assignment constant instructions marked as target deletion optimization instructions are deleted. After deletion, the addresses of some of the remaining instructions will change, and the target address of the branch jump instruction needs to be modified accordingly.

[0102] This embodiment provides a bytecode optimization method for an executable file, comprising: obtaining a function of the executable file and dividing the bytecode of the function into blocks to obtain multiple program blocks; when a register assignment constant instruction is searched for in the program block, determining whether the register in the subsequent instructions of the register assignment constant instruction is replaced with a preset assignment constant; if replaced, determining in the program block whether there is an instruction using a first register as a source register or a target register after the register assignment constant instruction, and obtaining a preliminary deletion optimization judgment result; determining in the program block whether there is an instruction that branches out of the program block after the register assignment constant instruction; if so, determining whether there is an instruction using the first register as a source register in the program block to which the jump is made; if there is an instruction using the first register as a source register in the program block to which the jump is made, marking the register assignment constant instruction as an instruction that cannot be deleted for optimization, otherwise marking the register assignment constant instruction as a target deletion optimization instruction; traversing each of the program blocks until the determination of each register assignment constant instruction is completed and deleting the register assignment constant instruction marked as the target deletion optimization instruction. In this embodiment, the bytecode of each function is optimized by removing the register assignment constant instructions, thereby optimizing and removing the register assignment constant instructions in the executable file, and directly optimizing and transforming the compiled application bytecode, reducing the size of the executable file, and improving the execution speed of the executable file, thereby solving the problem of difficulty in directly optimizing and transforming the compiled application bytecode.

[0103] In addition, an embodiment of the present invention further proposes a storage medium on which a bytecode optimization program for an executable file is stored. When the bytecode optimization program for the executable file is executed by a processor, the steps of the bytecode optimization method for the executable file as described above are implemented.

[0104] Reference Figure 5 , Figure 5 This is a structural block diagram of an embodiment of a bytecode optimization device for an executable file according to the present invention.

[0105] like Figure 5 As shown, the bytecode optimization device for the executable file includes:

[0106] a function block module 10, configured to obtain functions of the executable file and block the bytecodes of the functions to obtain a plurality of program blocks;

[0107] a constant replacement module 20, configured to, when a register assignment constant instruction is searched in the program block, determine whether a register in a subsequent instruction of the register assignment constant instruction is replaced by a preset assignment constant;

[0108] an instruction preliminary marking module 30, configured to, if the replacement is performed, determine whether there is an instruction taking the first register as a source register or a target register after the register assignment constant instruction in the program block to obtain a preliminary deletion optimization determination result;

[0109] a jump determination module 40, configured to determine whether there is an instruction branching out of the program block after the register assignment constant instruction in the program block;

[0110] a source register determination module 50, configured to, if the instruction branching out of the program block exists, determine whether there is an instruction taking the first register as a source register in a program block jumped to;

[0111] a target marking module 60, configured to, if there is an instruction taking the first register as a source register in the program block jumped to, mark the register assignment constant instruction as a non-deletion optimization instruction, or otherwise mark the register assignment constant instruction as a target deletion optimization instruction;

[0112] a deletion optimization module 70, configured to traverse each of the program blocks until the determination of each of the register assignment constant instructions is completed and a register assignment constant instruction marked as the target deletion optimization instruction is deleted.

[0113] In the embodiment, the deletion optimization of the register assignment constant instruction is performed on the bytecodes of each function in the unit of function, so that the register assignment constant instruction in the executable file is optimized and deleted, the already compiled application bytecodes are directly optimized and reformed, the size of the executable file is reduced, the execution speed of the executable file is improved, and the problem that the already compiled application bytecodes are difficult to be directly optimized and reformed is solved.

[0114] It should be noted that the technical details not described in the embodiment of the executable file bytecode optimization device are described in the bytecode optimization method for the executable file provided by any embodiment of the present application, which will not be described here.

[0115] It should be understood that the above is only illustrative, and does not constitute any limitation on the technical solutions of the present application. In specific applications, those skilled in the art can set up according to the needs, and the present application does not limit this.

[0116] It should be noted that the above-described workflow is only illustrative and does not limit the scope of protection of the present application. In actual application, those skilled in the art can select part or all of them to achieve the purpose of the embodiment scheme according to actual needs, which is not limited here.

[0117] In addition, it should be noted that in this paper, the term "includes", "contains" or any other variant thereof is intended to cover non-exclusive inclusion, so that the process, method, article or system including a series of elements not only includes those elements, but also includes other elements not explicitly listed, or includes elements inherent to such process, method, article or system. Without more limitations, the element defined by the sentence "includes a" does not exclude the presence of other identical elements in the process, method, article or system including the element.

[0118] The above embodiment numbers of the present application are only for description, not representing the advantages and disadvantages of the embodiments.

[0119] From the above description of the embodiments, those skilled in the art can clearly understand that the above embodiment methods can be realized by software and necessary general hardware platform, of course, also can be realized by hardware, but in many cases, the former is a better embodiment. Based on such understanding, the technical solutions of the present application or the part that contributes to the prior art can be embodied in the form of software product, which is stored in a storage medium (such as read only memory (ROM) / RAM, magnetic disc, optical disc), including a number of instructions to make a terminal device (which can be a mobile phone, computer, server, or network device, etc.) execute the method described in each embodiment of the present application.

[0120] The above is only the preferred embodiment of the present application, and does not limit the patent scope of the present application. Any equivalent structure or equivalent process transformation, or direct or indirect application in other related technical fields, is also included in the patent protection scope of the present application.

Claims

1. A bytecode optimization method for an executable file, characterized in that: include: Obtaining a function of an executable file and dividing the bytecode of the function into blocks to obtain a plurality of program blocks; When a register assignment constant instruction is searched in the program block, determining whether a register in a subsequent instruction of the register assignment constant instruction is replaced with a preset assignment constant; If replacement is required, determining in the program block whether there is an instruction using the first register as a source register or a target register after the register assignment constant instruction, and obtaining a preliminary deletion optimization determination result; After obtaining a preliminary deletion optimization judgment result, determining in the program block whether there is an instruction to branch out of the program block after the register assignment constant instruction; If so, determining whether there is an instruction using the first register as a source register in the program block to be jumped to; If there is an instruction using the first register as a source register in the program block to which the jump is made, the register assignment constant instruction is marked as a non-deletion optimization instruction; otherwise, the register assignment constant instruction is marked as a target deletion optimization instruction; Traversing each of the program blocks until each register assignment constant instruction is determined to be complete and deleting the register assignment constant instruction marked as the target deletion optimization instruction; Determine within the program block whether there is an instruction using the first register as a source register or a target register after the register assignment constant instruction, and obtain a preliminary deletion optimization judgment result, including: using the register corresponding to the register assignment constant instruction as the first register, traversing subsequent instructions, and stopping the search when the value of the first register has been modified; jump to determine within the program block whether there is an instruction using the first register as a source register or a target register after the register assignment constant instruction, and obtain a preliminary deletion optimization judgment result, wherein, using as a source register means to use the value of this register, and the target register means the register whose value is to be modified.

2. The method according to claim 1, wherein The step of obtaining a function of an executable file and dividing the bytecode of the function into blocks to obtain a plurality of program blocks includes: Obtaining an executable file and functions in the executable file; Traversing each instruction bytecode of the function to obtain X jump target addresses of the instruction bytecode having a jump branch; wherein X is a positive integer; Sort the X jump target addresses in ascending order; A plurality of program blocks are determined according to the first instruction of the function and the sorted X instructions of the jump target addresses.

3. The method according to claim 2, wherein Determining a plurality of program blocks according to the first instruction of the function and the sorted X instructions of the jump target addresses includes: When X is equal to 1, the instructions between the first instruction of the function and the first jump target address are taken as the first program block; wherein the first program block includes the first instruction and does not include the instruction at the first jump target address; The instruction at the first jump target address to the last instruction of the function is taken as the second program block; wherein the second program block includes the instruction at the first jump target address and the last instruction of the function.

4. The method according to claim 2, wherein Determining a plurality of program blocks according to the first instruction of the function and the sorted X instructions of the jump target addresses includes: When X is greater than 1, the instructions between the first instruction of the function and the first jump target address are taken as the first program block; wherein the first program block includes the first instruction and does not include the instruction at the first jump target address; The instructions between the X-1th jump target address and the Xth jump target address are defined as the Xth program block; wherein the Xth program block includes the instructions at the X-1th jump target address and does not include the instructions at the Xth jump target address; The instruction at the Xth jump target address to the last instruction of the function is taken as the X+1th program block; wherein the X+1th program block includes the instruction at the Xth jump target address and the last instruction of the function.

5. The method according to claim 1, wherein When a register assignment constant instruction is searched for in the program block, determining whether a register in a subsequent instruction of the register assignment constant instruction is replaced with a preset assignment constant includes: Start searching from the first instruction in the program block; When a register assignment constant instruction is found, determining a first register corresponding to the register assignment constant instruction; Determining whether there is a subsequent instruction using the first register after the register assignment constant instruction; wherein the subsequent instruction and the register assignment constant instruction are located in the same program block; If so, it is determined whether the subsequent instruction has an equivalent instruction for replacing the first register with a constant; if so, the first register in the instruction is replaced with a preset assignment constant.

6. The method according to claim 1, wherein The step of jumping to the program block to determine whether there is an instruction using the first register as a source register or a target register after the register assignment constant instruction, and obtaining a preliminary deletion optimization determination result, includes: Determining within the program block whether there is a subsequent instruction using the first register as a source register after the register assignment constant instruction; If there is a subsequent instruction that uses the first register as a source register, marking the register assignment constant instruction as an instruction that cannot be deleted for optimization; If there is no subsequent instruction that uses the first register as a source register, marking the register assignment constant instruction as a preliminary deletion optimization instruction; Determine whether the subsequent instruction uses the first register as the target register. If the subsequent instruction uses the first register as the target register, end the search and use the preliminary deletion optimization instruction as a preliminary deletion optimization determination result.

7. The method according to any one of claims 1 to 6, characterized in that The traversing of each of the program blocks until each of the register assignment constant instructions is determined to be complete and the register assignment constant instruction marked as the target deletion optimization instruction is deleted further includes: Each of the program blocks is traversed, and a target address of a branch jump instruction is modified based on remaining instructions in each of the program blocks.

8. A bytecode optimization device for an executable file, characterized in that: include: A function block module is used to obtain a function of an executable file and block the bytecode of the function to obtain multiple program blocks; a constant replacement module, configured to, when a register assignment constant instruction is searched for in the program block, determine whether a register in a subsequent instruction of the register assignment constant instruction is replaced with a preset assignment constant; an instruction preliminary marking module, configured to determine, in the program block, whether there is an instruction using the first register as a source register or a target register after the register assignment constant instruction, if replacement is required, and obtain a preliminary deletion optimization judgment result; A jump judgment module is used to judge whether there is a branch instruction to jump out of the program block after the register assignment constant instruction is obtained. a source register determination module, configured to determine whether an instruction using the first register as a source register exists in the program block to be jumped to, if the instruction exists; a target marking module, configured to mark the register assignment constant instruction as a non-deletion optimization instruction if an instruction using the first register as a source register exists in the program block to which the program is jumped, and otherwise mark the register assignment constant instruction as a target deletion optimization instruction; a deletion optimization module, configured to traverse each of the program blocks until a determination is completed on each of the register assignment constant instructions and to delete the register assignment constant instructions marked as the target deletion optimization instructions; Determine within the program block whether there is an instruction using the first register as a source register or a target register after the register assignment constant instruction, and obtain a preliminary deletion optimization judgment result, including: using the register corresponding to the register assignment constant instruction as the first register, traversing subsequent instructions, and stopping the search when the value of the first register has been modified; jump to determine within the program block whether there is an instruction using the first register as a source register or a target register after the register assignment constant instruction, and obtain a preliminary deletion optimization judgment result, wherein, using as a source register means to use the value of this register, and the target register means the register whose value is to be modified.

9. An electronic device, characterized in that: The electronic device includes: a memory, a processor, and a bytecode optimization program for an executable file stored in the memory and runnable on the processor, wherein the bytecode optimization program for the executable file is configured to implement the bytecode optimization method for the executable file according to any one of claims 1 to 7.

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