An SMT distributed solving method and system based on combination and problem decomposition

Abstract

The present invention belongs to the field of computer technology and relates to an SMT distributed solving method and system based on combination and problem decomposition. The method includes: the Leader process assigns Worker processes to the SMT problem to be solved; the Leader process adds the original problem as the root node to the partitioning tree and continuously updates the information of the partitioning tree during the solving process; the task generator in the Leader process generates tasks and adds them to the task cache queue, and the task scheduler schedules the tasks in the queue and assigns tasks to the Worker processes, including preprocessing simplification tasks, child node generation tasks, and combination solving tasks; the Worker processes execute relevant tasks according to the control signals of the Leader process; the Leader process listens to and collects the task running results from each Worker process, and thus obtains the solving result of the SMT problem. The present invention realizes a high-performance distributed SMT solver, has universality and high scalability, can make the most of computing resources, and improve the solving efficiency.

Description

Technical Field

[0001] The present invention belongs to the fields of computer technology and software technology, and particularly relates to an SMT distributed solving method and system based on combination and problem decomposition. Background Art

[0002] The Boolean satisfiability problem (SAT) is a decision problem for determining whether a given propositional logic formula is satisfiable, and satisfiability modulo theories (SMT) is an extension of the SAT problem. It combines Boolean logic and other theories (such as equality theory and uninterpreted functions, array theory, bit vectors, linear and non-linear arithmetic) to express more complex logical formulas, and studies the decision method for the satisfiability of first-order logical formulas under these specific theories. SMT is an important direction in formal methods and automated reasoning, and is widely used in many fields, such as program verification, cloud computing and cloud storage, optimization problem solving, access control, multi-core problems, program defect detection and verification, bounded model checking, RTL verification, static analysis, etc. The actual problems to be solved in these fields can all be modeled as constraint satisfaction problems, and SMT has outstanding advantages in the formulation and solution of such problems.

[0003] At present, most advanced SMT solvers still maintain single-threaded serial solving, and related work focuses on how to improve the solving techniques and heuristic methods in serial SMT solvers. With the increase in the difficulty and scale of industrial examples, serial SMT solving has gradually been unable to meet the needs of the industry. Considering the increasing abundance of computing resources, it is also a natural idea to adopt a distributed method to fully utilize computing power to improve the performance of SMT solvers. The current research on distributed SMT solving is mainly divided into two directions: combined solving and divide-and-conquer, and their characteristics are as follows:

[0004] 1) Combined solving method: The combined solving method deploys multiple solvers or different configurations of a single solver at the same time, and attempts to solve the same or slightly different but equivalent SMT problems in parallel.

[0005] 2) Divide-and-conquer method: The original problem is divided into sub-problems, so as to solve the original problem by solving the sub-problems. Its basic assumption is that the smaller search space of sub-problems makes the distributed and parallel solving speed faster than solving the entire original problem. The currently most commonly used variable selection method for partitioning adopts the lookahead heuristic, and each heuristic selection can minimize the scale of variables in sub-problems.

[0006] 3) Pre-partitioning method: Most divide-and-conquer parallel algorithms adopt the pre-partitioning method, that is, the problem is divided into the number of sub-problems equal to the number of computing cores before parallel solving, and the over-partitioning method will appropriately generate more sub-problems than the number of computing cores.

[0007] 4) Term-level partitioning: The existing SMT partitioning strategy mainly follows the partitioning method of SAT and performs partitioning at the Boolean level (partitioning problems by assigning different Boolean encodings), which is also known as SMT term-level partitioning. For formulas with complex logical structures, sufficient sub-problems can be generated only through term-level partitioning.

[0008] The defects of the prior art are as follows:

[0009] 1) Limited solving ability and scalability of the combined solving method: The performance of the combined solving method depends on the existing best serial solver. Moreover, the scalability of this method is limited by the types of efficient solvers and the number of configuration schemes of efficient solvers, and it often fails to fully utilize the advantages of multi-core processors and large-scale computing clusters, and its generalization ability is relatively poor.

[0010] 2) Waste of computing resources caused by the pre-partitioning method: The pre-partitioning method will inevitably generate numerous sub-problems with extremely different solving difficulties, which further leads to a large number of computing cores being idle in the later stage of solving, resulting in serious resource waste. Moreover, generating high-quality partitions by the pre-partitioning method often leads to high computing costs and it is difficult to ensure the balance of sub-problems, thus affecting the overall solving efficiency. Although the over-partitioning strategy alleviates this problem to a certain extent, for many industrial problems, even if they are partitioned into sub-tasks in the order of millions, this kind of phenomenon still exists.

[0011] 3) Dependence of the divide-and-conquer method: The divide-and-conquer method has the potential to exceed the performance of the best serial solver in theory, but its actual effect highly depends on the effectiveness of the partitioning algorithm. This means that if the partitioning algorithm cannot effectively select the key variables to decompose the problem, the overall solving efficiency still cannot be significantly improved, and the technology in this aspect still needs to be further explored and optimized.

[0012] 4) Limitations of term-level partitioning: For formulas with simple Boolean structures that usually appear in program verification and theorem proving involving complex theories, especially formulas that hardly involve logical OR, the existing term-level partitioning strategy cannot generate sufficient sub-problems, which leads to a large number of computing cores being idle and severely limits the performance of distributed SMT solvers. Summary of the Invention

[0013] The present invention aims to address the deficiencies of existing serial SMT solvers, including the poor performance of the term-level partitioning strategy for simple Boolean structure formulas, the limited solving ability and scalability of the combined solving method, the waste of computing resources caused by the pre-partitioning method, the dependence of the divide-and-conquer method on the partitioning algorithm, and the limitations of term-level partitioning. By proposing a divide-and-conquer method based on variable-level partitioning, integrating the combined solving and divide-and-conquer methods, combining term-level and variable-level partitioning heuristics, and a dynamic distributed solving framework, the present invention realizes a high-performance distributed SMT solver with universality and high scalability, which can maximize the utilization of computing resources and improve the solving efficiency.

[0014] The technical solution adopted by the present invention is as follows:

[0015] An SMT distributed solving method based on combination and problem decomposition, comprising the following steps:

[0016] The Leader process assigns Worker processes to the SMT problem to be solved;

[0017] The Leader process adds the original problem as the root node to the partitioning tree and continuously updates the information of the partitioning tree during the solving process;

[0018] The task generator in the Leader process generates tasks and adds them to the task cache queue. The task scheduler schedules the tasks in the queue and assigns tasks to the Worker processes, including preprocessing simplification tasks, child node generation tasks, and combined solving tasks;

[0019] The Worker process executes relevant tasks according to the control signals of the Leader process;

[0020] The Leader process listens to and collects the task running results from each Worker process, and then obtains the solving result of the SMT problem.

[0021] Furthermore, the partitioning tree is a rooted tree containing several nodes. The root node represents the original problem, and the parent and child nodes satisfy the definition of partitioning; each node in the partitioning tree represents a sub-problem formula generated during the solving process, and the node contains the following information: the parent node, child nodes, solving status, and solving strategy assigned to the Worker process of this node.

[0022] Further, the task generator continuously generates tasks and adds them to the task cache queue according to the status of the partitioning tree and the solution information. For the sub-problem formulas corresponding to all child nodes, the task generator first generates preprocessing simplification tasks for them to improve the efficiency and quality of subsequent solution and sub-problem partitioning. Then, the task generator generates child node generation tasks and combined solution tasks for the nodes according to the global information of the current Leader process. The child node generation tasks heuristically configure the number of child nodes generated and the partitioning types, and the combined solution tasks heuristically configure the types, parameters, and solution durations of the serial solvers.

[0023] Further, in the initial stage, a node only generates one combined solution task. As the solution progresses, if the situation of task under-utilization and high Worker idle rate is encountered, the number of combined solution tasks of the same node is appropriately increased to avoid waste of computing resources as much as possible.

[0024] Further, the Worker process includes a preprocessor, a partitioner, and a serial solver, and performs related tasks according to the following steps:

[0025] Preprocessing simplification: Call the preprocessor to simplify the specified task. After completion, pass the simplified sub-problem to the Leader process and add it to the task buffer queue.

[0026] Child node generation: Call the partitioner to generate a specified number of child nodes for the specified task according to term-level partitioning or variable-level partitioning.

[0027] Combined solution: Call the specified serial solver and use the specified strategy to solve the specified task.

[0028] Task termination: Terminate the task currently being performed by the current Worker process.

[0029] Further, the Leader process listens for and collects the task operation results from each Worker process, including:

[0030] Preprocessing simplification: Mark the status of the corresponding node as "simplified but unsolved", and mark the status of the corresponding Worker process as "idle".

[0031] Child node generation: Insert the generated child nodes into the corresponding positions of the partitioning tree, and add the preprocessing simplification tasks of the child nodes to the task cache queue.

[0032] Combined solution: Update the solution status of the corresponding node according to the solution result, and send termination signals to other Worker processes that solve the task with different solution strategies.

[0033] Further, when the status of a node is updated to "satisfiable" or "unsatisfiable", the Leader process performs status reasoning and propagation according to the following rules:

[0034] The "satisfiability" of any node in the partitioning tree represents the "satisfiability" of the original problem, and the variable assignment corresponding to this node serves as the variable assignment of the original problem;

[0035] All child nodes of an "unsatisfiable" node in the partitioning tree should be "unsatisfiable";

[0036] If all child nodes of a node are "unsatisfiable", then this node is also "unsatisfiable";

[0037] When the Leader process detects that any node in the partitioning tree obtains a "satisfiable" result, or detects that the root node obtains an "unsatisfiable" result, the original problem is successfully solved, all Worker processes are terminated, and relevant resources are recycled and temporary files and memory are cleared.

[0038] An SMT distributed solving system based on combination and problem decomposition includes a partitioning tree, a task generator, and a task scheduler located in the Leader process, as well as a preprocessor, a partitioner, and a serial solver located in the Worker process; the Leader process adds the original problem as the root node to the partitioning tree and continuously updates the information of the partitioning tree during the solving process; the task generator generates tasks and adds them to the task cache queue, and the task scheduler schedules the tasks in the queue and allocates tasks to the Worker processes, including preprocessing simplification tasks, child node generation tasks, and combined solving tasks; the preprocessor, partitioner, and serial solver of the Worker process execute relevant tasks according to the control signals of the Leader process; the Leader process listens to and collects the task running results from each Worker process, and then obtains the solving result of the SMT problem.

[0039] The beneficial effects of the present invention are as follows:

[0040] The present invention proposes a high-performance distributed SMT solving system, which can partition problems of any structure, fully combines the complementarity and advantages of numerous parallel methods, and fundamentally alleviates the problem of computational resource waste caused by existing pre-partitioning methods, supports dynamic learning and adjustment during the solving process, and provides a more flexible scheduling strategy.

[0041] Through the divide-and-conquer method based on variable-level partitioning, problems of any structure can be partitioned, largely avoiding computational resource waste. This method can significantly improve the parallel ability of the solver, especially when dealing with complex Boolean formulas.

[0042] By combining combinatorial solving with the divide-and-conquer method and integrating term-level and variable-level partitioning heuristics, the complementary nature and advantages of numerous parallel methods are fully utilized, enhancing the ability to solve problem instances of different difficulties and structures.

[0043] Finally, by implementing a dynamic distributed solving framework, the problem of wasted computing resources caused by pre-partitioning methods is fundamentally solved. This framework has excellent generalization and scalability. The dynamic framework provides the ability to flexibly schedule during the solving process, and the expansion and growth of the partitioning tree can be dynamically learned and adjusted according to the problem size and structural characteristics. Brief Description of the Drawings

[0044] Figure 1 It is a schematic diagram of the execution process of the SMT distributed solving method based on combination and problem decomposition of the present invention. Detailed Embodiments

[0045] To make the above objects, features, and advantages of the present invention more obvious and understandable, the present invention will be further described in detail below through specific embodiments and the accompanying drawings.

[0046] The key points of the present invention are:

[0047] 1) Divide-and-conquer method based on variable-level partitioning: Existing term-level partitioning strategies are not effective for formulas with simple Boolean structures. The present invention proposes a divide-and-conquer method based on variable-level partitioning, which can effectively partition problems of any structure, greatly reducing the waste of computing resources.

[0048] 2) Integration of combinatorial solving and divide-and-conquer method: Combinatorial solving and the divide-and-conquer method each have their own advantages and disadvantages. This framework can well integrate these two mainstream distributed methods, fully utilize their advantages, and improve the distributed solving efficiency.

[0049] 3) Combination of term-level and variable-level partitioning heuristics: Term-level and variable-level partitioning are highly complementary in terms of solving ability. The framework of the present invention can flexibly select partitioning methods under the divide-and-conquer method, combine the two methods heuristically, and utilize their complementarity to improve the distributed solving ability.

[0050] 4) Dynamic distributed SMT solving framework: Traditional pre-partitioning methods are prone to causing waste of computing resources. The dynamic distributed solving framework proposed by the present invention can fundamentally solve this problem. This framework is applicable to any given number of CPU cores, especially suitable for multi-core servers and large-scale computing clusters, and has excellent generalization and scalability. In this framework, the expansion and growth of the partitioning tree can be dynamically learned and adjusted according to the problem size and structural characteristics, providing the ability to flexibly schedule.

[0051] The present invention provides a divide-and-conquer method based on variable-level partitioning, an integration of combined solving and the divide-and-conquer method, and a dynamic distributed solving method that combines term-level and variable-level partitioning heuristics. This method is mainly used to solve SMT problems, and the default input is a propositional logic formula in SMT2 format specified by the SMT-LIB standard. The output of this method is "satisfiable" or "unsatisfiable". If the result is "satisfiable", specific assignments that make the original formula hold will be given.

[0052] This method adopts the classical "Leader-Workers" distributed paradigm and is optimized for the characteristics of the SMT field and dynamic combined distributed methods. This method, as Figure 1 shown, the Leader process is responsible for maintaining the task cache queue and the partitioning tree, as well as task scheduling, including task distribution, result aggregation, node status reasoning, and task termination notification. The Worker process performs task preprocessing, partitioning, solving, or terminating the current task according to the instructions of the Leader process. This method mainly includes four steps: task management and scheduling, preprocessing simplification, child node partitioning, and solving, which are specifically as follows:

[0053] 1) For the SMT problem to be solved, a propositional logic formula in SMT2 format, which is the standard input of SMT-LIB, is adopted. At the beginning of the solution, the Leader process will allocate a Worker process to directly solve the original problem to ensure that the performance is not inferior to serial solving.

[0054] 2) Next, the Leader process will add the original problem as the root node to the partitioning tree and continuously update the information of the partitioning tree during the solution process. The definitions of tasks, the task cache queue, partitioning tree nodes, and the partitioning tree are as follows:

[0055] a. A task contains the following information: the corresponding child node (sub-problem formula) in the partitioning tree, the task type (preprocessing simplification, child node generation, and combined solving), and some detailed parameters of the corresponding type (preprocessor parameters, partitioning type, the number of child nodes to be generated, solving strategy, etc.).

[0056] b. The Leader will promptly clean up redundant tasks in the task cache queue, that is, those tasks whose solving results of the corresponding nodes are already known, and the simplification, partitioning, and solving corresponding to these tasks are no longer meaningful.

[0057] c. Each node in the partitioning tree represents a sub-problem formula generated during the solution process, and the node contains the following information: the parent node (if any) of this task node, the child nodes (if any), the solving status (not simplified, simplified but not solved, being solved, satisfiable, unsatisfiable, solving terminated), and the solving strategy assigned to the Worker process (serial solver type, related configurations, solving duration, etc.).

[0058] d. Divide the tree into a rooted tree composed of several nodes. The root node represents the original problem. The parent and child nodes in the tree satisfy the definition of division. That is to say, if a node has child nodes, the union of the problems represented by all its direct child nodes is equivalent to the original problem, and there is no intersection between sub-problems.

[0059] During the solution process, the task generator in Leader is responsible for generating tasks and adding them to the task cache queue. The task scheduler will schedule the tasks in the queue and send "task assignment" or "task termination" control signals to the Worker processes. The assigned tasks can be divided into three categories: "preprocessing simplification", "child node generation", and "combined solution".

[0060] The task generator of Leader will continuously generate tasks and add them to the task cache queue according to the status of the division tree and the solution information. For the sub-problem formulas corresponding to all child nodes, the task generator will first generate "preprocessing simplification" tasks for them to improve the efficiency and quality of subsequent solutions and sub-problem divisions. That is to say, the two types of tasks, "child node generation" and "combined solution", are both based on the sub-problem formulas after "preprocessing simplification". After the sub-problem simplification is completed, the task generator will generate a "child node generation" task (heuristically configure the number of child nodes generated and the division types) and a "combined solution" task (heuristically configure the types, parameters, and solution duration of the serial solver) for this node according to the global information of the current Leader. In the initial stage, a node only generates one "combined solution" task. However, as the solution progresses, if the situations of "task under-utilization" and "high Worker idle rate" described later are encountered, the number of "combined solution" tasks N for the same node will be appropriately increased port (initially set to N port = 1), and waste of computing resources is avoided as much as possible.

[0061] When the number of tasks to be executed in the task cache queue is less than the threshold α (α is default set to half of the total number of computing cores), this situation will be abbreviated as "task under-utilization" later. To ensure that all computing cores are fully operational as much as possible, that is, all Worker processes have corresponding tasks to execute, the task generator of Leader will appropriately create more "combined solution" tasks with different configurations for the currently unsolved child nodes. When "task under-utilization" occurs, the task scheduler will give priority to executing tasks of the "child node generation" type. When there are no "child node generation" tasks to run, the "combined solution" will be assigned to the Worker for execution.

[0062] During the solution process, the Leader records the task allocation, running duration, and whether the task is successful. These pieces of information play a crucial role in the Leader's heuristic scheduling. "High Worker idle rate" is defined in the present invention as the duration when the number of idle Workers exceeds p w (initially set at 50%) exceeds T w (initially set at 40 seconds), and the average running duration of the "child node generation" task exceeds the threshold T p (default setting is 50 seconds). When the Leader detects a "high Worker idle rate", it increments by one the key parameter N in "child node generation", i.e., the number of subtasks generated per partition p (initially set at 2), and sets T w to 1.5×T w . In addition, the Leader increments by one the number N of "combined solution" tasks for the same node port .

[0063] 3) The Worker process consists of three modules: a preprocessor, a partitioner, and a serial solver. Each Worker process waits to receive a control signal from the Leader and executes the relevant tasks:

[0064] a. Preprocessing simplification: The preprocessor is called to simplify the specified task. After completion, the simplified sub-problem is passed to the Leader process and added to the task buffer queue. The main objective of preprocessing is to reduce the number of operations in the bit-vector expression or convert high-cost operations into low-cost operations, thereby effectively reducing the scale of the transformed problem. Specifically, simplification means parsing and converting the bit-vector formula corresponding to the given task into a DAG (Directed Acyclic Graph) for storage. On the maintained DAG, a series of constraint propagations are performed to infer and maintain the feasible domain and fixed assignments of variables, merge equivalent variables, and eliminate redundant statements in the original problem, thereby reducing the problem scale and narrowing the search space. In addition, preprocessing simplification also includes, but is not limited to, the following techniques: bit-vector arithmetic equality processing, normalization, integer flattening (int-blasting), three-layer rewriting, unconstrained variable elimination, pure literal elimination, equivalent clause replacement, etc.

[0065] b. Sub - node Generation: Call the partitioner to generate a specified number of sub - nodes by partitioning the specified task at the term level or variable level. Among them, term - level partitioning means that at the level of boolean literals in SAT, the problem is partitioned by specifying different boolean assignments of literals. Variable - level partitioning means delving into the theoretical level of SMT, collecting the feasible regions of variables under the corresponding theory through constraint propagation techniques under the corresponding theory, and heuristically partitioning the theory variables on this basis to generate sub - problems.

[0066] c. Combined Solving: Call the specified serial solver and use the specified strategy to solve the specified task.

[0067] d. Task Termination: Terminate the task currently being carried out by the current Worker process. Task termination may be because the state of the current task has been inferred from the solution results of other tasks, or it may be that the Leader process heuristically terminates some tasks with little hope of successful solution (having been solved for a certain period of time but not successfully resolved) and high solution redundancy (the task has been partitioned into several sub - tasks and the sub - tasks have started to be solved).

[0068] 4) During this process, the Leader process will listen to and collect the task running results from each Worker process:

[0069] a. Pre - processing Simplification: Mark the status of the corresponding task node as "simplified but unsolved", and mark the status of the corresponding Worker process as "idle".

[0070] b. Sub - node Generation: Insert the generated sub - nodes into the corresponding positions in the partition tree, and add the "pre - processing simplification" tasks of the sub - nodes to the task cache queue.

[0071] c. Combined Solving: Update the solution status of the corresponding node according to the solution result, and send a termination signal to other Worker processes that solve the task with different solution strategies.

[0072] When the status of a certain task node is updated to "satisfiable" or "unsatisfiable", the Leader will perform a series of status inferences and propagations according to the following rules:

[0073] a. The "satisfiable" status of any node in the partition tree represents the "satisfiable" status of the original problem, and the variable assignment (model) corresponding to this node can be used as the variable assignment of the original problem.

[0074] b. All sub - nodes of an "unsatisfiable" node in the partition tree should be "unsatisfiable".

[0075] c. If all sub - nodes of a node are "unsatisfiable", then this node is also "unsatisfiable".

[0076] 5) When the Leader process detects that any node in the partitioning tree obtains a "satisfiable" result, or detects that the root node obtains an "unsatisfiable" result (either its own solution is successful or the child nodes' reasoning leads to it), the original problem is solved successfully. All Worker processes are terminated, relevant resources are reclaimed, and temporary files and memory are cleared. Finally, the system returns the corresponding solution result.

[0077] Another embodiment of the present invention provides an SMT distributed solution system based on combination and problem decomposition, including a partitioning tree, a task generator, and a task scheduler located in the Leader process, as well as a preprocessor, a partitioner, and a serial solver located in the Worker process; the Leader process adds the original problem as the root node to the partitioning tree and continuously updates the information of the partitioning tree during the solution process; the task generator generates tasks and adds them to the task cache queue, and the task scheduler schedules the tasks in the queue and allocates tasks to the Worker processes, including preprocessing simplification tasks, child node generation tasks, and combination solution tasks; the preprocessor, partitioner, and serial solver in the Worker process execute relevant tasks according to the control signals of the Leader process; the Leader process listens for and collects the task running results from each Worker process, and thus obtains the solution result of the SMT problem. The specific implementation manners of the partitioning tree, the task generator, the task scheduler, the preprocessor, the partitioner, and the serial solver can be referred to the description of the method of the present invention above.

[0078] Another embodiment of the present invention provides a computer device (such as a computer, a server, a smart phone, etc.), which includes a memory and a processor, the memory stores a computer program, the computer program is configured to be executed by the processor, and the computer program includes instructions for executing the steps in the method of the present invention.

[0079] Another embodiment of the present invention provides a computer-readable storage medium (such as ROM / RAM, a disk, an optical disc), the computer-readable storage medium stores a computer program, and when the computer program is executed by the computer, it implements each step of the method of the present invention.

[0080] The present invention can be used in specific scenarios such as program verification, cloud computing and cloud storage, and optimization problem solving.

[0081] For example, in the scenario of program verification, the method of the present invention can quickly verify whether a given program satisfies the specified property through a distributed method. Specifically, in this scenario, the SMT problem to be solved refers to the first-order logic formula containing theoretical content encoded by taking the negation of the SSA (Static Single Assignment) logic after transforming the program into the SSA form. A sub-problem refers to a simpler first-order logic formula with a smaller search space obtained after dividing the original formula according to the method of the present invention. The "preprocessing simplification" task refers to handing the given first-order logic formula to a preprocessor for processing by various simplification techniques introduced above to reduce the search space of the given program verification problem. The "sub-node generation" task refers to calling a partitioner to generate a specified number of sub-nodes for a specified task according to term-level partitioning or variable-level partitioning. The "combined solving" task refers to calling a specified serial solver and using a specified strategy to solve a specified task. By solving this formula, the system can determine whether the program to be verified satisfies the specified property. If the corresponding SMT problem is unsatisfiable, it proves that the program satisfies the specified property; otherwise, the program does not satisfy the specified property, and the system will provide a corresponding counterexample for further debugging and modification of the program.

[0082] For another example, in the scenario of cloud computing and cloud storage, the method of the present invention can help optimize resource allocation and task scheduling. Specifically, in this scenario, the SMT problem to be solved refers to transforming the problem of resource allocation and task scheduling into a first-order logic formula containing theoretical content. The finally obtained solution result shows whether resource allocation and task scheduling are satisfiable under the given constraints. If they are satisfiable, this method will provide a specific resource and task allocation plan, thereby improving the efficiency and performance of the cloud computing and cloud storage systems and reducing resource waste.

[0083] In addition, in the scenario of solving optimization problems, the method of the present invention can quickly verify whether a specified optimization goal can be satisfied and provide corresponding assignments. Specifically, in this scenario, the SMT problem to be solved refers to the first-order logic formula encoded after specifying the corresponding objective function value for the corresponding optimization problem. The finally obtained solution result shows whether the objective function value is satisfiable under the constraints of this problem. If it is satisfiable, this method will give the corresponding variable assignments to help achieve the optimization goal, which is widely applicable to solving optimization problems in fields such as industrial design and logistics planning.

[0084] The specific embodiments of the present invention disclosed above are intended to help understand the content of the present invention and implement it accordingly. Those of ordinary skill in the art can understand that various substitutions, changes, and modifications are possible without departing from the spirit and scope of the present invention. The present invention should not be limited to the content disclosed in the embodiments of this specification, and the protection scope of the present invention shall be subject to the scope defined by the claims.

Claims

1. A distributed SMT solving method based on combination and problem decomposition, characterized in that It includes the following steps: The Leader process assigns Worker processes to the SMT problem to be solved. The Leader process adds the original problem as the root node to the partitioning tree and continuously updates the information of the partitioning tree during the solving process; the task generator in the Leader process generates tasks and adds them to the task cache queue, and the task scheduler schedules the tasks in the queue and assigns tasks to the Worker processes, including preprocessing simplification tasks, child node generation tasks, and combined solving tasks. The Worker process executes relevant tasks according to the control signals from the Leader process. The Leader process listens to and collects the task running results from each Worker process, and then obtains the solution result of the SMT problem. The task generator continuously generates tasks and adds them to the task cache queue according to the status and solving information of the partitioning tree; for the sub-problem formulas corresponding to all child nodes, the task generator first generates preprocessing simplification tasks for them to improve the efficiency and quality of subsequent solving and sub-problem partitioning; then, the task generator generates child node generation tasks and combined solving tasks for the nodes according to the global information of the current Leader process; the child node generation tasks heuristically configure the number of child nodes generated and the partitioning types, and the combined solving tasks heuristically configure the types of serial solvers, parameters, and solving durations. In the initial stage, a node only generates one combined solution task. As the solution progresses, if the task is not saturated and the Worker idle rate is relatively high, the number of combined solution tasks of the same node is appropriately increased to avoid waste of computing resources as much as possible. When the task is not saturated, the task scheduler preferentially executes the subtask generation tasks of child nodes. When there are no subtask generation tasks to be run, the combined solution tasks are assigned to Workers for execution. The relatively high Worker idle rate is defined as that when the number of idle Workers exceeds the threshold p w for a duration exceeding the threshold T w , and the average running duration of the subtask generation tasks of child nodes exceeds the threshold T p ; when the Leader process discovers that the Worker idle rate is relatively high, it increments by one the key parameter in the subtask generation tasks of child nodes, that is, the number of subtasks N p generated each time a division is made, and sets T w to 1.5×T w . The Leader increments by one the number of combined solution tasks N port of the same node; The Worker process includes a preprocessor, a partitioner, and a serial solver, and executes relevant tasks according to the following steps: Preprocessing simplification: Call the preprocessor to simplify the specified task, and after completion, pass the simplified sub-problem to the Leader process and add it to the task buffer queue. The preprocessing simplification includes: parsing and converting the bit-vector formula corresponding to the given task into a DAG for storage, performing a series of constraint propagations on the maintained DAG, inferring and maintaining the feasible domain and fixed assignments of variables, merging equivalent variables, and eliminating redundant statements in the original problem, thereby reducing the problem scale and narrowing the search space; the preprocessing simplification also includes: bit-vector arithmetic equation processing, normalization, integer flattening, three-layer rewriting, unconstrained variable elimination, pure literal elimination, and equivalent clause replacement. Child node generation: Call the partitioner to generate a specified number of child nodes for the specified task according to term-level partitioning or variable-level partitioning; the term-level partitioning refers to partitioning the problem by specifying different Boolean assignments of literals at the Boolean literal level of SAT; the variable-level partitioning refers to delving into the theory level of SMT, collecting the feasible domains of variables under the corresponding theory through constraint propagation techniques under the corresponding theory, and heuristically partitioning the theory variables on this basis to generate sub-problems. Combined solving: Call the specified serial solver and use the specified strategy to solve the specified task. Task termination: Terminate the task currently being performed by the current Worker process.

2. The method according to claim 1, characterized in that, The partitioning tree is a rooted tree that contains several nodes. The root node represents the original problem, and the parent and child nodes satisfy the definition of partitioning. Each node in the partitioning tree represents a sub-problem formula generated during the solution process, and the node contains the following information: the parent node, child nodes, solution status, and the solution strategy assigned to the Worker process.

3. The method according to claim 1, characterized in that, The Leader process listens for and collects the task execution results from each Worker process, including: Preprocessing and simplification: Mark the status of the corresponding node as "simplified but unsolved", and mark the status of the corresponding Worker process as "idle"; Child node generation: Insert the generated child nodes into the corresponding positions in the partitioning tree, and add the preprocessing and simplification tasks of the child nodes to the task cache queue; Combined solution: Update the solution status of the corresponding node according to the solution result, and send termination signals to other Worker processes that solve this task with different solution strategies.

4. The method according to claim 1, wherein When the status of a node is updated to "satisfiable" or "unsatisfiable", the Leader process performs status reasoning and propagation according to the following rules: The "satisfiable" status of any node in the partitioning tree represents the "satisfiable" status of the original problem, and the variable assignment corresponding to this node is used as the variable assignment of the original problem; All child nodes of an "unsatisfiable" node in the partitioning tree should be "unsatisfiable"; If all child nodes of a node are "unsatisfiable", then this node is also "unsatisfiable"; When the Leader process detects that any node in the partitioning tree obtains a "satisfiable" result, or detects that the root node obtains an "unsatisfiable" result, the solution of the original problem is successful, all Worker processes are terminated, relevant resources are recycled, and temporary files and memory are cleared.

5. An SMT distributed solving system based on combination and problem decomposition using the method according to any one of claims 1 to 4, characterized in that, It includes a partitioning tree, a task generator, and a task scheduler located in the Leader process, as well as a preprocessor, a partitioner, and a serial solver located in the Worker process. The Leader process adds the original problem as the root node to the partitioning tree and continuously updates the information of the partitioning tree during the solution process. The task generator generates tasks and adds them to the task cache queue. The task scheduler schedules the tasks in the queue and assigns tasks to the Worker processes, including preprocessing and simplification tasks, child node generation tasks, and combined solution tasks. The preprocessor, partitioner, and serial solver of the Worker process execute relevant tasks according to the control signals of the Leader process. The Leader process listens for and collects the task execution results from each Worker process, and thus obtains the solution result of the SMT problem.

6. A computer device, characterized in that, It includes a memory and a processor. The memory stores a computer program, and the computer program is configured to be executed by the processor. The computer program includes instructions for executing the method according to any one of claims 1 to 4.

7. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores a computer program, and when the computer program is executed by a computer, it implements the method according to any one of claims 1 to 4.

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