Peak current sampling circuit, switching power supply controller and switching power supply

Abstract

The application discloses a peak current sampling circuit, a switching power supply controller and a switching power supply. The switching power supply uses a power switch tube to control the power transmission from an input end to an output end, so as to generate an output voltage according to an input voltage. The peak current sampling circuit comprises a voltage sampling module and a temperature compensation module. The input end of the voltage sampling module is connected with the drain of the power switch tube, and the voltage sampling module is used for sampling the drain-source voltage difference of the power switch tube synchronously according to the on and off actions of the power switch tube, so as to obtain a first sampling signal with a positive temperature coefficient. The temperature compensation module is used for temperature compensation of the first sampling signal, so as to obtain a second sampling signal with a zero temperature coefficient. The second sampling signal carries the peak current information of the switching power supply. The application can realize the peak current sampling without setting a sampling resistor in the switching power supply, so that the power consumption and cost of the circuit can be reduced, and meanwhile, the sampling precision of the circuit can be ensured.

Description

Technical Field

[0001] This invention relates to the field of electronic technology, and more specifically, to a peak current sampling circuit, a switching power supply controller, and a switching power supply. Background Technology

[0002] With the increasing demand for power electronic products and the development of semiconductor technology, power management chips are being used more widely in portable computers, mobile phones, personal digital assistants, and other portable or non-portable electronic devices. Switching power supply converters use power switching transistors to control the transfer of electrical energy from the input to the output, thus providing a constant output voltage and / or output current. To achieve efficient and stable output, the operating state of the converter typically needs to be monitored and regulated. Peak current control is a common control method that adjusts the output voltage by monitoring the peak current of the power switching transistors. However, as... Figure 1 As shown, traditional peak current sampling methods typically require a sampling resistor Rcs connected in series with the source terminal of the power switch to measure the current. While simple, this method has several drawbacks. First, the sampling resistor introduces additional power loss, reducing the overall system efficiency. Second, the presence of the sampling resistor increases circuit complexity, especially in high-power applications where the power rating of the sampling resistor is required, leading to increased size and cost. Furthermore, the sampling resistor may introduce noise and interference, affecting the accuracy of current sampling. Summary of the Invention

[0003] In view of this, the purpose of the present invention is to provide a peak current sampling circuit, a switching power supply controller, and a switching power supply, which can improve the sampling accuracy of the circuit, improve the circuit efficiency, and reduce the cost while saving sampling resistors.

[0004] According to one aspect of the present invention, a peak current sampling circuit is provided, comprising: a voltage sampling module, wherein the input terminal of the voltage sampling module is coupled to a first terminal of a power switch transistor, and the second terminal of the power switch transistor is coupled to a first reference ground, the voltage sampling module sampling the voltage difference between the first terminal and the second terminal of the power switch transistor during the conduction period of the power switch transistor to obtain a first sampling signal; and a temperature compensation module for performing temperature compensation on the first sampling signal to obtain a second sampling signal with zero temperature coefficient.

[0005] Optionally, the second sampling signal characterizes the peak current information of the switching power supply.

[0006] Optionally, the first sampled signal has a positive temperature coefficient.

[0007] Optionally, the voltage sampling module includes: a first transistor and a second transistor connected in series between the input terminal of the input voltage and the output terminal of the first sampling signal, wherein the first transistor is normally on; a third transistor connected between the output terminal of the first sampling signal and a first reference ground; and a logic unit for controlling the on and off of the second transistor and the third transistor according to a switch control signal and / or a switch drive signal, wherein the second transistor and the third transistor are alternately turned on, and the second transistor is used to turn on when the power switch is turned on, and the third transistor is used to turn on when the power switch is turned off.

[0008] Optionally, when the logic unit controls the turn-on and turn-off of the second transistor and the third transistor according to the switch control signal and the switch drive signal, the logic unit controls the turn-on time of the second transistor and the turn-off time of the third transistor according to the switch drive signal, and the voltage sampling module starts sampling the voltage difference between the first terminal and the second terminal of the power switch; when the logic unit controls the turn-off time of the second transistor and the turn-on time of the third transistor according to the switch control signal, the voltage sampling module ends sampling the voltage difference between the first terminal and the second terminal of the power switch.

[0009] Optionally, the logic unit includes: a buffer, the input of which is used to receive the switch drive signal; a NAND gate, the first input of which is connected to the output of the buffer, the second input of which is used to receive the switch control signal, and the output of which is connected to the control terminal of the third transistor; and an inverter, the input of which is connected to the output of the NAND gate, and the output of which is connected to the control terminal of the second transistor.

[0010] Optionally, the temperature compensation module includes: a voltage-to-current conversion unit for converting the first sampled signal in voltage form into a first current signal; a current mirroring unit, the current mirroring unit including a first current terminal and a second current terminal, the first current terminal being connected to the voltage-to-current conversion unit at a first node, the current mirroring unit being used to mirror the first current signal into a second current signal; and a first resistor, the first resistor being connected to the second current terminal of the current mirroring unit at a second node, the first resistor being used to convert the second current signal into the second sampled signal in voltage form.

[0011] Optionally, it further includes a dynamic acceleration module connected to the first node and the second node, the dynamic acceleration module being used to keep the transistors in the current mirror unit in a normally-on state to improve the switching speed of the temperature compensation module.

[0012] Optionally, the voltage-to-current conversion unit includes: a first current source and a fourth transistor connected in series between the power supply voltage and a first reference ground, the control terminal of the fourth transistor being connected to the first sampling signal; and a fifth transistor and a sixth transistor connected in series between the first node and the first reference ground, the control terminal of the fifth transistor being connected to a third node between the first current source and the fourth transistor, and the control terminal of the sixth transistor being connected to the power supply voltage.

[0013] Optionally, the current mirror unit includes a seventh transistor and an eighth transistor, the first terminals of the seventh transistor and the eighth transistor being connected to a power supply voltage, the control terminals of the seventh transistor and the eighth transistor being connected to the second terminal of the seventh transistor, the second terminal of the seventh transistor being connected to the first node as the first current terminal, and the second terminal of the eighth transistor being connected to the second node as the second current terminal.

[0014] Optionally, the dynamic acceleration module includes: a second current source connected between the first node and the first reference ground; and a third current source connected between the second node and the first reference ground, wherein the current ratio between the second current source and the third current source is equal to the mirror ratio of the current mirror unit.

[0015] Optionally, the first transistor is a depletion-type NMOS transistor, and the control terminal of the first transistor is connected to the first reference ground.

[0016] Optionally, the first transistor is a high-voltage junction field-effect transistor.

[0017] Optionally, the second transistor is an enhancement-mode NMOS transistor, and the third transistor is an enhancement-mode NMOS transistor.

[0018] According to another aspect of the present invention, a switching power supply controller is provided for controlling a power conversion circuit for converting an input voltage into an output voltage. The switching power supply controller includes: a switching control circuit for generating a switching control signal to control the switching operation of a power switching transistor; a driving circuit connected to the gate of the power switching transistor for generating a switching driving signal based on the switching control signal to drive the power switching transistor to turn on or off; and a peak current sampling circuit, including: a voltage sampling module, the input terminal of which is coupled to the drain of the power switching transistor, the source terminal of which is coupled to a first reference ground, the voltage sampling module sampling the drain-source voltage difference of the power switching transistor during the on-state of the power switching transistor to obtain a first sampling signal; and a temperature compensation module for temperature compensation of the first sampling signal to obtain a second sampling signal with zero temperature coefficient.

[0019] Optionally, the second sampling signal characterizes the peak current information of the switching power supply.

[0020] Optionally, the first sampled signal has a positive temperature coefficient.

[0021] Optionally, the voltage sampling module includes: a first transistor and a second transistor connected in series between the input terminal of the input voltage and the output terminal of the first sampling signal, wherein the first transistor is normally on; a third transistor connected between the output terminal of the first sampling signal and a first reference ground; and a logic unit for controlling the on and off of the second transistor and the third transistor according to a switch control signal and / or a switch drive signal, wherein the second transistor and the third transistor are alternately turned on, and the second transistor is used to turn on when the power switch is turned on, and the third transistor is used to turn on when the power switch is turned off.

[0022] Optionally, when the logic unit controls the turn-on and turn-off of the second transistor and the third transistor according to the switch control signal and the switch drive signal, the logic unit controls the turn-on time of the second transistor and the turn-off time of the third transistor according to the switch drive signal, and the voltage sampling module starts sampling the voltage difference between the first terminal and the second terminal of the power switch; when the logic unit controls the turn-off time of the second transistor and the turn-on time of the third transistor according to the switch control signal, the voltage sampling module ends sampling the voltage difference between the first terminal and the second terminal of the power switch.

[0023] Optionally, the logic unit includes: a buffer, the input of which is used to receive the switch drive signal; a NAND gate, the first input of which is connected to the output of the buffer, the second input of which is used to receive the switch control signal, and the output of which is connected to the control terminal of the third transistor; and an inverter, the input of which is connected to the output of the NAND gate, and the output of which is connected to the control terminal of the second transistor.

[0024] Optionally, the temperature compensation module includes: a voltage-to-current conversion unit for converting the first sampled signal in voltage form into a first current signal; a current mirroring unit, the current mirroring unit including a first current terminal and a second current terminal, the first current terminal being connected to the voltage-to-current conversion unit at a first node, the current mirroring unit being used to mirror the first current signal into a second current signal; and a first resistor, the first resistor being connected to the second current terminal of the current mirroring unit at a second node, the first resistor being used to convert the second current signal into the second sampled signal in voltage form.

[0025] Optionally, the peak current sampling circuit further includes a dynamic acceleration module connected to the first node and the second node. The dynamic acceleration module is used to keep the transistors in the current mirror unit in a normally-on state to improve the switching speed of the temperature compensation module.

[0026] Optionally, the voltage-to-current conversion unit includes: a first current source and a fourth transistor connected in series between the power supply voltage and a first reference ground, the control terminal of the fourth transistor being connected to the first sampling signal; and a fifth transistor and a sixth transistor connected in series between the first node and the first reference ground, the control terminal of the fifth transistor being connected to a third node between the first current source and the fourth transistor, and the control terminal of the sixth transistor being connected to the power supply voltage.

[0027] Optionally, the current mirror unit includes a seventh transistor and an eighth transistor, the first terminals of the seventh transistor and the eighth transistor being connected to a power supply voltage, the control terminals of the seventh transistor and the eighth transistor being connected to the second terminal of the seventh transistor, the second terminal of the seventh transistor being connected to the first node as the first current terminal, and the second terminal of the eighth transistor being connected to the second node as the second current terminal.

[0028] Optionally, the dynamic acceleration module includes: a second current source connected between the first node and the first reference ground; and a third current source connected between the second node and the first reference ground, wherein the current ratio between the second current source and the third current source is equal to the mirror ratio of the current mirror unit.

[0029] Optionally, the first transistor is a depletion-type NMOS transistor, and the control terminal of the first transistor is connected to the first reference ground.

[0030] Optionally, the first transistor is a high-voltage junction field-effect transistor.

[0031] Optionally, the second transistor is an enhancement-mode NMOS transistor, and the third transistor is an enhancement-mode NMOS transistor.

[0032] Optionally, it further includes: a power supply circuit for providing a power supply voltage to the switch control circuit according to the input voltage.

[0033] Optionally, the power conversion circuit includes a floating Buck-Boost topology, a floating Buck topology, a Boost topology, and a flyback topology.

[0034] According to another aspect of the present invention, a switching power supply is provided, comprising: a power conversion circuit, wherein a power switching transistor is used to control the transfer of electrical energy from the input terminal of the power conversion circuit to the output terminal of the power conversion circuit, thereby generating an output voltage according to the input voltage; and the aforementioned switching power supply controller.

[0035] In summary, the peak current sampling circuit for switching power supplies proposed in this application directly samples the drain-source voltage difference of the power switching transistor to obtain the peak current information of the switching power supply. Compared with the prior art, peak current control can be achieved without setting a sampling resistor in the switching power supply. This not only reduces the power consumption and heat generation of the circuit, improves the overall efficiency of the power supply, reduces the circuit cost, and improves the thermal management of the circuit, but also avoids the influence of the accuracy and temperature coefficient of the sampling resistor on the accuracy of current measurement, thus improving the sampling accuracy of the circuit.

[0036] Furthermore, since the on-resistance of the power switching transistor in a switching power supply varies greatly with temperature, it leads to a large sampling deviation. The peak current sampling circuit of this application uses a temperature compensation module to compensate the output of the voltage sampling module for temperature, thereby solving the problem in the prior art where temperature changes cause an increase in the deviation of the on-resistance of the power switching transistor, resulting in a large deviation in sampling accuracy. This allows the circuit to reduce costs while ensuring that the sampling accuracy is not affected.

[0037] In addition, the peak current sampling circuit of this application also uses a dynamic acceleration module to provide bias current to the transistors in the temperature compensation module to improve the switching speed of the temperature compensation module, thereby avoiding the situation where the output signal and input signal of the temperature compensation module are out of sync. Attached Figure Description

[0038] The above and other objects, features and advantages of the present invention will become clearer from the following description of embodiments of the invention with reference to the accompanying drawings.

[0039] Figure 1 A schematic diagram of the structure of a prior art switching power supply is shown.

[0040] Figure 2 A schematic diagram of a switching power supply with an auxiliary winding-free flyback topology according to a first embodiment of the present invention is shown.

[0041] Figure 3 A schematic diagram of a switching power supply controller according to an embodiment of the present invention is shown.

[0042] Figure 4 A schematic diagram of a peak current sampling circuit according to an embodiment of the present invention is shown.

[0043] Figure 5 Show Figure 4 The circuit diagram of the voltage sampling module is shown.

[0044] Figure 6 Show Figure 5 Timing diagram of the voltage sampling module in the diagram.

[0045] Figure 7 Show Figure 4 The circuit diagram of the temperature compensation module and the dynamic acceleration module is shown.

[0046] Figure 8 A schematic diagram of a switching power supply with an auxiliary winding flyback topology according to a second embodiment of the present invention is shown.

[0047] Figure 9 A schematic diagram of a switching power supply with a buck topology according to a third embodiment of the present invention is shown. Detailed Implementation

[0048] Various embodiments of the invention will now be described in more detail with reference to the accompanying drawings. In the various drawings, the same elements are indicated by the same or similar reference numerals. For clarity, the various parts in the drawings are not drawn to scale.

[0049] Many specific details of the invention, such as the structure, materials, dimensions, processing methods, and techniques of the components, are described below to provide a clearer understanding of the invention. However, as those skilled in the art will understand, the invention may be implemented without following these specific details.

[0050] It should be understood that, in the following description, "circuit" refers to a conductive loop consisting of at least one element or sub-circuit connected by an electrical or electromagnetic link. When an element or circuit is said to be "connected" to another element or "connected" between two nodes, it can be directly coupled or connected to the other element, or there may be intermediate elements. The connection between elements can be physical, logical, or a combination thereof. Conversely, when an element is said to be "directly coupled to" or "directly connected" to another element, it means that there are no intermediate elements between them.

[0051] In this application, the transistor may include one selected from bipolar transistors or field-effect transistors. The first terminal and the second terminal of the transistor are respectively the high potential terminal and the low potential terminal on the current path. The control terminal is used to receive a control signal to control the transistor's turn-on and turn-off. A MOSFET (Metal-Oxide-Semiconductor Field-Effect Transistor) includes a first terminal, a second terminal, and a control terminal. In the MOSFET's on state, current flows from the first terminal to the second terminal. The first terminal, the second terminal, and the control terminal of a PMOS transistor are the source, the drain, and the gate, respectively. The first terminal, the second terminal, and the control terminal of an NMOS transistor are the drain, the source, and the gate, respectively.

[0052] This invention can be presented in various forms, some of which will be described below.

[0053] Figure 2 A schematic diagram of a switching power supply with an auxiliary winding-free flyback topology according to a first embodiment of the present invention is shown. Figure 2 As shown, the switching power supply 200 includes a power conversion circuit 210, a switching power supply controller 220, and a feedback circuit 230. The power conversion circuit 210 is used to provide an output current Iout to the load Ro according to the input voltage Vin, and the switching power supply controller 220 is used to control the operating state of the power conversion circuit 210.

[0054] For example, the first embodiment of the present invention provides a switching power supply with a flyback topology without auxiliary windings. The power conversion circuit 210 includes a power switch Q1, a transformer T1 (including a primary winding L1 and a secondary winding L2), a freewheeling diode D1, and an output capacitor Co.

[0055] In this circuit, the drain of the power switch Q1 (e.g., transistor, MOSFET, SCR, etc.) is connected to the input voltage Vin, the source is connected to the reference ground VS (in this example, the reference ground VS is floating ground), and the gate is connected to the drive pin of the switching power supply controller 220 to receive the switching drive signal DRV. The power switch Q1 is used to control the power transfer from the input to the output terminal according to the switching drive signal DRV. The first terminal of the primary winding L1 is connected to the reference ground VS, and the second terminal is connected to the reference ground GND1. The anode of the diode D1 is connected to the first terminal of the secondary winding L2, the cathode of the diode D1 is connected to the first terminal of the output capacitor Co and the load Ro, and the second terminal of the output capacitor Co is connected to the second terminal of the secondary winding L2 and the reference ground GND2.

[0056] Feedback circuit 230 is connected between reference ground VS and reference ground GND1 to divide the output voltage Vout to obtain feedback signal FB. For example, feedback circuit 230 includes resistors R1 and R2 connected in series between reference ground VS and reference ground GND1, with the intermediate node of resistors R1 and R2 used to provide the feedback signal FB.

[0057] The switching power supply controller 220 is connected to the gate of the power switch Q1 and is used to generate a switching drive signal DRV applied to the power switch Q1 based on the feedback signal FB of the output voltage Vout, so as to control the turn-on and turn-off of the power switch Q1.

[0058] Figure 3 A schematic diagram of a switching power supply controller according to an embodiment of the present invention is shown. Figure 3 As shown, the switching power supply controller 220 includes a peak current sampling circuit 201, a switching control circuit 202, a power supply circuit 203, and a drive circuit 204.

[0059] The peak current sampling circuit 201 is connected to the drain of the power switch Q1 and is used to obtain a sampling signal CS that characterizes the peak current information of the power conversion circuit 210 based on the drain-source voltage difference of the power switch Q1. Specifically, the peak current sampling circuit 201 samples the drain-source voltage difference of the power switch Q1 synchronously according to the turn-on and turn-off actions of the power switch Q1 to obtain the sampling signal CS.

[0060] The switching control circuit 202 generates a switching control signal PWM for controlling the switching action of the power switch Q1 based on the feedback signal FB and the sampling signal CS, so as to stabilize the output voltage Vout at a set value. In an exemplary embodiment, for a switching power supply controller in Constant Off-Time Control (COT) mode, the switching control circuit 202 controls the turn-on time of the power switch Q1 according to a set clock signal, and controls the turn-off time of the power switch Q1 according to the feedback signal FB and the sampling signal CS.

[0061] The power supply circuit 203 is connected to the input voltage Vin and is used to provide the normal operating power supply voltage Vcc to the switch control circuit 202 according to the input voltage Vin. In addition, the switching power supply controller 220 also includes an input capacitor Cin connected between the power supply terminal of the switch control circuit 202 and the reference ground VS.

[0062] The input terminal of the drive circuit 204 is connected to the output of the switch control circuit 202, and the output terminal of the drive circuit 204 is connected to the gate of the power switch Q1. The drive circuit 204 is used to generate a switch drive signal DRV applied to the gate of the power switch Q1 according to the output signal PWM of the switch control circuit 202, so as to control the turn-on and turn-off of the power switch Q1.

[0063] Figure 4 A schematic diagram of a peak current sampling circuit according to an embodiment of the present invention is shown. Figure 4 As shown, the peak current sampling circuit 300 includes a voltage sampling module 310 and a temperature compensation module 320.

[0064] The input terminal of the voltage sampling module 310 is connected to the drain of the power switch Q1, and is used to sample the drain-source voltage difference of the power switch Q1 synchronously according to the switching action of the power switch Q1, so as to obtain a first sampling signal CS1 with a positive temperature coefficient.

[0065] The temperature compensation module 320 is used to perform temperature compensation on the first sampling signal CS1 output by the voltage sampling module 310 to obtain a second sampling signal CS2 with zero temperature coefficient, wherein the second sampling signal CS2 carries the peak current information of the switching power supply.

[0066] Therefore, the peak current sampling circuit 300 of the present invention uses the temperature compensation module 320 to compensate the output of the voltage sampling module 310, thereby solving the problem in the prior art where temperature changes cause an increase in the on-resistance deviation of the power switching transistor, resulting in a large deviation in sampling accuracy.

[0067] In an optional embodiment, the peak current sampling circuit 300 further includes a dynamic acceleration module 330. The dynamic acceleration module 330 improves the switching speed of the temperature compensation module 320 by providing bias current to the transistors in the temperature compensation module 320, thereby avoiding the situation where the output signal and input signal of the temperature compensation module 320 are out of sync.

[0068] Figure 5 Show Figure 4 The circuit diagram of the voltage sampling module in the image. Figure 6 Show Figure 5 The timing diagram of the voltage sampling module in the image is shown. Figure 5 As shown, the voltage sampling module 310 includes transistors Q2, Q3, and Q4, and a logic unit 311. Transistors Q2 and Q3 are connected in series between the input terminal of the input voltage Vin and the output terminal of the first sampling signal CS1. The first terminal of transistor Q4 is connected to the output terminal of the first sampling signal CS1, and the second terminal of transistor Q4 is connected to the floating ground VS. The logic unit 311 is used to control the on / off state of transistors Q3 and Q4 according to the switching control signal PWM and / or the switching drive signal DRV.

[0069] In this embodiment, transistor Q2 is a high-voltage MOSFET, which is in a "normally on" state and can be equivalent to a protective resistor. Transistor Q3 is a medium-voltage MOSFET, and transistor Q4 is a low-voltage MOSFET. It should be noted that in this embodiment, MOSFETs are classified into high-voltage, medium-voltage, and low-voltage MOSFETs based on their rated maximum drain-source voltage (Vds). In one exemplary implementation, the operating voltage range of low-voltage MOSFETs is typically between 0V and 5V, the operating voltage range of medium-voltage MOSFETs is between 0V and 30V, and the operating voltage range of high-voltage MOSFETs is above 200V.

[0070] Furthermore, in this embodiment, transistor Q2 is a depletion-type NMOS transistor, such as a JEFT transistor (Junction Field-Effect Transistor), transistor Q3 is an enhancement-type NMOS transistor, transistor Q4 is an enhancement-type NMOS transistor, the drain of transistor Q2 is connected to the input voltage Vin, the source of transistor Q2 is connected to the drain of transistor Q3, the gate of transistor Q2 is connected to the floating ground VS, the source of transistor Q3 is connected to the output terminal of the first sampling signal CS1, the drain of transistor Q4 is connected to the output terminal of the first sampling signal CS1, the source of transistor Q4 is connected to the floating ground VS, and the gates of transistors Q3 and Q4 are connected to logic unit 311.

[0071] It should be noted that since the switch drive signal DRV is obtained by amplifying the switch control signal PWM, and their waveforms are quite similar, the logic unit 311 in this embodiment can also control the on and off of transistors Q3 and Q4 based solely on either the switch control signal PWM or the switch drive signal DRV. In the first exemplary embodiment, the logic unit 311 controls the on and off of transistors Q3 and Q4 based on the switch control signal PWM; in the second exemplary embodiment, the logic unit 311 controls the on and off of transistors Q3 and Q4 based on the switch drive signal DRV; in the third exemplary embodiment, the logic unit 311 controls the on and off of transistors Q3 and Q4 simultaneously based on both the switch control signal PWM and the switch drive signal DRV. Furthermore, when logic unit 311 controls the turn-on and turn-off of transistors Q3 and Q4 simultaneously according to the switch control signal PWM and the switch drive signal DRV, it controls the turn-on time of transistor Q3 and the turn-off time of transistor Q4 according to the switch drive signal DRV, and controls the turn-off time of transistor Q3 and the turn-on time of transistor Q4 according to the switch control signal PWM.

[0072] The circuit structure of the logic unit 311 in this embodiment will be described below using a third exemplary implementation as an example. Specifically, the logic unit 311 includes a buffer G1, a NAND gate G2, and an inverter G3. The input terminal of the buffer G1 is used to receive the switch drive signal DRV; the first input terminal of the NAND gate G2 is connected to the output terminal of the buffer G1; the second input terminal of the NAND gate G2 is used to receive the switch control signal PWM; the output terminal of the NAND gate G2 is connected to the gate of transistor Q4 and the input terminal of the inverter G3; and the output terminal of the inverter G3 is connected to the gate of transistor Q3. Therefore, in this embodiment, the gates of transistors Q3 and Q4 are subjected to mutually inverted control signals, and thus, in actual operation, transistors Q3 and Q4 are non-overlapping conductions.

[0073] It should be noted that, for the first or second exemplary implementation described above, it is only necessary to simultaneously receive the switch control signal PWM or the switch drive signal DRV at the input terminal of buffer G1 and the second input terminal of NAND gate G2.

[0074] refer to Figure 6The circuit consists of a switching control signal PWM (PWM signal) that controls the power switch Q1 to turn on and off, a switching drive signal DRV (DRV signal) that is the output signal of the drive circuit, Vin (input voltage of the switching power supply), and CS1 (output of the voltage sampling module 310). When the power switch Q1 is off, the switching control signal PWM is low, the switching drive signal DRV is also low, the NAND gate G2 outputs a high level, controlling transistor Q4 to turn on, and the inverter G3 outputs a low level, controlling transistor Q3 to turn off. This achieves signal isolation between the input voltage Vin and the first sampling signal CS1, and the first sampling signal CS1 is pulled down to ground through transistor Q4. When the power switch Q1 is on, both the switching control signal PWM and the switching drive signal DRV are high. After a delay by the buffer G1, the NAND gate G2 outputs a low level, turning off transistor Q4, and the inverter G3 outputs a high level, turning on transistor Q3. Therefore, the first sampling signal CS1 is pulled high to a level equal to the input voltage Vin.

[0075] Figure 7 Show Figure 4 The circuit diagrams for the temperature compensation module and the dynamic acceleration module are shown below. Figure 7 As shown, the temperature compensation module 320 in this embodiment includes a voltage-to-current conversion unit 321, a current mirroring unit 322, and a resistor R3. The voltage-to-current conversion unit 321 converts the voltage-form first sampling signal CS1 into a first current signal Iq1. The current mirroring unit 322 includes a first current terminal and a second current terminal. The first current terminal is connected to the voltage-to-current conversion unit 321 at node A1. The current mirroring unit 322 mirrors the first current signal Iq1 proportionally to a second current signal Iq2 on the second current terminal. One end of the resistor R3 is connected to the second current terminal of the current mirroring unit 322 at node A2, and the other end of the resistor R3 is connected to the floating ground VS. It converts the second current signal Iq2 into a voltage-form second sampling signal CS2.

[0076] Specifically, the voltage-to-current conversion unit 321 includes a current source I1, transistors T1 and T2, and transistor Q7. Transistor T1 is a PNP transistor (PNP bipolar junction transistor), transistor T2 is an NPN transistor (NPN bipolar junction transistor), and transistor Q7 is an NMOS transistor. The first terminal of current source I1 is connected to the power supply voltage VDD, and the second terminal of current source I1 is connected to the emitter of transistor T1 and the base of transistor T2. The base of transistor T1 is connected to the first sampling signal CS1, and the collector of transistor T1 is connected to the floating ground VS. The collector of transistor T2 is connected to node A1, the emitter of transistor T2 is connected to the drain of transistor Q7, the gate of transistor Q7 is connected to the power supply voltage VDD, and the source of transistor Q7 is connected to the floating ground VS. In this circuit, transistors T1 and T2 form a voltage follower circuit. Current source I1 provides a fixed bias current to transistor T1. The emitter voltage of transistor T2 is approximately equal to the voltage value of the first sampling signal CS1. The emitter of transistor T2 is connected to the drain of transistor Q7, converting the voltage signal into a current signal Iq1. The gate of transistor Q7 is connected to the power supply voltage VDD and operates in the deep linear region. Its impedance exhibits a positive temperature coefficient.

[0077] The current mirror unit 322 includes transistors Q5 and Q6, which are, for example, PMOS transistors. The sources of transistors Q5 and Q6 are connected to the power supply voltage VDD. The drain of transistor Q5 serves as the first current terminal of the current mirror unit 322 and is connected to node A1. The drain of transistor Q6 serves as the second current terminal of the current mirror unit 322 and is connected to node A2. The gates of transistors Q5 and Q6 are connected to the drain of transistor Q5. The mirror circuit formed by transistors Q5 and Q6 mirrors the first current signal Iq1 to a second current signal Iq2. Then, the second current signal Iq2 is converted into a voltage-form second sampling signal CS2 through resistor R3. Assuming the mirror ratio of transistors Q5 and Q6 is K, then Iq2 = K * Iq1, and consequently, CS2 = Iq2 * R3 = K * Iq1 * R3 = (CS1 / R3) * (Iq2 * Iq1 * R ... Q7 )*K*R3. Where R Q7 Let be the on-resistance of transistor Q7. Since the first sampling signal CS1 has a positive temperature coefficient, the on-resistance of transistor Q7 has a positive temperature coefficient, and the resistor R3 and the mirror ratio K have zero temperature coefficients, it can be concluded that the second sampling signal CS2 has a zero temperature coefficient that is independent of temperature.

[0078] The dynamic acceleration module 330 includes constant current sources I2 and I3 connected to nodes A1 and A2 respectively. Current source I2 is connected between node A1 and the floating ground, and current source I3 is connected between node A2 and the floating ground. Current sources I2 and I3 are used to provide bias to transistors Q5 and Q6 in the current mirror unit 322, so that transistors Q5 and Q6 are in a normally on state. When the input of the temperature compensation module 320 changes, the gate potentials of transistors Q5 and Q6 can change rapidly, avoiding the extra time consumed in transitioning from the off state to the on state, and enabling the output of the temperature compensation module 320 to be established quickly. Furthermore, the current ratio of current sources I2 and I3 is equal to the mirror ratio of the current mirror unit 322, i.e., I3 = K * I2, so as not to affect the sampling accuracy of the circuit.

[0079] Figure 8 A schematic diagram of a switching power supply with an auxiliary winding according to a second embodiment of the present invention is shown. (See reference) Figure 8 ,exist Figure 8 In the second embodiment of the switching power supply shown, the switching power supply controller 220 and peak current sampling circuit 300 of the above embodiments are applied to a flyback topology switching power supply with an auxiliary winding. This switching power supply 400 includes a power conversion circuit 410, a switching power supply controller 420, and a feedback circuit 430. Similarly, the power conversion circuit 410 provides an output current Iout to the load Ro according to the input voltage Vin, and the switching power supply controller 420 controls the operating state of the power conversion circuit 410.

[0080] The switching power supply 400 is basically the same as the switching power supply 200 in the first embodiment, except that in the switching power supply 400, the transformer T1 is located on the high side, the switching power supply controller 420 and the power switch Q1 are located on the low side, and the first end of the primary winding L1 is connected to the input voltage Vin, the second end of the primary winding L1 is connected to the DRAIN terminal of the switching power supply controller 420 and the drain of the power switch Q1, and the source of the power switch Q1 is connected to the reference ground VS. Furthermore, the transformer T1 in this embodiment also includes an auxiliary winding L3. The first end of the auxiliary winding L3 is connected to the power supply terminal Vcc of the switching power supply controller 420 via diode D2, and the second end of the auxiliary winding L3 is connected to the reference ground GND1. The feedback circuit 430 is used to divide the voltage of the auxiliary winding L3 to obtain the feedback signal FB. Apart from this, the switching power supply controller 420 in this embodiment is basically the same as the switching power supply controller 220 in the first embodiment, and will not be described again here.

[0081] Figure 9 A schematic diagram of a switching power supply with a buck topology according to a third embodiment of the present invention is shown. (Reference) Figure 9 ,exist Figure 9In the second embodiment of the switching power supply shown, the switching power supply controller 220 and peak current sampling circuit 300 of the above embodiments are applied to a buck topology switching power supply 500. This switching power supply 500 includes a power conversion circuit 510, a switching power supply controller 520, and a feedback circuit 530. Similarly, the power conversion circuit 510 is used to provide an output current Iout to the load Ro according to the input voltage Vin, and the switching power supply controller 520 is used to control the operating state of the power conversion circuit 510.

[0082] The switching power supply 500 differs from the switching power supply 200 of the first embodiment in that the power conversion circuit 510 includes a power switch Q1, an inductor L1, a freewheeling diode D1, and an output capacitor Co. The drain of the power switch Q1 (e.g., a transistor, MOSFET, SCR, etc.) is connected to the input voltage Vin, the source is connected to reference ground VS (in this example, reference ground VS is floating ground), and the gate is connected to the drive pin of the switching power supply controller 520 to receive the switching drive signal DRV. The power switch Q1 is used to control the power transfer from the input to the output terminal according to the switching drive signal DRV. The first end of the inductor L1 is connected to reference ground VS, the second end is connected to the output capacitor Co and the first end of the load Ro, the cathode of the diode D1 is connected to reference ground VS and the first end of the inductor L1, and the anode of the diode D1 is connected to the second end of the output capacitor Co and the load Ro, as well as the reference ground GND1. A feedback circuit 530 is connected between the two ends of the inductor L1 to divide the voltage of the inductor L1 to obtain the feedback signal FB. Apart from the above, the switching power supply controller 520 in this embodiment is basically the same as the switching power supply controller 220 in the first embodiment, and will not be described again here.

[0083] It should be noted that although the present invention is described in the above embodiments using buck topology and flyback topology switching power supplies, the present invention is not limited thereto. Those skilled in the art can apply the peak current sampling circuit and switching power supply controller of the present invention to floating Buck-Boost topology, floating Buck topology, Boost topology and flyback topology switching power supplies as needed.

[0084] In an optional embodiment, the peak current sampling circuit, switching power supply controller, and switching power supply described above can be applied in a Power over Ethernet (PoE) system to perform power conversion and regulation functions.

[0085] In summary, the peak current sampling circuit for switching power supplies proposed in this application directly samples the drain-source voltage difference of the power switching transistor to obtain the peak current information of the switching power supply. Compared with the prior art, peak current control can be achieved without setting a sampling resistor in the switching power supply. This not only reduces the power consumption and heat generation of the circuit, improves the overall efficiency of the power supply, reduces the circuit cost, and improves the thermal management of the circuit, but also avoids the influence of the accuracy and temperature coefficient of the sampling resistor on the accuracy of current measurement, thus improving the sampling accuracy of the circuit.

[0086] Furthermore, since the temperature of the power switching transistor in a switching power supply varies greatly, it can lead to an increase in the deviation of the on-resistance of the power switching transistor. The peak current sampling circuit of this application uses a temperature compensation module to compensate for the temperature of the output of the voltage sampling module, thereby solving the problem in the prior art where the temperature change leads to an increase in the deviation of the on-resistance of the power switching transistor, resulting in a large deviation in sampling accuracy. This allows the circuit to reduce costs while ensuring that the sampling accuracy is not affected.

[0087] In addition, the peak current sampling circuit of this application also uses a dynamic acceleration module to provide bias current to the transistors in the temperature compensation module to improve the switching speed of the temperature compensation module, thereby avoiding the situation where the output signal and input signal of the temperature compensation module are out of sync.

[0088] It should be noted that, in this document, relational terms such as "first" and "second" are used merely to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element.

[0089] As described above, these embodiments of the present invention do not exhaustively cover all details, nor do they limit the invention to the specific embodiments described. Clearly, many modifications and variations can be made based on the above description. This specification selects and specifically describes these embodiments to better explain the principles and practical applications of the invention, thereby enabling those skilled in the art to effectively utilize the invention and its modifications. The invention is limited only by the claims and their full scope and equivalents.

Claims

1. A peak current sampling circuit, comprising: A voltage sampling module, wherein the input terminal of the voltage sampling module is coupled to the first terminal of the power switch transistor, and the second terminal of the power switch transistor is coupled to a first reference ground, and the voltage sampling module samples the voltage difference between the first terminal and the second terminal of the power switch transistor during the conduction period of the power switch transistor to obtain a first sampling signal; as well as A temperature compensation module is used to perform temperature compensation on the first sampled signal to obtain a second sampled signal with zero temperature coefficient. The temperature compensation module further includes a dynamic acceleration module, which improves the conversion speed of the temperature compensation module by providing bias current to the transistors in the temperature compensation module.

2. The peak current sampling circuit according to claim 1, wherein, The second sampled signal represents the peak current information of the switching power supply.

3. The peak current sampling circuit according to claim 1, wherein, The first sampled signal has a positive temperature coefficient.

4. The peak current sampling circuit according to claim 1, wherein, The voltage sampling module includes: A first transistor and a second transistor are connected in series between the input terminal of the input voltage and the output terminal of the first sampled signal, wherein the first transistor is in a normally on state; A third transistor connected between the output of the first sampled signal and the first reference ground; and A logic unit is configured to control the on / off state of the second transistor and the third transistor according to a switch control signal and / or a switch drive signal. The second transistor and the third transistor are alternately turned on, and the second transistor is used to turn on when the power switch is turned on, and the third transistor is used to turn on when the power switch is turned off.

5. The peak current sampling circuit according to claim 4, wherein, When the logic unit controls the second transistor and the third transistor to turn on and off according to the switch control signal and the switch drive signal, The logic unit controls the turn-on time of the second transistor and the turn-off time of the third transistor according to the switch drive signal, and the voltage sampling module starts to sample the voltage difference between the first and second terminals of the power switch. The logic unit controls the turn-off time of the second transistor and the turn-on time of the third transistor according to the switch control signal, and the voltage sampling module ends the sampling of the voltage difference between the first and second terminals of the power switch.

6. The peak current sampling circuit according to claim 5, wherein, The logic unit includes: A buffer, the input of which is used to receive the switch drive signal; A NAND gate, wherein the first input of the NAND gate is connected to the output of the buffer, the second input of the NAND gate is used to receive the switch control signal, and the output of the NAND gate is connected to the control terminal of the third transistor; and An inverter, the input of which is connected to the output of the NAND gate, and the output of which is connected to the control terminal of the second transistor.

7. The peak current sampling circuit according to claim 1, wherein, The temperature compensation module includes: A voltage-to-current conversion unit is used to convert the first sampled signal in voltage form into a first current signal; A current mirroring unit, comprising a first current terminal and a second current terminal, wherein the first current terminal is connected to the voltage-to-current conversion unit at a first node, and the current mirroring unit is used to mirror the first current signal into a second current signal; and A first resistor is connected to the second current terminal of the current mirror unit at a second node. The first resistor is used to convert the second current signal into the second sampled signal in voltage form.

8. The peak current sampling circuit according to claim 7, wherein, The dynamic acceleration module is connected to the first node and the second node. The dynamic acceleration module is used to keep the transistors in the current mirror unit in a constantly on state in order to improve the conversion speed of the temperature compensation module.

9. The peak current sampling circuit according to claim 7, wherein, The pressure-current conversion unit includes: A first current source and a fourth transistor are connected in series between the power supply voltage and a first reference ground, the control terminal of the fourth transistor being connected to the first sampling signal; and A fifth transistor and a sixth transistor are connected in series between the first node and the first reference ground. The control terminal of the fifth transistor is connected to a third node between the first current source and the fourth transistor. The control terminal of the sixth transistor is connected to the power supply voltage.

10. The peak current sampling circuit according to claim 7, wherein, The current mirror unit includes: A seventh transistor and an eighth transistor, wherein the first terminals of the seventh transistor and the eighth transistor are connected to the power supply voltage, the control terminals of the seventh transistor and the eighth transistor are connected to the second terminal of the seventh transistor, the second terminal of the seventh transistor is connected to the first node as the first current terminal, and the second terminal of the eighth transistor is connected to the second node as the second current terminal.

11. The peak current sampling circuit according to claim 8, wherein, The dynamic acceleration module includes: A second current source connected between the first node and the first reference ground; and A third current source connected between the second node and the first reference ground. The current ratio between the second current source and the third current source is equal to the mirror ratio of the current mirror unit.

12. The peak current sampling circuit according to claim 4, wherein, The first transistor is a depletion-type NMOS transistor, and the control terminal of the first transistor is connected to the first reference ground.

13. The peak current sampling circuit according to claim 12, wherein, The first transistor is a high-voltage junction field-effect transistor.

14. The peak current sampling circuit according to claim 4, wherein, The second transistor is an enhancement-mode NMOS transistor, and the third transistor is an enhancement-mode NMOS transistor.

15. A switching power supply controller for controlling a power conversion circuit, the power conversion circuit being used to convert an input voltage into an output voltage, wherein, The switching power supply controller includes: A switching control circuit is used to generate switching control signals to control the switching action of the power switching transistor. A driving circuit, connected to the gate of the power switch, is used to generate a switching driving signal according to the switching control signal to drive the power switch to turn on or off; and Peak current sampling circuit, including: A voltage sampling module, wherein the input terminal of the voltage sampling module is coupled to the drain of a power switch transistor, and the source terminal of the power switch transistor is coupled to a first reference ground, the voltage sampling module samples the drain-source voltage difference of the power switch transistor during the conduction period of the power switch transistor to obtain a first sampling signal; and A temperature compensation module is used to perform temperature compensation on the first sampled signal to obtain a second sampled signal with zero temperature coefficient. The temperature compensation module further includes a dynamic acceleration module, which improves the conversion speed of the temperature compensation module by providing bias current to the transistors in the temperature compensation module.

16. The switching power supply controller according to claim 15, wherein, The second sampling signal represents the peak current information of the switching power supply.

17. The switching power supply controller according to claim 15, wherein, The first sampled signal has a positive temperature coefficient.

18. The switching power supply controller according to claim 15, wherein, The voltage sampling module includes: A first transistor and a second transistor are connected in series between the input terminal of the input voltage and the output terminal of the first sampled signal, wherein the first transistor is in a normally on state; A third transistor connected between the output of the first sampled signal and the first reference ground; and A logic unit is configured to control the on / off state of the second transistor and the third transistor according to a switch control signal and / or a switch drive signal. The second transistor and the third transistor are alternately turned on, and the second transistor is used to turn on when the power switch is turned on, and the third transistor is used to turn on when the power switch is turned off.

19. The switching power supply controller according to claim 18, wherein, When the logic unit controls the second transistor and the third transistor to turn on and off according to the switch control signal and the switch drive signal, The logic unit controls the turn-on time of the second transistor and the turn-off time of the third transistor according to the switch drive signal, and the voltage sampling module starts to sample the voltage difference between the first and second terminals of the power switch. The logic unit controls the turn-off time of the second transistor and the turn-on time of the third transistor according to the switch control signal, and the voltage sampling module ends the sampling of the voltage difference between the first and second terminals of the power switch.

20. The switching power supply controller according to claim 19, wherein, The logic unit includes: A buffer, the input of which is used to receive the switch drive signal; A NAND gate, wherein the first input of the NAND gate is connected to the output of the buffer, the second input of the NAND gate is used to receive the switch control signal, and the output of the NAND gate is connected to the control terminal of the third transistor; and An inverter, the input of which is connected to the output of the NAND gate, and the output of which is connected to the control terminal of the second transistor.

21. The switching power supply controller according to claim 15, wherein, The temperature compensation module includes: A voltage-to-current conversion unit is used to convert the first sampled signal in voltage form into a first current signal; A current mirroring unit, comprising a first current terminal and a second current terminal, wherein the first current terminal is connected to the voltage-to-current conversion unit at a first node, and the current mirroring unit is used to mirror the first current signal into a second current signal; and A first resistor is connected to the second current terminal of the current mirror unit at a second node. The first resistor is used to convert the second current signal into the second sampled signal in voltage form.

22. The switching power supply controller according to claim 21, wherein, The dynamic acceleration module is connected to the first node and the second node. The dynamic acceleration module is used to keep the transistors in the current mirror unit in a constantly on state in order to improve the conversion speed of the temperature compensation module.

23. The switching power supply controller according to claim 21, wherein, The pressure-current conversion unit includes: A first current source and a fourth transistor are connected in series between the power supply voltage and a first reference ground, the control terminal of the fourth transistor being connected to the first sampling signal; and A fifth transistor and a sixth transistor are connected in series between the first node and the first reference ground. The control terminal of the fifth transistor is connected to a third node between the first current source and the fourth transistor. The control terminal of the sixth transistor is connected to the power supply voltage.

24. The switching power supply controller according to claim 21, wherein, The current mirror unit includes: A seventh transistor and an eighth transistor, wherein the first terminals of the seventh transistor and the eighth transistor are connected to the power supply voltage, the control terminals of the seventh transistor and the eighth transistor are connected to the second terminal of the seventh transistor, the second terminal of the seventh transistor is connected to the first node as the first current terminal, and the second terminal of the eighth transistor is connected to the second node as the second current terminal.

25. The switching power supply controller according to claim 22, wherein, The dynamic acceleration module includes: A second current source connected between the first node and the first reference ground; and A third current source connected between the second node and the first reference ground. The current ratio between the second current source and the third current source is equal to the mirror ratio of the current mirror unit.

26. The switching power supply controller according to claim 18, wherein, The first transistor is a depletion-type NMOS transistor, and the control terminal of the first transistor is connected to the first reference ground.

27. The switching power supply controller according to claim 26, wherein, The first transistor is a high-voltage junction field-effect transistor.

28. The switching power supply controller according to claim 18, wherein, The second transistor is an enhancement-mode NMOS transistor, and the third transistor is an enhancement-mode NMOS transistor.

29. The switching power supply controller according to claim 15, further comprising: A power supply circuit is used to provide a power supply voltage to the switch control circuit according to the input voltage.

30. The switching power supply controller according to claim 15, wherein, The power conversion circuit includes a floating Buck-Boost topology, a floating Buck topology, a Boost topology, and a flyback topology.

31. A switching power supply, comprising: The power conversion circuit uses a power switch to control the transfer of electrical energy from the input terminal to the output terminal of the power conversion circuit, thereby generating an output voltage based on the input voltage. as well as The switching power supply controller according to any one of claims 15-30.

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